tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
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Merge branch 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux

Pull i2c fixes from Wolfram Sang:
"Three driver bugfixes for I2C. Buisness as usual"

* 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
i2c: mediatek: Fix apdma and i2c hand-shake timeout
i2c: i801: Fix the i2c-mux gpiod_lookup_table not being properly terminated
i2c: sprd: use a specific timeout to avoid system hang up issue

Linus Torvalds caab3147 6bae85bd

+30 -7
unified split
+1 -1
drivers/i2c/busses/i2c-i801.c
··· 1449 1450 /* Register GPIO descriptor lookup table */ 1451 lookup = devm_kzalloc(dev, 1452 - struct_size(lookup, table, mux_config->n_gpios), 1453 GFP_KERNEL); 1454 if (!lookup) 1455 return -ENOMEM;
··· 1449 1450 /* Register GPIO descriptor lookup table */ 1451 lookup = devm_kzalloc(dev, 1452 + struct_size(lookup, table, mux_config->n_gpios + 1), 1453 GFP_KERNEL); 1454 if (!lookup) 1455 return -ENOMEM;
+22 -5
drivers/i2c/busses/i2c-mt65xx.c
··· 38 #define I2C_IO_CONFIG_OPEN_DRAIN 0x0003 39 #define I2C_IO_CONFIG_PUSH_PULL 0x0000 40 #define I2C_SOFT_RST 0x0001 41 #define I2C_FIFO_ADDR_CLR 0x0001 42 #define I2C_DELAY_LEN 0x0002 43 #define I2C_TIME_CLR_VALUE 0x0000 ··· 46 #define I2C_WRRD_TRANAC_VALUE 0x0002 47 #define I2C_RD_TRANAC_VALUE 0x0001 48 #define I2C_SCL_MIS_COMP_VALUE 0x0000 49 50 #define I2C_DMA_CON_TX 0x0000 51 #define I2C_DMA_CON_RX 0x0001 ··· 56 #define I2C_DMA_START_EN 0x0001 57 #define I2C_DMA_INT_FLAG_NONE 0x0000 58 #define I2C_DMA_CLR_FLAG 0x0000 59 #define I2C_DMA_HARD_RST 0x0002 60 61 #define MAX_SAMPLE_CNT_DIV 8 62 #define MAX_STEP_CNT_DIV 64 ··· 479 { 480 u16 control_reg; 481 482 - writel(I2C_DMA_HARD_RST, i2c->pdmabase + OFFSET_RST); 483 - udelay(50); 484 - writel(I2C_DMA_CLR_FLAG, i2c->pdmabase + OFFSET_RST); 485 - 486 - mtk_i2c_writew(i2c, I2C_SOFT_RST, OFFSET_SOFTRESET); 487 488 /* Set ioconfig */ 489 if (i2c->use_push_pull)
··· 38 #define I2C_IO_CONFIG_OPEN_DRAIN 0x0003 39 #define I2C_IO_CONFIG_PUSH_PULL 0x0000 40 #define I2C_SOFT_RST 0x0001 41 + #define I2C_HANDSHAKE_RST 0x0020 42 #define I2C_FIFO_ADDR_CLR 0x0001 43 #define I2C_DELAY_LEN 0x0002 44 #define I2C_TIME_CLR_VALUE 0x0000 ··· 45 #define I2C_WRRD_TRANAC_VALUE 0x0002 46 #define I2C_RD_TRANAC_VALUE 0x0001 47 #define I2C_SCL_MIS_COMP_VALUE 0x0000 48 + #define I2C_CHN_CLR_FLAG 0x0000 49 50 #define I2C_DMA_CON_TX 0x0000 51 #define I2C_DMA_CON_RX 0x0001 ··· 54 #define I2C_DMA_START_EN 0x0001 55 #define I2C_DMA_INT_FLAG_NONE 0x0000 56 #define I2C_DMA_CLR_FLAG 0x0000 57 + #define I2C_DMA_WARM_RST 0x0001 58 #define I2C_DMA_HARD_RST 0x0002 59 + #define I2C_DMA_HANDSHAKE_RST 0x0004 60 61 #define MAX_SAMPLE_CNT_DIV 8 62 #define MAX_STEP_CNT_DIV 64 ··· 475 { 476 u16 control_reg; 477 478 + if (i2c->dev_comp->dma_sync) { 479 + writel(I2C_DMA_WARM_RST, i2c->pdmabase + OFFSET_RST); 480 + udelay(10); 481 + writel(I2C_DMA_CLR_FLAG, i2c->pdmabase + OFFSET_RST); 482 + udelay(10); 483 + writel(I2C_DMA_HANDSHAKE_RST | I2C_DMA_HARD_RST, 484 + i2c->pdmabase + OFFSET_RST); 485 + mtk_i2c_writew(i2c, I2C_HANDSHAKE_RST | I2C_SOFT_RST, 486 + OFFSET_SOFTRESET); 487 + udelay(10); 488 + writel(I2C_DMA_CLR_FLAG, i2c->pdmabase + OFFSET_RST); 489 + mtk_i2c_writew(i2c, I2C_CHN_CLR_FLAG, OFFSET_SOFTRESET); 490 + } else { 491 + writel(I2C_DMA_HARD_RST, i2c->pdmabase + OFFSET_RST); 492 + udelay(50); 493 + writel(I2C_DMA_CLR_FLAG, i2c->pdmabase + OFFSET_RST); 494 + mtk_i2c_writew(i2c, I2C_SOFT_RST, OFFSET_SOFTRESET); 495 + } 496 497 /* Set ioconfig */ 498 if (i2c->use_push_pull)
+7 -1
drivers/i2c/busses/i2c-sprd.c
··· 72 73 /* timeout (ms) for pm runtime autosuspend */ 74 #define SPRD_I2C_PM_TIMEOUT 1000 75 76 /* SPRD i2c data structure */ 77 struct sprd_i2c { ··· 246 struct i2c_msg *msg, bool is_last_msg) 247 { 248 struct sprd_i2c *i2c_dev = i2c_adap->algo_data; 249 250 i2c_dev->msg = msg; 251 i2c_dev->buf = msg->buf; ··· 276 277 sprd_i2c_opt_start(i2c_dev); 278 279 - wait_for_completion(&i2c_dev->complete); 280 281 return i2c_dev->err; 282 }
··· 72 73 /* timeout (ms) for pm runtime autosuspend */ 74 #define SPRD_I2C_PM_TIMEOUT 1000 75 + /* timeout (ms) for transfer message */ 76 + #define I2C_XFER_TIMEOUT 1000 77 78 /* SPRD i2c data structure */ 79 struct sprd_i2c { ··· 244 struct i2c_msg *msg, bool is_last_msg) 245 { 246 struct sprd_i2c *i2c_dev = i2c_adap->algo_data; 247 + unsigned long time_left; 248 249 i2c_dev->msg = msg; 250 i2c_dev->buf = msg->buf; ··· 273 274 sprd_i2c_opt_start(i2c_dev); 275 276 + time_left = wait_for_completion_timeout(&i2c_dev->complete, 277 + msecs_to_jiffies(I2C_XFER_TIMEOUT)); 278 + if (!time_left) 279 + return -ETIMEDOUT; 280 281 return i2c_dev->err; 282 }