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MIPS: KVM: Trivial whitespace and style fixes

A bunch of misc whitespace and style fixes within arch/mips/kvm/.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Gleb Natapov <gleb@kernel.org>
Cc: kvm@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11883/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

authored by

James Hogan and committed by
Ralf Baechle caa1faa7 097d5638

+14 -15
+2 -1
arch/mips/Kconfig
··· 2027 2027 bool "KVM Guest Kernel" 2028 2028 depends on BROKEN_ON_SMP 2029 2029 help 2030 - Select this option if building a guest kernel for KVM (Trap & Emulate) mode 2030 + Select this option if building a guest kernel for KVM (Trap & Emulate) 2031 + mode. 2031 2032 2032 2033 config KVM_GUEST_TIMER_FREQ 2033 2034 int "Count/Compare Timer Frequency (MHz)"
+1 -1
arch/mips/include/asm/kvm_host.h
··· 58 58 #define KVM_MAX_VCPUS 1 59 59 #define KVM_USER_MEM_SLOTS 8 60 60 /* memory slots that does not exposed to userspace */ 61 - #define KVM_PRIVATE_MEM_SLOTS 0 61 + #define KVM_PRIVATE_MEM_SLOTS 0 62 62 63 63 #define KVM_COALESCED_MMIO_PAGE_OFFSET 1 64 64 #define KVM_HALT_POLL_NS_DEFAULT 500000
+3 -5
arch/mips/kvm/emulate.c
··· 1243 1243 #ifdef KVM_MIPS_DEBUG_COP0_COUNTERS 1244 1244 cop0->stat[MIPS_CP0_STATUS][0]++; 1245 1245 #endif 1246 - if (rt != 0) { 1246 + if (rt != 0) 1247 1247 vcpu->arch.gprs[rt] = 1248 1248 kvm_read_c0_guest_status(cop0); 1249 - } 1250 1249 /* EI */ 1251 1250 if (inst & 0x20) { 1252 1251 kvm_debug("[%#lx] mfmcz_op: EI\n", ··· 2582 2583 * an entry into the guest TLB. 2583 2584 */ 2584 2585 index = kvm_mips_guest_tlb_lookup(vcpu, 2585 - (va & VPN2_MASK) | 2586 - (kvm_read_c0_guest_entryhi 2587 - (vcpu->arch.cop0) & ASID_MASK)); 2586 + (va & VPN2_MASK) | 2587 + (kvm_read_c0_guest_entryhi(vcpu->arch.cop0) & ASID_MASK)); 2588 2588 if (index < 0) { 2589 2589 if (exccode == T_TLB_LD_MISS) { 2590 2590 er = kvm_mips_emulate_tlbmiss_ld(cause, opc, run, vcpu);
+6 -6
arch/mips/kvm/locore.S
··· 335 335 336 336 /* Now restore the host state just enough to run the handlers */ 337 337 338 - /* Swtich EBASE to the one used by Linux */ 338 + /* Switch EBASE to the one used by Linux */ 339 339 /* load up the host EBASE */ 340 340 mfc0 v0, CP0_STATUS 341 341 ··· 490 490 REG_ADDU t3, t1, t2 491 491 LONG_L k0, (t3) 492 492 andi k0, k0, 0xff 493 - mtc0 k0,CP0_ENTRYHI 493 + mtc0 k0, CP0_ENTRYHI 494 494 ehb 495 495 496 496 /* Disable RDHWR access */ 497 - mtc0 zero, CP0_HWRENA 497 + mtc0 zero, CP0_HWRENA 498 498 499 499 /* load the guest context from VCPU and return */ 500 500 LONG_L $0, VCPU_R0(k1) ··· 606 606 607 607 /* Restore RDHWR access */ 608 608 PTR_LI k0, 0x2000000F 609 - mtc0 k0, CP0_HWRENA 609 + mtc0 k0, CP0_HWRENA 610 610 611 611 /* Restore RA, which is the address we will return to */ 612 - LONG_L ra, PT_R31(k1) 613 - j ra 612 + LONG_L ra, PT_R31(k1) 613 + j ra 614 614 nop 615 615 616 616 VECTOR_END(MIPSX(GuestExceptionEnd))
+2 -2
arch/mips/kvm/tlb.c
··· 673 673 674 674 local_irq_save(flags); 675 675 676 - if (((vcpu->arch. 677 - guest_kernel_asid[cpu] ^ asid_cache(cpu)) & ASID_VERSION_MASK)) { 676 + if ((vcpu->arch.guest_kernel_asid[cpu] ^ asid_cache(cpu)) & 677 + ASID_VERSION_MASK) { 678 678 kvm_get_new_mmu_context(&vcpu->arch.guest_kernel_mm, cpu, vcpu); 679 679 vcpu->arch.guest_kernel_asid[cpu] = 680 680 vcpu->arch.guest_kernel_mm.context.asid[cpu];