Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'topic/drm-mipi-dsi-dsc-updates-2019-11-11' of ssh://git.freedesktop.org/git/drm-intel into drm-misc-next

Core Changes:
- Update DSI data type and command definitions
- Add helpers for sending compression mode and PPS packets

Driver Changes:
- Update tiny/st7586 to reflect a definition change

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
From: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/87tv7a4eq3.fsf@intel.com

+78 -9
+55 -2
drivers/gpu/drm/drm_mipi_dsi.c
··· 33 33 #include <linux/pm_runtime.h> 34 34 #include <linux/slab.h> 35 35 36 + #include <drm/drm_dsc.h> 36 37 #include <video/mipi_display.h> 37 38 38 39 /** ··· 374 373 case MIPI_DSI_V_SYNC_END: 375 374 case MIPI_DSI_H_SYNC_START: 376 375 case MIPI_DSI_H_SYNC_END: 376 + case MIPI_DSI_COMPRESSION_MODE: 377 377 case MIPI_DSI_END_OF_TRANSMISSION: 378 378 case MIPI_DSI_COLOR_MODE_OFF: 379 379 case MIPI_DSI_COLOR_MODE_ON: ··· 389 387 case MIPI_DSI_DCS_SHORT_WRITE: 390 388 case MIPI_DSI_DCS_SHORT_WRITE_PARAM: 391 389 case MIPI_DSI_DCS_READ: 392 - case MIPI_DSI_DCS_COMPRESSION_MODE: 390 + case MIPI_DSI_EXECUTE_QUEUE: 393 391 case MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE: 394 392 return true; 395 393 } ··· 408 406 bool mipi_dsi_packet_format_is_long(u8 type) 409 407 { 410 408 switch (type) { 411 - case MIPI_DSI_PPS_LONG_WRITE: 412 409 case MIPI_DSI_NULL_PACKET: 413 410 case MIPI_DSI_BLANKING_PACKET: 414 411 case MIPI_DSI_GENERIC_LONG_WRITE: 415 412 case MIPI_DSI_DCS_LONG_WRITE: 413 + case MIPI_DSI_PICTURE_PARAMETER_SET: 414 + case MIPI_DSI_COMPRESSED_PIXEL_STREAM: 416 415 case MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20: 417 416 case MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24: 418 417 case MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16: ··· 548 545 return (ret < 0) ? ret : 0; 549 546 } 550 547 EXPORT_SYMBOL(mipi_dsi_set_maximum_return_packet_size); 548 + 549 + /** 550 + * mipi_dsi_compression_mode() - enable/disable DSC on the peripheral 551 + * @dsi: DSI peripheral device 552 + * @enable: Whether to enable or disable the DSC 553 + * 554 + * Enable or disable Display Stream Compression on the peripheral using the 555 + * default Picture Parameter Set and VESA DSC 1.1 algorithm. 556 + * 557 + * Return: 0 on success or a negative error code on failure. 558 + */ 559 + ssize_t mipi_dsi_compression_mode(struct mipi_dsi_device *dsi, bool enable) 560 + { 561 + /* Note: Needs updating for non-default PPS or algorithm */ 562 + u8 tx[2] = { enable << 0, 0 }; 563 + struct mipi_dsi_msg msg = { 564 + .channel = dsi->channel, 565 + .type = MIPI_DSI_COMPRESSION_MODE, 566 + .tx_len = sizeof(tx), 567 + .tx_buf = tx, 568 + }; 569 + int ret = mipi_dsi_device_transfer(dsi, &msg); 570 + 571 + return (ret < 0) ? ret : 0; 572 + } 573 + EXPORT_SYMBOL(mipi_dsi_compression_mode); 574 + 575 + /** 576 + * mipi_dsi_picture_parameter_set() - transmit the DSC PPS to the peripheral 577 + * @dsi: DSI peripheral device 578 + * @pps: VESA DSC 1.1 Picture Parameter Set 579 + * 580 + * Transmit the VESA DSC 1.1 Picture Parameter Set to the peripheral. 581 + * 582 + * Return: 0 on success or a negative error code on failure. 583 + */ 584 + ssize_t mipi_dsi_picture_parameter_set(struct mipi_dsi_device *dsi, 585 + const struct drm_dsc_picture_parameter_set *pps) 586 + { 587 + struct mipi_dsi_msg msg = { 588 + .channel = dsi->channel, 589 + .type = MIPI_DSI_PICTURE_PARAMETER_SET, 590 + .tx_len = sizeof(*pps), 591 + .tx_buf = pps, 592 + }; 593 + int ret = mipi_dsi_device_transfer(dsi, &msg); 594 + 595 + return (ret < 0) ? ret : 0; 596 + } 597 + EXPORT_SYMBOL(mipi_dsi_picture_parameter_set); 551 598 552 599 /** 553 600 * mipi_dsi_generic_write() - transmit data using a generic write packet
+1 -1
drivers/gpu/drm/tiny/st7586.c
··· 240 240 241 241 mipi_dbi_command(dbi, ST7586_SET_DISP_DUTY, 0x7f); 242 242 mipi_dbi_command(dbi, ST7586_SET_PART_DISP, 0xa0); 243 - mipi_dbi_command(dbi, MIPI_DCS_SET_PARTIAL_AREA, 0x00, 0x00, 0x00, 0x77); 243 + mipi_dbi_command(dbi, MIPI_DCS_SET_PARTIAL_ROWS, 0x00, 0x00, 0x00, 0x77); 244 244 mipi_dbi_command(dbi, MIPI_DCS_EXIT_INVERT_MODE); 245 245 246 246 msleep(100);
+4
include/drm/drm_mipi_dsi.h
··· 13 13 14 14 struct mipi_dsi_host; 15 15 struct mipi_dsi_device; 16 + struct drm_dsc_picture_parameter_set; 16 17 17 18 /* request ACK from peripheral */ 18 19 #define MIPI_DSI_MSG_REQ_ACK BIT(0) ··· 229 228 int mipi_dsi_turn_on_peripheral(struct mipi_dsi_device *dsi); 230 229 int mipi_dsi_set_maximum_return_packet_size(struct mipi_dsi_device *dsi, 231 230 u16 value); 231 + ssize_t mipi_dsi_compression_mode(struct mipi_dsi_device *dsi, bool enable); 232 + ssize_t mipi_dsi_picture_parameter_set(struct mipi_dsi_device *dsi, 233 + const struct drm_dsc_picture_parameter_set *pps); 232 234 233 235 ssize_t mipi_dsi_generic_write(struct mipi_dsi_device *dsi, const void *payload, 234 236 size_t size);
+18 -6
include/video/mipi_display.h
··· 17 17 MIPI_DSI_H_SYNC_START = 0x21, 18 18 MIPI_DSI_H_SYNC_END = 0x31, 19 19 20 + MIPI_DSI_COMPRESSION_MODE = 0x07, 21 + MIPI_DSI_END_OF_TRANSMISSION = 0x08, 22 + 20 23 MIPI_DSI_COLOR_MODE_OFF = 0x02, 21 24 MIPI_DSI_COLOR_MODE_ON = 0x12, 22 25 MIPI_DSI_SHUTDOWN_PERIPHERAL = 0x22, ··· 37 34 MIPI_DSI_DCS_SHORT_WRITE_PARAM = 0x15, 38 35 39 36 MIPI_DSI_DCS_READ = 0x06, 40 - 41 - MIPI_DSI_DCS_COMPRESSION_MODE = 0x07, 42 - MIPI_DSI_PPS_LONG_WRITE = 0x0A, 37 + MIPI_DSI_EXECUTE_QUEUE = 0x16, 43 38 44 39 MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE = 0x37, 45 - 46 - MIPI_DSI_END_OF_TRANSMISSION = 0x08, 47 40 48 41 MIPI_DSI_NULL_PACKET = 0x09, 49 42 MIPI_DSI_BLANKING_PACKET = 0x19, 50 43 MIPI_DSI_GENERIC_LONG_WRITE = 0x29, 51 44 MIPI_DSI_DCS_LONG_WRITE = 0x39, 45 + 46 + MIPI_DSI_PICTURE_PARAMETER_SET = 0x0a, 47 + MIPI_DSI_COMPRESSED_PIXEL_STREAM = 0x0b, 52 48 53 49 MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20 = 0x0c, 54 50 MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24 = 0x1c, ··· 79 77 enum { 80 78 MIPI_DCS_NOP = 0x00, 81 79 MIPI_DCS_SOFT_RESET = 0x01, 80 + MIPI_DCS_GET_COMPRESSION_MODE = 0x03, 82 81 MIPI_DCS_GET_DISPLAY_ID = 0x04, 82 + MIPI_DCS_GET_ERROR_COUNT_ON_DSI = 0x05, 83 83 MIPI_DCS_GET_RED_CHANNEL = 0x06, 84 84 MIPI_DCS_GET_GREEN_CHANNEL = 0x07, 85 85 MIPI_DCS_GET_BLUE_CHANNEL = 0x08, ··· 96 92 MIPI_DCS_EXIT_SLEEP_MODE = 0x11, 97 93 MIPI_DCS_ENTER_PARTIAL_MODE = 0x12, 98 94 MIPI_DCS_ENTER_NORMAL_MODE = 0x13, 95 + MIPI_DCS_GET_IMAGE_CHECKSUM_RGB = 0x14, 96 + MIPI_DCS_GET_IMAGE_CHECKSUM_CT = 0x15, 99 97 MIPI_DCS_EXIT_INVERT_MODE = 0x20, 100 98 MIPI_DCS_ENTER_INVERT_MODE = 0x21, 101 99 MIPI_DCS_SET_GAMMA_CURVE = 0x26, ··· 108 102 MIPI_DCS_WRITE_MEMORY_START = 0x2C, 109 103 MIPI_DCS_WRITE_LUT = 0x2D, 110 104 MIPI_DCS_READ_MEMORY_START = 0x2E, 111 - MIPI_DCS_SET_PARTIAL_AREA = 0x30, 105 + MIPI_DCS_SET_PARTIAL_ROWS = 0x30, /* MIPI DCS 1.02 - MIPI_DCS_SET_PARTIAL_AREA before that */ 106 + MIPI_DCS_SET_PARTIAL_COLUMNS = 0x31, 112 107 MIPI_DCS_SET_SCROLL_AREA = 0x33, 113 108 MIPI_DCS_SET_TEAR_OFF = 0x34, 114 109 MIPI_DCS_SET_TEAR_ON = 0x35, ··· 119 112 MIPI_DCS_ENTER_IDLE_MODE = 0x39, 120 113 MIPI_DCS_SET_PIXEL_FORMAT = 0x3A, 121 114 MIPI_DCS_WRITE_MEMORY_CONTINUE = 0x3C, 115 + MIPI_DCS_SET_3D_CONTROL = 0x3D, 122 116 MIPI_DCS_READ_MEMORY_CONTINUE = 0x3E, 117 + MIPI_DCS_GET_3D_CONTROL = 0x3F, 118 + MIPI_DCS_SET_VSYNC_TIMING = 0x40, 123 119 MIPI_DCS_SET_TEAR_SCANLINE = 0x44, 124 120 MIPI_DCS_GET_SCANLINE = 0x45, 125 121 MIPI_DCS_SET_DISPLAY_BRIGHTNESS = 0x51, /* MIPI DCS 1.3 */ ··· 134 124 MIPI_DCS_SET_CABC_MIN_BRIGHTNESS = 0x5E, /* MIPI DCS 1.3 */ 135 125 MIPI_DCS_GET_CABC_MIN_BRIGHTNESS = 0x5F, /* MIPI DCS 1.3 */ 136 126 MIPI_DCS_READ_DDB_START = 0xA1, 127 + MIPI_DCS_READ_PPS_START = 0xA2, 137 128 MIPI_DCS_READ_DDB_CONTINUE = 0xA8, 129 + MIPI_DCS_READ_PPS_CONTINUE = 0xA9, 138 130 }; 139 131 140 132 /* MIPI DCS pixel formats */