Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

octeontx2-af: Refactor few NPC mcam APIs

Introduce lowlevel variant of rvu_mcam_remove/add_counter_from/to_rule
for better code reuse, which assumes necessary locks are taken at
higher level.

These low level functions would be used for implementing default rule
counter APIs in the subsequent patch.

Signed-off-by: Linu Cherian <lcherian@marvell.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Link: https://patch.msgid.link/20241105125620.2114301-2-lcherian@marvell.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

authored by

Linu Cherian and committed by
Jakub Kicinski
ca122473 619e4109

+92 -39
+5 -1
drivers/net/ethernet/marvell/octeontx2/af/rvu.h
··· 960 960 void rvu_npc_enable_default_entries(struct rvu *rvu, u16 pcifunc, int nixlf); 961 961 void rvu_npc_update_flowkey_alg_idx(struct rvu *rvu, u16 pcifunc, int nixlf, 962 962 int group, int alg_idx, int mcam_index); 963 - 963 + void __rvu_mcam_remove_counter_from_rule(struct rvu *rvu, u16 pcifunc, 964 + struct rvu_npc_mcam_rule *rule); 965 + void __rvu_mcam_add_counter_to_rule(struct rvu *rvu, u16 pcifunc, 966 + struct rvu_npc_mcam_rule *rule, 967 + struct npc_install_flow_rsp *rsp); 964 968 void rvu_npc_get_mcam_entry_alloc_info(struct rvu *rvu, u16 pcifunc, 965 969 int blkaddr, int *alloc_cnt, 966 970 int *enable_cnt);
+78 -11
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c
··· 2975 2975 return rc; 2976 2976 } 2977 2977 2978 - int rvu_mbox_handler_npc_mcam_alloc_counter(struct rvu *rvu, 2979 - struct npc_mcam_alloc_counter_req *req, 2980 - struct npc_mcam_alloc_counter_rsp *rsp) 2978 + static int __npc_mcam_alloc_counter(struct rvu *rvu, 2979 + struct npc_mcam_alloc_counter_req *req, 2980 + struct npc_mcam_alloc_counter_rsp *rsp) 2981 2981 { 2982 2982 struct npc_mcam *mcam = &rvu->hw->mcam; 2983 2983 u16 pcifunc = req->hdr.pcifunc; ··· 2998 2998 if (!req->contig && req->count > NPC_MAX_NONCONTIG_COUNTERS) 2999 2999 return NPC_MCAM_INVALID_REQ; 3000 3000 3001 - mutex_lock(&mcam->lock); 3002 3001 3003 3002 /* Check if unused counters are available or not */ 3004 3003 if (!rvu_rsrc_free_count(&mcam->counters)) { 3005 - mutex_unlock(&mcam->lock); 3006 3004 return NPC_MCAM_ALLOC_FAILED; 3007 3005 } 3008 3006 ··· 3033 3035 } 3034 3036 } 3035 3037 3036 - mutex_unlock(&mcam->lock); 3037 3038 return 0; 3038 3039 } 3039 3040 3040 - int rvu_mbox_handler_npc_mcam_free_counter(struct rvu *rvu, 3041 - struct npc_mcam_oper_counter_req *req, struct msg_rsp *rsp) 3041 + int rvu_mbox_handler_npc_mcam_alloc_counter(struct rvu *rvu, 3042 + struct npc_mcam_alloc_counter_req *req, 3043 + struct npc_mcam_alloc_counter_rsp *rsp) 3044 + { 3045 + struct npc_mcam *mcam = &rvu->hw->mcam; 3046 + int err; 3047 + 3048 + mutex_lock(&mcam->lock); 3049 + 3050 + err = __npc_mcam_alloc_counter(rvu, req, rsp); 3051 + 3052 + mutex_unlock(&mcam->lock); 3053 + return err; 3054 + } 3055 + 3056 + static int __npc_mcam_free_counter(struct rvu *rvu, 3057 + struct npc_mcam_oper_counter_req *req, 3058 + struct msg_rsp *rsp) 3042 3059 { 3043 3060 struct npc_mcam *mcam = &rvu->hw->mcam; 3044 3061 u16 index, entry = 0; ··· 3063 3050 if (blkaddr < 0) 3064 3051 return NPC_MCAM_INVALID_REQ; 3065 3052 3066 - mutex_lock(&mcam->lock); 3067 3053 err = npc_mcam_verify_counter(mcam, req->hdr.pcifunc, req->cntr); 3068 3054 if (err) { 3069 - mutex_unlock(&mcam->lock); 3070 3055 return err; 3071 3056 } 3072 3057 ··· 3088 3077 index, req->cntr); 3089 3078 } 3090 3079 3091 - mutex_unlock(&mcam->lock); 3092 3080 return 0; 3081 + } 3082 + 3083 + int rvu_mbox_handler_npc_mcam_free_counter(struct rvu *rvu, 3084 + struct npc_mcam_oper_counter_req *req, struct msg_rsp *rsp) 3085 + { 3086 + struct npc_mcam *mcam = &rvu->hw->mcam; 3087 + int err; 3088 + 3089 + mutex_lock(&mcam->lock); 3090 + 3091 + err = __npc_mcam_free_counter(rvu, req, rsp); 3092 + 3093 + mutex_unlock(&mcam->lock); 3094 + 3095 + return err; 3096 + } 3097 + 3098 + void __rvu_mcam_remove_counter_from_rule(struct rvu *rvu, u16 pcifunc, 3099 + struct rvu_npc_mcam_rule *rule) 3100 + { 3101 + struct npc_mcam_oper_counter_req free_req = { 0 }; 3102 + struct msg_rsp free_rsp; 3103 + 3104 + if (!rule->has_cntr) 3105 + return; 3106 + 3107 + free_req.hdr.pcifunc = pcifunc; 3108 + free_req.cntr = rule->cntr; 3109 + 3110 + __npc_mcam_free_counter(rvu, &free_req, &free_rsp); 3111 + rule->has_cntr = false; 3112 + } 3113 + 3114 + void __rvu_mcam_add_counter_to_rule(struct rvu *rvu, u16 pcifunc, 3115 + struct rvu_npc_mcam_rule *rule, 3116 + struct npc_install_flow_rsp *rsp) 3117 + { 3118 + struct npc_mcam_alloc_counter_req cntr_req = { 0 }; 3119 + struct npc_mcam_alloc_counter_rsp cntr_rsp = { 0 }; 3120 + int err; 3121 + 3122 + cntr_req.hdr.pcifunc = pcifunc; 3123 + cntr_req.contig = true; 3124 + cntr_req.count = 1; 3125 + 3126 + /* we try to allocate a counter to track the stats of this 3127 + * rule. If counter could not be allocated then proceed 3128 + * without counter because counters are limited than entries. 3129 + */ 3130 + err = __npc_mcam_alloc_counter(rvu, &cntr_req, &cntr_rsp); 3131 + if (!err && cntr_rsp.count) { 3132 + rule->cntr = cntr_rsp.cntr; 3133 + rule->has_cntr = true; 3134 + rsp->counter = rule->cntr; 3135 + } else { 3136 + rsp->counter = err; 3137 + } 3093 3138 } 3094 3139 3095 3140 int rvu_mbox_handler_npc_mcam_unmap_counter(struct rvu *rvu,
+9 -27
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c
··· 1081 1081 static void rvu_mcam_remove_counter_from_rule(struct rvu *rvu, u16 pcifunc, 1082 1082 struct rvu_npc_mcam_rule *rule) 1083 1083 { 1084 - struct npc_mcam_oper_counter_req free_req = { 0 }; 1085 - struct msg_rsp free_rsp; 1084 + struct npc_mcam *mcam = &rvu->hw->mcam; 1086 1085 1087 - if (!rule->has_cntr) 1088 - return; 1086 + mutex_lock(&mcam->lock); 1089 1087 1090 - free_req.hdr.pcifunc = pcifunc; 1091 - free_req.cntr = rule->cntr; 1088 + __rvu_mcam_remove_counter_from_rule(rvu, pcifunc, rule); 1092 1089 1093 - rvu_mbox_handler_npc_mcam_free_counter(rvu, &free_req, &free_rsp); 1094 - rule->has_cntr = false; 1090 + mutex_unlock(&mcam->lock); 1095 1091 } 1096 1092 1097 1093 static void rvu_mcam_add_counter_to_rule(struct rvu *rvu, u16 pcifunc, 1098 1094 struct rvu_npc_mcam_rule *rule, 1099 1095 struct npc_install_flow_rsp *rsp) 1100 1096 { 1101 - struct npc_mcam_alloc_counter_req cntr_req = { 0 }; 1102 - struct npc_mcam_alloc_counter_rsp cntr_rsp = { 0 }; 1103 - int err; 1097 + struct npc_mcam *mcam = &rvu->hw->mcam; 1104 1098 1105 - cntr_req.hdr.pcifunc = pcifunc; 1106 - cntr_req.contig = true; 1107 - cntr_req.count = 1; 1099 + mutex_lock(&mcam->lock); 1108 1100 1109 - /* we try to allocate a counter to track the stats of this 1110 - * rule. If counter could not be allocated then proceed 1111 - * without counter because counters are limited than entries. 1112 - */ 1113 - err = rvu_mbox_handler_npc_mcam_alloc_counter(rvu, &cntr_req, 1114 - &cntr_rsp); 1115 - if (!err && cntr_rsp.count) { 1116 - rule->cntr = cntr_rsp.cntr; 1117 - rule->has_cntr = true; 1118 - rsp->counter = rule->cntr; 1119 - } else { 1120 - rsp->counter = err; 1121 - } 1101 + __rvu_mcam_add_counter_to_rule(rvu, pcifunc, rule, rsp); 1102 + 1103 + mutex_unlock(&mcam->lock); 1122 1104 } 1123 1105 1124 1106 static int npc_mcast_update_action_index(struct rvu *rvu, struct npc_install_flow_req *req,