tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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ARM: convert PCI defines to variables

Convert PCIBIOS_MIN_IO and PCIBIOS_MIN_MEM to variables to allow
multi-platform builds. This also removes the requirement for a platform to
have a mach/hardware.h.

The default values for i/o and mem are 0x1000 and 0x01000000, respectively.
Per Arnd Bergmann, other values are likely to be incorrect, but this commit
does not try to address that issue.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>

Rob Herring c9d95fbe dc8d966b

+57 -110
+5 -1
arch/arm/include/asm/pci.h
··· 6 6 #include <asm-generic/pci-bridge.h> 7 7 8 8 #include <asm/mach/pci.h> /* for pci_sys_data */ 9 - #include <mach/hardware.h> /* for PCIBIOS_MIN_* */ 9 + 10 + extern unsigned long pcibios_min_io; 11 + #define PCIBIOS_MIN_IO pcibios_min_io 12 + extern unsigned long pcibios_min_mem; 13 + #define PCIBIOS_MIN_MEM pcibios_min_mem 10 14 11 15 static inline int pcibios_assign_all_busses(void) 12 16 {
-21
arch/arm/mach-cns3xxx/include/mach/hardware.h
··· 1 - /* 2 - * This file contains the hardware definitions of the Cavium Networks boards. 3 - * 4 - * Copyright 2003 ARM Limited. 5 - * Copyright 2008 Cavium Networks 6 - * 7 - * This file is free software; you can redistribute it and/or modify 8 - * it under the terms of the GNU General Public License, Version 2, as 9 - * published by the Free Software Foundation. 10 - */ 11 - 12 - #ifndef __MACH_HARDWARE_H 13 - #define __MACH_HARDWARE_H 14 - 15 - #include <asm/sizes.h> 16 - 17 - /* macro to get at IO space when running virtually */ 18 - #define PCIBIOS_MIN_IO 0x00000000 19 - #define PCIBIOS_MIN_MEM 0x00000000 20 - 21 - #endif
+3
arch/arm/mach-cns3xxx/pcie.c
··· 369 369 { 370 370 int i; 371 371 372 + pcibios_min_io = 0; 373 + pcibios_min_mem = 0; 374 + 372 375 hook_fault_code(16 + 6, cns3xxx_pcie_abort_handler, SIGBUS, 0, 373 376 "imprecise external abort"); 374 377
-2
arch/arm/mach-dove/include/mach/hardware.h
··· 11 11 12 12 #include "dove.h" 13 13 14 - #define PCIBIOS_MIN_IO 0x1000 15 - #define PCIBIOS_MIN_MEM 0x01000000 16 14 #define PCIMEM_BASE DOVE_PCIE0_MEM_PHYS_BASE 17 15 18 16
+2
arch/arm/mach-footbridge/dc21285.c
··· 295 295 unsigned int mem_size, mem_mask; 296 296 int cfn_mode; 297 297 298 + pcibios_min_mem = 0x81000000; 299 + 298 300 mem_size = (unsigned int)high_memory - PAGE_OFFSET; 299 301 for (mem_mask = 0x00100000; mem_mask < 0x10000000; mem_mask <<= 1) 300 302 if (mem_mask >= mem_size)
-3
arch/arm/mach-footbridge/include/mach/hardware.h
··· 100 100 extern void nw_cpld_modify(unsigned int mask, unsigned int set); 101 101 #endif 102 102 103 - #define PCIBIOS_MIN_IO 0x1000 104 - #define PCIBIOS_MIN_MEM 0x81000000 105 - 106 103 #endif
-3
arch/arm/mach-integrator/include/mach/hardware.h
··· 34 34 35 35 #define PCIMEM_BASE PCI_MEMORY_VADDR 36 36 37 - #define PCIBIOS_MIN_IO 0x6000 38 - #define PCIBIOS_MIN_MEM 0x00100000 39 - 40 37 /* macro to get at IO space when running virtually */ 41 38 #ifdef CONFIG_MMU 42 39 #define IO_ADDRESS(x) (((x) & 0x000fffff) | (((x) >> 4) & 0x0ff00000) | IO_BASE)
+3
arch/arm/mach-integrator/pci_v3.c
··· 502 502 unsigned int temp; 503 503 int ret; 504 504 505 + pcibios_min_io = 0x6000; 506 + pcibios_min_mem = 0x00100000; 507 + 505 508 /* 506 509 * Hook in our fault handler for PCI errors 507 510 */
-5
arch/arm/mach-iop13xx/include/mach/hardware.h
··· 3 3 #include <asm/types.h> 4 4 5 5 #ifndef __ASSEMBLY__ 6 - extern unsigned long iop13xx_pcibios_min_io; 7 - extern unsigned long iop13xx_pcibios_min_mem; 8 6 extern u16 iop13xx_dev_id(void); 9 7 extern void iop13xx_set_atu_mmr_bases(void); 10 8 #endif 11 - 12 - #define PCIBIOS_MIN_IO (iop13xx_pcibios_min_io) 13 - #define PCIBIOS_MIN_MEM (iop13xx_pcibios_min_mem) 14 9 15 10 /* 16 11 * Generic chipset bits
+2 -3
arch/arm/mach-iop13xx/pci.c
··· 39 39 u32 iop13xx_atux_mem_base; 40 40 size_t iop13xx_atue_mem_size; 41 41 size_t iop13xx_atux_mem_size; 42 - unsigned long iop13xx_pcibios_min_io = 0; 43 - unsigned long iop13xx_pcibios_min_mem = 0; 44 42 45 43 EXPORT_SYMBOL(iop13xx_atue_mem_base); 46 44 EXPORT_SYMBOL(iop13xx_atux_mem_base); ··· 969 971 __raw_writel(__raw_readl(IOP13XX_XBG_BECSR) & 3, IOP13XX_XBG_BECSR); 970 972 971 973 /* Setup the Min Address for PCI memory... */ 972 - iop13xx_pcibios_min_mem = IOP13XX_PCIX_LOWER_MEM_BA; 974 + pcibios_min_io = 0; 975 + pcibios_min_mem = IOP13XX_PCIX_LOWER_MEM_BA; 973 976 974 977 /* if Linux is given control of an ATU 975 978 * clear out its prior configuration,
-2
arch/arm/mach-iop32x/include/mach/hardware.h
··· 18 18 * but when we read them, we convert them to virtual addresses. See 19 19 * arch/arm/plat-iop/pci.c. 20 20 */ 21 - #define PCIBIOS_MIN_IO 0x00000000 22 - #define PCIBIOS_MIN_MEM 0x00000000 23 21 24 22 #ifndef __ASSEMBLY__ 25 23 void iop32x_init_irq(void);
-2
arch/arm/mach-iop33x/include/mach/hardware.h
··· 18 18 * but when we read them, we convert them to virtual addresses. See 19 19 * arch/arm/mach-iop3xx/iop3xx-pci.c 20 20 */ 21 - #define PCIBIOS_MIN_IO 0x00000000 22 - #define PCIBIOS_MIN_MEM 0x00000000 23 21 24 22 #ifndef __ASSEMBLY__ 25 23 void iop33x_init_irq(void);
-6
arch/arm/mach-ixp2000/include/mach/hardware.h
··· 19 19 #ifndef __ASM_ARCH_HARDWARE_H__ 20 20 #define __ASM_ARCH_HARDWARE_H__ 21 21 22 - /* 23 - * This needs to be platform-specific? 24 - */ 25 - #define PCIBIOS_MIN_IO 0x00000000 26 - #define PCIBIOS_MIN_MEM 0x00000000 27 - 28 22 #include "ixp2000-regs.h" /* Chipset Registers */ 29 23 30 24 /*
+3
arch/arm/mach-ixp2000/pci.c
··· 198 198 { 199 199 pci_set_flags(0); 200 200 201 + pcibios_min_io = 0; 202 + pcibios_min_mem = 0; 203 + 201 204 #ifndef CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO 202 205 /* 203 206 * Configure the PCI unit to properly byteswap I/O transactions,
-2
arch/arm/mach-ixp23xx/include/mach/hardware.h
··· 15 15 #define __ASM_ARCH_HARDWARE_H 16 16 17 17 /* PCI IO info */ 18 - #define PCIBIOS_MIN_IO 0x00000000 19 - #define PCIBIOS_MIN_MEM 0xe0000000 20 18 21 19 #include "ixp23xx.h" 22 20
+3
arch/arm/mach-ixp23xx/pci.c
··· 227 227 228 228 void __init ixp23xx_pci_preinit(void) 229 229 { 230 + pcibios_min_io = 0; 231 + pcibios_min_mem = 0xe0000000; 232 + 230 233 pci_set_flags(0); 231 234 232 235 ixp23xx_pci_common_init();
+5
arch/arm/mach-ixp4xx/common-pci.c
··· 346 346 { 347 347 unsigned long cpuid = read_cpuid_id(); 348 348 349 + #ifdef CONFIG_IXP4XX_INDIRECT_PCI 350 + pcibios_min_mem = 0x10000000; /* 1 GB of indirect PCI MMIO space */ 351 + #else 352 + pcibios_min_mem = 0x48000000; /* 64 MB of PCI MMIO space */ 353 + #endif 349 354 /* 350 355 * Determine which PCI read method to use. 351 356 * Rev 0 IXP425 requires workaround.
-3
arch/arm/mach-ixp4xx/include/mach/hardware.h
··· 17 17 #ifndef __ASM_ARCH_HARDWARE_H__ 18 18 #define __ASM_ARCH_HARDWARE_H__ 19 19 20 - #define PCIBIOS_MIN_IO 0x00001000 21 20 #ifdef CONFIG_IXP4XX_INDIRECT_PCI 22 - #define PCIBIOS_MIN_MEM 0x10000000 /* 1 GB of indirect PCI MMIO space */ 23 21 #define PCIBIOS_MAX_MEM 0x4FFFFFFF 24 22 #else 25 - #define PCIBIOS_MIN_MEM 0x48000000 /* 64 MB of PCI MMIO space */ 26 23 #define PCIBIOS_MAX_MEM 0x4BFFFFFF 27 24 #endif 28 25
-1
arch/arm/mach-kirkwood/include/mach/hardware.h
··· 11 11 12 12 #include "kirkwood.h" 13 13 14 - #define PCIBIOS_MIN_MEM 0x01000000 15 14 #define PCIMEM_BASE KIRKWOOD_PCIE_MEM_PHYS_BASE /* mem base for VGA */ 16 15 17 16
-7
arch/arm/mach-ks8695/include/mach/hardware.h
··· 42 42 #define KS8695_PCIIO_PA 0x80000000 43 43 #define KS8695_PCIIO_SIZE SZ_64K 44 44 45 - 46 - /* 47 - * PCI support 48 - */ 49 - #define PCIBIOS_MIN_IO 0 50 - #define PCIBIOS_MIN_MEM 0 51 - 52 45 #endif
+3
arch/arm/mach-ks8695/pci.c
··· 317 317 return; 318 318 } 319 319 320 + pcibios_min_io = 0; 321 + pcibios_min_mem = 0; 322 + 320 323 printk(KERN_INFO "PCI: Initialising\n"); 321 324 ks8695_show_pciregs(); 322 325
-2
arch/arm/mach-mv78xx0/include/mach/hardware.h
··· 11 11 12 12 #include "mv78xx0.h" 13 13 14 - #define PCIBIOS_MIN_IO 0x00001000 15 - #define PCIBIOS_MIN_MEM 0x01000000 16 14 #define PCIMEM_BASE MV78XX0_PCIE_MEM_PHYS_BASE /* mem base for VGA */ 17 15 18 16
-2
arch/arm/mach-orion5x/include/mach/hardware.h
··· 11 11 12 12 #include "orion5x.h" 13 13 14 - #define PCIBIOS_MIN_IO 0x00001000 15 - #define PCIBIOS_MIN_MEM 0x01000000 16 14 #define PCIMEM_BASE ORION5X_PCIE_MEM_PHYS_BASE 17 15 18 16
+3
arch/arm/mach-pxa/cm-x2xx-pci.c
··· 125 125 { 126 126 pr_info("Initializing CM-X2XX PCI subsystem\n"); 127 127 128 + pcibios_min_io = 0; 129 + pcibios_min_mem = 0; 130 + 128 131 __raw_writel(0x800, IT8152_PCI_CFG_ADDR); 129 132 if (__raw_readl(IT8152_PCI_CFG_DATA) == 0x81521283) { 130 133 pr_info("PCI Bridge found.\n");
-2
arch/arm/mach-pxa/include/mach/hardware.h
··· 337 337 #endif 338 338 339 339 #if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI) 340 - #define PCIBIOS_MIN_IO 0 341 - #define PCIBIOS_MIN_MEM 0 342 340 #define ARCH_HAS_DMA_SET_COHERENT_MASK 343 341 #endif 344 342
-7
arch/arm/mach-sa1100/include/mach/hardware.h
··· 76 76 #include "SA-1101.h" 77 77 #endif 78 78 79 - #if defined(CONFIG_ARCH_SA1100) && defined(CONFIG_PCI) 80 - #define PCIBIOS_MIN_IO 0 81 - #define PCIBIOS_MIN_MEM 0 82 - #define HAVE_ARCH_PCI_SET_DMA_MASK 1 83 - #endif 84 - 85 - 86 79 #endif /* _ASM_ARCH_HARDWARE_H */
+3
arch/arm/mach-sa1100/pci-nanoengine.c
··· 252 252 { 253 253 int ret = 0; 254 254 255 + pcibios_min_io = 0; 256 + pcibios_min_mem = 0; 257 + 255 258 if (nr == 0) { 256 259 sys->mem_offset = NANO_PCI_MEM_RW_PHYS; 257 260 sys->io_offset = 0x400;
-2
arch/arm/mach-shark/include/mach/hardware.h
··· 12 12 13 13 #define UNCACHEABLE_ADDR 0xdf010000 14 14 15 - #define PCIBIOS_MIN_IO 0x6000 16 - #define PCIBIOS_MIN_MEM 0x50000000 17 15 #define PCIMEM_BASE 0xe8000000 18 16 19 17 #endif
+8 -2
arch/arm/mach-shark/pci.c
··· 37 37 38 38 static int __init shark_pci_init(void) 39 39 { 40 - if (machine_is_shark()) 41 - pci_common_init(&shark_pci); 40 + if (!machine_is_shark()) 41 + return; 42 + 43 + pcibios_min_io = 0x6000; 44 + pcibios_min_mem = 0x50000000; 45 + 46 + pci_common_init(&shark_pci); 47 + 42 48 return 0; 43 49 } 44 50
-27
arch/arm/mach-tegra/include/mach/hardware.h
··· 1 - /* 2 - * arch/arm/mach-tegra/include/mach/hardware.h 3 - * 4 - * Copyright (C) 2010 Google, Inc. 5 - * 6 - * Author: 7 - * Colin Cross <ccross@google.com> 8 - * Erik Gilling <konkers@google.com> 9 - * 10 - * This software is licensed under the terms of the GNU General Public 11 - * License version 2, as published by the Free Software Foundation, and 12 - * may be copied, distributed, and modified under those terms. 13 - * 14 - * This program is distributed in the hope that it will be useful, 15 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 - * GNU General Public License for more details. 18 - * 19 - */ 20 - 21 - #ifndef __MACH_TEGRA_HARDWARE_H 22 - #define __MACH_TEGRA_HARDWARE_H 23 - 24 - #define PCIBIOS_MIN_IO 0x1000 25 - #define PCIBIOS_MIN_MEM 0 26 - 27 - #endif
+2
arch/arm/mach-tegra/pcie.c
··· 912 912 if (!(init_port0 || init_port1)) 913 913 return -ENODEV; 914 914 915 + pcibios_min_mem = 0; 916 + 915 917 err = tegra_pcie_get_resources(); 916 918 if (err) 917 919 return err;
-4
arch/arm/mach-versatile/include/mach/hardware.h
··· 30 30 #define VERSATILE_PCI_VIRT_BASE (void __iomem *)0xe8000000ul 31 31 #define VERSATILE_PCI_CFG_VIRT_BASE (void __iomem *)0xe9000000ul 32 32 33 - /* CIK guesswork */ 34 - #define PCIBIOS_MIN_IO 0x44000000 35 - #define PCIBIOS_MIN_MEM 0x50000000 36 - 37 33 /* macro to get at IO space when running virtually */ 38 34 #define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000) 39 35
+3
arch/arm/mach-versatile/pci.c
··· 311 311 312 312 void __init pci_versatile_preinit(void) 313 313 { 314 + pcibios_min_io = 0x44000000; 315 + pcibios_min_mem = 0x50000000; 316 + 314 317 __raw_writel(VERSATILE_PCI_MEM_BASE0 >> 28, PCI_IMAP0); 315 318 __raw_writel(VERSATILE_PCI_MEM_BASE1 >> 28, PCI_IMAP1); 316 319 __raw_writel(VERSATILE_PCI_MEM_BASE2 >> 28, PCI_IMAP2);
+6 -1
arch/arm/mm/iomap.c
··· 8 8 #include <linux/pci.h> 9 9 #include <linux/ioport.h> 10 10 #include <linux/io.h> 11 - #include <asm/pci.h> 12 11 13 12 #ifdef __io 14 13 void __iomem *ioport_map(unsigned long port, unsigned int nr) ··· 23 24 #endif 24 25 25 26 #ifdef CONFIG_PCI 27 + unsigned long pcibios_min_io = 0x1000; 28 + EXPORT_SYMBOL(pcibios_min_io); 29 + 30 + unsigned long pcibios_min_mem = 0x01000000; 31 + EXPORT_SYMBOL(pcibios_min_mem); 32 + 26 33 unsigned int pci_flags = PCI_REASSIGN_ALL_RSRC; 27 34 EXPORT_SYMBOL(pci_flags); 28 35
+3
arch/arm/plat-iop/pci.c
··· 374 374 375 375 void __init iop3xx_pci_preinit(void) 376 376 { 377 + pcibios_min_io = 0; 378 + pcibios_min_mem = 0; 379 + 377 380 iop3xx_atu_disable(); 378 381 iop3xx_atu_setup(); 379 382 iop3xx_atu_debug();