+2
-2
Documentation/arch/x86/sva.rst
+2
-2
Documentation/arch/x86/sva.rst
···
25
25
mmu_notifier() support to keep the device TLB cache and the CPU cache in
26
26
sync. When an ATS lookup fails for a virtual address, the device should
27
27
use the PRI in order to request the virtual address to be paged into the
28
-
CPU page tables. The device must use ATS again in order the fetch the
28
+
CPU page tables. The device must use ATS again in order to fetch the
29
29
translation before use.
30
30
31
31
Shared Hardware Workqueues
···
216
216
217
217
Single Root I/O Virtualization (SR-IOV) focuses on providing independent
218
218
hardware interfaces for virtualizing hardware. Hence, it's required to be
219
-
almost fully functional interface to software supporting the traditional
219
+
an almost fully functional interface to software supporting the traditional
220
220
BARs, space for interrupts via MSI-X, its own register layout.
221
221
Virtual Functions (VFs) are assisted by the Physical Function (PF)
222
222
driver.