tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
ARM: dts: stm32: Add DHCOR based Testbench board
Add DT for DHCOR Testbench board, which is a testbench for testing of
DHCOR SoM during manufacturing. This is effectively a trimmed down
version of AV96 board with CSI-2 bridge, HDMI bridge, WiFi, Audio and
LEDs removed and used as GPIOs instead. Furthermore, the PMIC Buck3
is always configured from PMIC NVM to cater for both 1V8 and 3V3 SoM
variant.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
authored by
Marek Vasut
and committed by
Alexandre Torgue
c8ce0dd7
21297212
+189
+1
arch/arm/boot/dts/Makefile
+1
arch/arm/boot/dts/Makefile
+17
arch/arm/boot/dts/stm32mp151a-dhcor-testbench.dts
+17
arch/arm/boot/dts/stm32mp151a-dhcor-testbench.dts
···
1
+
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2
+
/*
3
+
* Copyright (C) 2022 Marek Vasut <marex@denx.de>
4
+
*/
5
+
6
+
/dts-v1/;
7
+
8
+
#include "stm32mp151.dtsi"
9
+
#include "stm32mp15xx-dhcor-som.dtsi"
10
+
#include "stm32mp15xx-dhcor-testbench.dtsi"
11
+
12
+
/ {
13
+
model = "DH electronics STM32MP151A DHCOR Testbench";
14
+
compatible = "dh,stm32mp151a-dhcor-testbench",
15
+
"dh,stm32mp151a-dhcor-som",
16
+
"st,stm32mp151";
17
+
};
+171
arch/arm/boot/dts/stm32mp15xx-dhcor-testbench.dtsi
+171
arch/arm/boot/dts/stm32mp15xx-dhcor-testbench.dtsi
···
1
+
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2
+
/*
3
+
* Copyright (C) 2022 Marek Vasut <marex@denx.de>
4
+
*/
5
+
6
+
/ {
7
+
aliases {
8
+
ethernet0 = ðernet0;
9
+
mmc0 = &sdmmc1;
10
+
mmc1 = &sdmmc2;
11
+
serial0 = &uart4;
12
+
serial1 = &uart7;
13
+
spi0 = &qspi;
14
+
};
15
+
16
+
chosen {
17
+
stdout-path = "serial0:115200n8";
18
+
};
19
+
20
+
sd_switch: regulator-sd_switch {
21
+
compatible = "regulator-gpio";
22
+
regulator-name = "sd_switch";
23
+
regulator-min-microvolt = <1800000>;
24
+
regulator-max-microvolt = <2900000>;
25
+
regulator-type = "voltage";
26
+
regulator-always-on;
27
+
28
+
gpios = <&gpioi 5 GPIO_ACTIVE_HIGH>;
29
+
gpios-states = <0>;
30
+
states = <1800000 0x1>,
31
+
<2900000 0x0>;
32
+
};
33
+
};
34
+
35
+
&adc {
36
+
pinctrl-names = "default";
37
+
pinctrl-0 = <&adc12_ain_pins_b>;
38
+
vdd-supply = <&vdd>;
39
+
vdda-supply = <&vdda>;
40
+
vref-supply = <&vdda>;
41
+
status = "okay";
42
+
43
+
adc1: adc@0 {
44
+
st,adc-channels = <0 1 6>;
45
+
st,min-sample-time-nsecs = <5000>;
46
+
status = "okay";
47
+
};
48
+
49
+
adc2: adc@100 {
50
+
st,adc-channels = <0 1 2>;
51
+
st,min-sample-time-nsecs = <5000>;
52
+
status = "okay";
53
+
};
54
+
};
55
+
56
+
ðernet0 {
57
+
status = "okay";
58
+
pinctrl-0 = <ðernet0_rgmii_pins_c>;
59
+
pinctrl-1 = <ðernet0_rgmii_sleep_pins_c>;
60
+
pinctrl-names = "default", "sleep";
61
+
phy-mode = "rgmii";
62
+
max-speed = <1000>;
63
+
phy-handle = <&phy0>;
64
+
65
+
mdio0 {
66
+
#address-cells = <1>;
67
+
#size-cells = <0>;
68
+
compatible = "snps,dwmac-mdio";
69
+
reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>;
70
+
reset-delay-us = <1000>;
71
+
reset-post-delay-us = <1000>;
72
+
73
+
phy0: ethernet-phy@7 {
74
+
reg = <7>;
75
+
76
+
rxc-skew-ps = <1500>;
77
+
rxdv-skew-ps = <540>;
78
+
rxd0-skew-ps = <420>;
79
+
rxd1-skew-ps = <420>;
80
+
rxd2-skew-ps = <420>;
81
+
rxd3-skew-ps = <420>;
82
+
83
+
txc-skew-ps = <1440>;
84
+
txen-skew-ps = <540>;
85
+
txd0-skew-ps = <420>;
86
+
txd1-skew-ps = <420>;
87
+
txd2-skew-ps = <420>;
88
+
txd3-skew-ps = <420>;
89
+
};
90
+
};
91
+
};
92
+
93
+
&sdmmc1 {
94
+
pinctrl-names = "default", "opendrain", "sleep";
95
+
pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_b>;
96
+
pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_b>;
97
+
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_b>;
98
+
cd-gpios = <&gpioi 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
99
+
disable-wp;
100
+
st,sig-dir;
101
+
st,neg-edge;
102
+
st,use-ckin;
103
+
bus-width = <4>;
104
+
vmmc-supply = <&vdd_sd>;
105
+
vqmmc-supply = <&sd_switch>;
106
+
status = "okay";
107
+
};
108
+
109
+
&sdmmc2 {
110
+
pinctrl-names = "default", "opendrain", "sleep";
111
+
pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_c>;
112
+
pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_c>;
113
+
pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_c>;
114
+
bus-width = <8>;
115
+
mmc-ddr-1_8v;
116
+
no-sd;
117
+
no-sdio;
118
+
non-removable;
119
+
st,neg-edge;
120
+
vmmc-supply = <&v3v3>;
121
+
vqmmc-supply = <&v3v3>;
122
+
status = "okay";
123
+
};
124
+
125
+
&uart4 {
126
+
pinctrl-names = "default";
127
+
pinctrl-0 = <&uart4_pins_b>;
128
+
/delete-property/dmas;
129
+
/delete-property/dma-names;
130
+
status = "okay";
131
+
};
132
+
133
+
&uart7 {
134
+
pinctrl-names = "default";
135
+
pinctrl-0 = <&uart7_pins_a>;
136
+
uart-has-rtscts;
137
+
/delete-property/dmas;
138
+
/delete-property/dma-names;
139
+
status = "okay";
140
+
};
141
+
142
+
&usbh_ehci {
143
+
phys = <&usbphyc_port0>;
144
+
status = "okay";
145
+
};
146
+
147
+
&usbh_ohci {
148
+
phys = <&usbphyc_port0>;
149
+
status = "okay";
150
+
};
151
+
152
+
&usbotg_hs {
153
+
pinctrl-0 = <&usbotg_hs_pins_a>;
154
+
pinctrl-names = "default";
155
+
phy-names = "usb2-phy";
156
+
phys = <&usbphyc_port1 0>;
157
+
status = "okay";
158
+
vbus-supply = <&vbus_otg>;
159
+
};
160
+
161
+
&usbphyc {
162
+
status = "okay";
163
+
};
164
+
165
+
&usbphyc_port0 {
166
+
phy-supply = <&vdd_usb>;
167
+
};
168
+
169
+
&usbphyc_port1 {
170
+
phy-supply = <&vdd_usb>;
171
+
};