Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branch 'sh-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-3.x

* 'sh-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-3.x:
sh: use printk_ratelimited instead of printk_ratelimit
sh: Fix up unmet dependency warnings with USB EHCI/OHCI selects.
sh: fix the value of sh_dmae_slave_config in setup-sh7757
sh: fix the INTC vector for IRQ and IRL in setup-sh7757
sh: add to select the new configuration for USB EHCI/OHCI
sh: add platform_device of EHCI/OHCI to setup-sh7757
sh: fix compile error using sh7757lcr_defconfig

+94 -40
+5
arch/sh/Kconfig
··· 348 348 select SYS_SUPPORTS_CMT 349 349 select ARCH_WANT_OPTIONAL_GPIOLIB 350 350 select USB_ARCH_HAS_OHCI 351 + select USB_OHCI_SH if USB_OHCI_HCD 351 352 help 352 353 Select SH7720 if you have a SH3-DSP SH7720 CPU. 353 354 ··· 358 357 select CPU_HAS_DSP 359 358 select SYS_SUPPORTS_CMT 360 359 select USB_ARCH_HAS_OHCI 360 + select USB_OHCI_SH if USB_OHCI_HCD 361 361 help 362 362 Select SH7721 if you have a SH3-DSP SH7721 CPU. 363 363 ··· 442 440 bool "Support SH7763 processor" 443 441 select CPU_SH4A 444 442 select USB_ARCH_HAS_OHCI 443 + select USB_OHCI_SH if USB_OHCI_HCD 445 444 help 446 445 Select SH7763 if you have a SH4A SH7763(R5S77631) CPU. 447 446 ··· 470 467 select GENERIC_CLOCKEVENTS_BROADCAST if SMP 471 468 select ARCH_WANT_OPTIONAL_GPIOLIB 472 469 select USB_ARCH_HAS_OHCI 470 + select USB_OHCI_SH if USB_OHCI_HCD 473 471 select USB_ARCH_HAS_EHCI 472 + select USB_EHCI_SH if USB_EHCI_HCD 474 473 475 474 config CPU_SUBTYPE_SHX3 476 475 bool "Support SH-X3 processor"
+3 -5
arch/sh/configs/sh7757lcr_defconfig
··· 9 9 CONFIG_TASK_IO_ACCOUNTING=y 10 10 CONFIG_LOG_BUF_SHIFT=14 11 11 CONFIG_BLK_DEV_INITRD=y 12 - # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 13 12 # CONFIG_SYSCTL_SYSCALL is not set 14 13 CONFIG_KALLSYMS_ALL=y 15 14 CONFIG_SLAB=y ··· 38 39 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 39 40 # CONFIG_FW_LOADER is not set 40 41 CONFIG_MTD=y 41 - CONFIG_MTD_CONCAT=y 42 - CONFIG_MTD_PARTITIONS=y 43 42 CONFIG_MTD_CHAR=y 44 43 CONFIG_MTD_BLOCK=y 45 44 CONFIG_MTD_M25P80=y ··· 53 56 # CONFIG_KEYBOARD_ATKBD is not set 54 57 # CONFIG_MOUSE_PS2 is not set 55 58 # CONFIG_SERIO is not set 59 + # CONFIG_LEGACY_PTYS is not set 56 60 CONFIG_SERIAL_SH_SCI=y 57 61 CONFIG_SERIAL_SH_SCI_NR_UARTS=3 58 62 CONFIG_SERIAL_SH_SCI_CONSOLE=y 59 - # CONFIG_LEGACY_PTYS is not set 60 63 # CONFIG_HW_RANDOM is not set 61 64 CONFIG_SPI=y 62 65 CONFIG_SPI_SH=y 63 66 # CONFIG_HWMON is not set 64 - CONFIG_MFD_SH_MOBILE_SDHI=y 65 67 CONFIG_USB=y 66 68 CONFIG_USB_EHCI_HCD=y 69 + CONFIG_USB_EHCI_SH=y 67 70 CONFIG_USB_OHCI_HCD=y 71 + CONFIG_USB_OHCI_SH=y 68 72 CONFIG_USB_STORAGE=y 69 73 CONFIG_MMC=y 70 74 CONFIG_MMC_SDHI=y
+78 -28
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
··· 183 183 { 184 184 .slave_id = SHDMA_SLAVE_SCIF2_RX, 185 185 .addr = 0x1f4b0014, 186 - .chcr = SM_INC | 0x800 | 0x40000000 | 186 + .chcr = DM_INC | 0x800 | 0x40000000 | 187 187 TS_INDEX2VAL(XMIT_SZ_8BIT), 188 188 .mid_rid = 0x22, 189 189 }, ··· 197 197 { 198 198 .slave_id = SHDMA_SLAVE_SCIF3_RX, 199 199 .addr = 0x1f4c0014, 200 - .chcr = SM_INC | 0x800 | 0x40000000 | 200 + .chcr = DM_INC | 0x800 | 0x40000000 | 201 201 TS_INDEX2VAL(XMIT_SZ_8BIT), 202 202 .mid_rid = 0x2a, 203 203 }, ··· 211 211 { 212 212 .slave_id = SHDMA_SLAVE_SCIF4_RX, 213 213 .addr = 0x1f4d0014, 214 - .chcr = SM_INC | 0x800 | 0x40000000 | 214 + .chcr = DM_INC | 0x800 | 0x40000000 | 215 215 TS_INDEX2VAL(XMIT_SZ_8BIT), 216 216 .mid_rid = 0x42, 217 217 }, ··· 228 228 { 229 229 .slave_id = SHDMA_SLAVE_RIIC0_RX, 230 230 .addr = 0x1e500013, 231 - .chcr = SM_INC | 0x800 | 0x40000000 | 231 + .chcr = DM_INC | 0x800 | 0x40000000 | 232 232 TS_INDEX2VAL(XMIT_SZ_8BIT), 233 233 .mid_rid = 0x22, 234 234 }, ··· 242 242 { 243 243 .slave_id = SHDMA_SLAVE_RIIC1_RX, 244 244 .addr = 0x1e510013, 245 - .chcr = SM_INC | 0x800 | 0x40000000 | 245 + .chcr = DM_INC | 0x800 | 0x40000000 | 246 246 TS_INDEX2VAL(XMIT_SZ_8BIT), 247 247 .mid_rid = 0x2a, 248 248 }, ··· 256 256 { 257 257 .slave_id = SHDMA_SLAVE_RIIC2_RX, 258 258 .addr = 0x1e520013, 259 - .chcr = SM_INC | 0x800 | 0x40000000 | 259 + .chcr = DM_INC | 0x800 | 0x40000000 | 260 260 TS_INDEX2VAL(XMIT_SZ_8BIT), 261 261 .mid_rid = 0xa2, 262 262 }, ··· 265 265 .addr = 0x1e530012, 266 266 .chcr = SM_INC | 0x800 | 0x40000000 | 267 267 TS_INDEX2VAL(XMIT_SZ_8BIT), 268 - .mid_rid = 0xab, 268 + .mid_rid = 0xa9, 269 269 }, 270 270 { 271 271 .slave_id = SHDMA_SLAVE_RIIC3_RX, 272 272 .addr = 0x1e530013, 273 - .chcr = SM_INC | 0x800 | 0x40000000 | 273 + .chcr = DM_INC | 0x800 | 0x40000000 | 274 274 TS_INDEX2VAL(XMIT_SZ_8BIT), 275 275 .mid_rid = 0xaf, 276 276 }, ··· 279 279 .addr = 0x1e540012, 280 280 .chcr = SM_INC | 0x800 | 0x40000000 | 281 281 TS_INDEX2VAL(XMIT_SZ_8BIT), 282 - .mid_rid = 0xc1, 282 + .mid_rid = 0xc5, 283 283 }, 284 284 { 285 285 .slave_id = SHDMA_SLAVE_RIIC4_RX, 286 286 .addr = 0x1e540013, 287 - .chcr = SM_INC | 0x800 | 0x40000000 | 287 + .chcr = DM_INC | 0x800 | 0x40000000 | 288 288 TS_INDEX2VAL(XMIT_SZ_8BIT), 289 - .mid_rid = 0xc2, 289 + .mid_rid = 0xc6, 290 290 }, 291 291 }; 292 292 ··· 301 301 { 302 302 .slave_id = SHDMA_SLAVE_RIIC5_RX, 303 303 .addr = 0x1e550013, 304 - .chcr = SM_INC | 0x800 | 0x40000000 | 304 + .chcr = DM_INC | 0x800 | 0x40000000 | 305 305 TS_INDEX2VAL(XMIT_SZ_8BIT), 306 306 .mid_rid = 0x22, 307 307 }, ··· 315 315 { 316 316 .slave_id = SHDMA_SLAVE_RIIC6_RX, 317 317 .addr = 0x1e560013, 318 - .chcr = SM_INC | 0x800 | 0x40000000 | 318 + .chcr = DM_INC | 0x800 | 0x40000000 | 319 319 TS_INDEX2VAL(XMIT_SZ_8BIT), 320 320 .mid_rid = 0x2a, 321 321 }, ··· 329 329 { 330 330 .slave_id = SHDMA_SLAVE_RIIC7_RX, 331 331 .addr = 0x1e570013, 332 - .chcr = SM_INC | 0x800 | 0x40000000 | 332 + .chcr = DM_INC | 0x800 | 0x40000000 | 333 333 TS_INDEX2VAL(XMIT_SZ_8BIT), 334 334 .mid_rid = 0x42, 335 335 }, ··· 343 343 { 344 344 .slave_id = SHDMA_SLAVE_RIIC8_RX, 345 345 .addr = 0x1e580013, 346 - .chcr = SM_INC | 0x800 | 0x40000000 | 346 + .chcr = DM_INC | 0x800 | 0x40000000 | 347 347 TS_INDEX2VAL(XMIT_SZ_8BIT), 348 348 .mid_rid = 0x46, 349 349 }, ··· 357 357 { 358 358 .slave_id = SHDMA_SLAVE_RIIC9_RX, 359 359 .addr = 0x1e590013, 360 - .chcr = SM_INC | 0x800 | 0x40000000 | 360 + .chcr = DM_INC | 0x800 | 0x40000000 | 361 361 TS_INDEX2VAL(XMIT_SZ_8BIT), 362 362 .mid_rid = 0x52, 363 363 }, ··· 659 659 .resource = spi0_resources, 660 660 }; 661 661 662 + static struct resource usb_ehci_resources[] = { 663 + [0] = { 664 + .start = 0xfe4f1000, 665 + .end = 0xfe4f10ff, 666 + .flags = IORESOURCE_MEM, 667 + }, 668 + [1] = { 669 + .start = 57, 670 + .end = 57, 671 + .flags = IORESOURCE_IRQ, 672 + }, 673 + }; 674 + 675 + static struct platform_device usb_ehci_device = { 676 + .name = "sh_ehci", 677 + .id = -1, 678 + .dev = { 679 + .dma_mask = &usb_ehci_device.dev.coherent_dma_mask, 680 + .coherent_dma_mask = DMA_BIT_MASK(32), 681 + }, 682 + .num_resources = ARRAY_SIZE(usb_ehci_resources), 683 + .resource = usb_ehci_resources, 684 + }; 685 + 686 + static struct resource usb_ohci_resources[] = { 687 + [0] = { 688 + .start = 0xfe4f1800, 689 + .end = 0xfe4f18ff, 690 + .flags = IORESOURCE_MEM, 691 + }, 692 + [1] = { 693 + .start = 57, 694 + .end = 57, 695 + .flags = IORESOURCE_IRQ, 696 + }, 697 + }; 698 + 699 + static struct platform_device usb_ohci_device = { 700 + .name = "sh_ohci", 701 + .id = -1, 702 + .dev = { 703 + .dma_mask = &usb_ohci_device.dev.coherent_dma_mask, 704 + .coherent_dma_mask = DMA_BIT_MASK(32), 705 + }, 706 + .num_resources = ARRAY_SIZE(usb_ohci_resources), 707 + .resource = usb_ohci_resources, 708 + }; 709 + 662 710 static struct platform_device *sh7757_devices[] __initdata = { 663 711 &scif2_device, 664 712 &scif3_device, ··· 718 670 &dma2_device, 719 671 &dma3_device, 720 672 &spi0_device, 673 + &usb_ehci_device, 674 + &usb_ohci_device, 721 675 }; 722 676 723 677 static int __init sh7757_devices_setup(void) ··· 1089 1039 1090 1040 /* Support for external interrupt pins in IRQ mode */ 1091 1041 static struct intc_vect vectors_irq0123[] __initdata = { 1092 - INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280), 1093 - INTC_VECT(IRQ2, 0x2c0), INTC_VECT(IRQ3, 0x300), 1042 + INTC_VECT(IRQ0, 0x200), INTC_VECT(IRQ1, 0x240), 1043 + INTC_VECT(IRQ2, 0x280), INTC_VECT(IRQ3, 0x2c0), 1094 1044 }; 1095 1045 1096 1046 static struct intc_vect vectors_irq4567[] __initdata = { 1097 - INTC_VECT(IRQ4, 0x340), INTC_VECT(IRQ5, 0x380), 1098 - INTC_VECT(IRQ6, 0x3c0), INTC_VECT(IRQ7, 0x200), 1047 + INTC_VECT(IRQ4, 0x300), INTC_VECT(IRQ5, 0x340), 1048 + INTC_VECT(IRQ6, 0x380), INTC_VECT(IRQ7, 0x3c0), 1099 1049 }; 1100 1050 1101 1051 static struct intc_sense_reg sense_registers[] __initdata = { ··· 1129 1079 }; 1130 1080 1131 1081 static struct intc_vect vectors_irl4567[] __initdata = { 1132 - INTC_VECT(IRL4_LLLL, 0xb00), INTC_VECT(IRL4_LLLH, 0xb20), 1133 - INTC_VECT(IRL4_LLHL, 0xb40), INTC_VECT(IRL4_LLHH, 0xb60), 1134 - INTC_VECT(IRL4_LHLL, 0xb80), INTC_VECT(IRL4_LHLH, 0xba0), 1135 - INTC_VECT(IRL4_LHHL, 0xbc0), INTC_VECT(IRL4_LHHH, 0xbe0), 1136 - INTC_VECT(IRL4_HLLL, 0xc00), INTC_VECT(IRL4_HLLH, 0xc20), 1137 - INTC_VECT(IRL4_HLHL, 0xc40), INTC_VECT(IRL4_HLHH, 0xc60), 1138 - INTC_VECT(IRL4_HHLL, 0xc80), INTC_VECT(IRL4_HHLH, 0xca0), 1139 - INTC_VECT(IRL4_HHHL, 0xcc0), 1082 + INTC_VECT(IRL4_LLLL, 0x200), INTC_VECT(IRL4_LLLH, 0x220), 1083 + INTC_VECT(IRL4_LLHL, 0x240), INTC_VECT(IRL4_LLHH, 0x260), 1084 + INTC_VECT(IRL4_LHLL, 0x280), INTC_VECT(IRL4_LHLH, 0x2a0), 1085 + INTC_VECT(IRL4_LHHL, 0x2c0), INTC_VECT(IRL4_LHHH, 0x2e0), 1086 + INTC_VECT(IRL4_HLLL, 0x300), INTC_VECT(IRL4_HLLH, 0x320), 1087 + INTC_VECT(IRL4_HLHL, 0x340), INTC_VECT(IRL4_HLHH, 0x360), 1088 + INTC_VECT(IRL4_HHLL, 0x380), INTC_VECT(IRL4_HHLH, 0x3a0), 1089 + INTC_VECT(IRL4_HHHL, 0x3c0), 1140 1090 }; 1141 1091 1142 1092 static DECLARE_INTC_DESC(intc_desc_irl0123, "sh7757-irl0123", vectors_irl0123,
+3 -3
arch/sh/kernel/irq.c
··· 13 13 #include <linux/seq_file.h> 14 14 #include <linux/ftrace.h> 15 15 #include <linux/delay.h> 16 + #include <linux/ratelimit.h> 16 17 #include <asm/processor.h> 17 18 #include <asm/machvec.h> 18 19 #include <asm/uaccess.h> ··· 269 268 unsigned int newcpu = cpumask_any_and(data->affinity, 270 269 cpu_online_mask); 271 270 if (newcpu >= nr_cpu_ids) { 272 - if (printk_ratelimit()) 273 - printk(KERN_INFO "IRQ%u no longer affine to CPU%u\n", 274 - irq, cpu); 271 + pr_info_ratelimited("IRQ%u no longer affine to CPU%u\n", 272 + irq, cpu); 275 273 276 274 cpumask_setall(data->affinity); 277 275 newcpu = cpumask_any_and(data->affinity,
+5 -4
arch/sh/mm/alignment.c
··· 13 13 #include <linux/seq_file.h> 14 14 #include <linux/proc_fs.h> 15 15 #include <linux/uaccess.h> 16 + #include <linux/ratelimit.h> 16 17 #include <asm/alignment.h> 17 18 #include <asm/processor.h> 18 19 ··· 96 95 void unaligned_fixups_notify(struct task_struct *tsk, insn_size_t insn, 97 96 struct pt_regs *regs) 98 97 { 99 - if (user_mode(regs) && (se_usermode & UM_WARN) && printk_ratelimit()) 100 - pr_notice("Fixing up unaligned userspace access " 98 + if (user_mode(regs) && (se_usermode & UM_WARN)) 99 + pr_notice_ratelimited("Fixing up unaligned userspace access " 101 100 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n", 102 101 tsk->comm, task_pid_nr(tsk), 103 102 (void *)instruction_pointer(regs), insn); 104 - else if (se_kernmode_warn && printk_ratelimit()) 105 - pr_notice("Fixing up unaligned kernel access " 103 + else if (se_kernmode_warn) 104 + pr_notice_ratelimited("Fixing up unaligned kernel access " 106 105 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n", 107 106 tsk->comm, task_pid_nr(tsk), 108 107 (void *)instruction_pointer(regs), insn);