Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

vsprintf: use %pR, %pr instead of %pRt, %pRf

Jesse accidentally applied v1 [1] of the patchset instead of v2 [2]. This
is the diff between v1 and v2.

The changes in this patch are:
- tidied vsprintf stack buffer to shrink and compute size more
accurately
- use %pR for decoding and %pr for "raw" (with type and flags) instead
of adding %pRt and %pRf

[1] http://lkml.org/lkml/2009/10/6/491
[2] http://lkml.org/lkml/2009/10/13/441

Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>

authored by

Bjorn Helgaas and committed by
Jesse Barnes
c7dabef8 4fd8bdc5

+114 -107
+7 -4
arch/ia64/pci/pci.c
··· 298 298 window->offset = offset; 299 299 300 300 if (insert_resource(root, &window->resource)) { 301 - dev_err(&info->bridge->dev, "can't allocate %pRt\n", 301 + dev_err(&info->bridge->dev, 302 + "can't allocate host bridge window %pR\n", 302 303 &window->resource); 303 304 } else { 304 305 if (offset) 305 - dev_info(&info->bridge->dev, "host bridge window: %pRt " 306 + dev_info(&info->bridge->dev, "host bridge window %pR " 306 307 "(PCI address [%#llx-%#llx])\n", 307 308 &window->resource, 308 309 window->resource.start - offset, 309 310 window->resource.end - offset); 310 311 else 311 312 dev_info(&info->bridge->dev, 312 - "host bridge window: %pRt\n", 313 + "host bridge window %pR\n", 313 314 &window->resource); 314 315 } 315 316 ··· 331 330 (res->end - res->start < 16)) 332 331 continue; 333 332 if (j >= PCI_BUS_NUM_RESOURCES) { 334 - dev_warn(&bus->dev, "ignoring %pRf (no space)\n", res); 333 + dev_warn(&bus->dev, 334 + "ignoring host bridge window %pR (no space)\n", 335 + res); 335 336 continue; 336 337 } 337 338 bus->resource[j++] = res;
+4 -3
arch/x86/pci/acpi.c
··· 108 108 res->child = NULL; 109 109 110 110 if (insert_resource(root, res)) { 111 - dev_err(&info->bridge->dev, "can't allocate %pRt\n", res); 111 + dev_err(&info->bridge->dev, 112 + "can't allocate host bridge window %pR\n", res); 112 113 } else { 113 114 info->bus->resource[info->res_num] = res; 114 115 info->res_num++; 115 116 if (addr.translation_offset) 116 - dev_info(&info->bridge->dev, "host bridge window: %pRt " 117 + dev_info(&info->bridge->dev, "host bridge window %pR " 117 118 "(PCI address [%#llx-%#llx])\n", 118 119 res, res->start - addr.translation_offset, 119 120 res->end - addr.translation_offset); 120 121 else 121 122 dev_info(&info->bridge->dev, 122 - "host bridge window: %pRt\n", res); 123 + "host bridge window %pR\n", res); 123 124 } 124 125 return AE_OK; 125 126 }
+6 -5
arch/x86/pci/i386.c
··· 129 129 continue; 130 130 if (!r->start || 131 131 pci_claim_resource(dev, idx) < 0) { 132 - dev_info(&dev->dev, "BAR %d: can't allocate %pRt\n", idx, r); 132 + dev_info(&dev->dev, "BAR %d: can't allocate %pR\n", idx, r); 133 133 /* 134 134 * Something is wrong with the region. 135 135 * Invalidate the resource to prevent ··· 164 164 else 165 165 disabled = !(command & PCI_COMMAND_MEMORY); 166 166 if (pass == disabled) { 167 - dev_dbg(&dev->dev, "%pRf (d=%d, p=%d)\n", r, 168 - disabled, pass); 167 + dev_dbg(&dev->dev, 168 + "BAR %d: claiming %pr (d=%d, p=%d)\n", 169 + idx, r, disabled, pass); 169 170 if (pci_claim_resource(dev, idx) < 0) { 170 - dev_info(&dev->dev, "BAR %d: can't allocate %pRt\n", idx, r); 171 + dev_info(&dev->dev, "BAR %d: can't claim %pR\n", idx, r); 171 172 /* We'll assign a new address later */ 172 173 r->end -= r->start; 173 174 r->start = 0; ··· 181 180 /* Turn the ROM off, leave the resource region, 182 181 * but keep it unregistered. */ 183 182 u32 reg; 184 - dev_dbg(&dev->dev, "disabling ROM %pRt\n", r); 183 + dev_dbg(&dev->dev, "disabling ROM %pR\n", r); 185 184 r->flags &= ~IORESOURCE_ROM_ENABLE; 186 185 pci_read_config_dword(dev, 187 186 dev->rom_base_reg, &reg);
+1 -1
drivers/pci/pci.c
··· 1713 1713 return 0; 1714 1714 1715 1715 err_out: 1716 - dev_warn(&pdev->dev, "BAR %d: can't reserve %pRt\n", bar, 1716 + dev_warn(&pdev->dev, "BAR %d: can't reserve %pR\n", bar, 1717 1717 &pdev->resource[bar]); 1718 1718 return -EBUSY; 1719 1719 }
+9 -8
drivers/pci/probe.c
··· 225 225 if (!sz64) 226 226 goto fail; 227 227 228 - res->flags |= IORESOURCE_MEM_64; 229 - 230 228 if ((sizeof(resource_size_t) < 8) && (sz64 > 0x100000000ULL)) { 231 229 dev_err(&dev->dev, "can't handle 64-bit BAR\n"); 232 230 goto fail; 233 - } else if ((sizeof(resource_size_t) < 8) && l) { 231 + } 232 + 233 + res->flags |= IORESOURCE_MEM_64; 234 + if ((sizeof(resource_size_t) < 8) && l) { 234 235 /* Address above 32-bit boundary; disable the BAR */ 235 236 pci_write_config_dword(dev, pos, 0); 236 237 pci_write_config_dword(dev, pos + 4, 0); ··· 240 239 } else { 241 240 res->start = l64; 242 241 res->end = l64 + sz64; 243 - dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pRt\n", 242 + dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n", 244 243 pos, res); 245 244 } 246 245 } else { ··· 252 251 res->start = l; 253 252 res->end = l + sz; 254 253 255 - dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pRt\n", pos, res); 254 + dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n", pos, res); 256 255 } 257 256 258 257 out: ··· 320 319 res->start = base; 321 320 if (!res->end) 322 321 res->end = limit + 0xfff; 323 - dev_printk(KERN_DEBUG, &dev->dev, "bridge window: %pRt\n", res); 322 + dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res); 324 323 } 325 324 326 325 res = child->resource[1]; ··· 332 331 res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM; 333 332 res->start = base; 334 333 res->end = limit + 0xfffff; 335 - dev_printk(KERN_DEBUG, &dev->dev, "bridge window: %pRt\n", res); 334 + dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res); 336 335 } 337 336 338 337 res = child->resource[2]; ··· 371 370 res->flags |= IORESOURCE_MEM_64; 372 371 res->start = base; 373 372 res->end = limit + 0xfffff; 374 - dev_printk(KERN_DEBUG, &dev->dev, "bridge window: %pRt\n", res); 373 + dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res); 375 374 } 376 375 } 377 376
+1 -1
drivers/pci/quirks.c
··· 357 357 pcibios_bus_to_resource(dev, res, &bus_region); 358 358 359 359 pci_claim_resource(dev, nr); 360 - dev_info(&dev->dev, "quirk: region %04x-%04x claimed by %s\n", region, region + size - 1, name); 360 + dev_info(&dev->dev, "quirk: %pR claimed by %s\n", res, name); 361 361 } 362 362 } 363 363
+36 -43
drivers/pci/setup-bus.c
··· 71 71 void pci_setup_cardbus(struct pci_bus *bus) 72 72 { 73 73 struct pci_dev *bridge = bus->self; 74 + struct resource *res; 74 75 struct pci_bus_region region; 75 76 76 77 dev_info(&bridge->dev, "CardBus bridge, secondary bus %04x:%02x\n", 77 78 pci_domain_nr(bus), bus->number); 78 79 79 - pcibios_resource_to_bus(bridge, &region, bus->resource[0]); 80 - if (bus->resource[0]->flags & IORESOURCE_IO) { 80 + res = bus->resource[0]; 81 + pcibios_resource_to_bus(bridge, &region, res); 82 + if (res->flags & IORESOURCE_IO) { 81 83 /* 82 84 * The IO resource is allocated a range twice as large as it 83 85 * would normally need. This allows us to set both IO regs. 84 86 */ 85 - dev_info(&bridge->dev, " IO window: %#08lx-%#08lx\n", 86 - (unsigned long)region.start, 87 - (unsigned long)region.end); 87 + dev_info(&bridge->dev, " bridge window %pR\n", res); 88 88 pci_write_config_dword(bridge, PCI_CB_IO_BASE_0, 89 89 region.start); 90 90 pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_0, 91 91 region.end); 92 92 } 93 93 94 - pcibios_resource_to_bus(bridge, &region, bus->resource[1]); 95 - if (bus->resource[1]->flags & IORESOURCE_IO) { 96 - dev_info(&bridge->dev, " IO window: %#08lx-%#08lx\n", 97 - (unsigned long)region.start, 98 - (unsigned long)region.end); 94 + res = bus->resource[1]; 95 + pcibios_resource_to_bus(bridge, &region, res); 96 + if (res->flags & IORESOURCE_IO) { 97 + dev_info(&bridge->dev, " bridge window %pR\n", res); 99 98 pci_write_config_dword(bridge, PCI_CB_IO_BASE_1, 100 99 region.start); 101 100 pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_1, 102 101 region.end); 103 102 } 104 103 105 - pcibios_resource_to_bus(bridge, &region, bus->resource[2]); 106 - if (bus->resource[2]->flags & IORESOURCE_MEM) { 107 - dev_info(&bridge->dev, " PREFETCH window: %#08lx-%#08lx\n", 108 - (unsigned long)region.start, 109 - (unsigned long)region.end); 104 + res = bus->resource[2]; 105 + pcibios_resource_to_bus(bridge, &region, res); 106 + if (res->flags & IORESOURCE_MEM) { 107 + dev_info(&bridge->dev, " bridge window %pR\n", res); 110 108 pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0, 111 109 region.start); 112 110 pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_0, 113 111 region.end); 114 112 } 115 113 116 - pcibios_resource_to_bus(bridge, &region, bus->resource[3]); 117 - if (bus->resource[3]->flags & IORESOURCE_MEM) { 118 - dev_info(&bridge->dev, " MEM window: %#08lx-%#08lx\n", 119 - (unsigned long)region.start, 120 - (unsigned long)region.end); 114 + res = bus->resource[3]; 115 + pcibios_resource_to_bus(bridge, &region, res); 116 + if (res->flags & IORESOURCE_MEM) { 117 + dev_info(&bridge->dev, " bridge window %pR\n", res); 121 118 pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1, 122 119 region.start); 123 120 pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_1, ··· 137 140 static void pci_setup_bridge(struct pci_bus *bus) 138 141 { 139 142 struct pci_dev *bridge = bus->self; 143 + struct resource *res; 140 144 struct pci_bus_region region; 141 145 u32 l, bu, lu, io_upper16; 142 146 int pref_mem64; ··· 149 151 pci_domain_nr(bus), bus->number); 150 152 151 153 /* Set up the top and bottom of the PCI I/O segment for this bus. */ 152 - pcibios_resource_to_bus(bridge, &region, bus->resource[0]); 153 - if (bus->resource[0]->flags & IORESOURCE_IO) { 154 + res = bus->resource[0]; 155 + pcibios_resource_to_bus(bridge, &region, res); 156 + if (res->flags & IORESOURCE_IO) { 154 157 pci_read_config_dword(bridge, PCI_IO_BASE, &l); 155 158 l &= 0xffff0000; 156 159 l |= (region.start >> 8) & 0x00f0; 157 160 l |= region.end & 0xf000; 158 161 /* Set up upper 16 bits of I/O base/limit. */ 159 162 io_upper16 = (region.end & 0xffff0000) | (region.start >> 16); 160 - dev_info(&bridge->dev, " IO window: %#04lx-%#04lx\n", 161 - (unsigned long)region.start, 162 - (unsigned long)region.end); 163 + dev_info(&bridge->dev, " bridge window %pR\n", res); 163 164 } 164 165 else { 165 166 /* Clear upper 16 bits of I/O base/limit. */ 166 167 io_upper16 = 0; 167 168 l = 0x00f0; 168 - dev_info(&bridge->dev, " IO window: disabled\n"); 169 + dev_info(&bridge->dev, " bridge window [io disabled]\n"); 169 170 } 170 171 /* Temporarily disable the I/O range before updating PCI_IO_BASE. */ 171 172 pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, 0x0000ffff); ··· 175 178 176 179 /* Set up the top and bottom of the PCI Memory segment 177 180 for this bus. */ 178 - pcibios_resource_to_bus(bridge, &region, bus->resource[1]); 179 - if (bus->resource[1]->flags & IORESOURCE_MEM) { 181 + res = bus->resource[1]; 182 + pcibios_resource_to_bus(bridge, &region, res); 183 + if (res->flags & IORESOURCE_MEM) { 180 184 l = (region.start >> 16) & 0xfff0; 181 185 l |= region.end & 0xfff00000; 182 - dev_info(&bridge->dev, " MEM window: %#08lx-%#08lx\n", 183 - (unsigned long)region.start, 184 - (unsigned long)region.end); 186 + dev_info(&bridge->dev, " bridge window %pR\n", res); 185 187 } 186 188 else { 187 189 l = 0x0000fff0; 188 - dev_info(&bridge->dev, " MEM window: disabled\n"); 190 + dev_info(&bridge->dev, " bridge window [mem disabled]\n"); 189 191 } 190 192 pci_write_config_dword(bridge, PCI_MEMORY_BASE, l); 191 193 ··· 196 200 /* Set up PREF base/limit. */ 197 201 pref_mem64 = 0; 198 202 bu = lu = 0; 199 - pcibios_resource_to_bus(bridge, &region, bus->resource[2]); 200 - if (bus->resource[2]->flags & IORESOURCE_PREFETCH) { 201 - int width = 8; 203 + res = bus->resource[2]; 204 + pcibios_resource_to_bus(bridge, &region, res); 205 + if (res->flags & IORESOURCE_PREFETCH) { 202 206 l = (region.start >> 16) & 0xfff0; 203 207 l |= region.end & 0xfff00000; 204 - if (bus->resource[2]->flags & IORESOURCE_MEM_64) { 208 + if (res->flags & IORESOURCE_MEM_64) { 205 209 pref_mem64 = 1; 206 210 bu = upper_32_bits(region.start); 207 211 lu = upper_32_bits(region.end); 208 - width = 16; 209 212 } 210 - dev_info(&bridge->dev, " PREFETCH window: %#0*llx-%#0*llx\n", 211 - width, (unsigned long long)region.start, 212 - width, (unsigned long long)region.end); 213 + dev_info(&bridge->dev, " bridge window %pR\n", res); 213 214 } 214 215 else { 215 216 l = 0x0000fff0; 216 - dev_info(&bridge->dev, " PREFETCH window: disabled\n"); 217 + dev_info(&bridge->dev, " bridge window [mem pref disabled]\n"); 217 218 } 218 219 pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, l); 219 220 ··· 384 391 order = __ffs(align) - 20; 385 392 if (order > 11) { 386 393 dev_warn(&dev->dev, "BAR %d: bad alignment %llx: " 387 - "%pRt\n", i, (unsigned long long)align, r); 394 + "%pR\n", i, (unsigned long long)align, r); 388 395 r->flags = 0; 389 396 continue; 390 397 } ··· 575 582 if (!res || !res->end) 576 583 continue; 577 584 578 - dev_printk(KERN_DEBUG, &bus->dev, "resource %d %pRt\n", i, res); 585 + dev_printk(KERN_DEBUG, &bus->dev, "resource %d %pR\n", i, res); 579 586 } 580 587 } 581 588
+11 -9
drivers/pci/setup-res.c
··· 51 51 52 52 pcibios_resource_to_bus(dev, &region, res); 53 53 54 - dev_dbg(&dev->dev, "BAR %d: got %pRf (bus addr [%#llx-%#llx])\n", 55 - resno, res, (unsigned long long)region.start, 56 - (unsigned long long)region.end); 54 + dev_dbg(&dev->dev, "BAR %d: got res %pR bus [%#llx-%#llx] " 55 + "flags %#lx\n", resno, res, 56 + (unsigned long long)region.start, 57 + (unsigned long long)region.end, 58 + (unsigned long)res->flags); 57 59 58 60 new = region.start | (res->flags & PCI_REGION_FLAG_MASK); 59 61 if (res->flags & IORESOURCE_IO) ··· 91 89 } 92 90 } 93 91 res->flags &= ~IORESOURCE_UNSET; 94 - dev_dbg(&dev->dev, "BAR %d: moved to bus addr [%#llx-%#llx]\n", 95 - resno, (unsigned long long)region.start, 92 + dev_dbg(&dev->dev, "BAR %d: moved to %pR (bus addr [%#llx-%#llx])\n", 93 + resno, res, (unsigned long long)region.start, 96 94 (unsigned long long)region.end); 97 95 } 98 96 ··· 110 108 111 109 if (err) { 112 110 const char *dtype = resource < PCI_BRIDGE_RESOURCES ? "device" : "bridge"; 113 - dev_err(&dev->dev, "BAR %d: %s %s %pRt\n", 111 + dev_err(&dev->dev, "BAR %d: %s of %s %pR\n", 114 112 resource, 115 113 root ? "address space collision on" : 116 114 "no parent found for", ··· 181 179 182 180 align = pci_resource_alignment(dev, res); 183 181 if (!align) { 184 - dev_info(&dev->dev, "BAR %d: can't allocate %pRf " 182 + dev_info(&dev->dev, "BAR %d: can't allocate %pR " 185 183 "(bogus alignment)\n", resno, res); 186 184 return -EINVAL; 187 185 } ··· 198 196 } 199 197 200 198 if (ret) 201 - dev_info(&dev->dev, "BAR %d: can't allocate %pRt\n", 199 + dev_info(&dev->dev, "BAR %d: can't allocate %pR\n", 202 200 resno, res); 203 201 204 202 return ret; ··· 224 222 225 223 r_align = pci_resource_alignment(dev, r); 226 224 if (!r_align) { 227 - dev_warn(&dev->dev, "BAR %d: bogus alignment %pRf\n", 225 + dev_warn(&dev->dev, "BAR %d: %pR has bogus alignment\n", 228 226 i, r); 229 227 continue; 230 228 }
+3 -2
drivers/pnp/quirks.c
··· 285 285 * the PCI region, and that might prevent a PCI 286 286 * driver from requesting its resources. 287 287 */ 288 - dev_warn(&dev->dev, "resource %pRt overlaps %s " 289 - "BAR %d %pRt, disabling\n", res, 288 + dev_warn(&dev->dev, 289 + "disabling %pR because it overlaps " 290 + "%s BAR %d %pR\n", res, 290 291 pci_name(pdev), i, &pdev->resource[i]); 291 292 res->flags |= IORESOURCE_DISABLED; 292 293 }
+4 -4
drivers/pnp/resource.c
··· 517 517 res->start = irq; 518 518 res->end = irq; 519 519 520 - pnp_dbg(&dev->dev, " add %pRf\n", res); 520 + pnp_dbg(&dev->dev, " add %pr\n", res); 521 521 return pnp_res; 522 522 } 523 523 ··· 538 538 res->start = dma; 539 539 res->end = dma; 540 540 541 - pnp_dbg(&dev->dev, " add %pRf\n", res); 541 + pnp_dbg(&dev->dev, " add %pr\n", res); 542 542 return pnp_res; 543 543 } 544 544 ··· 562 562 res->start = start; 563 563 res->end = end; 564 564 565 - pnp_dbg(&dev->dev, " add %pRf\n", res); 565 + pnp_dbg(&dev->dev, " add %pr\n", res); 566 566 return pnp_res; 567 567 } 568 568 ··· 586 586 res->start = start; 587 587 res->end = end; 588 588 589 - pnp_dbg(&dev->dev, " add %pRf\n", res); 589 + pnp_dbg(&dev->dev, " add %pr\n", res); 590 590 return pnp_res; 591 591 } 592 592
+1 -1
drivers/pnp/support.c
··· 82 82 else { 83 83 pnp_dbg(&dev->dev, "%s: current resources:\n", desc); 84 84 list_for_each_entry(pnp_res, &dev->resources, list) 85 - pnp_dbg(&dev->dev, "%pRf\n", &pnp_res->res); 85 + pnp_dbg(&dev->dev, "%pr\n", &pnp_res->res); 86 86 } 87 87 } 88 88
+1 -1
drivers/pnp/system.c
··· 48 48 * example do reserve stuff they know about too, so we may well 49 49 * have double reservations. 50 50 */ 51 - dev_info(&dev->dev, "%pRt %s reserved\n", r, 51 + dev_info(&dev->dev, "%pR %s reserved\n", r, 52 52 res ? "has been" : "could not be"); 53 53 } 54 54
+30 -25
lib/vsprintf.c
··· 624 624 .precision = -1, 625 625 .flags = SPECIAL | SMALL, 626 626 }; 627 - /* 628 - * room for three actual numbers (decimal or hex), plus 629 - * "[mem 0x-0x 64bit pref disabled flags 0x]\0" 630 - */ 631 - char sym[3*3*sizeof(resource_size_t) + 41]; 627 + 628 + /* 32-bit res (sizeof==4): 10 chars in dec, 10 in hex ("0x" + 8) 629 + * 64-bit res (sizeof==8): 20 chars in dec, 18 in hex ("0x" + 16) */ 630 + #define RSRC_BUF_SIZE ((2 * sizeof(resource_size_t)) + 4) 631 + #define FLAG_BUF_SIZE (2 * sizeof(res->flags)) 632 + #define DECODED_BUF_SIZE sizeof("[mem - 64bit pref disabled]") 633 + #define RAW_BUF_SIZE sizeof("[mem - flags 0x]") 634 + char sym[max(2*RSRC_BUF_SIZE + DECODED_BUF_SIZE, 635 + 2*RSRC_BUF_SIZE + FLAG_BUF_SIZE + RAW_BUF_SIZE)]; 636 + 632 637 char *p = sym, *pend = sym + sizeof(sym); 633 638 int size = -1, addr = 0; 639 + int decode = (fmt[0] == 'R') ? 1 : 0; 634 640 635 641 if (res->flags & IORESOURCE_IO) { 636 642 size = IO_RSRC_PRINTK_SIZE; ··· 647 641 } 648 642 649 643 *p++ = '['; 650 - if (fmt[1] == 't' || fmt[1] == 'f') { 651 - if (res->flags & IORESOURCE_IO) 652 - p = string(p, pend, "io ", str_spec); 653 - else if (res->flags & IORESOURCE_MEM) 654 - p = string(p, pend, "mem ", str_spec); 655 - else if (res->flags & IORESOURCE_IRQ) 656 - p = string(p, pend, "irq ", str_spec); 657 - else if (res->flags & IORESOURCE_DMA) 658 - p = string(p, pend, "dma ", str_spec); 644 + if (res->flags & IORESOURCE_IO) 645 + p = string(p, pend, "io ", str_spec); 646 + else if (res->flags & IORESOURCE_MEM) 647 + p = string(p, pend, "mem ", str_spec); 648 + else if (res->flags & IORESOURCE_IRQ) 649 + p = string(p, pend, "irq ", str_spec); 650 + else if (res->flags & IORESOURCE_DMA) 651 + p = string(p, pend, "dma ", str_spec); 652 + else { 653 + p = string(p, pend, "??? ", str_spec); 654 + decode = 0; 659 655 } 660 656 hex_spec.field_width = size; 661 657 p = number(p, pend, res->start, addr ? hex_spec : dec_spec); ··· 665 657 *p++ = '-'; 666 658 p = number(p, pend, res->end, addr ? hex_spec : dec_spec); 667 659 } 668 - if (fmt[1] == 't' || fmt[1] == 'f') { 660 + if (decode) { 669 661 if (res->flags & IORESOURCE_MEM_64) 670 662 p = string(p, pend, " 64bit", str_spec); 671 663 if (res->flags & IORESOURCE_PREFETCH) 672 664 p = string(p, pend, " pref", str_spec); 673 665 if (res->flags & IORESOURCE_DISABLED) 674 666 p = string(p, pend, " disabled", str_spec); 675 - if (fmt[1] == 'f') { 676 - p = string(p, pend, " flags ", str_spec); 677 - p = number(p, pend, res->flags & ~IORESOURCE_TYPE_BITS, 678 - flag_spec); 679 - } 667 + } else { 668 + p = string(p, pend, " flags ", str_spec); 669 + p = number(p, pend, res->flags, flag_spec); 680 670 } 681 671 *p++ = ']'; 682 - *p = 0; 672 + *p = '\0'; 683 673 684 674 return string(buf, end, sym, spec); 685 675 } ··· 853 847 * - 'f' For simple symbolic function names without offset 854 848 * - 'S' For symbolic direct pointers with offset 855 849 * - 's' For symbolic direct pointers without offset 856 - * - 'R' For a struct resource pointer, print: 857 - * R address range only ([0x0-0x1f]) 858 - * Rt type and range ([mem 0x0-0x1f 64bit pref]) 859 - * Rf type, range, and flags ([mem 0x0-0x1f 64bit pref flags 0x1]) 850 + * - 'R' For decoded struct resource, e.g., [mem 0x0-0x1f 64bit pref] 851 + * - 'r' For raw struct resource, e.g., [mem 0x0-0x1f flags 0x201] 860 852 * - 'M' For a 6-byte MAC address, it prints the address in the 861 853 * usual colon-separated hex notation 862 854 * - 'm' For a 6-byte MAC address, it prints the hex address without colons ··· 885 881 case 'S': 886 882 return symbol_string(buf, end, ptr, spec, *fmt); 887 883 case 'R': 884 + case 'r': 888 885 return resource_string(buf, end, ptr, spec, fmt); 889 886 case 'M': /* Colon separated: 00:01:02:03:04:05 */ 890 887 case 'm': /* Contiguous: 000102030405 */