Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'iio-for-4.10a' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next

Jonathan writes:

First round of IIO new device support, features and cleanups for the 4.10 cycle.

Fair number of outreachy related patches in here. Some of these may well
have already been picked up by Greg but git will sort that out for us.

Also some good staging cleanup work from other sources. Thanks Brian and Lars
in particular for this.

New device support
* ACCES 104-quad-8
- New driver for this 8 channel encoder input board. Lots of new ABI with
this one.
* AD7766
- New driver supporting AD7766, AD7766-1, AD7766-2, AD7767, AD7767-1 and
AD7767-2 24 bit ADCs.
* dmard 10
- New driver for this 3 axis accelerometer.
* Honeywell ABP pressure sensors.
- New driver covering 56 parts in this series (too many to list here!)
* HTS221
- New driver to support this relative humidiy and temperature device.
* LMP91000
- New driver for this potentiostat (form of chemical sensor). Nice example
of use of the buffered consumer interfaces and the use of a consumer
provided trigger.
* MiraMEMS DA311
- New driver for this 3 axis accelerometer.
* MiraMEMS DA280
- New driver for this 3 axis accelerometer. Follow up caught up with
vendor prefixes for these.

Staging graduations
* isl29018 light sensor
- Fixes and cleanups listed below (thanks for your hard work on this Brian!)
* sca3000
- Fixes and cleanups listed below. This was one of the small set of drivers
that went into staging when IIO was first added. Turns out it had a few
bugs and needed to be brought into the modern era! Not clear if I am
the only person who actually has one of these still wired to a board.

New features (Core)
- Add an iio_trigger_validate_own_device helper which relies on the device
and trigger having the same parent. Convenient to have this for some
of the more complex trigger / device interactions. Was hand rolled in
a few drivers already so good to bring it into the core.
- Add an iio_read_channel_offset in kernel access helper (similar to
the existing one for scale).
- IIO_ATTR_{RO, WO, RW} and IIO_DEVICE_ATTR_{RO, WO, RW} macros. These
lead some rather contrived function naming, but there is no denying they
do reduced boilerplate. I'm going to resist their introduction in
drivers 'unless' they form part of a larger set of cleanups.
- Counter channel type and index type.

New features (Drivers)
* hdc100x
- Triggered buffer support.
* mcp4725
- Device tree bindings and support.
- Voltage reference selection.
* ti-adc0832
- Triggered buffer support.
* ti-adc161s626
- Add regulator support allowing _scale and _offset values to be established
and exported.

New features (Tools)
* iio_generic_buffer
- -A option to force enable all channels rather than faulting if some are
already enabled (like -a does). Followup patches tidied this support up.

Cleanups (Core)
- Use kmalloc_array in iio_scan_mask_set.
- Take event_attrs field of iio_info structure constant
- Staging todo list updates. Most of it was long done.
- MAINTAINERS had a wrong directory listing.

Cleanups (Drivers)
* Missing i2c trivial devices entries.
* ad5592r
- Fix an endian type related sparse warnings.
* ad7150
- Constify the event attribute_group structures.
* ad7152
- Add some blank lines to improve readability.
- Sampling frequency control via chan-info element rather than hand rolled
attributes.
- add a new lock to avoid use of mlock for non state change related locking.
* ad7280
- Constify atrribute_group structure (second patch covers the event ones)
* ad7606 (Lars is driving most of the cleanup on this with some additions from
Eva)
- Fix improper setting of oversampling pins. This has been broken a very
long time in this staging driver, so not going to push this back to stable.
- Implement oversampling configuration via the chan_info mask element.
- Remove an unused int_vref_mv field.
- Remove a reundant name field from ad7606_chip_info.
- Remove default device configuration from platform_data in favour of
whatever the power on defaults are.
- Remove out of band error reporting in the kernel log as not providing
much information.
- Fix oversampling ratio by having 1 be the value for no oversampling.
- Avoid allocating buffer for each data capture.
- Factor out common code between periodic and one-shot capture.
- Move set_drvdat into common code.
- Let the common probe function return int rather than jumping through
an ERR_PTR.
- Pass struct device * into common remove to simplify code.
- Always run trigger handler only once per event (no one can remember why
it was being possibly done twice).
- Move over to the GPIO descriptor API to shorten and clarify code.
- Move the buffer code into the main file as it's not optional and is
now rather short in this driver.
- Fix the naming of the supply regulator.
- Rework regulator handling to handle errors including deferred probing.
- Tidy up a ptr_err or 0 return.
* ad7746
- Sampling frequency control via info_mask element rather than hand rolled
* ad7758
- Sampling frequency control via info_mask element rather than hand rolled
attributes.
* ad7816
- Constify the event attribute_group structure.
* adt7316
- Constify the event attribute group structures.
* ak8974
- Cleanup some sparse warnings about endian types.
* ak8975
- Cleanup some sparse warnings about endian types.
* bmi160
- Spare endian warning cleanups.
* isl29018 (towards staging graduation)
- Remove unusedvariables and defines.
- Improve consistency of error handling.
- Signed / unsigned comparison fixes.
- Use the IIO_DEVICE_ATTR_{RO, RW} macros
- Fix a race in in_illuminance_scale_available_show.
- Cleanup exit points of _read_raw
- Sanity check if in suspended state during a write_raw call as was already
done for read_raw.
- Document device tree bidnings.
- Document infrared supression controls.
- Add some newlines to improve readability and drop one that shouldn't be
there.
- Fix a poorly named functions name.
- Fix multiline coment syntax.
- Tidy up a pair or return statements by unifying them.
- Rename description in Kconfig for consistency with similar drivers.
* lidar
- cleanup power management by dropping unnecessary call.
* ltr501
- Use the claim_direct_mode helpers. Fix a race condition along the way.
* max1027
- Fix a dubious x | !y sparse warning.
- Use the new iio_trigger_validate_own_device helper.
* max440000
- Clean up some sparse warnings about endian types.
* mcp4725
- Use the regulator framework to establish the reference voltage rather than
getting it from platform data.
- Tidy up a comment typo.
- Fix a wrong PTR_ERR query (wrong regulator).
* mma7660
- Take a mma7660_nscale static.
* mma8452
- Use the new iio_trigger_validate_own_device helper.
- Use claim_direct_mode helpers - fix a race condition along the way.
* mpl3115
- Use claim_direct_mode helpers - fix a race condition along the way.
* ms65611
- Tidy up regulator error handling and clean out a static warning in the mix.
* sca3000
- Avoid a potential unitialized variable if a hardware read returns a value
that isn't actually supported (mostly warning supression).
- Fix a use before setting of the indio_dev->buffer pointer. Broken for
a very long time so not going to rush this into stable.
- Merge buffer file with core file. We used to always split these.
Sometimes it's just not worth the hassle. In this case the device's main
feature is it's hardware fifos so unlikely anyone would want to run it
without.
- Drop the sca3000_register_ring_funcs function as it's a pointless wrapper
once we have only one file.
- Fix cleaning of flag + setting of size of scan. Without this you can't
start the buffer twice and expect sensible (or any) results. Again,
broken for a long time so not heading for stable.
- Drop the custom watershed setting ABI - for now we'll just support one
value.
- Move to a hybrid hard / soft buffer design (how we've been doing it
for similar devices for a while now!)
- Cleanup some unusued variables.
- Use a fake channel to support core handling of freefall event registration.
- Cleanup the register defines.
- Fix an off by one error in axis due to IIO_NO_MOD taking up the 0 value.
Been broken since first admission of IIO to the staging tree.
- Add readback of the 3db low pass filter frequency and later writing
allowing droppign of custom measurement mode attributes as they can
be represented by the filter choices that is their main characteristic.
- Drop non standard revision attr and replace with dev_info on probe.
- Avoid a race in probe.
- Various formatting fixes.
- Kernel-docify docs that were very nearly in the write format.
* tsl2583
- Constify attribute_group structure.
* zpa2326
- Drop a redundant DEBUG ifdef.

Cleanups (Tools)
* iio_generic_buffer
- Fix the ? arguement. Previously it sort of worked as you got the help
message as a result of it not recognising the arguement.

+7197 -3230
+18
Documentation/ABI/testing/sysfs-bus-iio
··· 329 329 What: /sys/bus/iio/devices/iio:deviceX/in_humidityrelative_scale 330 330 What: /sys/bus/iio/devices/iio:deviceX/in_velocity_sqrt(x^2+y^2+z^2)_scale 331 331 What: /sys/bus/iio/devices/iio:deviceX/in_illuminance_scale 332 + What: /sys/bus/iio/devices/iio:deviceX/in_countY_scale 332 333 KernelVersion: 2.6.35 333 334 Contact: linux-iio@vger.kernel.org 334 335 Description: ··· 1580 1579 Description: 1581 1580 Raw (unscaled no offset etc.) electric conductivity reading that 1582 1581 can be processed to siemens per meter. 1582 + 1583 + What: /sys/bus/iio/devices/iio:deviceX/in_countY_raw 1584 + KernelVersion: 4.9 1585 + Contact: linux-iio@vger.kernel.org 1586 + Description: 1587 + Raw counter device counts from channel Y. For quadrature 1588 + counters, multiplication by an available [Y]_scale results in 1589 + the counts of a single quadrature signal phase from channel Y. 1590 + 1591 + What: /sys/bus/iio/devices/iio:deviceX/in_indexY_raw 1592 + KernelVersion: 4.9 1593 + Contact: linux-iio@vger.kernel.org 1594 + Description: 1595 + Raw counter device index value from channel Y. This attribute 1596 + provides an absolute positional reference (e.g. a pulse once per 1597 + revolution) which may be used to home positional systems as 1598 + required.
+125
Documentation/ABI/testing/sysfs-bus-iio-counter-104-quad-8
··· 1 + What: /sys/bus/iio/devices/iio:deviceX/in_count_count_direction_available 2 + What: /sys/bus/iio/devices/iio:deviceX/in_count_count_mode_available 3 + What: /sys/bus/iio/devices/iio:deviceX/in_count_noise_error_available 4 + What: /sys/bus/iio/devices/iio:deviceX/in_count_quadrature_mode_available 5 + What: /sys/bus/iio/devices/iio:deviceX/in_index_index_polarity_available 6 + What: /sys/bus/iio/devices/iio:deviceX/in_index_synchronous_mode_available 7 + KernelVersion: 4.9 8 + Contact: linux-iio@vger.kernel.org 9 + Description: 10 + Discrete set of available values for the respective counter 11 + configuration are listed in this file. 12 + 13 + What: /sys/bus/iio/devices/iio:deviceX/in_countY_count_direction 14 + KernelVersion: 4.9 15 + Contact: linux-iio@vger.kernel.org 16 + Description: 17 + Read-only attribute that indicates whether the counter for 18 + channel Y is counting up or down. 19 + 20 + What: /sys/bus/iio/devices/iio:deviceX/in_countY_count_mode 21 + KernelVersion: 4.9 22 + Contact: linux-iio@vger.kernel.org 23 + Description: 24 + Count mode for channel Y. Four count modes are available: 25 + normal, range limit, non-recycle, and modulo-n. The preset value 26 + for channel Y is used by the count mode where required. 27 + 28 + Normal: 29 + Counting is continuous in either direction. 30 + 31 + Range Limit: 32 + An upper or lower limit is set, mimicking limit switches 33 + in the mechanical counterpart. The upper limit is set to 34 + the preset value, while the lower limit is set to 0. The 35 + counter freezes at count = preset when counting up, and 36 + at count = 0 when counting down. At either of these 37 + limits, the counting is resumed only when the count 38 + direction is reversed. 39 + 40 + Non-recycle: 41 + Counter is disabled whenever a 24-bit count overflow or 42 + underflow takes place. The counter is re-enabled when a 43 + new count value is loaded to the counter via a preset 44 + operation or write to raw. 45 + 46 + Modulo-N: 47 + A count boundary is set between 0 and the preset value. 48 + The counter is reset to 0 at count = preset when 49 + counting up, while the counter is set to the preset 50 + value at count = 0 when counting down; the counter does 51 + not freeze at the bundary points, but counts 52 + continuously throughout. 53 + 54 + What: /sys/bus/iio/devices/iio:deviceX/in_countY_noise_error 55 + KernelVersion: 4.9 56 + Contact: linux-iio@vger.kernel.org 57 + Description: 58 + Read-only attribute that indicates whether excessive noise is 59 + present at the channel Y count inputs in quadrature clock mode; 60 + irrelevant in non-quadrature clock mode. 61 + 62 + What: /sys/bus/iio/devices/iio:deviceX/in_countY_preset 63 + KernelVersion: 4.9 64 + Contact: linux-iio@vger.kernel.org 65 + Description: 66 + If the counter device supports preset registers, the preset 67 + count for channel Y is provided by this attribute. 68 + 69 + What: /sys/bus/iio/devices/iio:deviceX/in_countY_quadrature_mode 70 + KernelVersion: 4.9 71 + Contact: linux-iio@vger.kernel.org 72 + Description: 73 + Configure channel Y counter for non-quadrature or quadrature 74 + clock mode. Selecting non-quadrature clock mode will disable 75 + synchronous load mode. In quadrature clock mode, the channel Y 76 + scale attribute selects the encoder phase division (scale of 1 77 + selects full-cycle, scale of 0.5 selects half-cycle, scale of 78 + 0.25 selects quarter-cycle) processed by the channel Y counter. 79 + 80 + Non-quadrature: 81 + The filter and decoder circuit are bypassed. Encoder A 82 + input serves as the count input and B as the UP/DOWN 83 + direction control input, with B = 1 selecting UP Count 84 + mode and B = 0 selecting Down Count mode. 85 + 86 + Quadrature: 87 + Encoder A and B inputs are digitally filtered and 88 + decoded for UP/DN clock. 89 + 90 + What: /sys/bus/iio/devices/iio:deviceX/in_countY_set_to_preset_on_index 91 + KernelVersion: 4.9 92 + Contact: linux-iio@vger.kernel.org 93 + Description: 94 + Whether to set channel Y counter with channel Y preset value 95 + when channel Y index input is active, or continuously count. 96 + Valid attribute values are boolean. 97 + 98 + What: /sys/bus/iio/devices/iio:deviceX/in_indexY_index_polarity 99 + KernelVersion: 4.9 100 + Contact: linux-iio@vger.kernel.org 101 + Description: 102 + Active level of channel Y index input; irrelevant in 103 + non-synchronous load mode. 104 + 105 + What: /sys/bus/iio/devices/iio:deviceX/in_indexY_synchronous_mode 106 + KernelVersion: 4.9 107 + Contact: linux-iio@vger.kernel.org 108 + Description: 109 + Configure channel Y counter for non-synchronous or synchronous 110 + load mode. Synchronous load mode cannot be selected in 111 + non-quadrature clock mode. 112 + 113 + Non-synchronous: 114 + A logic low level is the active level at this index 115 + input. The index function (as enabled via 116 + set_to_preset_on_index) is performed directly on the 117 + active level of the index input. 118 + 119 + Synchronous: 120 + Intended for interfacing with encoder Index output in 121 + quadrature clock mode. The active level is configured 122 + via index_polarity. The index function (as enabled via 123 + set_to_preset_on_index) is performed synchronously with 124 + the quadrature clock on the active level of the index 125 + input.
+19
Documentation/ABI/testing/sysfs-bus-iio-light-isl29018
··· 1 + What: /sys/bus/iio/devices/iio:deviceX/proximity_on_chip_ambient_infrared_suppression 2 + Date: January 2011 3 + KernelVersion: 2.6.37 4 + Contact: linux-iio@vger.kernel.org 5 + Description: 6 + From ISL29018 Data Sheet (FN6619.4, Oct 8, 2012) regarding the 7 + infrared suppression: 8 + 9 + Scheme 0, makes full n (4, 8, 12, 16) bits (unsigned) proximity 10 + detection. The range of Scheme 0 proximity count is from 0 to 11 + 2^n. Logic 1 of this bit, Scheme 1, makes n-1 (3, 7, 11, 15) 12 + bits (2's complementary) proximity_less_ambient detection. The 13 + range of Scheme 1 proximity count is from -2^(n-1) to 2^(n-1). 14 + The sign bit is extended for resolutions less than 16. While 15 + Scheme 0 has wider dynamic range, Scheme 1 proximity detection 16 + is less affected by the ambient IR noise variation. 17 + 18 + 0 Sensing IR from LED and ambient 19 + 1 Sensing IR from LED with ambient IR rejection
+6
Documentation/devicetree/bindings/i2c/trivial-devices.txt
··· 39 39 dlg,da9053 DA9053: flexible system level PMIC with multicore support 40 40 dlg,da9063 DA9063: system PMIC for quad-core application processors 41 41 domintech,dmard09 DMARD09: 3-axis Accelerometer 42 + domintech,dmard10 DMARD10: 3-axis Accelerometer 42 43 epson,rx8010 I2C-BUS INTERFACE REAL TIME CLOCK MODULE 43 44 epson,rx8025 High-Stability. I2C-Bus INTERFACE REAL TIME CLOCK MODULE 44 45 epson,rx8581 I2C-BUS INTERFACE REAL TIME CLOCK MODULE 45 46 fsl,mag3110 MAG3110: Xtrinsic High Accuracy, 3D Magnetometer 46 47 fsl,mc13892 MC13892: Power Management Integrated Circuit (PMIC) for i.MX35/51 48 + fsl,mma7660 MMA7660FC: 3-Axis Orientation/Motion Detection Sensor 47 49 fsl,mma8450 MMA8450Q: Xtrinsic Low-power, 3-axis Xtrinsic Accelerometer 48 50 fsl,mpl3115 MPL3115: Absolute Digital Pressure Sensor 49 51 fsl,mpr121 MPR121: Proximity Capacitive Touch Sensor Controller ··· 59 57 maxim,max6625 9-Bit/12-Bit Temperature Sensors with I²C-Compatible Serial Interface 60 58 mc,rv3029c2 Real Time Clock Module with I2C-Bus 61 59 mcube,mc3230 mCube 3-axis 8-bit digital accelerometer 60 + memsic,mxc6225 MEMSIC 2-axis 8-bit digital accelerometer 62 61 microchip,mcp4531-502 Microchip 7-bit Single I2C Digital Potentiometer (5k) 63 62 microchip,mcp4531-103 Microchip 7-bit Single I2C Digital Potentiometer (10k) 64 63 microchip,mcp4531-503 Microchip 7-bit Single I2C Digital Potentiometer (50k) ··· 124 121 microchip,mcp4662-103 Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (10k) 125 122 microchip,mcp4662-503 Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (50k) 126 123 microchip,mcp4662-104 Microchip 8-bit Dual I2C Digital Potentiometer with NV Memory (100k) 124 + miramems,da226 MiraMEMS DA226 2-axis 14-bit digital accelerometer 125 + miramems,da280 MiraMEMS DA280 3-axis 14-bit digital accelerometer 126 + miramems,da311 MiraMEMS DA311 3-axis 12-bit digital accelerometer 127 127 national,lm63 Temperature sensor with integrated fan control 128 128 national,lm75 I2C TEMP SENSOR 129 129 national,lm80 Serial Interface ACPI-Compatible Microprocessor System Hardware Monitor
+2
Documentation/devicetree/bindings/iio/adc/ti-adc161s626.txt
··· 3 3 Required properties: 4 4 - compatible: Should be "ti,adc141s626" or "ti,adc161s626" 5 5 - reg: spi chip select number for the device 6 + - vdda-supply: supply voltage to VDDA pin 6 7 7 8 Recommended properties: 8 9 - spi-max-frequency: Definition as per ··· 12 11 Example: 13 12 adc@0 { 14 13 compatible = "ti,adc161s626"; 14 + vdda-supply = <&vdda_fixed>; 15 15 reg = <0>; 16 16 spi-max-frequency = <4300000>; 17 17 };
+35
Documentation/devicetree/bindings/iio/dac/mcp4725.txt
··· 1 + Microchip mcp4725 and mcp4726 DAC device driver 2 + 3 + Required properties: 4 + - compatible: Must be "microchip,mcp4725" or "microchip,mcp4726" 5 + - reg: Should contain the DAC I2C address 6 + - vdd-supply: Phandle to the Vdd power supply. This supply is used as a 7 + voltage reference on mcp4725. It is used as a voltage reference on 8 + mcp4726 if there is no vref-supply specified. 9 + 10 + Optional properties (valid only for mcp4726): 11 + - vref-supply: Optional phandle to the Vref power supply. Vref pin is 12 + used as a voltage reference when this supply is specified. 13 + - microchip,vref-buffered: Boolean to enable buffering of the external 14 + Vref pin. This boolean is not valid without the vref-supply. Quoting 15 + the datasheet: This is offered in cases where the reference voltage 16 + does not have the current capability not to drop its voltage when 17 + connected to the internal resistor ladder circuit. 18 + 19 + Examples: 20 + 21 + /* simple mcp4725 */ 22 + mcp4725@60 { 23 + compatible = "microchip,mcp4725"; 24 + reg = <0x60>; 25 + vdd-supply = <&vdac_vdd>; 26 + }; 27 + 28 + /* mcp4726 with the buffered external reference voltage */ 29 + mcp4726@60 { 30 + compatible = "microchip,mcp4726"; 31 + reg = <0x60>; 32 + vdd-supply = <&vdac_vdd>; 33 + vref-supply = <&vdac_vref>; 34 + microchip,vref-buffered; 35 + };
+22
Documentation/devicetree/bindings/iio/humidity/hts221.txt
··· 1 + * HTS221 STM humidity + temperature sensor 2 + 3 + Required properties: 4 + - compatible: should be "st,hts221" 5 + - reg: i2c address of the sensor / spi cs line 6 + 7 + Optional properties: 8 + - interrupt-parent: should be the phandle for the interrupt controller 9 + - interrupts: interrupt mapping for IRQ. It should be configured with 10 + flags IRQ_TYPE_LEVEL_HIGH or IRQ_TYPE_EDGE_RISING. 11 + 12 + Refer to interrupt-controller/interrupts.txt for generic interrupt 13 + client node bindings. 14 + 15 + Example: 16 + 17 + hts221@5f { 18 + compatible = "st,hts221"; 19 + reg = <0x5f>; 20 + interrupt-parent = <&gpio0>; 21 + interrupts = <0 IRQ_TYPE_EDGE_RISING>; 22 + };
+28
Documentation/devicetree/bindings/iio/light/isl29018.txt
··· 1 + * ISL 29018/29023/29035 I2C ALS, Proximity, and Infrared sensor 2 + 3 + Required properties: 4 + 5 + - compatible: Should be one of 6 + "isil,isl29018" 7 + "isil,isl29023" 8 + "isil,isl29035" 9 + - reg: the I2C address of the device 10 + 11 + Optional properties: 12 + 13 + - interrupt-parent: should be the phandle for the interrupt controller 14 + - interrupts: the sole interrupt generated by the device 15 + 16 + Refer to interrupt-controller/interrupts.txt for generic interrupt client 17 + node bindings. 18 + 19 + - vcc-supply: phandle to the regulator that provides power to the sensor. 20 + 21 + Example: 22 + 23 + isl29018@44 { 24 + compatible = "isil,isl29018"; 25 + reg = <0x44>; 26 + interrupt-parent = <&gpio>; 27 + interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>; 28 + };
+30
Documentation/devicetree/bindings/iio/potentiostat/lmp91000.txt
··· 1 + * Texas Instruments LMP91000 potentiostat 2 + 3 + http://www.ti.com/lit/ds/symlink/lmp91000.pdf 4 + 5 + Required properties: 6 + 7 + - compatible: should be "ti,lmp91000" 8 + - reg: the I2C address of the device 9 + - io-channels: the phandle of the iio provider 10 + 11 + - ti,external-tia-resistor: if the property ti,tia-gain-ohm is not defined this 12 + needs to be set to signal that an external resistor value is being used. 13 + 14 + Optional properties: 15 + 16 + - ti,tia-gain-ohm: ohm value of the internal resistor for the transimpedance 17 + amplifier. Must be 2750, 3500, 7000, 14000, 35000, 120000, or 350000 ohms. 18 + 19 + - ti,rload-ohm: ohm value of the internal resistor load applied to the gas 20 + sensor. Must be 10, 33, 50, or 100 (default) ohms. 21 + 22 + Example: 23 + 24 + lmp91000@48 { 25 + compatible = "ti,lmp91000"; 26 + reg = <0x48>; 27 + ti,tia-gain-ohm = <7500>; 28 + ti,rload = <100>; 29 + io-channels = <&adc>; 30 + };
+3
Documentation/devicetree/bindings/vendor-prefixes.txt
··· 160 160 lsi LSI Corp. (LSI Logic) 161 161 marvell Marvell Technology Group Ltd. 162 162 maxim Maxim Integrated Products 163 + mcube mCube 163 164 meas Measurement Specialties 164 165 mediatek MediaTek Inc. 165 166 melexis Melexis N.V. 166 167 melfas MELFAS Inc. 168 + memsic MEMSIC Inc. 167 169 merrii Merrii Technology Co., Ltd. 168 170 micrel Micrel Inc. 169 171 microchip Microchip Technology Inc. 170 172 microcrystal Micro Crystal AG 171 173 micron Micron Technology Inc. 172 174 minix MINIX Technology Ltd. 175 + miramems MiraMEMS Sensing Technology Co., Ltd. 173 176 mitsubishi Mitsubishi Electric Corporation 174 177 mosaixtech Mosaix Technologies, Inc. 175 178 moxa Moxa
+7 -1
MAINTAINERS
··· 255 255 S: Maintained 256 256 F: drivers/gpio/gpio-104-idio-16.c 257 257 258 + ACCES 104-QUAD-8 IIO DRIVER 259 + M: William Breathitt Gray <vilhelm.gray@gmail.com> 260 + L: linux-iio@vger.kernel.org 261 + S: Maintained 262 + F: drivers/iio/counter/104-quad-8.c 263 + 258 264 ACENIC DRIVER 259 265 M: Jes Sorensen <jes@trained-monkey.org> 260 266 L: linux-acenic@sunsite.dk ··· 793 787 F: drivers/iio/*/ad* 794 788 X: drivers/iio/*/adjd* 795 789 F: drivers/staging/iio/*/ad* 796 - F: staging/iio/trigger/iio-trig-bfin-timer.c 790 + F: drivers/staging/iio/trigger/iio-trig-bfin-timer.c 797 791 798 792 ANALOG DEVICES INC DMA DRIVERS 799 793 M: Lars-Peter Clausen <lars@metafoo.de>
+2
drivers/iio/Kconfig
··· 73 73 source "drivers/iio/amplifiers/Kconfig" 74 74 source "drivers/iio/chemical/Kconfig" 75 75 source "drivers/iio/common/Kconfig" 76 + source "drivers/iio/counter/Kconfig" 76 77 source "drivers/iio/dac/Kconfig" 77 78 source "drivers/iio/dummy/Kconfig" 78 79 source "drivers/iio/frequency/Kconfig" ··· 88 87 source "drivers/iio/trigger/Kconfig" 89 88 endif #IIO_TRIGGER 90 89 source "drivers/iio/potentiometer/Kconfig" 90 + source "drivers/iio/potentiostat/Kconfig" 91 91 source "drivers/iio/pressure/Kconfig" 92 92 source "drivers/iio/proximity/Kconfig" 93 93 source "drivers/iio/temperature/Kconfig"
+2
drivers/iio/Makefile
··· 18 18 obj-y += buffer/ 19 19 obj-y += chemical/ 20 20 obj-y += common/ 21 + obj-y += counter/ 21 22 obj-y += dac/ 22 23 obj-y += dummy/ 23 24 obj-y += gyro/ ··· 30 29 obj-y += magnetometer/ 31 30 obj-y += orientation/ 32 31 obj-y += potentiometer/ 32 + obj-y += potentiostat/ 33 33 obj-y += pressure/ 34 34 obj-y += proximity/ 35 35 obj-y += temperature/
+42
drivers/iio/accel/Kconfig
··· 52 52 tristate 53 53 select REGMAP_SPI 54 54 55 + config DA280 56 + tristate "MiraMEMS DA280 3-axis 14-bit digital accelerometer driver" 57 + depends on I2C 58 + help 59 + Say yes here to build support for the MiraMEMS DA280 3-axis 14-bit 60 + digital accelerometer. 61 + 62 + To compile this driver as a module, choose M here: the 63 + module will be called da280. 64 + 65 + config DA311 66 + tristate "MiraMEMS DA311 3-axis 12-bit digital accelerometer driver" 67 + depends on I2C 68 + help 69 + Say yes here to build support for the MiraMEMS DA311 3-axis 12-bit 70 + digital accelerometer. 71 + 72 + To compile this driver as a module, choose M here: the 73 + module will be called da311. 74 + 55 75 config DMARD06 56 76 tristate "Domintech DMARD06 Digital Accelerometer Driver" 57 77 depends on OF || COMPILE_TEST ··· 92 72 93 73 Choosing M will build the driver as a module. If so, the module 94 74 will be called dmard09. 75 + 76 + config DMARD10 77 + tristate "Domintech DMARD10 3-axis Accelerometer Driver" 78 + depends on I2C 79 + help 80 + Say yes here to get support for the Domintech DMARD10 3-axis 81 + accelerometer. 82 + 83 + Choosing M will build the driver as a module. If so, the module 84 + will be called dmard10. 95 85 96 86 config HID_SENSOR_ACCEL_3D 97 87 depends on HID_SENSOR_HUB ··· 302 272 303 273 To compile this driver as a module, choose M here: the module will be 304 274 called mxc6255. 275 + 276 + config SCA3000 277 + select IIO_BUFFER 278 + select IIO_KFIFO_BUF 279 + depends on SPI 280 + tristate "VTI SCA3000 series accelerometers" 281 + help 282 + Say Y here to build support for the VTI SCA3000 series of SPI 283 + accelerometers. These devices use a hardware ring buffer. 284 + 285 + To compile this driver as a module, say M here: the module will be 286 + called sca3000. 305 287 306 288 config STK8312 307 289 tristate "Sensortek STK8312 3-Axis Accelerometer Driver"
+5
drivers/iio/accel/Makefile
··· 8 8 obj-$(CONFIG_BMC150_ACCEL) += bmc150-accel-core.o 9 9 obj-$(CONFIG_BMC150_ACCEL_I2C) += bmc150-accel-i2c.o 10 10 obj-$(CONFIG_BMC150_ACCEL_SPI) += bmc150-accel-spi.o 11 + obj-$(CONFIG_DA280) += da280.o 12 + obj-$(CONFIG_DA311) += da311.o 11 13 obj-$(CONFIG_DMARD06) += dmard06.o 12 14 obj-$(CONFIG_DMARD09) += dmard09.o 15 + obj-$(CONFIG_DMARD10) += dmard10.o 13 16 obj-$(CONFIG_HID_SENSOR_ACCEL_3D) += hid-sensor-accel-3d.o 14 17 obj-$(CONFIG_KXCJK1013) += kxcjk-1013.o 15 18 obj-$(CONFIG_KXSD9) += kxsd9.o ··· 34 31 35 32 obj-$(CONFIG_MXC4005) += mxc4005.o 36 33 obj-$(CONFIG_MXC6255) += mxc6255.o 34 + 35 + obj-$(CONFIG_SCA3000) += sca3000.o 37 36 38 37 obj-$(CONFIG_STK8312) += stk8312.o 39 38 obj-$(CONFIG_STK8BA50) += stk8ba50.o
+183
drivers/iio/accel/da280.c
··· 1 + /** 2 + * IIO driver for the MiraMEMS DA280 3-axis accelerometer and 3 + * IIO driver for the MiraMEMS DA226 2-axis accelerometer 4 + * 5 + * Copyright (c) 2016 Hans de Goede <hdegoede@redhat.com> 6 + * 7 + * This program is free software; you can redistribute it and/or modify it 8 + * under the terms and conditions of the GNU General Public License, 9 + * version 2, as published by the Free Software Foundation. 10 + */ 11 + 12 + #include <linux/module.h> 13 + #include <linux/i2c.h> 14 + #include <linux/iio/iio.h> 15 + #include <linux/iio/sysfs.h> 16 + #include <linux/byteorder/generic.h> 17 + 18 + #define DA280_REG_CHIP_ID 0x01 19 + #define DA280_REG_ACC_X_LSB 0x02 20 + #define DA280_REG_ACC_Y_LSB 0x04 21 + #define DA280_REG_ACC_Z_LSB 0x06 22 + #define DA280_REG_MODE_BW 0x11 23 + 24 + #define DA280_CHIP_ID 0x13 25 + #define DA280_MODE_ENABLE 0x1e 26 + #define DA280_MODE_DISABLE 0x9e 27 + 28 + enum { da226, da280 }; 29 + 30 + /* 31 + * a value of + or -4096 corresponds to + or - 1G 32 + * scale = 9.81 / 4096 = 0.002395019 33 + */ 34 + 35 + static const int da280_nscale = 2395019; 36 + 37 + #define DA280_CHANNEL(reg, axis) { \ 38 + .type = IIO_ACCEL, \ 39 + .address = reg, \ 40 + .modified = 1, \ 41 + .channel2 = IIO_MOD_##axis, \ 42 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 43 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 44 + } 45 + 46 + static const struct iio_chan_spec da280_channels[] = { 47 + DA280_CHANNEL(DA280_REG_ACC_X_LSB, X), 48 + DA280_CHANNEL(DA280_REG_ACC_Y_LSB, Y), 49 + DA280_CHANNEL(DA280_REG_ACC_Z_LSB, Z), 50 + }; 51 + 52 + struct da280_data { 53 + struct i2c_client *client; 54 + }; 55 + 56 + static int da280_enable(struct i2c_client *client, bool enable) 57 + { 58 + u8 data = enable ? DA280_MODE_ENABLE : DA280_MODE_DISABLE; 59 + 60 + return i2c_smbus_write_byte_data(client, DA280_REG_MODE_BW, data); 61 + } 62 + 63 + static int da280_read_raw(struct iio_dev *indio_dev, 64 + struct iio_chan_spec const *chan, 65 + int *val, int *val2, long mask) 66 + { 67 + struct da280_data *data = iio_priv(indio_dev); 68 + int ret; 69 + 70 + switch (mask) { 71 + case IIO_CHAN_INFO_RAW: 72 + ret = i2c_smbus_read_word_data(data->client, chan->address); 73 + if (ret < 0) 74 + return ret; 75 + /* 76 + * Values are 14 bits, stored as 16 bits with the 2 77 + * least significant bits always 0. 78 + */ 79 + *val = (short)ret >> 2; 80 + return IIO_VAL_INT; 81 + case IIO_CHAN_INFO_SCALE: 82 + *val = 0; 83 + *val2 = da280_nscale; 84 + return IIO_VAL_INT_PLUS_NANO; 85 + default: 86 + return -EINVAL; 87 + } 88 + } 89 + 90 + static const struct iio_info da280_info = { 91 + .driver_module = THIS_MODULE, 92 + .read_raw = da280_read_raw, 93 + }; 94 + 95 + static int da280_probe(struct i2c_client *client, 96 + const struct i2c_device_id *id) 97 + { 98 + int ret; 99 + struct iio_dev *indio_dev; 100 + struct da280_data *data; 101 + 102 + ret = i2c_smbus_read_byte_data(client, DA280_REG_CHIP_ID); 103 + if (ret != DA280_CHIP_ID) 104 + return (ret < 0) ? ret : -ENODEV; 105 + 106 + indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 107 + if (!indio_dev) 108 + return -ENOMEM; 109 + 110 + data = iio_priv(indio_dev); 111 + data->client = client; 112 + i2c_set_clientdata(client, indio_dev); 113 + 114 + indio_dev->dev.parent = &client->dev; 115 + indio_dev->info = &da280_info; 116 + indio_dev->modes = INDIO_DIRECT_MODE; 117 + indio_dev->channels = da280_channels; 118 + if (id->driver_data == da226) { 119 + indio_dev->name = "da226"; 120 + indio_dev->num_channels = 2; 121 + } else { 122 + indio_dev->name = "da280"; 123 + indio_dev->num_channels = 3; 124 + } 125 + 126 + ret = da280_enable(client, true); 127 + if (ret < 0) 128 + return ret; 129 + 130 + ret = iio_device_register(indio_dev); 131 + if (ret < 0) { 132 + dev_err(&client->dev, "device_register failed\n"); 133 + da280_enable(client, false); 134 + } 135 + 136 + return ret; 137 + } 138 + 139 + static int da280_remove(struct i2c_client *client) 140 + { 141 + struct iio_dev *indio_dev = i2c_get_clientdata(client); 142 + 143 + iio_device_unregister(indio_dev); 144 + 145 + return da280_enable(client, false); 146 + } 147 + 148 + #ifdef CONFIG_PM_SLEEP 149 + static int da280_suspend(struct device *dev) 150 + { 151 + return da280_enable(to_i2c_client(dev), false); 152 + } 153 + 154 + static int da280_resume(struct device *dev) 155 + { 156 + return da280_enable(to_i2c_client(dev), true); 157 + } 158 + #endif 159 + 160 + static SIMPLE_DEV_PM_OPS(da280_pm_ops, da280_suspend, da280_resume); 161 + 162 + static const struct i2c_device_id da280_i2c_id[] = { 163 + { "da226", da226 }, 164 + { "da280", da280 }, 165 + {} 166 + }; 167 + MODULE_DEVICE_TABLE(i2c, da280_i2c_id); 168 + 169 + static struct i2c_driver da280_driver = { 170 + .driver = { 171 + .name = "da280", 172 + .pm = &da280_pm_ops, 173 + }, 174 + .probe = da280_probe, 175 + .remove = da280_remove, 176 + .id_table = da280_i2c_id, 177 + }; 178 + 179 + module_i2c_driver(da280_driver); 180 + 181 + MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>"); 182 + MODULE_DESCRIPTION("MiraMEMS DA280 3-Axis Accelerometer driver"); 183 + MODULE_LICENSE("GPL v2");
+305
drivers/iio/accel/da311.c
··· 1 + /** 2 + * IIO driver for the MiraMEMS DA311 3-axis accelerometer 3 + * 4 + * Copyright (c) 2016 Hans de Goede <hdegoede@redhat.com> 5 + * Copyright (c) 2011-2013 MiraMEMS Sensing Technology Co., Ltd. 6 + * 7 + * This program is free software; you can redistribute it and/or modify it 8 + * under the terms and conditions of the GNU General Public License, 9 + * version 2, as published by the Free Software Foundation. 10 + */ 11 + 12 + #include <linux/module.h> 13 + #include <linux/i2c.h> 14 + #include <linux/iio/iio.h> 15 + #include <linux/iio/sysfs.h> 16 + #include <linux/byteorder/generic.h> 17 + 18 + #define DA311_CHIP_ID 0x13 19 + 20 + /* 21 + * Note register addressed go from 0 - 0x3f and then wrap. 22 + * For some reason there are 2 banks with 0 - 0x3f addresses, 23 + * rather then a single 0-0x7f bank. 24 + */ 25 + 26 + /* Bank 0 regs */ 27 + #define DA311_REG_BANK 0x0000 28 + #define DA311_REG_LDO_REG 0x0006 29 + #define DA311_REG_CHIP_ID 0x000f 30 + #define DA311_REG_TEMP_CFG_REG 0x001f 31 + #define DA311_REG_CTRL_REG1 0x0020 32 + #define DA311_REG_CTRL_REG3 0x0022 33 + #define DA311_REG_CTRL_REG4 0x0023 34 + #define DA311_REG_CTRL_REG5 0x0024 35 + #define DA311_REG_CTRL_REG6 0x0025 36 + #define DA311_REG_STATUS_REG 0x0027 37 + #define DA311_REG_OUT_X_L 0x0028 38 + #define DA311_REG_OUT_X_H 0x0029 39 + #define DA311_REG_OUT_Y_L 0x002a 40 + #define DA311_REG_OUT_Y_H 0x002b 41 + #define DA311_REG_OUT_Z_L 0x002c 42 + #define DA311_REG_OUT_Z_H 0x002d 43 + #define DA311_REG_INT1_CFG 0x0030 44 + #define DA311_REG_INT1_SRC 0x0031 45 + #define DA311_REG_INT1_THS 0x0032 46 + #define DA311_REG_INT1_DURATION 0x0033 47 + #define DA311_REG_INT2_CFG 0x0034 48 + #define DA311_REG_INT2_SRC 0x0035 49 + #define DA311_REG_INT2_THS 0x0036 50 + #define DA311_REG_INT2_DURATION 0x0037 51 + #define DA311_REG_CLICK_CFG 0x0038 52 + #define DA311_REG_CLICK_SRC 0x0039 53 + #define DA311_REG_CLICK_THS 0x003a 54 + #define DA311_REG_TIME_LIMIT 0x003b 55 + #define DA311_REG_TIME_LATENCY 0x003c 56 + #define DA311_REG_TIME_WINDOW 0x003d 57 + 58 + /* Bank 1 regs */ 59 + #define DA311_REG_SOFT_RESET 0x0105 60 + #define DA311_REG_OTP_XOFF_L 0x0110 61 + #define DA311_REG_OTP_XOFF_H 0x0111 62 + #define DA311_REG_OTP_YOFF_L 0x0112 63 + #define DA311_REG_OTP_YOFF_H 0x0113 64 + #define DA311_REG_OTP_ZOFF_L 0x0114 65 + #define DA311_REG_OTP_ZOFF_H 0x0115 66 + #define DA311_REG_OTP_XSO 0x0116 67 + #define DA311_REG_OTP_YSO 0x0117 68 + #define DA311_REG_OTP_ZSO 0x0118 69 + #define DA311_REG_OTP_TRIM_OSC 0x011b 70 + #define DA311_REG_LPF_ABSOLUTE 0x011c 71 + #define DA311_REG_TEMP_OFF1 0x0127 72 + #define DA311_REG_TEMP_OFF2 0x0128 73 + #define DA311_REG_TEMP_OFF3 0x0129 74 + #define DA311_REG_OTP_TRIM_THERM_H 0x011a 75 + 76 + /* 77 + * a value of + or -1024 corresponds to + or - 1G 78 + * scale = 9.81 / 1024 = 0.009580078 79 + */ 80 + 81 + static const int da311_nscale = 9580078; 82 + 83 + #define DA311_CHANNEL(reg, axis) { \ 84 + .type = IIO_ACCEL, \ 85 + .address = reg, \ 86 + .modified = 1, \ 87 + .channel2 = IIO_MOD_##axis, \ 88 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 89 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 90 + } 91 + 92 + static const struct iio_chan_spec da311_channels[] = { 93 + /* | 0x80 comes from the android driver */ 94 + DA311_CHANNEL(DA311_REG_OUT_X_L | 0x80, X), 95 + DA311_CHANNEL(DA311_REG_OUT_Y_L | 0x80, Y), 96 + DA311_CHANNEL(DA311_REG_OUT_Z_L | 0x80, Z), 97 + }; 98 + 99 + struct da311_data { 100 + struct i2c_client *client; 101 + }; 102 + 103 + static int da311_register_mask_write(struct i2c_client *client, u16 addr, 104 + u8 mask, u8 data) 105 + { 106 + int ret; 107 + u8 tmp_data = 0; 108 + 109 + if (addr & 0xff00) { 110 + /* Select bank 1 */ 111 + ret = i2c_smbus_write_byte_data(client, DA311_REG_BANK, 0x01); 112 + if (ret < 0) 113 + return ret; 114 + } 115 + 116 + if (mask != 0xff) { 117 + ret = i2c_smbus_read_byte_data(client, addr); 118 + if (ret < 0) 119 + return ret; 120 + tmp_data = ret; 121 + } 122 + 123 + tmp_data &= ~mask; 124 + tmp_data |= data & mask; 125 + ret = i2c_smbus_write_byte_data(client, addr & 0xff, tmp_data); 126 + if (ret < 0) 127 + return ret; 128 + 129 + if (addr & 0xff00) { 130 + /* Back to bank 0 */ 131 + ret = i2c_smbus_write_byte_data(client, DA311_REG_BANK, 0x00); 132 + if (ret < 0) 133 + return ret; 134 + } 135 + 136 + return 0; 137 + } 138 + 139 + /* Init sequence taken from the android driver */ 140 + static int da311_reset(struct i2c_client *client) 141 + { 142 + const struct { 143 + u16 addr; 144 + u8 mask; 145 + u8 data; 146 + } init_data[] = { 147 + { DA311_REG_TEMP_CFG_REG, 0xff, 0x08 }, 148 + { DA311_REG_CTRL_REG5, 0xff, 0x80 }, 149 + { DA311_REG_CTRL_REG4, 0x30, 0x00 }, 150 + { DA311_REG_CTRL_REG1, 0xff, 0x6f }, 151 + { DA311_REG_TEMP_CFG_REG, 0xff, 0x88 }, 152 + { DA311_REG_LDO_REG, 0xff, 0x02 }, 153 + { DA311_REG_OTP_TRIM_OSC, 0xff, 0x27 }, 154 + { DA311_REG_LPF_ABSOLUTE, 0xff, 0x30 }, 155 + { DA311_REG_TEMP_OFF1, 0xff, 0x3f }, 156 + { DA311_REG_TEMP_OFF2, 0xff, 0xff }, 157 + { DA311_REG_TEMP_OFF3, 0xff, 0x0f }, 158 + }; 159 + int i, ret; 160 + 161 + /* Reset */ 162 + ret = da311_register_mask_write(client, DA311_REG_SOFT_RESET, 163 + 0xff, 0xaa); 164 + if (ret < 0) 165 + return ret; 166 + 167 + for (i = 0; i < ARRAY_SIZE(init_data); i++) { 168 + ret = da311_register_mask_write(client, 169 + init_data[i].addr, 170 + init_data[i].mask, 171 + init_data[i].data); 172 + if (ret < 0) 173 + return ret; 174 + } 175 + 176 + return 0; 177 + } 178 + 179 + static int da311_enable(struct i2c_client *client, bool enable) 180 + { 181 + u8 data = enable ? 0x00 : 0x20; 182 + 183 + return da311_register_mask_write(client, DA311_REG_TEMP_CFG_REG, 184 + 0x20, data); 185 + } 186 + 187 + static int da311_read_raw(struct iio_dev *indio_dev, 188 + struct iio_chan_spec const *chan, 189 + int *val, int *val2, long mask) 190 + { 191 + struct da311_data *data = iio_priv(indio_dev); 192 + int ret; 193 + 194 + switch (mask) { 195 + case IIO_CHAN_INFO_RAW: 196 + ret = i2c_smbus_read_word_data(data->client, chan->address); 197 + if (ret < 0) 198 + return ret; 199 + /* 200 + * Values are 12 bits, stored as 16 bits with the 4 201 + * least significant bits always 0. 202 + */ 203 + *val = (short)ret >> 4; 204 + return IIO_VAL_INT; 205 + case IIO_CHAN_INFO_SCALE: 206 + *val = 0; 207 + *val2 = da311_nscale; 208 + return IIO_VAL_INT_PLUS_NANO; 209 + default: 210 + return -EINVAL; 211 + } 212 + } 213 + 214 + static const struct iio_info da311_info = { 215 + .driver_module = THIS_MODULE, 216 + .read_raw = da311_read_raw, 217 + }; 218 + 219 + static int da311_probe(struct i2c_client *client, 220 + const struct i2c_device_id *id) 221 + { 222 + int ret; 223 + struct iio_dev *indio_dev; 224 + struct da311_data *data; 225 + 226 + ret = i2c_smbus_read_byte_data(client, DA311_REG_CHIP_ID); 227 + if (ret != DA311_CHIP_ID) 228 + return (ret < 0) ? ret : -ENODEV; 229 + 230 + indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 231 + if (!indio_dev) 232 + return -ENOMEM; 233 + 234 + data = iio_priv(indio_dev); 235 + data->client = client; 236 + i2c_set_clientdata(client, indio_dev); 237 + 238 + indio_dev->dev.parent = &client->dev; 239 + indio_dev->info = &da311_info; 240 + indio_dev->name = "da311"; 241 + indio_dev->modes = INDIO_DIRECT_MODE; 242 + indio_dev->channels = da311_channels; 243 + indio_dev->num_channels = ARRAY_SIZE(da311_channels); 244 + 245 + ret = da311_reset(client); 246 + if (ret < 0) 247 + return ret; 248 + 249 + ret = da311_enable(client, true); 250 + if (ret < 0) 251 + return ret; 252 + 253 + ret = iio_device_register(indio_dev); 254 + if (ret < 0) { 255 + dev_err(&client->dev, "device_register failed\n"); 256 + da311_enable(client, false); 257 + } 258 + 259 + return ret; 260 + } 261 + 262 + static int da311_remove(struct i2c_client *client) 263 + { 264 + struct iio_dev *indio_dev = i2c_get_clientdata(client); 265 + 266 + iio_device_unregister(indio_dev); 267 + 268 + return da311_enable(client, false); 269 + } 270 + 271 + #ifdef CONFIG_PM_SLEEP 272 + static int da311_suspend(struct device *dev) 273 + { 274 + return da311_enable(to_i2c_client(dev), false); 275 + } 276 + 277 + static int da311_resume(struct device *dev) 278 + { 279 + return da311_enable(to_i2c_client(dev), true); 280 + } 281 + #endif 282 + 283 + static SIMPLE_DEV_PM_OPS(da311_pm_ops, da311_suspend, da311_resume); 284 + 285 + static const struct i2c_device_id da311_i2c_id[] = { 286 + {"da311", 0}, 287 + {} 288 + }; 289 + MODULE_DEVICE_TABLE(i2c, da311_i2c_id); 290 + 291 + static struct i2c_driver da311_driver = { 292 + .driver = { 293 + .name = "da311", 294 + .pm = &da311_pm_ops, 295 + }, 296 + .probe = da311_probe, 297 + .remove = da311_remove, 298 + .id_table = da311_i2c_id, 299 + }; 300 + 301 + module_i2c_driver(da311_driver); 302 + 303 + MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>"); 304 + MODULE_DESCRIPTION("MiraMEMS DA311 3-Axis Accelerometer driver"); 305 + MODULE_LICENSE("GPL v2");
+266
drivers/iio/accel/dmard10.c
··· 1 + /** 2 + * IIO driver for the 3-axis accelerometer Domintech ARD10. 3 + * 4 + * Copyright (c) 2016 Hans de Goede <hdegoede@redhat.com> 5 + * Copyright (c) 2012 Domintech Technology Co., Ltd 6 + * 7 + * This program is free software; you can redistribute it and/or modify it 8 + * under the terms and conditions of the GNU General Public License, 9 + * version 2, as published by the Free Software Foundation. 10 + */ 11 + 12 + #include <linux/module.h> 13 + #include <linux/i2c.h> 14 + #include <linux/iio/iio.h> 15 + #include <linux/iio/sysfs.h> 16 + #include <linux/byteorder/generic.h> 17 + 18 + #define DMARD10_REG_ACTR 0x00 19 + #define DMARD10_REG_AFEM 0x0c 20 + #define DMARD10_REG_STADR 0x12 21 + #define DMARD10_REG_STAINT 0x1c 22 + #define DMARD10_REG_MISC2 0x1f 23 + #define DMARD10_REG_PD 0x21 24 + 25 + #define DMARD10_MODE_OFF 0x00 26 + #define DMARD10_MODE_STANDBY 0x02 27 + #define DMARD10_MODE_ACTIVE 0x06 28 + #define DMARD10_MODE_READ_OTP 0x12 29 + #define DMARD10_MODE_RESET_DATA_PATH 0x82 30 + 31 + /* AFEN set 1, ATM[2:0]=b'000 (normal), EN_Z/Y/X/T=1 */ 32 + #define DMARD10_VALUE_AFEM_AFEN_NORMAL 0x8f 33 + /* ODR[3:0]=b'0111 (100Hz), CCK[3:0]=b'0100 (204.8kHZ) */ 34 + #define DMARD10_VALUE_CKSEL_ODR_100_204 0x74 35 + /* INTC[6:5]=b'00 */ 36 + #define DMARD10_VALUE_INTC 0x00 37 + /* TAP1/TAP2 Average 2 */ 38 + #define DMARD10_VALUE_TAPNS_AVE_2 0x11 39 + 40 + #define DMARD10_VALUE_STADR 0x55 41 + #define DMARD10_VALUE_STAINT 0xaa 42 + #define DMARD10_VALUE_MISC2_OSCA_EN 0x08 43 + #define DMARD10_VALUE_PD_RST 0x52 44 + 45 + /* Offsets into the buffer read in dmard10_read_raw() */ 46 + #define DMARD10_X_OFFSET 1 47 + #define DMARD10_Y_OFFSET 2 48 + #define DMARD10_Z_OFFSET 3 49 + 50 + /* 51 + * a value of + or -128 corresponds to + or - 1G 52 + * scale = 9.81 / 128 = 0.076640625 53 + */ 54 + 55 + static const int dmard10_nscale = 76640625; 56 + 57 + #define DMARD10_CHANNEL(reg, axis) { \ 58 + .type = IIO_ACCEL, \ 59 + .address = reg, \ 60 + .modified = 1, \ 61 + .channel2 = IIO_MOD_##axis, \ 62 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 63 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 64 + } 65 + 66 + static const struct iio_chan_spec dmard10_channels[] = { 67 + DMARD10_CHANNEL(DMARD10_X_OFFSET, X), 68 + DMARD10_CHANNEL(DMARD10_Y_OFFSET, Y), 69 + DMARD10_CHANNEL(DMARD10_Z_OFFSET, Z), 70 + }; 71 + 72 + struct dmard10_data { 73 + struct i2c_client *client; 74 + }; 75 + 76 + /* Init sequence taken from the android driver */ 77 + static int dmard10_reset(struct i2c_client *client) 78 + { 79 + unsigned char buffer[7]; 80 + int ret; 81 + 82 + /* 1. Powerdown reset */ 83 + ret = i2c_smbus_write_byte_data(client, DMARD10_REG_PD, 84 + DMARD10_VALUE_PD_RST); 85 + if (ret < 0) 86 + return ret; 87 + 88 + /* 89 + * 2. ACTR => Standby mode => Download OTP to parameter reg => 90 + * Standby mode => Reset data path => Standby mode 91 + */ 92 + buffer[0] = DMARD10_REG_ACTR; 93 + buffer[1] = DMARD10_MODE_STANDBY; 94 + buffer[2] = DMARD10_MODE_READ_OTP; 95 + buffer[3] = DMARD10_MODE_STANDBY; 96 + buffer[4] = DMARD10_MODE_RESET_DATA_PATH; 97 + buffer[5] = DMARD10_MODE_STANDBY; 98 + ret = i2c_master_send(client, buffer, 6); 99 + if (ret < 0) 100 + return ret; 101 + 102 + /* 3. OSCA_EN = 1, TSTO = b'000 (INT1 = normal, TEST0 = normal) */ 103 + ret = i2c_smbus_write_byte_data(client, DMARD10_REG_MISC2, 104 + DMARD10_VALUE_MISC2_OSCA_EN); 105 + if (ret < 0) 106 + return ret; 107 + 108 + /* 4. AFEN = 1 (AFE will powerdown after ADC) */ 109 + buffer[0] = DMARD10_REG_AFEM; 110 + buffer[1] = DMARD10_VALUE_AFEM_AFEN_NORMAL; 111 + buffer[2] = DMARD10_VALUE_CKSEL_ODR_100_204; 112 + buffer[3] = DMARD10_VALUE_INTC; 113 + buffer[4] = DMARD10_VALUE_TAPNS_AVE_2; 114 + buffer[5] = 0x00; /* DLYC, no delay timing */ 115 + buffer[6] = 0x07; /* INTD=1 push-pull, INTA=1 active high, AUTOT=1 */ 116 + ret = i2c_master_send(client, buffer, 7); 117 + if (ret < 0) 118 + return ret; 119 + 120 + /* 5. Activation mode */ 121 + ret = i2c_smbus_write_byte_data(client, DMARD10_REG_ACTR, 122 + DMARD10_MODE_ACTIVE); 123 + if (ret < 0) 124 + return ret; 125 + 126 + return 0; 127 + } 128 + 129 + /* Shutdown sequence taken from the android driver */ 130 + static int dmard10_shutdown(struct i2c_client *client) 131 + { 132 + unsigned char buffer[3]; 133 + 134 + buffer[0] = DMARD10_REG_ACTR; 135 + buffer[1] = DMARD10_MODE_STANDBY; 136 + buffer[2] = DMARD10_MODE_OFF; 137 + 138 + return i2c_master_send(client, buffer, 3); 139 + } 140 + 141 + static int dmard10_read_raw(struct iio_dev *indio_dev, 142 + struct iio_chan_spec const *chan, 143 + int *val, int *val2, long mask) 144 + { 145 + struct dmard10_data *data = iio_priv(indio_dev); 146 + __le16 buf[4]; 147 + int ret; 148 + 149 + switch (mask) { 150 + case IIO_CHAN_INFO_RAW: 151 + /* 152 + * Read 8 bytes starting at the REG_STADR register, trying to 153 + * read the individual X, Y, Z registers will always read 0. 154 + */ 155 + ret = i2c_smbus_read_i2c_block_data(data->client, 156 + DMARD10_REG_STADR, 157 + sizeof(buf), (u8 *)buf); 158 + if (ret < 0) 159 + return ret; 160 + ret = le16_to_cpu(buf[chan->address]); 161 + *val = sign_extend32(ret, 12); 162 + return IIO_VAL_INT; 163 + case IIO_CHAN_INFO_SCALE: 164 + *val = 0; 165 + *val2 = dmard10_nscale; 166 + return IIO_VAL_INT_PLUS_NANO; 167 + default: 168 + return -EINVAL; 169 + } 170 + } 171 + 172 + static const struct iio_info dmard10_info = { 173 + .driver_module = THIS_MODULE, 174 + .read_raw = dmard10_read_raw, 175 + }; 176 + 177 + static int dmard10_probe(struct i2c_client *client, 178 + const struct i2c_device_id *id) 179 + { 180 + int ret; 181 + struct iio_dev *indio_dev; 182 + struct dmard10_data *data; 183 + 184 + /* These 2 registers have special POR reset values used for id */ 185 + ret = i2c_smbus_read_byte_data(client, DMARD10_REG_STADR); 186 + if (ret != DMARD10_VALUE_STADR) 187 + return (ret < 0) ? ret : -ENODEV; 188 + 189 + ret = i2c_smbus_read_byte_data(client, DMARD10_REG_STAINT); 190 + if (ret != DMARD10_VALUE_STAINT) 191 + return (ret < 0) ? ret : -ENODEV; 192 + 193 + indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 194 + if (!indio_dev) { 195 + dev_err(&client->dev, "iio allocation failed!\n"); 196 + return -ENOMEM; 197 + } 198 + 199 + data = iio_priv(indio_dev); 200 + data->client = client; 201 + i2c_set_clientdata(client, indio_dev); 202 + 203 + indio_dev->dev.parent = &client->dev; 204 + indio_dev->info = &dmard10_info; 205 + indio_dev->name = "dmard10"; 206 + indio_dev->modes = INDIO_DIRECT_MODE; 207 + indio_dev->channels = dmard10_channels; 208 + indio_dev->num_channels = ARRAY_SIZE(dmard10_channels); 209 + 210 + ret = dmard10_reset(client); 211 + if (ret < 0) 212 + return ret; 213 + 214 + ret = iio_device_register(indio_dev); 215 + if (ret < 0) { 216 + dev_err(&client->dev, "device_register failed\n"); 217 + dmard10_shutdown(client); 218 + } 219 + 220 + return ret; 221 + } 222 + 223 + static int dmard10_remove(struct i2c_client *client) 224 + { 225 + struct iio_dev *indio_dev = i2c_get_clientdata(client); 226 + 227 + iio_device_unregister(indio_dev); 228 + 229 + return dmard10_shutdown(client); 230 + } 231 + 232 + #ifdef CONFIG_PM_SLEEP 233 + static int dmard10_suspend(struct device *dev) 234 + { 235 + return dmard10_shutdown(to_i2c_client(dev)); 236 + } 237 + 238 + static int dmard10_resume(struct device *dev) 239 + { 240 + return dmard10_reset(to_i2c_client(dev)); 241 + } 242 + #endif 243 + 244 + static SIMPLE_DEV_PM_OPS(dmard10_pm_ops, dmard10_suspend, dmard10_resume); 245 + 246 + static const struct i2c_device_id dmard10_i2c_id[] = { 247 + {"dmard10", 0}, 248 + {} 249 + }; 250 + MODULE_DEVICE_TABLE(i2c, dmard10_i2c_id); 251 + 252 + static struct i2c_driver dmard10_driver = { 253 + .driver = { 254 + .name = "dmard10", 255 + .pm = &dmard10_pm_ops, 256 + }, 257 + .probe = dmard10_probe, 258 + .remove = dmard10_remove, 259 + .id_table = dmard10_i2c_id, 260 + }; 261 + 262 + module_i2c_driver(dmard10_driver); 263 + 264 + MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>"); 265 + MODULE_DESCRIPTION("Domintech ARD10 3-Axis Accelerometer driver"); 266 + MODULE_LICENSE("GPL v2");
+1 -1
drivers/iio/accel/mma7660.c
··· 39 39 40 40 #define MMA7660_SCALE_AVAIL "0.467142857" 41 41 42 - const int mma7660_nscale = 467142857; 42 + static const int mma7660_nscale = 467142857; 43 43 44 44 #define MMA7660_CHANNEL(reg, axis) { \ 45 45 .type = IIO_ACCEL, \
+43 -36
drivers/iio/accel/mma8452.c
··· 459 459 460 460 switch (mask) { 461 461 case IIO_CHAN_INFO_RAW: 462 - if (iio_buffer_enabled(indio_dev)) 463 - return -EBUSY; 462 + ret = iio_device_claim_direct_mode(indio_dev); 463 + if (ret) 464 + return ret; 464 465 465 466 mutex_lock(&data->lock); 466 467 ret = mma8452_read(data, buffer); 467 468 mutex_unlock(&data->lock); 469 + iio_device_release_direct_mode(indio_dev); 468 470 if (ret < 0) 469 471 return ret; 470 472 ··· 666 664 struct mma8452_data *data = iio_priv(indio_dev); 667 665 int i, ret; 668 666 669 - if (iio_buffer_enabled(indio_dev)) 670 - return -EBUSY; 667 + ret = iio_device_claim_direct_mode(indio_dev); 668 + if (ret) 669 + return ret; 671 670 672 671 switch (mask) { 673 672 case IIO_CHAN_INFO_SAMP_FREQ: 674 673 i = mma8452_get_samp_freq_index(data, val, val2); 675 - if (i < 0) 676 - return i; 677 - 674 + if (i < 0) { 675 + ret = i; 676 + break; 677 + } 678 678 data->ctrl_reg1 &= ~MMA8452_CTRL_DR_MASK; 679 679 data->ctrl_reg1 |= i << MMA8452_CTRL_DR_SHIFT; 680 680 681 - return mma8452_change_config(data, MMA8452_CTRL_REG1, 682 - data->ctrl_reg1); 681 + ret = mma8452_change_config(data, MMA8452_CTRL_REG1, 682 + data->ctrl_reg1); 683 + break; 683 684 case IIO_CHAN_INFO_SCALE: 684 685 i = mma8452_get_scale_index(data, val, val2); 685 - if (i < 0) 686 - return i; 686 + if (i < 0) { 687 + ret = i; 688 + break; 689 + } 687 690 688 691 data->data_cfg &= ~MMA8452_DATA_CFG_FS_MASK; 689 692 data->data_cfg |= i; 690 693 691 - return mma8452_change_config(data, MMA8452_DATA_CFG, 692 - data->data_cfg); 694 + ret = mma8452_change_config(data, MMA8452_DATA_CFG, 695 + data->data_cfg); 696 + break; 693 697 case IIO_CHAN_INFO_CALIBBIAS: 694 - if (val < -128 || val > 127) 695 - return -EINVAL; 698 + if (val < -128 || val > 127) { 699 + ret = -EINVAL; 700 + break; 701 + } 696 702 697 - return mma8452_change_config(data, 698 - MMA8452_OFF_X + chan->scan_index, 699 - val); 703 + ret = mma8452_change_config(data, 704 + MMA8452_OFF_X + chan->scan_index, 705 + val); 706 + break; 700 707 701 708 case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY: 702 709 if (val == 0 && val2 == 0) { ··· 714 703 data->data_cfg |= MMA8452_DATA_CFG_HPF_MASK; 715 704 ret = mma8452_set_hp_filter_frequency(data, val, val2); 716 705 if (ret < 0) 717 - return ret; 706 + break; 718 707 } 719 708 720 - return mma8452_change_config(data, MMA8452_DATA_CFG, 709 + ret = mma8452_change_config(data, MMA8452_DATA_CFG, 721 710 data->data_cfg); 711 + break; 722 712 723 713 case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 724 714 ret = mma8452_get_odr_index(data); 725 715 726 716 for (i = 0; i < ARRAY_SIZE(mma8452_os_ratio); i++) { 727 - if (mma8452_os_ratio[i][ret] == val) 728 - return mma8452_set_power_mode(data, i); 717 + if (mma8452_os_ratio[i][ret] == val) { 718 + ret = mma8452_set_power_mode(data, i); 719 + break; 720 + } 729 721 } 730 - 722 + break; 731 723 default: 732 - return -EINVAL; 724 + ret = -EINVAL; 725 + break; 733 726 } 727 + 728 + iio_device_release_direct_mode(indio_dev); 729 + return ret; 734 730 } 735 731 736 732 static int mma8452_read_thresh(struct iio_dev *indio_dev, ··· 1365 1347 return mma8452_change_config(data, MMA8452_CTRL_REG4, reg); 1366 1348 } 1367 1349 1368 - static int mma8452_validate_device(struct iio_trigger *trig, 1369 - struct iio_dev *indio_dev) 1370 - { 1371 - struct iio_dev *indio = iio_trigger_get_drvdata(trig); 1372 - 1373 - if (indio != indio_dev) 1374 - return -EINVAL; 1375 - 1376 - return 0; 1377 - } 1378 - 1379 1350 static const struct iio_trigger_ops mma8452_trigger_ops = { 1380 1351 .set_trigger_state = mma8452_data_rdy_trigger_set_state, 1381 - .validate_device = mma8452_validate_device, 1352 + .validate_device = iio_trigger_validate_own_device, 1382 1353 .owner = THIS_MODULE, 1383 1354 }; 1384 1355
+1576
drivers/iio/accel/sca3000.c
··· 1 + /* 2 + * sca3000_core.c -- support VTI sca3000 series accelerometers via SPI 3 + * 4 + * This program is free software; you can redistribute it and/or modify it 5 + * under the terms of the GNU General Public License version 2 as published by 6 + * the Free Software Foundation. 7 + * 8 + * Copyright (c) 2009 Jonathan Cameron <jic23@kernel.org> 9 + * 10 + * See industrialio/accels/sca3000.h for comments. 11 + */ 12 + 13 + #include <linux/interrupt.h> 14 + #include <linux/fs.h> 15 + #include <linux/device.h> 16 + #include <linux/slab.h> 17 + #include <linux/kernel.h> 18 + #include <linux/spi/spi.h> 19 + #include <linux/sysfs.h> 20 + #include <linux/module.h> 21 + #include <linux/uaccess.h> 22 + #include <linux/iio/iio.h> 23 + #include <linux/iio/sysfs.h> 24 + #include <linux/iio/events.h> 25 + #include <linux/iio/buffer.h> 26 + #include <linux/iio/kfifo_buf.h> 27 + 28 + #define SCA3000_WRITE_REG(a) (((a) << 2) | 0x02) 29 + #define SCA3000_READ_REG(a) ((a) << 2) 30 + 31 + #define SCA3000_REG_REVID_ADDR 0x00 32 + #define SCA3000_REG_REVID_MAJOR_MASK GENMASK(8, 4) 33 + #define SCA3000_REG_REVID_MINOR_MASK GENMASK(3, 0) 34 + 35 + #define SCA3000_REG_STATUS_ADDR 0x02 36 + #define SCA3000_LOCKED BIT(5) 37 + #define SCA3000_EEPROM_CS_ERROR BIT(1) 38 + #define SCA3000_SPI_FRAME_ERROR BIT(0) 39 + 40 + /* All reads done using register decrement so no need to directly access LSBs */ 41 + #define SCA3000_REG_X_MSB_ADDR 0x05 42 + #define SCA3000_REG_Y_MSB_ADDR 0x07 43 + #define SCA3000_REG_Z_MSB_ADDR 0x09 44 + 45 + #define SCA3000_REG_RING_OUT_ADDR 0x0f 46 + 47 + /* Temp read untested - the e05 doesn't have the sensor */ 48 + #define SCA3000_REG_TEMP_MSB_ADDR 0x13 49 + 50 + #define SCA3000_REG_MODE_ADDR 0x14 51 + #define SCA3000_MODE_PROT_MASK 0x28 52 + #define SCA3000_REG_MODE_RING_BUF_ENABLE BIT(7) 53 + #define SCA3000_REG_MODE_RING_BUF_8BIT BIT(6) 54 + 55 + /* 56 + * Free fall detection triggers an interrupt if the acceleration 57 + * is below a threshold for equivalent of 25cm drop 58 + */ 59 + #define SCA3000_REG_MODE_FREE_FALL_DETECT BIT(4) 60 + #define SCA3000_REG_MODE_MEAS_MODE_NORMAL 0x00 61 + #define SCA3000_REG_MODE_MEAS_MODE_OP_1 0x01 62 + #define SCA3000_REG_MODE_MEAS_MODE_OP_2 0x02 63 + 64 + /* 65 + * In motion detection mode the accelerations are band pass filtered 66 + * (approx 1 - 25Hz) and then a programmable threshold used to trigger 67 + * and interrupt. 68 + */ 69 + #define SCA3000_REG_MODE_MEAS_MODE_MOT_DET 0x03 70 + #define SCA3000_REG_MODE_MODE_MASK 0x03 71 + 72 + #define SCA3000_REG_BUF_COUNT_ADDR 0x15 73 + 74 + #define SCA3000_REG_INT_STATUS_ADDR 0x16 75 + #define SCA3000_REG_INT_STATUS_THREE_QUARTERS BIT(7) 76 + #define SCA3000_REG_INT_STATUS_HALF BIT(6) 77 + 78 + #define SCA3000_INT_STATUS_FREE_FALL BIT(3) 79 + #define SCA3000_INT_STATUS_Y_TRIGGER BIT(2) 80 + #define SCA3000_INT_STATUS_X_TRIGGER BIT(1) 81 + #define SCA3000_INT_STATUS_Z_TRIGGER BIT(0) 82 + 83 + /* Used to allow access to multiplexed registers */ 84 + #define SCA3000_REG_CTRL_SEL_ADDR 0x18 85 + /* Only available for SCA3000-D03 and SCA3000-D01 */ 86 + #define SCA3000_REG_CTRL_SEL_I2C_DISABLE 0x01 87 + #define SCA3000_REG_CTRL_SEL_MD_CTRL 0x02 88 + #define SCA3000_REG_CTRL_SEL_MD_Y_TH 0x03 89 + #define SCA3000_REG_CTRL_SEL_MD_X_TH 0x04 90 + #define SCA3000_REG_CTRL_SEL_MD_Z_TH 0x05 91 + /* 92 + * BE VERY CAREFUL WITH THIS, IF 3 BITS ARE NOT SET the device 93 + * will not function 94 + */ 95 + #define SCA3000_REG_CTRL_SEL_OUT_CTRL 0x0B 96 + 97 + #define SCA3000_REG_OUT_CTRL_PROT_MASK 0xE0 98 + #define SCA3000_REG_OUT_CTRL_BUF_X_EN 0x10 99 + #define SCA3000_REG_OUT_CTRL_BUF_Y_EN 0x08 100 + #define SCA3000_REG_OUT_CTRL_BUF_Z_EN 0x04 101 + #define SCA3000_REG_OUT_CTRL_BUF_DIV_MASK 0x03 102 + #define SCA3000_REG_OUT_CTRL_BUF_DIV_4 0x02 103 + #define SCA3000_REG_OUT_CTRL_BUF_DIV_2 0x01 104 + 105 + 106 + /* 107 + * Control which motion detector interrupts are on. 108 + * For now only OR combinations are supported. 109 + */ 110 + #define SCA3000_MD_CTRL_PROT_MASK 0xC0 111 + #define SCA3000_MD_CTRL_OR_Y BIT(0) 112 + #define SCA3000_MD_CTRL_OR_X BIT(1) 113 + #define SCA3000_MD_CTRL_OR_Z BIT(2) 114 + /* Currently unsupported */ 115 + #define SCA3000_MD_CTRL_AND_Y BIT(3) 116 + #define SCA3000_MD_CTRL_AND_X BIT(4) 117 + #define SAC3000_MD_CTRL_AND_Z BIT(5) 118 + 119 + /* 120 + * Some control registers of complex access methods requiring this register to 121 + * be used to remove a lock. 122 + */ 123 + #define SCA3000_REG_UNLOCK_ADDR 0x1e 124 + 125 + #define SCA3000_REG_INT_MASK_ADDR 0x21 126 + #define SCA3000_REG_INT_MASK_PROT_MASK 0x1C 127 + 128 + #define SCA3000_REG_INT_MASK_RING_THREE_QUARTER BIT(7) 129 + #define SCA3000_REG_INT_MASK_RING_HALF BIT(6) 130 + 131 + #define SCA3000_REG_INT_MASK_ALL_INTS 0x02 132 + #define SCA3000_REG_INT_MASK_ACTIVE_HIGH 0x01 133 + #define SCA3000_REG_INT_MASK_ACTIVE_LOW 0x00 134 + /* Values of multiplexed registers (write to ctrl_data after select) */ 135 + #define SCA3000_REG_CTRL_DATA_ADDR 0x22 136 + 137 + /* 138 + * Measurement modes available on some sca3000 series chips. Code assumes others 139 + * may become available in the future. 140 + * 141 + * Bypass - Bypass the low-pass filter in the signal channel so as to increase 142 + * signal bandwidth. 143 + * 144 + * Narrow - Narrow low-pass filtering of the signal channel and half output 145 + * data rate by decimation. 146 + * 147 + * Wide - Widen low-pass filtering of signal channel to increase bandwidth 148 + */ 149 + #define SCA3000_OP_MODE_BYPASS 0x01 150 + #define SCA3000_OP_MODE_NARROW 0x02 151 + #define SCA3000_OP_MODE_WIDE 0x04 152 + #define SCA3000_MAX_TX 6 153 + #define SCA3000_MAX_RX 2 154 + 155 + /** 156 + * struct sca3000_state - device instance state information 157 + * @us: the associated spi device 158 + * @info: chip variant information 159 + * @last_timestamp: the timestamp of the last event 160 + * @mo_det_use_count: reference counter for the motion detection unit 161 + * @lock: lock used to protect elements of sca3000_state 162 + * and the underlying device state. 163 + * @tx: dma-able transmit buffer 164 + * @rx: dma-able receive buffer 165 + **/ 166 + struct sca3000_state { 167 + struct spi_device *us; 168 + const struct sca3000_chip_info *info; 169 + s64 last_timestamp; 170 + int mo_det_use_count; 171 + struct mutex lock; 172 + /* Can these share a cacheline ? */ 173 + u8 rx[384] ____cacheline_aligned; 174 + u8 tx[6] ____cacheline_aligned; 175 + }; 176 + 177 + /** 178 + * struct sca3000_chip_info - model dependent parameters 179 + * @scale: scale * 10^-6 180 + * @temp_output: some devices have temperature sensors. 181 + * @measurement_mode_freq: normal mode sampling frequency 182 + * @measurement_mode_3db_freq: 3db cutoff frequency of the low pass filter for 183 + * the normal measurement mode. 184 + * @option_mode_1: first optional mode. Not all models have one 185 + * @option_mode_1_freq: option mode 1 sampling frequency 186 + * @option_mode_1_3db_freq: 3db cutoff frequency of the low pass filter for 187 + * the first option mode. 188 + * @option_mode_2: second optional mode. Not all chips have one 189 + * @option_mode_2_freq: option mode 2 sampling frequency 190 + * @option_mode_2_3db_freq: 3db cutoff frequency of the low pass filter for 191 + * the second option mode. 192 + * @mod_det_mult_xz: Bit wise multipliers to calculate the threshold 193 + * for motion detection in the x and z axis. 194 + * @mod_det_mult_y: Bit wise multipliers to calculate the threshold 195 + * for motion detection in the y axis. 196 + * 197 + * This structure is used to hold information about the functionality of a given 198 + * sca3000 variant. 199 + **/ 200 + struct sca3000_chip_info { 201 + unsigned int scale; 202 + bool temp_output; 203 + int measurement_mode_freq; 204 + int measurement_mode_3db_freq; 205 + int option_mode_1; 206 + int option_mode_1_freq; 207 + int option_mode_1_3db_freq; 208 + int option_mode_2; 209 + int option_mode_2_freq; 210 + int option_mode_2_3db_freq; 211 + int mot_det_mult_xz[6]; 212 + int mot_det_mult_y[7]; 213 + }; 214 + 215 + enum sca3000_variant { 216 + d01, 217 + e02, 218 + e04, 219 + e05, 220 + }; 221 + 222 + /* 223 + * Note where option modes are not defined, the chip simply does not 224 + * support any. 225 + * Other chips in the sca3000 series use i2c and are not included here. 226 + * 227 + * Some of these devices are only listed in the family data sheet and 228 + * do not actually appear to be available. 229 + */ 230 + static const struct sca3000_chip_info sca3000_spi_chip_info_tbl[] = { 231 + [d01] = { 232 + .scale = 7357, 233 + .temp_output = true, 234 + .measurement_mode_freq = 250, 235 + .measurement_mode_3db_freq = 45, 236 + .option_mode_1 = SCA3000_OP_MODE_BYPASS, 237 + .option_mode_1_freq = 250, 238 + .option_mode_1_3db_freq = 70, 239 + .mot_det_mult_xz = {50, 100, 200, 350, 650, 1300}, 240 + .mot_det_mult_y = {50, 100, 150, 250, 450, 850, 1750}, 241 + }, 242 + [e02] = { 243 + .scale = 9810, 244 + .measurement_mode_freq = 125, 245 + .measurement_mode_3db_freq = 40, 246 + .option_mode_1 = SCA3000_OP_MODE_NARROW, 247 + .option_mode_1_freq = 63, 248 + .option_mode_1_3db_freq = 11, 249 + .mot_det_mult_xz = {100, 150, 300, 550, 1050, 2050}, 250 + .mot_det_mult_y = {50, 100, 200, 350, 700, 1350, 2700}, 251 + }, 252 + [e04] = { 253 + .scale = 19620, 254 + .measurement_mode_freq = 100, 255 + .measurement_mode_3db_freq = 38, 256 + .option_mode_1 = SCA3000_OP_MODE_NARROW, 257 + .option_mode_1_freq = 50, 258 + .option_mode_1_3db_freq = 9, 259 + .option_mode_2 = SCA3000_OP_MODE_WIDE, 260 + .option_mode_2_freq = 400, 261 + .option_mode_2_3db_freq = 70, 262 + .mot_det_mult_xz = {200, 300, 600, 1100, 2100, 4100}, 263 + .mot_det_mult_y = {100, 200, 400, 7000, 1400, 2700, 54000}, 264 + }, 265 + [e05] = { 266 + .scale = 61313, 267 + .measurement_mode_freq = 200, 268 + .measurement_mode_3db_freq = 60, 269 + .option_mode_1 = SCA3000_OP_MODE_NARROW, 270 + .option_mode_1_freq = 50, 271 + .option_mode_1_3db_freq = 9, 272 + .option_mode_2 = SCA3000_OP_MODE_WIDE, 273 + .option_mode_2_freq = 400, 274 + .option_mode_2_3db_freq = 75, 275 + .mot_det_mult_xz = {600, 900, 1700, 3200, 6100, 11900}, 276 + .mot_det_mult_y = {300, 600, 1200, 2000, 4100, 7800, 15600}, 277 + }, 278 + }; 279 + 280 + static int sca3000_write_reg(struct sca3000_state *st, u8 address, u8 val) 281 + { 282 + st->tx[0] = SCA3000_WRITE_REG(address); 283 + st->tx[1] = val; 284 + return spi_write(st->us, st->tx, 2); 285 + } 286 + 287 + static int sca3000_read_data_short(struct sca3000_state *st, 288 + u8 reg_address_high, 289 + int len) 290 + { 291 + struct spi_transfer xfer[2] = { 292 + { 293 + .len = 1, 294 + .tx_buf = st->tx, 295 + }, { 296 + .len = len, 297 + .rx_buf = st->rx, 298 + } 299 + }; 300 + st->tx[0] = SCA3000_READ_REG(reg_address_high); 301 + 302 + return spi_sync_transfer(st->us, xfer, ARRAY_SIZE(xfer)); 303 + } 304 + 305 + /** 306 + * sca3000_reg_lock_on() - test if the ctrl register lock is on 307 + * @st: Driver specific device instance data. 308 + * 309 + * Lock must be held. 310 + **/ 311 + static int sca3000_reg_lock_on(struct sca3000_state *st) 312 + { 313 + int ret; 314 + 315 + ret = sca3000_read_data_short(st, SCA3000_REG_STATUS_ADDR, 1); 316 + if (ret < 0) 317 + return ret; 318 + 319 + return !(st->rx[0] & SCA3000_LOCKED); 320 + } 321 + 322 + /** 323 + * __sca3000_unlock_reg_lock() - unlock the control registers 324 + * @st: Driver specific device instance data. 325 + * 326 + * Note the device does not appear to support doing this in a single transfer. 327 + * This should only ever be used as part of ctrl reg read. 328 + * Lock must be held before calling this 329 + */ 330 + static int __sca3000_unlock_reg_lock(struct sca3000_state *st) 331 + { 332 + struct spi_transfer xfer[3] = { 333 + { 334 + .len = 2, 335 + .cs_change = 1, 336 + .tx_buf = st->tx, 337 + }, { 338 + .len = 2, 339 + .cs_change = 1, 340 + .tx_buf = st->tx + 2, 341 + }, { 342 + .len = 2, 343 + .tx_buf = st->tx + 4, 344 + }, 345 + }; 346 + st->tx[0] = SCA3000_WRITE_REG(SCA3000_REG_UNLOCK_ADDR); 347 + st->tx[1] = 0x00; 348 + st->tx[2] = SCA3000_WRITE_REG(SCA3000_REG_UNLOCK_ADDR); 349 + st->tx[3] = 0x50; 350 + st->tx[4] = SCA3000_WRITE_REG(SCA3000_REG_UNLOCK_ADDR); 351 + st->tx[5] = 0xA0; 352 + 353 + return spi_sync_transfer(st->us, xfer, ARRAY_SIZE(xfer)); 354 + } 355 + 356 + /** 357 + * sca3000_write_ctrl_reg() write to a lock protect ctrl register 358 + * @st: Driver specific device instance data. 359 + * @sel: selects which registers we wish to write to 360 + * @val: the value to be written 361 + * 362 + * Certain control registers are protected against overwriting by the lock 363 + * register and use a shared write address. This function allows writing of 364 + * these registers. 365 + * Lock must be held. 366 + */ 367 + static int sca3000_write_ctrl_reg(struct sca3000_state *st, 368 + u8 sel, 369 + uint8_t val) 370 + { 371 + int ret; 372 + 373 + ret = sca3000_reg_lock_on(st); 374 + if (ret < 0) 375 + goto error_ret; 376 + if (ret) { 377 + ret = __sca3000_unlock_reg_lock(st); 378 + if (ret) 379 + goto error_ret; 380 + } 381 + 382 + /* Set the control select register */ 383 + ret = sca3000_write_reg(st, SCA3000_REG_CTRL_SEL_ADDR, sel); 384 + if (ret) 385 + goto error_ret; 386 + 387 + /* Write the actual value into the register */ 388 + ret = sca3000_write_reg(st, SCA3000_REG_CTRL_DATA_ADDR, val); 389 + 390 + error_ret: 391 + return ret; 392 + } 393 + 394 + /** 395 + * sca3000_read_ctrl_reg() read from lock protected control register. 396 + * @st: Driver specific device instance data. 397 + * @ctrl_reg: Which ctrl register do we want to read. 398 + * 399 + * Lock must be held. 400 + */ 401 + static int sca3000_read_ctrl_reg(struct sca3000_state *st, 402 + u8 ctrl_reg) 403 + { 404 + int ret; 405 + 406 + ret = sca3000_reg_lock_on(st); 407 + if (ret < 0) 408 + goto error_ret; 409 + if (ret) { 410 + ret = __sca3000_unlock_reg_lock(st); 411 + if (ret) 412 + goto error_ret; 413 + } 414 + /* Set the control select register */ 415 + ret = sca3000_write_reg(st, SCA3000_REG_CTRL_SEL_ADDR, ctrl_reg); 416 + if (ret) 417 + goto error_ret; 418 + ret = sca3000_read_data_short(st, SCA3000_REG_CTRL_DATA_ADDR, 1); 419 + if (ret) 420 + goto error_ret; 421 + return st->rx[0]; 422 + error_ret: 423 + return ret; 424 + } 425 + 426 + /** 427 + * sca3000_show_rev() - sysfs interface to read the chip revision number 428 + * @indio_dev: Device instance specific generic IIO data. 429 + * Driver specific device instance data can be obtained via 430 + * via iio_priv(indio_dev) 431 + */ 432 + static int sca3000_print_rev(struct iio_dev *indio_dev) 433 + { 434 + int ret; 435 + struct sca3000_state *st = iio_priv(indio_dev); 436 + 437 + mutex_lock(&st->lock); 438 + ret = sca3000_read_data_short(st, SCA3000_REG_REVID_ADDR, 1); 439 + if (ret < 0) 440 + goto error_ret; 441 + dev_info(&indio_dev->dev, 442 + "sca3000 revision major=%lu, minor=%lu\n", 443 + st->rx[0] & SCA3000_REG_REVID_MAJOR_MASK, 444 + st->rx[0] & SCA3000_REG_REVID_MINOR_MASK); 445 + error_ret: 446 + mutex_unlock(&st->lock); 447 + 448 + return ret; 449 + } 450 + 451 + static ssize_t 452 + sca3000_show_available_3db_freqs(struct device *dev, 453 + struct device_attribute *attr, 454 + char *buf) 455 + { 456 + struct iio_dev *indio_dev = dev_to_iio_dev(dev); 457 + struct sca3000_state *st = iio_priv(indio_dev); 458 + int len; 459 + 460 + len = sprintf(buf, "%d", st->info->measurement_mode_3db_freq); 461 + if (st->info->option_mode_1) 462 + len += sprintf(buf + len, " %d", 463 + st->info->option_mode_1_3db_freq); 464 + if (st->info->option_mode_2) 465 + len += sprintf(buf + len, " %d", 466 + st->info->option_mode_2_3db_freq); 467 + len += sprintf(buf + len, "\n"); 468 + 469 + return len; 470 + } 471 + 472 + static IIO_DEVICE_ATTR(in_accel_filter_low_pass_3db_frequency_available, 473 + S_IRUGO, sca3000_show_available_3db_freqs, 474 + NULL, 0); 475 + 476 + static const struct iio_event_spec sca3000_event = { 477 + .type = IIO_EV_TYPE_MAG, 478 + .dir = IIO_EV_DIR_RISING, 479 + .mask_separate = BIT(IIO_EV_INFO_VALUE) | BIT(IIO_EV_INFO_ENABLE), 480 + }; 481 + 482 + /* 483 + * Note the hack in the number of bits to pretend we have 2 more than 484 + * we do in the fifo. 485 + */ 486 + #define SCA3000_CHAN(index, mod) \ 487 + { \ 488 + .type = IIO_ACCEL, \ 489 + .modified = 1, \ 490 + .channel2 = mod, \ 491 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 492 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |\ 493 + BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY),\ 494 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),\ 495 + .address = index, \ 496 + .scan_index = index, \ 497 + .scan_type = { \ 498 + .sign = 's', \ 499 + .realbits = 13, \ 500 + .storagebits = 16, \ 501 + .shift = 3, \ 502 + .endianness = IIO_BE, \ 503 + }, \ 504 + .event_spec = &sca3000_event, \ 505 + .num_event_specs = 1, \ 506 + } 507 + 508 + static const struct iio_event_spec sca3000_freefall_event_spec = { 509 + .type = IIO_EV_TYPE_MAG, 510 + .dir = IIO_EV_DIR_FALLING, 511 + .mask_separate = BIT(IIO_EV_INFO_ENABLE) | 512 + BIT(IIO_EV_INFO_PERIOD), 513 + }; 514 + 515 + static const struct iio_chan_spec sca3000_channels[] = { 516 + SCA3000_CHAN(0, IIO_MOD_X), 517 + SCA3000_CHAN(1, IIO_MOD_Y), 518 + SCA3000_CHAN(2, IIO_MOD_Z), 519 + { 520 + .type = IIO_ACCEL, 521 + .modified = 1, 522 + .channel2 = IIO_MOD_X_AND_Y_AND_Z, 523 + .scan_index = -1, /* Fake channel */ 524 + .event_spec = &sca3000_freefall_event_spec, 525 + .num_event_specs = 1, 526 + }, 527 + }; 528 + 529 + static const struct iio_chan_spec sca3000_channels_with_temp[] = { 530 + SCA3000_CHAN(0, IIO_MOD_X), 531 + SCA3000_CHAN(1, IIO_MOD_Y), 532 + SCA3000_CHAN(2, IIO_MOD_Z), 533 + { 534 + .type = IIO_TEMP, 535 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 536 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | 537 + BIT(IIO_CHAN_INFO_OFFSET), 538 + /* No buffer support */ 539 + .scan_index = -1, 540 + }, 541 + { 542 + .type = IIO_ACCEL, 543 + .modified = 1, 544 + .channel2 = IIO_MOD_X_AND_Y_AND_Z, 545 + .scan_index = -1, /* Fake channel */ 546 + .event_spec = &sca3000_freefall_event_spec, 547 + .num_event_specs = 1, 548 + }, 549 + }; 550 + 551 + static u8 sca3000_addresses[3][3] = { 552 + [0] = {SCA3000_REG_X_MSB_ADDR, SCA3000_REG_CTRL_SEL_MD_X_TH, 553 + SCA3000_MD_CTRL_OR_X}, 554 + [1] = {SCA3000_REG_Y_MSB_ADDR, SCA3000_REG_CTRL_SEL_MD_Y_TH, 555 + SCA3000_MD_CTRL_OR_Y}, 556 + [2] = {SCA3000_REG_Z_MSB_ADDR, SCA3000_REG_CTRL_SEL_MD_Z_TH, 557 + SCA3000_MD_CTRL_OR_Z}, 558 + }; 559 + 560 + /** 561 + * __sca3000_get_base_freq() - obtain mode specific base frequency 562 + * @st: Private driver specific device instance specific state. 563 + * @info: chip type specific information. 564 + * @base_freq: Base frequency for the current measurement mode. 565 + * 566 + * lock must be held 567 + */ 568 + static inline int __sca3000_get_base_freq(struct sca3000_state *st, 569 + const struct sca3000_chip_info *info, 570 + int *base_freq) 571 + { 572 + int ret; 573 + 574 + ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1); 575 + if (ret) 576 + goto error_ret; 577 + switch (SCA3000_REG_MODE_MODE_MASK & st->rx[0]) { 578 + case SCA3000_REG_MODE_MEAS_MODE_NORMAL: 579 + *base_freq = info->measurement_mode_freq; 580 + break; 581 + case SCA3000_REG_MODE_MEAS_MODE_OP_1: 582 + *base_freq = info->option_mode_1_freq; 583 + break; 584 + case SCA3000_REG_MODE_MEAS_MODE_OP_2: 585 + *base_freq = info->option_mode_2_freq; 586 + break; 587 + default: 588 + ret = -EINVAL; 589 + } 590 + error_ret: 591 + return ret; 592 + } 593 + 594 + /** 595 + * sca3000_read_raw_samp_freq() - read_raw handler for IIO_CHAN_INFO_SAMP_FREQ 596 + * @st: Private driver specific device instance specific state. 597 + * @val: The frequency read back. 598 + * 599 + * lock must be held 600 + **/ 601 + static int sca3000_read_raw_samp_freq(struct sca3000_state *st, int *val) 602 + { 603 + int ret; 604 + 605 + ret = __sca3000_get_base_freq(st, st->info, val); 606 + if (ret) 607 + return ret; 608 + 609 + ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL); 610 + if (ret < 0) 611 + return ret; 612 + 613 + if (*val > 0) { 614 + ret &= SCA3000_REG_OUT_CTRL_BUF_DIV_MASK; 615 + switch (ret) { 616 + case SCA3000_REG_OUT_CTRL_BUF_DIV_2: 617 + *val /= 2; 618 + break; 619 + case SCA3000_REG_OUT_CTRL_BUF_DIV_4: 620 + *val /= 4; 621 + break; 622 + } 623 + } 624 + 625 + return 0; 626 + } 627 + 628 + /** 629 + * sca3000_write_raw_samp_freq() - write_raw handler for IIO_CHAN_INFO_SAMP_FREQ 630 + * @st: Private driver specific device instance specific state. 631 + * @val: The frequency desired. 632 + * 633 + * lock must be held 634 + */ 635 + static int sca3000_write_raw_samp_freq(struct sca3000_state *st, int val) 636 + { 637 + int ret, base_freq, ctrlval; 638 + 639 + ret = __sca3000_get_base_freq(st, st->info, &base_freq); 640 + if (ret) 641 + return ret; 642 + 643 + ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL); 644 + if (ret < 0) 645 + return ret; 646 + 647 + ctrlval = ret & ~SCA3000_REG_OUT_CTRL_BUF_DIV_MASK; 648 + 649 + if (val == base_freq / 2) 650 + ctrlval |= SCA3000_REG_OUT_CTRL_BUF_DIV_2; 651 + if (val == base_freq / 4) 652 + ctrlval |= SCA3000_REG_OUT_CTRL_BUF_DIV_4; 653 + else if (val != base_freq) 654 + return -EINVAL; 655 + 656 + return sca3000_write_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL, 657 + ctrlval); 658 + } 659 + 660 + static int sca3000_read_3db_freq(struct sca3000_state *st, int *val) 661 + { 662 + int ret; 663 + 664 + ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1); 665 + if (ret) 666 + return ret; 667 + 668 + /* mask bottom 2 bits - only ones that are relevant */ 669 + st->rx[0] &= SCA3000_REG_MODE_MODE_MASK; 670 + switch (st->rx[0]) { 671 + case SCA3000_REG_MODE_MEAS_MODE_NORMAL: 672 + *val = st->info->measurement_mode_3db_freq; 673 + return IIO_VAL_INT; 674 + case SCA3000_REG_MODE_MEAS_MODE_MOT_DET: 675 + return -EBUSY; 676 + case SCA3000_REG_MODE_MEAS_MODE_OP_1: 677 + *val = st->info->option_mode_1_3db_freq; 678 + return IIO_VAL_INT; 679 + case SCA3000_REG_MODE_MEAS_MODE_OP_2: 680 + *val = st->info->option_mode_2_3db_freq; 681 + return IIO_VAL_INT; 682 + default: 683 + return -EINVAL; 684 + } 685 + } 686 + 687 + static int sca3000_write_3db_freq(struct sca3000_state *st, int val) 688 + { 689 + int ret; 690 + int mode; 691 + 692 + if (val == st->info->measurement_mode_3db_freq) 693 + mode = SCA3000_REG_MODE_MEAS_MODE_NORMAL; 694 + else if (st->info->option_mode_1 && 695 + (val == st->info->option_mode_1_3db_freq)) 696 + mode = SCA3000_REG_MODE_MEAS_MODE_OP_1; 697 + else if (st->info->option_mode_2 && 698 + (val == st->info->option_mode_2_3db_freq)) 699 + mode = SCA3000_REG_MODE_MEAS_MODE_OP_2; 700 + else 701 + return -EINVAL; 702 + ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1); 703 + if (ret) 704 + return ret; 705 + 706 + st->rx[0] &= ~SCA3000_REG_MODE_MODE_MASK; 707 + st->rx[0] |= (mode & SCA3000_REG_MODE_MODE_MASK); 708 + 709 + return sca3000_write_reg(st, SCA3000_REG_MODE_ADDR, st->rx[0]); 710 + } 711 + 712 + static int sca3000_read_raw(struct iio_dev *indio_dev, 713 + struct iio_chan_spec const *chan, 714 + int *val, 715 + int *val2, 716 + long mask) 717 + { 718 + struct sca3000_state *st = iio_priv(indio_dev); 719 + int ret; 720 + u8 address; 721 + 722 + switch (mask) { 723 + case IIO_CHAN_INFO_RAW: 724 + mutex_lock(&st->lock); 725 + if (chan->type == IIO_ACCEL) { 726 + if (st->mo_det_use_count) { 727 + mutex_unlock(&st->lock); 728 + return -EBUSY; 729 + } 730 + address = sca3000_addresses[chan->address][0]; 731 + ret = sca3000_read_data_short(st, address, 2); 732 + if (ret < 0) { 733 + mutex_unlock(&st->lock); 734 + return ret; 735 + } 736 + *val = (be16_to_cpup((__be16 *)st->rx) >> 3) & 0x1FFF; 737 + *val = ((*val) << (sizeof(*val) * 8 - 13)) >> 738 + (sizeof(*val) * 8 - 13); 739 + } else { 740 + /* get the temperature when available */ 741 + ret = sca3000_read_data_short(st, 742 + SCA3000_REG_TEMP_MSB_ADDR, 743 + 2); 744 + if (ret < 0) { 745 + mutex_unlock(&st->lock); 746 + return ret; 747 + } 748 + *val = ((st->rx[0] & 0x3F) << 3) | 749 + ((st->rx[1] & 0xE0) >> 5); 750 + } 751 + mutex_unlock(&st->lock); 752 + return IIO_VAL_INT; 753 + case IIO_CHAN_INFO_SCALE: 754 + *val = 0; 755 + if (chan->type == IIO_ACCEL) 756 + *val2 = st->info->scale; 757 + else /* temperature */ 758 + *val2 = 555556; 759 + return IIO_VAL_INT_PLUS_MICRO; 760 + case IIO_CHAN_INFO_OFFSET: 761 + *val = -214; 762 + *val2 = 600000; 763 + return IIO_VAL_INT_PLUS_MICRO; 764 + case IIO_CHAN_INFO_SAMP_FREQ: 765 + mutex_lock(&st->lock); 766 + ret = sca3000_read_raw_samp_freq(st, val); 767 + mutex_unlock(&st->lock); 768 + return ret ? ret : IIO_VAL_INT; 769 + case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY: 770 + mutex_lock(&st->lock); 771 + ret = sca3000_read_3db_freq(st, val); 772 + mutex_unlock(&st->lock); 773 + return ret; 774 + default: 775 + return -EINVAL; 776 + } 777 + } 778 + 779 + static int sca3000_write_raw(struct iio_dev *indio_dev, 780 + struct iio_chan_spec const *chan, 781 + int val, int val2, long mask) 782 + { 783 + struct sca3000_state *st = iio_priv(indio_dev); 784 + int ret; 785 + 786 + switch (mask) { 787 + case IIO_CHAN_INFO_SAMP_FREQ: 788 + if (val2) 789 + return -EINVAL; 790 + mutex_lock(&st->lock); 791 + ret = sca3000_write_raw_samp_freq(st, val); 792 + mutex_unlock(&st->lock); 793 + return ret; 794 + case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY: 795 + if (val2) 796 + return -EINVAL; 797 + mutex_lock(&st->lock); 798 + ret = sca3000_write_3db_freq(st, val); 799 + mutex_unlock(&st->lock); 800 + default: 801 + return -EINVAL; 802 + } 803 + 804 + return ret; 805 + } 806 + 807 + /** 808 + * sca3000_read_av_freq() - sysfs function to get available frequencies 809 + * @dev: Device structure for this device. 810 + * @attr: Description of the attribute. 811 + * @buf: Incoming string 812 + * 813 + * The later modes are only relevant to the ring buffer - and depend on current 814 + * mode. Note that data sheet gives rather wide tolerances for these so integer 815 + * division will give good enough answer and not all chips have them specified 816 + * at all. 817 + **/ 818 + static ssize_t sca3000_read_av_freq(struct device *dev, 819 + struct device_attribute *attr, 820 + char *buf) 821 + { 822 + struct iio_dev *indio_dev = dev_to_iio_dev(dev); 823 + struct sca3000_state *st = iio_priv(indio_dev); 824 + int len = 0, ret, val; 825 + 826 + mutex_lock(&st->lock); 827 + ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1); 828 + val = st->rx[0]; 829 + mutex_unlock(&st->lock); 830 + if (ret) 831 + goto error_ret; 832 + 833 + switch (val & SCA3000_REG_MODE_MODE_MASK) { 834 + case SCA3000_REG_MODE_MEAS_MODE_NORMAL: 835 + len += sprintf(buf + len, "%d %d %d\n", 836 + st->info->measurement_mode_freq, 837 + st->info->measurement_mode_freq / 2, 838 + st->info->measurement_mode_freq / 4); 839 + break; 840 + case SCA3000_REG_MODE_MEAS_MODE_OP_1: 841 + len += sprintf(buf + len, "%d %d %d\n", 842 + st->info->option_mode_1_freq, 843 + st->info->option_mode_1_freq / 2, 844 + st->info->option_mode_1_freq / 4); 845 + break; 846 + case SCA3000_REG_MODE_MEAS_MODE_OP_2: 847 + len += sprintf(buf + len, "%d %d %d\n", 848 + st->info->option_mode_2_freq, 849 + st->info->option_mode_2_freq / 2, 850 + st->info->option_mode_2_freq / 4); 851 + break; 852 + } 853 + return len; 854 + error_ret: 855 + return ret; 856 + } 857 + 858 + /* 859 + * Should only really be registered if ring buffer support is compiled in. 860 + * Does no harm however and doing it right would add a fair bit of complexity 861 + */ 862 + static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(sca3000_read_av_freq); 863 + 864 + /** 865 + * sca3000_read_event_value() - query of a threshold or period 866 + **/ 867 + static int sca3000_read_event_value(struct iio_dev *indio_dev, 868 + const struct iio_chan_spec *chan, 869 + enum iio_event_type type, 870 + enum iio_event_direction dir, 871 + enum iio_event_info info, 872 + int *val, int *val2) 873 + { 874 + int ret, i; 875 + struct sca3000_state *st = iio_priv(indio_dev); 876 + 877 + switch (info) { 878 + case IIO_EV_INFO_VALUE: 879 + mutex_lock(&st->lock); 880 + ret = sca3000_read_ctrl_reg(st, 881 + sca3000_addresses[chan->address][1]); 882 + mutex_unlock(&st->lock); 883 + if (ret < 0) 884 + return ret; 885 + *val = 0; 886 + if (chan->channel2 == IIO_MOD_Y) 887 + for_each_set_bit(i, (unsigned long *)&ret, 888 + ARRAY_SIZE(st->info->mot_det_mult_y)) 889 + *val += st->info->mot_det_mult_y[i]; 890 + else 891 + for_each_set_bit(i, (unsigned long *)&ret, 892 + ARRAY_SIZE(st->info->mot_det_mult_xz)) 893 + *val += st->info->mot_det_mult_xz[i]; 894 + 895 + return IIO_VAL_INT; 896 + case IIO_EV_INFO_PERIOD: 897 + *val = 0; 898 + *val2 = 226000; 899 + return IIO_VAL_INT_PLUS_MICRO; 900 + default: 901 + return -EINVAL; 902 + } 903 + } 904 + 905 + /** 906 + * sca3000_write_value() - control of threshold and period 907 + * @indio_dev: Device instance specific IIO information. 908 + * @chan: Description of the channel for which the event is being 909 + * configured. 910 + * @type: The type of event being configured, here magnitude rising 911 + * as everything else is read only. 912 + * @dir: Direction of the event (here rising) 913 + * @info: What information about the event are we configuring. 914 + * Here the threshold only. 915 + * @val: Integer part of the value being written.. 916 + * @val2: Non integer part of the value being written. Here always 0. 917 + */ 918 + static int sca3000_write_event_value(struct iio_dev *indio_dev, 919 + const struct iio_chan_spec *chan, 920 + enum iio_event_type type, 921 + enum iio_event_direction dir, 922 + enum iio_event_info info, 923 + int val, int val2) 924 + { 925 + struct sca3000_state *st = iio_priv(indio_dev); 926 + int ret; 927 + int i; 928 + u8 nonlinear = 0; 929 + 930 + if (chan->channel2 == IIO_MOD_Y) { 931 + i = ARRAY_SIZE(st->info->mot_det_mult_y); 932 + while (i > 0) 933 + if (val >= st->info->mot_det_mult_y[--i]) { 934 + nonlinear |= (1 << i); 935 + val -= st->info->mot_det_mult_y[i]; 936 + } 937 + } else { 938 + i = ARRAY_SIZE(st->info->mot_det_mult_xz); 939 + while (i > 0) 940 + if (val >= st->info->mot_det_mult_xz[--i]) { 941 + nonlinear |= (1 << i); 942 + val -= st->info->mot_det_mult_xz[i]; 943 + } 944 + } 945 + 946 + mutex_lock(&st->lock); 947 + ret = sca3000_write_ctrl_reg(st, 948 + sca3000_addresses[chan->address][1], 949 + nonlinear); 950 + mutex_unlock(&st->lock); 951 + 952 + return ret; 953 + } 954 + 955 + static struct attribute *sca3000_attributes[] = { 956 + &iio_dev_attr_in_accel_filter_low_pass_3db_frequency_available.dev_attr.attr, 957 + &iio_dev_attr_sampling_frequency_available.dev_attr.attr, 958 + NULL, 959 + }; 960 + 961 + static const struct attribute_group sca3000_attribute_group = { 962 + .attrs = sca3000_attributes, 963 + }; 964 + 965 + static int sca3000_read_data(struct sca3000_state *st, 966 + u8 reg_address_high, 967 + u8 *rx, 968 + int len) 969 + { 970 + int ret; 971 + struct spi_transfer xfer[2] = { 972 + { 973 + .len = 1, 974 + .tx_buf = st->tx, 975 + }, { 976 + .len = len, 977 + .rx_buf = rx, 978 + } 979 + }; 980 + 981 + st->tx[0] = SCA3000_READ_REG(reg_address_high); 982 + ret = spi_sync_transfer(st->us, xfer, ARRAY_SIZE(xfer)); 983 + if (ret) { 984 + dev_err(get_device(&st->us->dev), "problem reading register"); 985 + return ret; 986 + } 987 + 988 + return 0; 989 + } 990 + 991 + /** 992 + * sca3000_ring_int_process() - ring specific interrupt handling. 993 + * @val: Value of the interrupt status register. 994 + * @indio_dev: Device instance specific IIO device structure. 995 + */ 996 + static void sca3000_ring_int_process(u8 val, struct iio_dev *indio_dev) 997 + { 998 + struct sca3000_state *st = iio_priv(indio_dev); 999 + int ret, i, num_available; 1000 + 1001 + mutex_lock(&st->lock); 1002 + 1003 + if (val & SCA3000_REG_INT_STATUS_HALF) { 1004 + ret = sca3000_read_data_short(st, SCA3000_REG_BUF_COUNT_ADDR, 1005 + 1); 1006 + if (ret) 1007 + goto error_ret; 1008 + num_available = st->rx[0]; 1009 + /* 1010 + * num_available is the total number of samples available 1011 + * i.e. number of time points * number of channels. 1012 + */ 1013 + ret = sca3000_read_data(st, SCA3000_REG_RING_OUT_ADDR, st->rx, 1014 + num_available * 2); 1015 + if (ret) 1016 + goto error_ret; 1017 + for (i = 0; i < num_available / 3; i++) { 1018 + /* 1019 + * Dirty hack to cover for 11 bit in fifo, 13 bit 1020 + * direct reading. 1021 + * 1022 + * In theory the bottom two bits are undefined. 1023 + * In reality they appear to always be 0. 1024 + */ 1025 + iio_push_to_buffers(indio_dev, st->rx + i * 3 * 2); 1026 + } 1027 + } 1028 + error_ret: 1029 + mutex_unlock(&st->lock); 1030 + } 1031 + 1032 + /** 1033 + * sca3000_event_handler() - handling ring and non ring events 1034 + * @irq: The irq being handled. 1035 + * @private: struct iio_device pointer for the device. 1036 + * 1037 + * Ring related interrupt handler. Depending on event, push to 1038 + * the ring buffer event chrdev or the event one. 1039 + * 1040 + * This function is complicated by the fact that the devices can signify ring 1041 + * and non ring events via the same interrupt line and they can only 1042 + * be distinguished via a read of the relevant status register. 1043 + */ 1044 + static irqreturn_t sca3000_event_handler(int irq, void *private) 1045 + { 1046 + struct iio_dev *indio_dev = private; 1047 + struct sca3000_state *st = iio_priv(indio_dev); 1048 + int ret, val; 1049 + s64 last_timestamp = iio_get_time_ns(indio_dev); 1050 + 1051 + /* 1052 + * Could lead if badly timed to an extra read of status reg, 1053 + * but ensures no interrupt is missed. 1054 + */ 1055 + mutex_lock(&st->lock); 1056 + ret = sca3000_read_data_short(st, SCA3000_REG_INT_STATUS_ADDR, 1); 1057 + val = st->rx[0]; 1058 + mutex_unlock(&st->lock); 1059 + if (ret) 1060 + goto done; 1061 + 1062 + sca3000_ring_int_process(val, indio_dev); 1063 + 1064 + if (val & SCA3000_INT_STATUS_FREE_FALL) 1065 + iio_push_event(indio_dev, 1066 + IIO_MOD_EVENT_CODE(IIO_ACCEL, 1067 + 0, 1068 + IIO_MOD_X_AND_Y_AND_Z, 1069 + IIO_EV_TYPE_MAG, 1070 + IIO_EV_DIR_FALLING), 1071 + last_timestamp); 1072 + 1073 + if (val & SCA3000_INT_STATUS_Y_TRIGGER) 1074 + iio_push_event(indio_dev, 1075 + IIO_MOD_EVENT_CODE(IIO_ACCEL, 1076 + 0, 1077 + IIO_MOD_Y, 1078 + IIO_EV_TYPE_MAG, 1079 + IIO_EV_DIR_RISING), 1080 + last_timestamp); 1081 + 1082 + if (val & SCA3000_INT_STATUS_X_TRIGGER) 1083 + iio_push_event(indio_dev, 1084 + IIO_MOD_EVENT_CODE(IIO_ACCEL, 1085 + 0, 1086 + IIO_MOD_X, 1087 + IIO_EV_TYPE_MAG, 1088 + IIO_EV_DIR_RISING), 1089 + last_timestamp); 1090 + 1091 + if (val & SCA3000_INT_STATUS_Z_TRIGGER) 1092 + iio_push_event(indio_dev, 1093 + IIO_MOD_EVENT_CODE(IIO_ACCEL, 1094 + 0, 1095 + IIO_MOD_Z, 1096 + IIO_EV_TYPE_MAG, 1097 + IIO_EV_DIR_RISING), 1098 + last_timestamp); 1099 + 1100 + done: 1101 + return IRQ_HANDLED; 1102 + } 1103 + 1104 + /** 1105 + * sca3000_read_event_config() what events are enabled 1106 + **/ 1107 + static int sca3000_read_event_config(struct iio_dev *indio_dev, 1108 + const struct iio_chan_spec *chan, 1109 + enum iio_event_type type, 1110 + enum iio_event_direction dir) 1111 + { 1112 + struct sca3000_state *st = iio_priv(indio_dev); 1113 + int ret; 1114 + /* read current value of mode register */ 1115 + mutex_lock(&st->lock); 1116 + 1117 + ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1); 1118 + if (ret) 1119 + goto error_ret; 1120 + 1121 + switch (chan->channel2) { 1122 + case IIO_MOD_X_AND_Y_AND_Z: 1123 + ret = !!(st->rx[0] & SCA3000_REG_MODE_FREE_FALL_DETECT); 1124 + break; 1125 + case IIO_MOD_X: 1126 + case IIO_MOD_Y: 1127 + case IIO_MOD_Z: 1128 + /* 1129 + * Motion detection mode cannot run at the same time as 1130 + * acceleration data being read. 1131 + */ 1132 + if ((st->rx[0] & SCA3000_REG_MODE_MODE_MASK) 1133 + != SCA3000_REG_MODE_MEAS_MODE_MOT_DET) { 1134 + ret = 0; 1135 + } else { 1136 + ret = sca3000_read_ctrl_reg(st, 1137 + SCA3000_REG_CTRL_SEL_MD_CTRL); 1138 + if (ret < 0) 1139 + goto error_ret; 1140 + /* only supporting logical or's for now */ 1141 + ret = !!(ret & sca3000_addresses[chan->address][2]); 1142 + } 1143 + break; 1144 + default: 1145 + ret = -EINVAL; 1146 + } 1147 + 1148 + error_ret: 1149 + mutex_unlock(&st->lock); 1150 + 1151 + return ret; 1152 + } 1153 + 1154 + static int sca3000_freefall_set_state(struct iio_dev *indio_dev, int state) 1155 + { 1156 + struct sca3000_state *st = iio_priv(indio_dev); 1157 + int ret; 1158 + 1159 + /* read current value of mode register */ 1160 + ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1); 1161 + if (ret) 1162 + return ret; 1163 + 1164 + /* if off and should be on */ 1165 + if (state && !(st->rx[0] & SCA3000_REG_MODE_FREE_FALL_DETECT)) 1166 + return sca3000_write_reg(st, SCA3000_REG_MODE_ADDR, 1167 + st->rx[0] | SCA3000_REG_MODE_FREE_FALL_DETECT); 1168 + /* if on and should be off */ 1169 + else if (!state && (st->rx[0] & SCA3000_REG_MODE_FREE_FALL_DETECT)) 1170 + return sca3000_write_reg(st, SCA3000_REG_MODE_ADDR, 1171 + st->rx[0] & ~SCA3000_REG_MODE_FREE_FALL_DETECT); 1172 + else 1173 + return 0; 1174 + } 1175 + 1176 + static int sca3000_motion_detect_set_state(struct iio_dev *indio_dev, int axis, 1177 + int state) 1178 + { 1179 + struct sca3000_state *st = iio_priv(indio_dev); 1180 + int ret, ctrlval; 1181 + 1182 + /* 1183 + * First read the motion detector config to find out if 1184 + * this axis is on 1185 + */ 1186 + ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_MD_CTRL); 1187 + if (ret < 0) 1188 + return ret; 1189 + ctrlval = ret; 1190 + /* if off and should be on */ 1191 + if (state && !(ctrlval & sca3000_addresses[axis][2])) { 1192 + ret = sca3000_write_ctrl_reg(st, 1193 + SCA3000_REG_CTRL_SEL_MD_CTRL, 1194 + ctrlval | 1195 + sca3000_addresses[axis][2]); 1196 + if (ret) 1197 + return ret; 1198 + st->mo_det_use_count++; 1199 + } else if (!state && (ctrlval & sca3000_addresses[axis][2])) { 1200 + ret = sca3000_write_ctrl_reg(st, 1201 + SCA3000_REG_CTRL_SEL_MD_CTRL, 1202 + ctrlval & 1203 + ~(sca3000_addresses[axis][2])); 1204 + if (ret) 1205 + return ret; 1206 + st->mo_det_use_count--; 1207 + } 1208 + 1209 + /* read current value of mode register */ 1210 + ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1); 1211 + if (ret) 1212 + return ret; 1213 + /* if off and should be on */ 1214 + if ((st->mo_det_use_count) && 1215 + ((st->rx[0] & SCA3000_REG_MODE_MODE_MASK) 1216 + != SCA3000_REG_MODE_MEAS_MODE_MOT_DET)) 1217 + return sca3000_write_reg(st, SCA3000_REG_MODE_ADDR, 1218 + (st->rx[0] & ~SCA3000_REG_MODE_MODE_MASK) 1219 + | SCA3000_REG_MODE_MEAS_MODE_MOT_DET); 1220 + /* if on and should be off */ 1221 + else if (!(st->mo_det_use_count) && 1222 + ((st->rx[0] & SCA3000_REG_MODE_MODE_MASK) 1223 + == SCA3000_REG_MODE_MEAS_MODE_MOT_DET)) 1224 + return sca3000_write_reg(st, SCA3000_REG_MODE_ADDR, 1225 + st->rx[0] & SCA3000_REG_MODE_MODE_MASK); 1226 + else 1227 + return 0; 1228 + } 1229 + 1230 + /** 1231 + * sca3000_write_event_config() - simple on off control for motion detector 1232 + * @indio_dev: IIO device instance specific structure. Data specific to this 1233 + * particular driver may be accessed via iio_priv(indio_dev). 1234 + * @chan: Description of the channel whose event we are configuring. 1235 + * @type: The type of event. 1236 + * @dir: The direction of the event. 1237 + * @state: Desired state of event being configured. 1238 + * 1239 + * This is a per axis control, but enabling any will result in the 1240 + * motion detector unit being enabled. 1241 + * N.B. enabling motion detector stops normal data acquisition. 1242 + * There is a complexity in knowing which mode to return to when 1243 + * this mode is disabled. Currently normal mode is assumed. 1244 + **/ 1245 + static int sca3000_write_event_config(struct iio_dev *indio_dev, 1246 + const struct iio_chan_spec *chan, 1247 + enum iio_event_type type, 1248 + enum iio_event_direction dir, 1249 + int state) 1250 + { 1251 + struct sca3000_state *st = iio_priv(indio_dev); 1252 + int ret; 1253 + 1254 + mutex_lock(&st->lock); 1255 + switch (chan->channel2) { 1256 + case IIO_MOD_X_AND_Y_AND_Z: 1257 + ret = sca3000_freefall_set_state(indio_dev, state); 1258 + break; 1259 + 1260 + case IIO_MOD_X: 1261 + case IIO_MOD_Y: 1262 + case IIO_MOD_Z: 1263 + ret = sca3000_motion_detect_set_state(indio_dev, 1264 + chan->address, 1265 + state); 1266 + break; 1267 + default: 1268 + ret = -EINVAL; 1269 + break; 1270 + } 1271 + mutex_unlock(&st->lock); 1272 + 1273 + return ret; 1274 + } 1275 + 1276 + static int sca3000_configure_ring(struct iio_dev *indio_dev) 1277 + { 1278 + struct iio_buffer *buffer; 1279 + 1280 + buffer = iio_kfifo_allocate(); 1281 + if (!buffer) 1282 + return -ENOMEM; 1283 + 1284 + iio_device_attach_buffer(indio_dev, buffer); 1285 + indio_dev->modes |= INDIO_BUFFER_SOFTWARE; 1286 + 1287 + return 0; 1288 + } 1289 + 1290 + static void sca3000_unconfigure_ring(struct iio_dev *indio_dev) 1291 + { 1292 + iio_kfifo_free(indio_dev->buffer); 1293 + } 1294 + 1295 + static inline 1296 + int __sca3000_hw_ring_state_set(struct iio_dev *indio_dev, bool state) 1297 + { 1298 + struct sca3000_state *st = iio_priv(indio_dev); 1299 + int ret; 1300 + 1301 + mutex_lock(&st->lock); 1302 + ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1); 1303 + if (ret) 1304 + goto error_ret; 1305 + if (state) { 1306 + dev_info(&indio_dev->dev, "supposedly enabling ring buffer\n"); 1307 + ret = sca3000_write_reg(st, 1308 + SCA3000_REG_MODE_ADDR, 1309 + (st->rx[0] | SCA3000_REG_MODE_RING_BUF_ENABLE)); 1310 + } else 1311 + ret = sca3000_write_reg(st, 1312 + SCA3000_REG_MODE_ADDR, 1313 + (st->rx[0] & ~SCA3000_REG_MODE_RING_BUF_ENABLE)); 1314 + error_ret: 1315 + mutex_unlock(&st->lock); 1316 + 1317 + return ret; 1318 + } 1319 + 1320 + /** 1321 + * sca3000_hw_ring_preenable() - hw ring buffer preenable function 1322 + * @indio_dev: structure representing the IIO device. Device instance 1323 + * specific state can be accessed via iio_priv(indio_dev). 1324 + * 1325 + * Very simple enable function as the chip will allows normal reads 1326 + * during ring buffer operation so as long as it is indeed running 1327 + * before we notify the core, the precise ordering does not matter. 1328 + */ 1329 + static int sca3000_hw_ring_preenable(struct iio_dev *indio_dev) 1330 + { 1331 + int ret; 1332 + struct sca3000_state *st = iio_priv(indio_dev); 1333 + 1334 + mutex_lock(&st->lock); 1335 + 1336 + /* Enable the 50% full interrupt */ 1337 + ret = sca3000_read_data_short(st, SCA3000_REG_INT_MASK_ADDR, 1); 1338 + if (ret) 1339 + goto error_unlock; 1340 + ret = sca3000_write_reg(st, 1341 + SCA3000_REG_INT_MASK_ADDR, 1342 + st->rx[0] | SCA3000_REG_INT_MASK_RING_HALF); 1343 + if (ret) 1344 + goto error_unlock; 1345 + 1346 + mutex_unlock(&st->lock); 1347 + 1348 + return __sca3000_hw_ring_state_set(indio_dev, 1); 1349 + 1350 + error_unlock: 1351 + mutex_unlock(&st->lock); 1352 + 1353 + return ret; 1354 + } 1355 + 1356 + static int sca3000_hw_ring_postdisable(struct iio_dev *indio_dev) 1357 + { 1358 + int ret; 1359 + struct sca3000_state *st = iio_priv(indio_dev); 1360 + 1361 + ret = __sca3000_hw_ring_state_set(indio_dev, 0); 1362 + if (ret) 1363 + return ret; 1364 + 1365 + /* Disable the 50% full interrupt */ 1366 + mutex_lock(&st->lock); 1367 + 1368 + ret = sca3000_read_data_short(st, SCA3000_REG_INT_MASK_ADDR, 1); 1369 + if (ret) 1370 + goto unlock; 1371 + ret = sca3000_write_reg(st, 1372 + SCA3000_REG_INT_MASK_ADDR, 1373 + st->rx[0] & ~SCA3000_REG_INT_MASK_RING_HALF); 1374 + unlock: 1375 + mutex_unlock(&st->lock); 1376 + return ret; 1377 + } 1378 + 1379 + static const struct iio_buffer_setup_ops sca3000_ring_setup_ops = { 1380 + .preenable = &sca3000_hw_ring_preenable, 1381 + .postdisable = &sca3000_hw_ring_postdisable, 1382 + }; 1383 + 1384 + /** 1385 + * sca3000_clean_setup() - get the device into a predictable state 1386 + * @st: Device instance specific private data structure 1387 + * 1388 + * Devices use flash memory to store many of the register values 1389 + * and hence can come up in somewhat unpredictable states. 1390 + * Hence reset everything on driver load. 1391 + */ 1392 + static int sca3000_clean_setup(struct sca3000_state *st) 1393 + { 1394 + int ret; 1395 + 1396 + mutex_lock(&st->lock); 1397 + /* Ensure all interrupts have been acknowledged */ 1398 + ret = sca3000_read_data_short(st, SCA3000_REG_INT_STATUS_ADDR, 1); 1399 + if (ret) 1400 + goto error_ret; 1401 + 1402 + /* Turn off all motion detection channels */ 1403 + ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_MD_CTRL); 1404 + if (ret < 0) 1405 + goto error_ret; 1406 + ret = sca3000_write_ctrl_reg(st, SCA3000_REG_CTRL_SEL_MD_CTRL, 1407 + ret & SCA3000_MD_CTRL_PROT_MASK); 1408 + if (ret) 1409 + goto error_ret; 1410 + 1411 + /* Disable ring buffer */ 1412 + ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL); 1413 + if (ret < 0) 1414 + goto error_ret; 1415 + ret = sca3000_write_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL, 1416 + (ret & SCA3000_REG_OUT_CTRL_PROT_MASK) 1417 + | SCA3000_REG_OUT_CTRL_BUF_X_EN 1418 + | SCA3000_REG_OUT_CTRL_BUF_Y_EN 1419 + | SCA3000_REG_OUT_CTRL_BUF_Z_EN 1420 + | SCA3000_REG_OUT_CTRL_BUF_DIV_4); 1421 + if (ret) 1422 + goto error_ret; 1423 + /* Enable interrupts, relevant to mode and set up as active low */ 1424 + ret = sca3000_read_data_short(st, SCA3000_REG_INT_MASK_ADDR, 1); 1425 + if (ret) 1426 + goto error_ret; 1427 + ret = sca3000_write_reg(st, 1428 + SCA3000_REG_INT_MASK_ADDR, 1429 + (ret & SCA3000_REG_INT_MASK_PROT_MASK) 1430 + | SCA3000_REG_INT_MASK_ACTIVE_LOW); 1431 + if (ret) 1432 + goto error_ret; 1433 + /* 1434 + * Select normal measurement mode, free fall off, ring off 1435 + * Ring in 12 bit mode - it is fine to overwrite reserved bits 3,5 1436 + * as that occurs in one of the example on the datasheet 1437 + */ 1438 + ret = sca3000_read_data_short(st, SCA3000_REG_MODE_ADDR, 1); 1439 + if (ret) 1440 + goto error_ret; 1441 + ret = sca3000_write_reg(st, SCA3000_REG_MODE_ADDR, 1442 + (st->rx[0] & SCA3000_MODE_PROT_MASK)); 1443 + 1444 + error_ret: 1445 + mutex_unlock(&st->lock); 1446 + return ret; 1447 + } 1448 + 1449 + static const struct iio_info sca3000_info = { 1450 + .attrs = &sca3000_attribute_group, 1451 + .read_raw = &sca3000_read_raw, 1452 + .write_raw = &sca3000_write_raw, 1453 + .read_event_value = &sca3000_read_event_value, 1454 + .write_event_value = &sca3000_write_event_value, 1455 + .read_event_config = &sca3000_read_event_config, 1456 + .write_event_config = &sca3000_write_event_config, 1457 + .driver_module = THIS_MODULE, 1458 + }; 1459 + 1460 + static int sca3000_probe(struct spi_device *spi) 1461 + { 1462 + int ret; 1463 + struct sca3000_state *st; 1464 + struct iio_dev *indio_dev; 1465 + 1466 + indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 1467 + if (!indio_dev) 1468 + return -ENOMEM; 1469 + 1470 + st = iio_priv(indio_dev); 1471 + spi_set_drvdata(spi, indio_dev); 1472 + st->us = spi; 1473 + mutex_init(&st->lock); 1474 + st->info = &sca3000_spi_chip_info_tbl[spi_get_device_id(spi) 1475 + ->driver_data]; 1476 + 1477 + indio_dev->dev.parent = &spi->dev; 1478 + indio_dev->name = spi_get_device_id(spi)->name; 1479 + indio_dev->info = &sca3000_info; 1480 + if (st->info->temp_output) { 1481 + indio_dev->channels = sca3000_channels_with_temp; 1482 + indio_dev->num_channels = 1483 + ARRAY_SIZE(sca3000_channels_with_temp); 1484 + } else { 1485 + indio_dev->channels = sca3000_channels; 1486 + indio_dev->num_channels = ARRAY_SIZE(sca3000_channels); 1487 + } 1488 + indio_dev->modes = INDIO_DIRECT_MODE; 1489 + 1490 + sca3000_configure_ring(indio_dev); 1491 + 1492 + if (spi->irq) { 1493 + ret = request_threaded_irq(spi->irq, 1494 + NULL, 1495 + &sca3000_event_handler, 1496 + IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 1497 + "sca3000", 1498 + indio_dev); 1499 + if (ret) 1500 + return ret; 1501 + } 1502 + indio_dev->setup_ops = &sca3000_ring_setup_ops; 1503 + ret = sca3000_clean_setup(st); 1504 + if (ret) 1505 + goto error_free_irq; 1506 + 1507 + ret = sca3000_print_rev(indio_dev); 1508 + if (ret) 1509 + goto error_free_irq; 1510 + 1511 + return iio_device_register(indio_dev); 1512 + 1513 + error_free_irq: 1514 + if (spi->irq) 1515 + free_irq(spi->irq, indio_dev); 1516 + 1517 + return ret; 1518 + } 1519 + 1520 + static int sca3000_stop_all_interrupts(struct sca3000_state *st) 1521 + { 1522 + int ret; 1523 + 1524 + mutex_lock(&st->lock); 1525 + ret = sca3000_read_data_short(st, SCA3000_REG_INT_MASK_ADDR, 1); 1526 + if (ret) 1527 + goto error_ret; 1528 + ret = sca3000_write_reg(st, SCA3000_REG_INT_MASK_ADDR, 1529 + (st->rx[0] & 1530 + ~(SCA3000_REG_INT_MASK_RING_THREE_QUARTER | 1531 + SCA3000_REG_INT_MASK_RING_HALF | 1532 + SCA3000_REG_INT_MASK_ALL_INTS))); 1533 + error_ret: 1534 + mutex_unlock(&st->lock); 1535 + return ret; 1536 + } 1537 + 1538 + static int sca3000_remove(struct spi_device *spi) 1539 + { 1540 + struct iio_dev *indio_dev = spi_get_drvdata(spi); 1541 + struct sca3000_state *st = iio_priv(indio_dev); 1542 + 1543 + iio_device_unregister(indio_dev); 1544 + 1545 + /* Must ensure no interrupts can be generated after this! */ 1546 + sca3000_stop_all_interrupts(st); 1547 + if (spi->irq) 1548 + free_irq(spi->irq, indio_dev); 1549 + 1550 + sca3000_unconfigure_ring(indio_dev); 1551 + 1552 + return 0; 1553 + } 1554 + 1555 + static const struct spi_device_id sca3000_id[] = { 1556 + {"sca3000_d01", d01}, 1557 + {"sca3000_e02", e02}, 1558 + {"sca3000_e04", e04}, 1559 + {"sca3000_e05", e05}, 1560 + {} 1561 + }; 1562 + MODULE_DEVICE_TABLE(spi, sca3000_id); 1563 + 1564 + static struct spi_driver sca3000_driver = { 1565 + .driver = { 1566 + .name = "sca3000", 1567 + }, 1568 + .probe = sca3000_probe, 1569 + .remove = sca3000_remove, 1570 + .id_table = sca3000_id, 1571 + }; 1572 + module_spi_driver(sca3000_driver); 1573 + 1574 + MODULE_AUTHOR("Jonathan Cameron <jic23@kernel.org>"); 1575 + MODULE_DESCRIPTION("VTI SCA3000 Series Accelerometers SPI driver"); 1576 + MODULE_LICENSE("GPL v2");
+14
drivers/iio/adc/Kconfig
··· 58 58 To compile this driver as a module, choose M here: the 59 59 module will be called ad7476. 60 60 61 + config AD7766 62 + tristate "Analog Devices AD7766/AD7767 ADC driver" 63 + depends on SPI_MASTER 64 + select IIO_BUFFER 65 + select IIO_TRIGGERED_BUFFER 66 + help 67 + Say yes here to build support for Analog Devices AD7766, AD7766-1, 68 + AD7766-2, AD7767, AD7767-1, AD7767-2 SPI analog to digital converters. 69 + 70 + To compile this driver as a module, choose M here: the module will be 71 + called ad7766. 72 + 61 73 config AD7791 62 74 tristate "Analog Devices AD7791 ADC driver" 63 75 depends on SPI ··· 459 447 config TI_ADC0832 460 448 tristate "Texas Instruments ADC0831/ADC0832/ADC0834/ADC0838" 461 449 depends on SPI 450 + select IIO_BUFFER 451 + select IIO_TRIGGERED_BUFFER 462 452 help 463 453 If you say yes here you get support for Texas Instruments ADC0831, 464 454 ADC0832, ADC0834, ADC0838 ADC chips.
+1
drivers/iio/adc/Makefile
··· 9 9 obj-$(CONFIG_AD7298) += ad7298.o 10 10 obj-$(CONFIG_AD7923) += ad7923.o 11 11 obj-$(CONFIG_AD7476) += ad7476.o 12 + obj-$(CONFIG_AD7766) += ad7766.o 12 13 obj-$(CONFIG_AD7791) += ad7791.o 13 14 obj-$(CONFIG_AD7793) += ad7793.o 14 15 obj-$(CONFIG_AD7887) += ad7887.o
+330
drivers/iio/adc/ad7766.c
··· 1 + /* 2 + * AD7766/AD7767 SPI ADC driver 3 + * 4 + * Copyright 2016 Analog Devices Inc. 5 + * 6 + * Licensed under the GPL-2 or later. 7 + */ 8 + 9 + #include <linux/clk.h> 10 + #include <linux/delay.h> 11 + #include <linux/device.h> 12 + #include <linux/err.h> 13 + #include <linux/gpio/consumer.h> 14 + #include <linux/module.h> 15 + #include <linux/regulator/consumer.h> 16 + #include <linux/slab.h> 17 + #include <linux/spi/spi.h> 18 + 19 + #include <linux/iio/iio.h> 20 + #include <linux/iio/buffer.h> 21 + #include <linux/iio/trigger.h> 22 + #include <linux/iio/trigger_consumer.h> 23 + #include <linux/iio/triggered_buffer.h> 24 + 25 + struct ad7766_chip_info { 26 + unsigned int decimation_factor; 27 + }; 28 + 29 + enum { 30 + AD7766_SUPPLY_AVDD = 0, 31 + AD7766_SUPPLY_DVDD = 1, 32 + AD7766_SUPPLY_VREF = 2, 33 + AD7766_NUM_SUPPLIES = 3 34 + }; 35 + 36 + struct ad7766 { 37 + const struct ad7766_chip_info *chip_info; 38 + struct spi_device *spi; 39 + struct clk *mclk; 40 + struct gpio_desc *pd_gpio; 41 + struct regulator_bulk_data reg[AD7766_NUM_SUPPLIES]; 42 + 43 + struct iio_trigger *trig; 44 + 45 + struct spi_transfer xfer; 46 + struct spi_message msg; 47 + 48 + /* 49 + * DMA (thus cache coherency maintenance) requires the 50 + * transfer buffers to live in their own cache lines. 51 + * Make the buffer large enough for one 24 bit sample and one 64 bit 52 + * aligned 64 bit timestamp. 53 + */ 54 + unsigned char data[ALIGN(3, sizeof(s64)) + sizeof(s64)] 55 + ____cacheline_aligned; 56 + }; 57 + 58 + /* 59 + * AD7766 and AD7767 variations are interface compatible, the main difference is 60 + * analog performance. Both parts will use the same ID. 61 + */ 62 + enum ad7766_device_ids { 63 + ID_AD7766, 64 + ID_AD7766_1, 65 + ID_AD7766_2, 66 + }; 67 + 68 + static irqreturn_t ad7766_trigger_handler(int irq, void *p) 69 + { 70 + struct iio_poll_func *pf = p; 71 + struct iio_dev *indio_dev = pf->indio_dev; 72 + struct ad7766 *ad7766 = iio_priv(indio_dev); 73 + int ret; 74 + 75 + ret = spi_sync(ad7766->spi, &ad7766->msg); 76 + if (ret < 0) 77 + goto done; 78 + 79 + iio_push_to_buffers_with_timestamp(indio_dev, ad7766->data, 80 + pf->timestamp); 81 + done: 82 + iio_trigger_notify_done(indio_dev->trig); 83 + 84 + return IRQ_HANDLED; 85 + } 86 + 87 + static int ad7766_preenable(struct iio_dev *indio_dev) 88 + { 89 + struct ad7766 *ad7766 = iio_priv(indio_dev); 90 + int ret; 91 + 92 + ret = regulator_bulk_enable(ARRAY_SIZE(ad7766->reg), ad7766->reg); 93 + if (ret < 0) { 94 + dev_err(&ad7766->spi->dev, "Failed to enable supplies: %d\n", 95 + ret); 96 + return ret; 97 + } 98 + 99 + ret = clk_prepare_enable(ad7766->mclk); 100 + if (ret < 0) { 101 + dev_err(&ad7766->spi->dev, "Failed to enable MCLK: %d\n", ret); 102 + regulator_bulk_disable(ARRAY_SIZE(ad7766->reg), ad7766->reg); 103 + return ret; 104 + } 105 + 106 + if (ad7766->pd_gpio) 107 + gpiod_set_value(ad7766->pd_gpio, 0); 108 + 109 + return 0; 110 + } 111 + 112 + static int ad7766_postdisable(struct iio_dev *indio_dev) 113 + { 114 + struct ad7766 *ad7766 = iio_priv(indio_dev); 115 + 116 + if (ad7766->pd_gpio) 117 + gpiod_set_value(ad7766->pd_gpio, 1); 118 + 119 + /* 120 + * The PD pin is synchronous to the clock, so give it some time to 121 + * notice the change before we disable the clock. 122 + */ 123 + msleep(20); 124 + 125 + clk_disable_unprepare(ad7766->mclk); 126 + regulator_bulk_disable(ARRAY_SIZE(ad7766->reg), ad7766->reg); 127 + 128 + return 0; 129 + } 130 + 131 + static int ad7766_read_raw(struct iio_dev *indio_dev, 132 + const struct iio_chan_spec *chan, int *val, int *val2, long info) 133 + { 134 + struct ad7766 *ad7766 = iio_priv(indio_dev); 135 + struct regulator *vref = ad7766->reg[AD7766_SUPPLY_VREF].consumer; 136 + int scale_uv; 137 + 138 + switch (info) { 139 + case IIO_CHAN_INFO_SCALE: 140 + scale_uv = regulator_get_voltage(vref); 141 + if (scale_uv < 0) 142 + return scale_uv; 143 + *val = scale_uv / 1000; 144 + *val2 = chan->scan_type.realbits; 145 + return IIO_VAL_FRACTIONAL_LOG2; 146 + case IIO_CHAN_INFO_SAMP_FREQ: 147 + *val = clk_get_rate(ad7766->mclk) / 148 + ad7766->chip_info->decimation_factor; 149 + return IIO_VAL_INT; 150 + } 151 + return -EINVAL; 152 + } 153 + 154 + static const struct iio_chan_spec ad7766_channels[] = { 155 + { 156 + .type = IIO_VOLTAGE, 157 + .indexed = 1, 158 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 159 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), 160 + .scan_type = { 161 + .sign = 's', 162 + .realbits = 24, 163 + .storagebits = 32, 164 + .endianness = IIO_BE, 165 + }, 166 + }, 167 + IIO_CHAN_SOFT_TIMESTAMP(1), 168 + }; 169 + 170 + static const struct ad7766_chip_info ad7766_chip_info[] = { 171 + [ID_AD7766] = { 172 + .decimation_factor = 8, 173 + }, 174 + [ID_AD7766_1] = { 175 + .decimation_factor = 16, 176 + }, 177 + [ID_AD7766_2] = { 178 + .decimation_factor = 32, 179 + }, 180 + }; 181 + 182 + static const struct iio_buffer_setup_ops ad7766_buffer_setup_ops = { 183 + .preenable = &ad7766_preenable, 184 + .postenable = &iio_triggered_buffer_postenable, 185 + .predisable = &iio_triggered_buffer_predisable, 186 + .postdisable = &ad7766_postdisable, 187 + }; 188 + 189 + static const struct iio_info ad7766_info = { 190 + .driver_module = THIS_MODULE, 191 + .read_raw = &ad7766_read_raw, 192 + }; 193 + 194 + static irqreturn_t ad7766_irq(int irq, void *private) 195 + { 196 + iio_trigger_poll(private); 197 + return IRQ_HANDLED; 198 + } 199 + 200 + static int ad7766_set_trigger_state(struct iio_trigger *trig, bool enable) 201 + { 202 + struct ad7766 *ad7766 = iio_trigger_get_drvdata(trig); 203 + 204 + if (enable) 205 + enable_irq(ad7766->spi->irq); 206 + else 207 + disable_irq(ad7766->spi->irq); 208 + 209 + return 0; 210 + } 211 + 212 + static const struct iio_trigger_ops ad7766_trigger_ops = { 213 + .owner = THIS_MODULE, 214 + .set_trigger_state = ad7766_set_trigger_state, 215 + .validate_device = iio_trigger_validate_own_device, 216 + }; 217 + 218 + static int ad7766_probe(struct spi_device *spi) 219 + { 220 + const struct spi_device_id *id = spi_get_device_id(spi); 221 + struct iio_dev *indio_dev; 222 + struct ad7766 *ad7766; 223 + int ret; 224 + 225 + indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*ad7766)); 226 + if (!indio_dev) 227 + return -ENOMEM; 228 + 229 + ad7766 = iio_priv(indio_dev); 230 + ad7766->chip_info = &ad7766_chip_info[id->driver_data]; 231 + 232 + ad7766->mclk = devm_clk_get(&spi->dev, "mclk"); 233 + if (IS_ERR(ad7766->mclk)) 234 + return PTR_ERR(ad7766->mclk); 235 + 236 + ad7766->reg[AD7766_SUPPLY_AVDD].supply = "avdd"; 237 + ad7766->reg[AD7766_SUPPLY_DVDD].supply = "dvdd"; 238 + ad7766->reg[AD7766_SUPPLY_VREF].supply = "vref"; 239 + 240 + ret = devm_regulator_bulk_get(&spi->dev, ARRAY_SIZE(ad7766->reg), 241 + ad7766->reg); 242 + if (IS_ERR(ad7766->reg)) 243 + return PTR_ERR(ad7766->reg); 244 + 245 + ad7766->pd_gpio = devm_gpiod_get_optional(&spi->dev, "powerdown", 246 + GPIOD_OUT_HIGH); 247 + if (IS_ERR(ad7766->pd_gpio)) 248 + return PTR_ERR(ad7766->pd_gpio); 249 + 250 + indio_dev->dev.parent = &spi->dev; 251 + indio_dev->name = spi_get_device_id(spi)->name; 252 + indio_dev->modes = INDIO_DIRECT_MODE; 253 + indio_dev->channels = ad7766_channels; 254 + indio_dev->num_channels = ARRAY_SIZE(ad7766_channels); 255 + indio_dev->info = &ad7766_info; 256 + 257 + if (spi->irq > 0) { 258 + ad7766->trig = devm_iio_trigger_alloc(&spi->dev, "%s-dev%d", 259 + indio_dev->name, indio_dev->id); 260 + if (!ad7766->trig) 261 + return -ENOMEM; 262 + 263 + ad7766->trig->ops = &ad7766_trigger_ops; 264 + ad7766->trig->dev.parent = &spi->dev; 265 + iio_trigger_set_drvdata(ad7766->trig, ad7766); 266 + 267 + ret = devm_request_irq(&spi->dev, spi->irq, ad7766_irq, 268 + IRQF_TRIGGER_FALLING, dev_name(&spi->dev), 269 + ad7766->trig); 270 + if (ret < 0) 271 + return ret; 272 + 273 + /* 274 + * The device generates interrupts as long as it is powered up. 275 + * Some platforms might not allow the option to power it down so 276 + * disable the interrupt to avoid extra load on the system 277 + */ 278 + disable_irq(spi->irq); 279 + 280 + ret = devm_iio_trigger_register(&spi->dev, ad7766->trig); 281 + if (ret) 282 + return ret; 283 + } 284 + 285 + spi_set_drvdata(spi, indio_dev); 286 + 287 + ad7766->spi = spi; 288 + 289 + /* First byte always 0 */ 290 + ad7766->xfer.rx_buf = &ad7766->data[1]; 291 + ad7766->xfer.len = 3; 292 + 293 + spi_message_init(&ad7766->msg); 294 + spi_message_add_tail(&ad7766->xfer, &ad7766->msg); 295 + 296 + ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, 297 + &iio_pollfunc_store_time, &ad7766_trigger_handler, 298 + &ad7766_buffer_setup_ops); 299 + if (ret) 300 + return ret; 301 + 302 + ret = devm_iio_device_register(&spi->dev, indio_dev); 303 + if (ret) 304 + return ret; 305 + return 0; 306 + } 307 + 308 + static const struct spi_device_id ad7766_id[] = { 309 + {"ad7766", ID_AD7766}, 310 + {"ad7766-1", ID_AD7766_1}, 311 + {"ad7766-2", ID_AD7766_2}, 312 + {"ad7767", ID_AD7766}, 313 + {"ad7767-1", ID_AD7766_1}, 314 + {"ad7767-2", ID_AD7766_2}, 315 + {} 316 + }; 317 + MODULE_DEVICE_TABLE(spi, ad7766_id); 318 + 319 + static struct spi_driver ad7766_driver = { 320 + .driver = { 321 + .name = "ad7766", 322 + }, 323 + .probe = ad7766_probe, 324 + .id_table = ad7766_id, 325 + }; 326 + module_spi_driver(ad7766_driver); 327 + 328 + MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); 329 + MODULE_DESCRIPTION("Analog Devices AD7766 and AD7767 ADCs driver support"); 330 + MODULE_LICENSE("GPL v2");
+4 -13
drivers/iio/adc/max1027.c
··· 238 238 239 239 /* Configure conversion register with the requested chan */ 240 240 st->reg = MAX1027_CONV_REG | MAX1027_CHAN(chan->channel) | 241 - MAX1027_NOSCAN | !!(chan->type == IIO_TEMP); 241 + MAX1027_NOSCAN; 242 + if (chan->type == IIO_TEMP) 243 + st->reg |= MAX1027_TEMP; 242 244 ret = spi_write(st->spi, &st->reg, 1); 243 245 if (ret < 0) { 244 246 dev_err(&indio_dev->dev, ··· 362 360 return 0; 363 361 } 364 362 365 - static int max1027_validate_device(struct iio_trigger *trig, 366 - struct iio_dev *indio_dev) 367 - { 368 - struct iio_dev *indio = iio_trigger_get_drvdata(trig); 369 - 370 - if (indio != indio_dev) 371 - return -EINVAL; 372 - 373 - return 0; 374 - } 375 - 376 363 static irqreturn_t max1027_trigger_handler(int irq, void *private) 377 364 { 378 365 struct iio_poll_func *pf = (struct iio_poll_func *)private; ··· 382 391 383 392 static const struct iio_trigger_ops max1027_trigger_ops = { 384 393 .owner = THIS_MODULE, 385 - .validate_device = &max1027_validate_device, 394 + .validate_device = &iio_trigger_validate_own_device, 386 395 .set_trigger_state = &max1027_set_trigger_state, 387 396 }; 388 397
+87 -19
drivers/iio/adc/ti-adc0832.c
··· 14 14 #include <linux/spi/spi.h> 15 15 #include <linux/iio/iio.h> 16 16 #include <linux/regulator/consumer.h> 17 + #include <linux/iio/buffer.h> 18 + #include <linux/iio/trigger.h> 19 + #include <linux/iio/triggered_buffer.h> 20 + #include <linux/iio/trigger_consumer.h> 17 21 18 22 enum { 19 23 adc0831, ··· 42 38 .indexed = 1, \ 43 39 .channel = chan, \ 44 40 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 45 - .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \ 41 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 42 + .scan_index = chan, \ 43 + .scan_type = { \ 44 + .sign = 'u', \ 45 + .realbits = 8, \ 46 + .storagebits = 8, \ 47 + }, \ 46 48 } 47 49 48 - #define ADC0832_VOLTAGE_CHANNEL_DIFF(chan1, chan2) \ 50 + #define ADC0832_VOLTAGE_CHANNEL_DIFF(chan1, chan2, si) \ 49 51 { \ 50 52 .type = IIO_VOLTAGE, \ 51 53 .indexed = 1, \ ··· 59 49 .channel2 = (chan2), \ 60 50 .differential = 1, \ 61 51 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 62 - .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \ 52 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 53 + .scan_index = si, \ 54 + .scan_type = { \ 55 + .sign = 'u', \ 56 + .realbits = 8, \ 57 + .storagebits = 8, \ 58 + }, \ 63 59 } 64 60 65 61 static const struct iio_chan_spec adc0831_channels[] = { 66 - ADC0832_VOLTAGE_CHANNEL_DIFF(0, 1), 62 + ADC0832_VOLTAGE_CHANNEL_DIFF(0, 1, 0), 63 + IIO_CHAN_SOFT_TIMESTAMP(1), 67 64 }; 68 65 69 66 static const struct iio_chan_spec adc0832_channels[] = { 70 67 ADC0832_VOLTAGE_CHANNEL(0), 71 68 ADC0832_VOLTAGE_CHANNEL(1), 72 - ADC0832_VOLTAGE_CHANNEL_DIFF(0, 1), 73 - ADC0832_VOLTAGE_CHANNEL_DIFF(1, 0), 69 + ADC0832_VOLTAGE_CHANNEL_DIFF(0, 1, 2), 70 + ADC0832_VOLTAGE_CHANNEL_DIFF(1, 0, 3), 71 + IIO_CHAN_SOFT_TIMESTAMP(4), 74 72 }; 75 73 76 74 static const struct iio_chan_spec adc0834_channels[] = { ··· 86 68 ADC0832_VOLTAGE_CHANNEL(1), 87 69 ADC0832_VOLTAGE_CHANNEL(2), 88 70 ADC0832_VOLTAGE_CHANNEL(3), 89 - ADC0832_VOLTAGE_CHANNEL_DIFF(0, 1), 90 - ADC0832_VOLTAGE_CHANNEL_DIFF(1, 0), 91 - ADC0832_VOLTAGE_CHANNEL_DIFF(2, 3), 92 - ADC0832_VOLTAGE_CHANNEL_DIFF(3, 2), 71 + ADC0832_VOLTAGE_CHANNEL_DIFF(0, 1, 4), 72 + ADC0832_VOLTAGE_CHANNEL_DIFF(1, 0, 5), 73 + ADC0832_VOLTAGE_CHANNEL_DIFF(2, 3, 6), 74 + ADC0832_VOLTAGE_CHANNEL_DIFF(3, 2, 7), 75 + IIO_CHAN_SOFT_TIMESTAMP(8), 93 76 }; 94 77 95 78 static const struct iio_chan_spec adc0838_channels[] = { ··· 102 83 ADC0832_VOLTAGE_CHANNEL(5), 103 84 ADC0832_VOLTAGE_CHANNEL(6), 104 85 ADC0832_VOLTAGE_CHANNEL(7), 105 - ADC0832_VOLTAGE_CHANNEL_DIFF(0, 1), 106 - ADC0832_VOLTAGE_CHANNEL_DIFF(1, 0), 107 - ADC0832_VOLTAGE_CHANNEL_DIFF(2, 3), 108 - ADC0832_VOLTAGE_CHANNEL_DIFF(3, 2), 109 - ADC0832_VOLTAGE_CHANNEL_DIFF(4, 5), 110 - ADC0832_VOLTAGE_CHANNEL_DIFF(5, 4), 111 - ADC0832_VOLTAGE_CHANNEL_DIFF(6, 7), 112 - ADC0832_VOLTAGE_CHANNEL_DIFF(7, 6), 86 + ADC0832_VOLTAGE_CHANNEL_DIFF(0, 1, 8), 87 + ADC0832_VOLTAGE_CHANNEL_DIFF(1, 0, 9), 88 + ADC0832_VOLTAGE_CHANNEL_DIFF(2, 3, 10), 89 + ADC0832_VOLTAGE_CHANNEL_DIFF(3, 2, 11), 90 + ADC0832_VOLTAGE_CHANNEL_DIFF(4, 5, 12), 91 + ADC0832_VOLTAGE_CHANNEL_DIFF(5, 4, 13), 92 + ADC0832_VOLTAGE_CHANNEL_DIFF(6, 7, 14), 93 + ADC0832_VOLTAGE_CHANNEL_DIFF(7, 6, 15), 94 + IIO_CHAN_SOFT_TIMESTAMP(16), 113 95 }; 114 96 115 97 static int adc0831_adc_conversion(struct adc0832 *adc) ··· 198 178 .driver_module = THIS_MODULE, 199 179 }; 200 180 181 + static irqreturn_t adc0832_trigger_handler(int irq, void *p) 182 + { 183 + struct iio_poll_func *pf = p; 184 + struct iio_dev *indio_dev = pf->indio_dev; 185 + struct adc0832 *adc = iio_priv(indio_dev); 186 + u8 data[24] = { }; /* 16x 1 byte ADC data + 8 bytes timestamp */ 187 + int scan_index; 188 + int i = 0; 189 + 190 + mutex_lock(&adc->lock); 191 + 192 + for_each_set_bit(scan_index, indio_dev->active_scan_mask, 193 + indio_dev->masklength) { 194 + const struct iio_chan_spec *scan_chan = 195 + &indio_dev->channels[scan_index]; 196 + int ret = adc0832_adc_conversion(adc, scan_chan->channel, 197 + scan_chan->differential); 198 + if (ret < 0) { 199 + dev_warn(&adc->spi->dev, 200 + "failed to get conversion data\n"); 201 + goto out; 202 + } 203 + 204 + data[i] = ret; 205 + i++; 206 + } 207 + iio_push_to_buffers_with_timestamp(indio_dev, data, 208 + iio_get_time_ns(indio_dev)); 209 + out: 210 + mutex_unlock(&adc->lock); 211 + 212 + iio_trigger_notify_done(indio_dev->trig); 213 + 214 + return IRQ_HANDLED; 215 + } 216 + 201 217 static int adc0832_probe(struct spi_device *spi) 202 218 { 203 219 struct iio_dev *indio_dev; ··· 289 233 290 234 spi_set_drvdata(spi, indio_dev); 291 235 236 + ret = iio_triggered_buffer_setup(indio_dev, NULL, 237 + adc0832_trigger_handler, NULL); 238 + if (ret) 239 + goto err_reg_disable; 240 + 292 241 ret = iio_device_register(indio_dev); 293 242 if (ret) 294 - regulator_disable(adc->reg); 243 + goto err_buffer_cleanup; 244 + 245 + return 0; 246 + err_buffer_cleanup: 247 + iio_triggered_buffer_cleanup(indio_dev); 248 + err_reg_disable: 249 + regulator_disable(adc->reg); 295 250 296 251 return ret; 297 252 } ··· 313 246 struct adc0832 *adc = iio_priv(indio_dev); 314 247 315 248 iio_device_unregister(indio_dev); 249 + iio_triggered_buffer_cleanup(indio_dev); 316 250 regulator_disable(adc->reg); 317 251 318 252 return 0;
+44 -11
drivers/iio/adc/ti-adc161s626.c
··· 27 27 #include <linux/iio/buffer.h> 28 28 #include <linux/iio/trigger_consumer.h> 29 29 #include <linux/iio/triggered_buffer.h> 30 + #include <linux/regulator/consumer.h> 30 31 31 32 #define TI_ADC_DRV_NAME "ti-adc161s626" 32 33 ··· 40 39 { 41 40 .type = IIO_VOLTAGE, 42 41 .channel = 0, 43 - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 42 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 43 + BIT(IIO_CHAN_INFO_SCALE) | 44 + BIT(IIO_CHAN_INFO_OFFSET), 44 45 .scan_index = 0, 45 46 .scan_type = { 46 47 .sign = 's', ··· 57 54 { 58 55 .type = IIO_VOLTAGE, 59 56 .channel = 0, 60 - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 57 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 58 + BIT(IIO_CHAN_INFO_SCALE) | 59 + BIT(IIO_CHAN_INFO_OFFSET), 61 60 .scan_index = 0, 62 61 .scan_type = { 63 62 .sign = 's', ··· 73 68 struct ti_adc_data { 74 69 struct iio_dev *indio_dev; 75 70 struct spi_device *spi; 71 + struct regulator *ref; 72 + 76 73 u8 read_size; 77 74 u8 shift; 78 75 ··· 142 135 struct ti_adc_data *data = iio_priv(indio_dev); 143 136 int ret; 144 137 145 - if (mask != IIO_CHAN_INFO_RAW) 146 - return -EINVAL; 138 + switch (mask) { 139 + case IIO_CHAN_INFO_RAW: 140 + ret = iio_device_claim_direct_mode(indio_dev); 141 + if (ret) 142 + return ret; 147 143 148 - ret = iio_device_claim_direct_mode(indio_dev); 149 - if (ret) 150 - return ret; 144 + ret = ti_adc_read_measurement(data, chan, val); 145 + iio_device_release_direct_mode(indio_dev); 151 146 152 - ret = ti_adc_read_measurement(data, chan, val); 153 - iio_device_release_direct_mode(indio_dev); 147 + if (ret) 148 + return ret; 154 149 155 - if (!ret) 156 150 return IIO_VAL_INT; 151 + case IIO_CHAN_INFO_SCALE: 152 + ret = regulator_get_voltage(data->ref); 153 + if (ret < 0) 154 + return ret; 155 + 156 + *val = ret / 1000; 157 + *val2 = chan->scan_type.realbits; 158 + 159 + return IIO_VAL_FRACTIONAL_LOG2; 160 + case IIO_CHAN_INFO_OFFSET: 161 + *val = 1 << (chan->scan_type.realbits - 1); 162 + return IIO_VAL_INT; 163 + } 157 164 158 165 return 0; 159 166 } ··· 212 191 break; 213 192 } 214 193 194 + data->ref = devm_regulator_get(&spi->dev, "vdda"); 195 + if (!IS_ERR(data->ref)) { 196 + ret = regulator_enable(data->ref); 197 + if (ret < 0) 198 + return ret; 199 + } 200 + 215 201 ret = iio_triggered_buffer_setup(indio_dev, NULL, 216 202 ti_adc_trigger_handler, NULL); 217 203 if (ret) 218 - return ret; 204 + goto error_regulator_disable; 219 205 220 206 ret = iio_device_register(indio_dev); 221 207 if (ret) ··· 233 205 error_unreg_buffer: 234 206 iio_triggered_buffer_cleanup(indio_dev); 235 207 208 + error_regulator_disable: 209 + regulator_disable(data->ref); 210 + 236 211 return ret; 237 212 } 238 213 239 214 static int ti_adc_remove(struct spi_device *spi) 240 215 { 241 216 struct iio_dev *indio_dev = spi_get_drvdata(spi); 217 + struct ti_adc_data *data = iio_priv(indio_dev); 242 218 243 219 iio_device_unregister(indio_dev); 244 220 iio_triggered_buffer_cleanup(indio_dev); 221 + regulator_disable(data->ref); 245 222 246 223 return 0; 247 224 }
+593
drivers/iio/counter/104-quad-8.c
··· 1 + /* 2 + * IIO driver for the ACCES 104-QUAD-8 3 + * Copyright (C) 2016 William Breathitt Gray 4 + * 5 + * This program is free software; you can redistribute it and/or modify 6 + * it under the terms of the GNU General Public License, version 2, as 7 + * published by the Free Software Foundation. 8 + * 9 + * This program is distributed in the hope that it will be useful, but 10 + * WITHOUT ANY WARRANTY; without even the implied warranty of 11 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 12 + * General Public License for more details. 13 + * 14 + * This driver supports the ACCES 104-QUAD-8 and ACCES 104-QUAD-4. 15 + */ 16 + #include <linux/bitops.h> 17 + #include <linux/device.h> 18 + #include <linux/errno.h> 19 + #include <linux/iio/iio.h> 20 + #include <linux/iio/types.h> 21 + #include <linux/io.h> 22 + #include <linux/ioport.h> 23 + #include <linux/isa.h> 24 + #include <linux/kernel.h> 25 + #include <linux/module.h> 26 + #include <linux/moduleparam.h> 27 + #include <linux/types.h> 28 + 29 + #define QUAD8_EXTENT 32 30 + 31 + static unsigned int base[max_num_isa_dev(QUAD8_EXTENT)]; 32 + static unsigned int num_quad8; 33 + module_param_array(base, uint, &num_quad8, 0); 34 + MODULE_PARM_DESC(base, "ACCES 104-QUAD-8 base addresses"); 35 + 36 + #define QUAD8_NUM_COUNTERS 8 37 + 38 + /** 39 + * struct quad8_iio - IIO device private data structure 40 + * @preset: array of preset values 41 + * @count_mode: array of count mode configurations 42 + * @quadrature_mode: array of quadrature mode configurations 43 + * @quadrature_scale: array of quadrature mode scale configurations 44 + * @ab_enable: array of A and B inputs enable configurations 45 + * @preset_enable: array of set_to_preset_on_index attribute configurations 46 + * @synchronous_mode: array of index function synchronous mode configurations 47 + * @index_polarity: array of index function polarity configurations 48 + * @base: base port address of the IIO device 49 + */ 50 + struct quad8_iio { 51 + unsigned int preset[QUAD8_NUM_COUNTERS]; 52 + unsigned int count_mode[QUAD8_NUM_COUNTERS]; 53 + unsigned int quadrature_mode[QUAD8_NUM_COUNTERS]; 54 + unsigned int quadrature_scale[QUAD8_NUM_COUNTERS]; 55 + unsigned int ab_enable[QUAD8_NUM_COUNTERS]; 56 + unsigned int preset_enable[QUAD8_NUM_COUNTERS]; 57 + unsigned int synchronous_mode[QUAD8_NUM_COUNTERS]; 58 + unsigned int index_polarity[QUAD8_NUM_COUNTERS]; 59 + unsigned int base; 60 + }; 61 + 62 + static int quad8_read_raw(struct iio_dev *indio_dev, 63 + struct iio_chan_spec const *chan, int *val, int *val2, long mask) 64 + { 65 + struct quad8_iio *const priv = iio_priv(indio_dev); 66 + const int base_offset = priv->base + 2 * chan->channel; 67 + unsigned int flags; 68 + unsigned int borrow; 69 + unsigned int carry; 70 + int i; 71 + 72 + switch (mask) { 73 + case IIO_CHAN_INFO_RAW: 74 + if (chan->type == IIO_INDEX) { 75 + *val = !!(inb(priv->base + 0x16) & BIT(chan->channel)); 76 + return IIO_VAL_INT; 77 + } 78 + 79 + flags = inb(base_offset); 80 + borrow = flags & BIT(0); 81 + carry = !!(flags & BIT(1)); 82 + 83 + /* Borrow XOR Carry effectively doubles count range */ 84 + *val = (borrow ^ carry) << 24; 85 + 86 + /* Reset Byte Pointer; transfer Counter to Output Latch */ 87 + outb(0x11, base_offset + 1); 88 + 89 + for (i = 0; i < 3; i++) 90 + *val |= (unsigned int)inb(base_offset) << (8 * i); 91 + 92 + return IIO_VAL_INT; 93 + case IIO_CHAN_INFO_ENABLE: 94 + *val = priv->ab_enable[chan->channel]; 95 + return IIO_VAL_INT; 96 + case IIO_CHAN_INFO_SCALE: 97 + *val = 1; 98 + *val2 = priv->quadrature_scale[chan->channel]; 99 + return IIO_VAL_FRACTIONAL_LOG2; 100 + } 101 + 102 + return -EINVAL; 103 + } 104 + 105 + static int quad8_write_raw(struct iio_dev *indio_dev, 106 + struct iio_chan_spec const *chan, int val, int val2, long mask) 107 + { 108 + struct quad8_iio *const priv = iio_priv(indio_dev); 109 + const int base_offset = priv->base + 2 * chan->channel; 110 + int i; 111 + unsigned int ior_cfg; 112 + 113 + switch (mask) { 114 + case IIO_CHAN_INFO_RAW: 115 + if (chan->type == IIO_INDEX) 116 + return -EINVAL; 117 + 118 + /* Only 24-bit values are supported */ 119 + if ((unsigned int)val > 0xFFFFFF) 120 + return -EINVAL; 121 + 122 + /* Reset Byte Pointer */ 123 + outb(0x01, base_offset + 1); 124 + 125 + /* Counter can only be set via Preset Register */ 126 + for (i = 0; i < 3; i++) 127 + outb(val >> (8 * i), base_offset); 128 + 129 + /* Transfer Preset Register to Counter */ 130 + outb(0x08, base_offset + 1); 131 + 132 + /* Reset Byte Pointer */ 133 + outb(0x01, base_offset + 1); 134 + 135 + /* Set Preset Register back to original value */ 136 + val = priv->preset[chan->channel]; 137 + for (i = 0; i < 3; i++) 138 + outb(val >> (8 * i), base_offset); 139 + 140 + /* Reset Borrow, Carry, Compare, and Sign flags */ 141 + outb(0x02, base_offset + 1); 142 + /* Reset Error flag */ 143 + outb(0x06, base_offset + 1); 144 + 145 + return 0; 146 + case IIO_CHAN_INFO_ENABLE: 147 + /* only boolean values accepted */ 148 + if (val < 0 || val > 1) 149 + return -EINVAL; 150 + 151 + priv->ab_enable[chan->channel] = val; 152 + 153 + ior_cfg = val | priv->preset_enable[chan->channel] << 1; 154 + 155 + /* Load I/O control configuration */ 156 + outb(0x40 | ior_cfg, base_offset); 157 + 158 + return 0; 159 + case IIO_CHAN_INFO_SCALE: 160 + /* Quadrature scaling only available in quadrature mode */ 161 + if (!priv->quadrature_mode[chan->channel] && (val2 || val != 1)) 162 + return -EINVAL; 163 + 164 + /* Only three gain states (1, 0.5, 0.25) */ 165 + if (val == 1 && !val2) 166 + priv->quadrature_scale[chan->channel] = 0; 167 + else if (!val) 168 + switch (val2) { 169 + case 500000: 170 + priv->quadrature_scale[chan->channel] = 1; 171 + break; 172 + case 250000: 173 + priv->quadrature_scale[chan->channel] = 2; 174 + break; 175 + default: 176 + return -EINVAL; 177 + } 178 + else 179 + return -EINVAL; 180 + 181 + return 0; 182 + } 183 + 184 + return -EINVAL; 185 + } 186 + 187 + static const struct iio_info quad8_info = { 188 + .driver_module = THIS_MODULE, 189 + .read_raw = quad8_read_raw, 190 + .write_raw = quad8_write_raw 191 + }; 192 + 193 + static ssize_t quad8_read_preset(struct iio_dev *indio_dev, uintptr_t private, 194 + const struct iio_chan_spec *chan, char *buf) 195 + { 196 + const struct quad8_iio *const priv = iio_priv(indio_dev); 197 + 198 + return snprintf(buf, PAGE_SIZE, "%u\n", priv->preset[chan->channel]); 199 + } 200 + 201 + static ssize_t quad8_write_preset(struct iio_dev *indio_dev, uintptr_t private, 202 + const struct iio_chan_spec *chan, const char *buf, size_t len) 203 + { 204 + struct quad8_iio *const priv = iio_priv(indio_dev); 205 + const int base_offset = priv->base + 2 * chan->channel; 206 + unsigned int preset; 207 + int ret; 208 + int i; 209 + 210 + ret = kstrtouint(buf, 0, &preset); 211 + if (ret) 212 + return ret; 213 + 214 + /* Only 24-bit values are supported */ 215 + if (preset > 0xFFFFFF) 216 + return -EINVAL; 217 + 218 + priv->preset[chan->channel] = preset; 219 + 220 + /* Reset Byte Pointer */ 221 + outb(0x01, base_offset + 1); 222 + 223 + /* Set Preset Register */ 224 + for (i = 0; i < 3; i++) 225 + outb(preset >> (8 * i), base_offset); 226 + 227 + return len; 228 + } 229 + 230 + static ssize_t quad8_read_set_to_preset_on_index(struct iio_dev *indio_dev, 231 + uintptr_t private, const struct iio_chan_spec *chan, char *buf) 232 + { 233 + const struct quad8_iio *const priv = iio_priv(indio_dev); 234 + 235 + return snprintf(buf, PAGE_SIZE, "%u\n", 236 + priv->preset_enable[chan->channel]); 237 + } 238 + 239 + static ssize_t quad8_write_set_to_preset_on_index(struct iio_dev *indio_dev, 240 + uintptr_t private, const struct iio_chan_spec *chan, const char *buf, 241 + size_t len) 242 + { 243 + struct quad8_iio *const priv = iio_priv(indio_dev); 244 + const int base_offset = priv->base + 2 * chan->channel; 245 + bool preset_enable; 246 + int ret; 247 + unsigned int ior_cfg; 248 + 249 + ret = kstrtobool(buf, &preset_enable); 250 + if (ret) 251 + return ret; 252 + 253 + priv->preset_enable[chan->channel] = preset_enable; 254 + 255 + ior_cfg = priv->ab_enable[chan->channel] | 256 + (unsigned int)preset_enable << 1; 257 + 258 + /* Load I/O control configuration to Input / Output Control Register */ 259 + outb(0x40 | ior_cfg, base_offset); 260 + 261 + return len; 262 + } 263 + 264 + static const char *const quad8_noise_error_states[] = { 265 + "No excessive noise is present at the count inputs", 266 + "Excessive noise is present at the count inputs" 267 + }; 268 + 269 + static int quad8_get_noise_error(struct iio_dev *indio_dev, 270 + const struct iio_chan_spec *chan) 271 + { 272 + struct quad8_iio *const priv = iio_priv(indio_dev); 273 + const int base_offset = priv->base + 2 * chan->channel + 1; 274 + 275 + return !!(inb(base_offset) & BIT(4)); 276 + } 277 + 278 + static const struct iio_enum quad8_noise_error_enum = { 279 + .items = quad8_noise_error_states, 280 + .num_items = ARRAY_SIZE(quad8_noise_error_states), 281 + .get = quad8_get_noise_error 282 + }; 283 + 284 + static const char *const quad8_count_direction_states[] = { 285 + "down", 286 + "up" 287 + }; 288 + 289 + static int quad8_get_count_direction(struct iio_dev *indio_dev, 290 + const struct iio_chan_spec *chan) 291 + { 292 + struct quad8_iio *const priv = iio_priv(indio_dev); 293 + const int base_offset = priv->base + 2 * chan->channel + 1; 294 + 295 + return !!(inb(base_offset) & BIT(5)); 296 + } 297 + 298 + static const struct iio_enum quad8_count_direction_enum = { 299 + .items = quad8_count_direction_states, 300 + .num_items = ARRAY_SIZE(quad8_count_direction_states), 301 + .get = quad8_get_count_direction 302 + }; 303 + 304 + static const char *const quad8_count_modes[] = { 305 + "normal", 306 + "range limit", 307 + "non-recycle", 308 + "modulo-n" 309 + }; 310 + 311 + static int quad8_set_count_mode(struct iio_dev *indio_dev, 312 + const struct iio_chan_spec *chan, unsigned int count_mode) 313 + { 314 + struct quad8_iio *const priv = iio_priv(indio_dev); 315 + unsigned int mode_cfg = count_mode << 1; 316 + const int base_offset = priv->base + 2 * chan->channel + 1; 317 + 318 + priv->count_mode[chan->channel] = count_mode; 319 + 320 + /* Add quadrature mode configuration */ 321 + if (priv->quadrature_mode[chan->channel]) 322 + mode_cfg |= (priv->quadrature_scale[chan->channel] + 1) << 3; 323 + 324 + /* Load mode configuration to Counter Mode Register */ 325 + outb(0x20 | mode_cfg, base_offset); 326 + 327 + return 0; 328 + } 329 + 330 + static int quad8_get_count_mode(struct iio_dev *indio_dev, 331 + const struct iio_chan_spec *chan) 332 + { 333 + const struct quad8_iio *const priv = iio_priv(indio_dev); 334 + 335 + return priv->count_mode[chan->channel]; 336 + } 337 + 338 + static const struct iio_enum quad8_count_mode_enum = { 339 + .items = quad8_count_modes, 340 + .num_items = ARRAY_SIZE(quad8_count_modes), 341 + .set = quad8_set_count_mode, 342 + .get = quad8_get_count_mode 343 + }; 344 + 345 + static const char *const quad8_synchronous_modes[] = { 346 + "non-synchronous", 347 + "synchronous" 348 + }; 349 + 350 + static int quad8_set_synchronous_mode(struct iio_dev *indio_dev, 351 + const struct iio_chan_spec *chan, unsigned int synchronous_mode) 352 + { 353 + struct quad8_iio *const priv = iio_priv(indio_dev); 354 + const unsigned int idr_cfg = synchronous_mode | 355 + priv->index_polarity[chan->channel] << 1; 356 + const int base_offset = priv->base + 2 * chan->channel + 1; 357 + 358 + /* Index function must be non-synchronous in non-quadrature mode */ 359 + if (synchronous_mode && !priv->quadrature_mode[chan->channel]) 360 + return -EINVAL; 361 + 362 + priv->synchronous_mode[chan->channel] = synchronous_mode; 363 + 364 + /* Load Index Control configuration to Index Control Register */ 365 + outb(0x40 | idr_cfg, base_offset); 366 + 367 + return 0; 368 + } 369 + 370 + static int quad8_get_synchronous_mode(struct iio_dev *indio_dev, 371 + const struct iio_chan_spec *chan) 372 + { 373 + const struct quad8_iio *const priv = iio_priv(indio_dev); 374 + 375 + return priv->synchronous_mode[chan->channel]; 376 + } 377 + 378 + static const struct iio_enum quad8_synchronous_mode_enum = { 379 + .items = quad8_synchronous_modes, 380 + .num_items = ARRAY_SIZE(quad8_synchronous_modes), 381 + .set = quad8_set_synchronous_mode, 382 + .get = quad8_get_synchronous_mode 383 + }; 384 + 385 + static const char *const quad8_quadrature_modes[] = { 386 + "non-quadrature", 387 + "quadrature" 388 + }; 389 + 390 + static int quad8_set_quadrature_mode(struct iio_dev *indio_dev, 391 + const struct iio_chan_spec *chan, unsigned int quadrature_mode) 392 + { 393 + struct quad8_iio *const priv = iio_priv(indio_dev); 394 + unsigned int mode_cfg = priv->count_mode[chan->channel] << 1; 395 + const int base_offset = priv->base + 2 * chan->channel + 1; 396 + 397 + if (quadrature_mode) 398 + mode_cfg |= (priv->quadrature_scale[chan->channel] + 1) << 3; 399 + else { 400 + /* Quadrature scaling only available in quadrature mode */ 401 + priv->quadrature_scale[chan->channel] = 0; 402 + 403 + /* Synchronous function not supported in non-quadrature mode */ 404 + if (priv->synchronous_mode[chan->channel]) 405 + quad8_set_synchronous_mode(indio_dev, chan, 0); 406 + } 407 + 408 + priv->quadrature_mode[chan->channel] = quadrature_mode; 409 + 410 + /* Load mode configuration to Counter Mode Register */ 411 + outb(0x20 | mode_cfg, base_offset); 412 + 413 + return 0; 414 + } 415 + 416 + static int quad8_get_quadrature_mode(struct iio_dev *indio_dev, 417 + const struct iio_chan_spec *chan) 418 + { 419 + const struct quad8_iio *const priv = iio_priv(indio_dev); 420 + 421 + return priv->quadrature_mode[chan->channel]; 422 + } 423 + 424 + static const struct iio_enum quad8_quadrature_mode_enum = { 425 + .items = quad8_quadrature_modes, 426 + .num_items = ARRAY_SIZE(quad8_quadrature_modes), 427 + .set = quad8_set_quadrature_mode, 428 + .get = quad8_get_quadrature_mode 429 + }; 430 + 431 + static const char *const quad8_index_polarity_modes[] = { 432 + "negative", 433 + "positive" 434 + }; 435 + 436 + static int quad8_set_index_polarity(struct iio_dev *indio_dev, 437 + const struct iio_chan_spec *chan, unsigned int index_polarity) 438 + { 439 + struct quad8_iio *const priv = iio_priv(indio_dev); 440 + const unsigned int idr_cfg = priv->synchronous_mode[chan->channel] | 441 + index_polarity << 1; 442 + const int base_offset = priv->base + 2 * chan->channel + 1; 443 + 444 + priv->index_polarity[chan->channel] = index_polarity; 445 + 446 + /* Load Index Control configuration to Index Control Register */ 447 + outb(0x40 | idr_cfg, base_offset); 448 + 449 + return 0; 450 + } 451 + 452 + static int quad8_get_index_polarity(struct iio_dev *indio_dev, 453 + const struct iio_chan_spec *chan) 454 + { 455 + const struct quad8_iio *const priv = iio_priv(indio_dev); 456 + 457 + return priv->index_polarity[chan->channel]; 458 + } 459 + 460 + static const struct iio_enum quad8_index_polarity_enum = { 461 + .items = quad8_index_polarity_modes, 462 + .num_items = ARRAY_SIZE(quad8_index_polarity_modes), 463 + .set = quad8_set_index_polarity, 464 + .get = quad8_get_index_polarity 465 + }; 466 + 467 + static const struct iio_chan_spec_ext_info quad8_count_ext_info[] = { 468 + { 469 + .name = "preset", 470 + .shared = IIO_SEPARATE, 471 + .read = quad8_read_preset, 472 + .write = quad8_write_preset 473 + }, 474 + { 475 + .name = "set_to_preset_on_index", 476 + .shared = IIO_SEPARATE, 477 + .read = quad8_read_set_to_preset_on_index, 478 + .write = quad8_write_set_to_preset_on_index 479 + }, 480 + IIO_ENUM("noise_error", IIO_SEPARATE, &quad8_noise_error_enum), 481 + IIO_ENUM_AVAILABLE("noise_error", &quad8_noise_error_enum), 482 + IIO_ENUM("count_direction", IIO_SEPARATE, &quad8_count_direction_enum), 483 + IIO_ENUM_AVAILABLE("count_direction", &quad8_count_direction_enum), 484 + IIO_ENUM("count_mode", IIO_SEPARATE, &quad8_count_mode_enum), 485 + IIO_ENUM_AVAILABLE("count_mode", &quad8_count_mode_enum), 486 + IIO_ENUM("quadrature_mode", IIO_SEPARATE, &quad8_quadrature_mode_enum), 487 + IIO_ENUM_AVAILABLE("quadrature_mode", &quad8_quadrature_mode_enum), 488 + {} 489 + }; 490 + 491 + static const struct iio_chan_spec_ext_info quad8_index_ext_info[] = { 492 + IIO_ENUM("synchronous_mode", IIO_SEPARATE, 493 + &quad8_synchronous_mode_enum), 494 + IIO_ENUM_AVAILABLE("synchronous_mode", &quad8_synchronous_mode_enum), 495 + IIO_ENUM("index_polarity", IIO_SEPARATE, &quad8_index_polarity_enum), 496 + IIO_ENUM_AVAILABLE("index_polarity", &quad8_index_polarity_enum), 497 + {} 498 + }; 499 + 500 + #define QUAD8_COUNT_CHAN(_chan) { \ 501 + .type = IIO_COUNT, \ 502 + .channel = (_chan), \ 503 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 504 + BIT(IIO_CHAN_INFO_ENABLE) | BIT(IIO_CHAN_INFO_SCALE), \ 505 + .ext_info = quad8_count_ext_info, \ 506 + .indexed = 1 \ 507 + } 508 + 509 + #define QUAD8_INDEX_CHAN(_chan) { \ 510 + .type = IIO_INDEX, \ 511 + .channel = (_chan), \ 512 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 513 + .ext_info = quad8_index_ext_info, \ 514 + .indexed = 1 \ 515 + } 516 + 517 + static const struct iio_chan_spec quad8_channels[] = { 518 + QUAD8_COUNT_CHAN(0), QUAD8_INDEX_CHAN(0), 519 + QUAD8_COUNT_CHAN(1), QUAD8_INDEX_CHAN(1), 520 + QUAD8_COUNT_CHAN(2), QUAD8_INDEX_CHAN(2), 521 + QUAD8_COUNT_CHAN(3), QUAD8_INDEX_CHAN(3), 522 + QUAD8_COUNT_CHAN(4), QUAD8_INDEX_CHAN(4), 523 + QUAD8_COUNT_CHAN(5), QUAD8_INDEX_CHAN(5), 524 + QUAD8_COUNT_CHAN(6), QUAD8_INDEX_CHAN(6), 525 + QUAD8_COUNT_CHAN(7), QUAD8_INDEX_CHAN(7) 526 + }; 527 + 528 + static int quad8_probe(struct device *dev, unsigned int id) 529 + { 530 + struct iio_dev *indio_dev; 531 + struct quad8_iio *priv; 532 + int i, j; 533 + unsigned int base_offset; 534 + 535 + indio_dev = devm_iio_device_alloc(dev, sizeof(*priv)); 536 + if (!indio_dev) 537 + return -ENOMEM; 538 + 539 + if (!devm_request_region(dev, base[id], QUAD8_EXTENT, 540 + dev_name(dev))) { 541 + dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n", 542 + base[id], base[id] + QUAD8_EXTENT); 543 + return -EBUSY; 544 + } 545 + 546 + indio_dev->info = &quad8_info; 547 + indio_dev->modes = INDIO_DIRECT_MODE; 548 + indio_dev->num_channels = ARRAY_SIZE(quad8_channels); 549 + indio_dev->channels = quad8_channels; 550 + indio_dev->name = dev_name(dev); 551 + 552 + priv = iio_priv(indio_dev); 553 + priv->base = base[id]; 554 + 555 + /* Reset all counters and disable interrupt function */ 556 + outb(0x01, base[id] + 0x11); 557 + /* Set initial configuration for all counters */ 558 + for (i = 0; i < QUAD8_NUM_COUNTERS; i++) { 559 + base_offset = base[id] + 2 * i; 560 + /* Reset Byte Pointer */ 561 + outb(0x01, base_offset + 1); 562 + /* Reset Preset Register */ 563 + for (j = 0; j < 3; j++) 564 + outb(0x00, base_offset); 565 + /* Reset Borrow, Carry, Compare, and Sign flags */ 566 + outb(0x04, base_offset + 1); 567 + /* Reset Error flag */ 568 + outb(0x06, base_offset + 1); 569 + /* Binary encoding; Normal count; non-quadrature mode */ 570 + outb(0x20, base_offset + 1); 571 + /* Disable A and B inputs; preset on index; FLG1 as Carry */ 572 + outb(0x40, base_offset + 1); 573 + /* Disable index function; negative index polarity */ 574 + outb(0x60, base_offset + 1); 575 + } 576 + /* Enable all counters */ 577 + outb(0x00, base[id] + 0x11); 578 + 579 + return devm_iio_device_register(dev, indio_dev); 580 + } 581 + 582 + static struct isa_driver quad8_driver = { 583 + .probe = quad8_probe, 584 + .driver = { 585 + .name = "104-quad-8" 586 + } 587 + }; 588 + 589 + module_isa_driver(quad8_driver, num_quad8); 590 + 591 + MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>"); 592 + MODULE_DESCRIPTION("ACCES 104-QUAD-8 IIO driver"); 593 + MODULE_LICENSE("GPL v2");
+24
drivers/iio/counter/Kconfig
··· 1 + # 2 + # Counter devices 3 + # 4 + # When adding new entries keep the list in alphabetical order 5 + 6 + menu "Counters" 7 + 8 + config 104_QUAD_8 9 + tristate "ACCES 104-QUAD-8 driver" 10 + depends on X86 && ISA_BUS_API 11 + help 12 + Say yes here to build support for the ACCES 104-QUAD-8 quadrature 13 + encoder counter/interface device family (104-QUAD-8, 104-QUAD-4). 14 + 15 + Performing a write to a counter's IIO_CHAN_INFO_RAW sets the counter and 16 + also clears the counter's respective error flag. Although the counters 17 + have a 25-bit range, only the lower 24 bits may be set, either directly 18 + or via a counter's preset attribute. Interrupts are not supported by 19 + this driver. 20 + 21 + The base port addresses for the devices may be configured via the base 22 + array module parameter. 23 + 24 + endmenu
+7
drivers/iio/counter/Makefile
··· 1 + # 2 + # Makefile for IIO counter devices 3 + # 4 + 5 + # When adding new entries keep the list in alphabetical order 6 + 7 + obj-$(CONFIG_104_QUAD_8) += 104-quad-8.o
+1 -1
drivers/iio/dac/ad5592r.c
··· 17 17 #define AD5592R_GPIO_READBACK_EN BIT(10) 18 18 #define AD5592R_LDAC_READBACK_EN BIT(6) 19 19 20 - static int ad5592r_spi_wnop_r16(struct ad5592r_state *st, u16 *buf) 20 + static int ad5592r_spi_wnop_r16(struct ad5592r_state *st, __be16 *buf) 21 21 { 22 22 struct spi_device *spi = container_of(st->dev, struct spi_device, dev); 23 23 struct spi_transfer t = {
+160 -16
drivers/iio/dac/mcp4725.c
··· 18 18 #include <linux/i2c.h> 19 19 #include <linux/err.h> 20 20 #include <linux/delay.h> 21 + #include <linux/regulator/consumer.h> 22 + #include <linux/of.h> 21 23 22 24 #include <linux/iio/iio.h> 23 25 #include <linux/iio/sysfs.h> ··· 28 26 29 27 #define MCP4725_DRV_NAME "mcp4725" 30 28 29 + #define MCP472X_REF_VDD 0x00 30 + #define MCP472X_REF_VREF_UNBUFFERED 0x02 31 + #define MCP472X_REF_VREF_BUFFERED 0x03 32 + 31 33 struct mcp4725_data { 32 34 struct i2c_client *client; 33 - u16 vref_mv; 35 + int id; 36 + unsigned ref_mode; 37 + bool vref_buffered; 34 38 u16 dac_value; 35 39 bool powerdown; 36 40 unsigned powerdown_mode; 41 + struct regulator *vdd_reg; 42 + struct regulator *vref_reg; 37 43 }; 38 44 39 45 static int mcp4725_suspend(struct device *dev) ··· 96 86 return 0; 97 87 98 88 inoutbuf[0] = 0x60; /* write EEPROM */ 89 + inoutbuf[0] |= data->ref_mode << 3; 99 90 inoutbuf[1] = data->dac_value >> 4; 100 91 inoutbuf[2] = (data->dac_value & 0xf) << 4; 101 92 ··· 289 278 return 0; 290 279 } 291 280 281 + static int mcp4726_set_cfg(struct iio_dev *indio_dev) 282 + { 283 + struct mcp4725_data *data = iio_priv(indio_dev); 284 + u8 outbuf[3]; 285 + int ret; 286 + 287 + outbuf[0] = 0x40; 288 + outbuf[0] |= data->ref_mode << 3; 289 + if (data->powerdown) 290 + outbuf[0] |= data->powerdown << 1; 291 + outbuf[1] = data->dac_value >> 4; 292 + outbuf[2] = (data->dac_value & 0xf) << 4; 293 + 294 + ret = i2c_master_send(data->client, outbuf, 3); 295 + if (ret < 0) 296 + return ret; 297 + else if (ret != 3) 298 + return -EIO; 299 + else 300 + return 0; 301 + } 302 + 292 303 static int mcp4725_read_raw(struct iio_dev *indio_dev, 293 304 struct iio_chan_spec const *chan, 294 305 int *val, int *val2, long mask) 295 306 { 296 307 struct mcp4725_data *data = iio_priv(indio_dev); 308 + int ret; 297 309 298 310 switch (mask) { 299 311 case IIO_CHAN_INFO_RAW: 300 312 *val = data->dac_value; 301 313 return IIO_VAL_INT; 302 314 case IIO_CHAN_INFO_SCALE: 303 - *val = data->vref_mv; 315 + if (data->ref_mode == MCP472X_REF_VDD) 316 + ret = regulator_get_voltage(data->vdd_reg); 317 + else 318 + ret = regulator_get_voltage(data->vref_reg); 319 + 320 + if (ret < 0) 321 + return ret; 322 + 323 + *val = ret / 1000; 304 324 *val2 = 12; 305 325 return IIO_VAL_FRACTIONAL_LOG2; 306 326 } ··· 365 323 .driver_module = THIS_MODULE, 366 324 }; 367 325 326 + #ifdef CONFIG_OF 327 + static int mcp4725_probe_dt(struct device *dev, 328 + struct mcp4725_platform_data *pdata) 329 + { 330 + struct device_node *np = dev->of_node; 331 + 332 + if (!np) 333 + return -ENODEV; 334 + 335 + /* check if is the vref-supply defined */ 336 + pdata->use_vref = of_property_read_bool(np, "vref-supply"); 337 + pdata->vref_buffered = 338 + of_property_read_bool(np, "microchip,vref-buffered"); 339 + 340 + return 0; 341 + } 342 + #else 343 + static int mcp4725_probe_dt(struct device *dev, 344 + struct mcp4725_platform_data *platform_data) 345 + { 346 + return -ENODEV; 347 + } 348 + #endif 349 + 368 350 static int mcp4725_probe(struct i2c_client *client, 369 351 const struct i2c_device_id *id) 370 352 { 371 353 struct mcp4725_data *data; 372 354 struct iio_dev *indio_dev; 373 - struct mcp4725_platform_data *platform_data = client->dev.platform_data; 374 - u8 inbuf[3]; 355 + struct mcp4725_platform_data *pdata, pdata_dt; 356 + u8 inbuf[4]; 375 357 u8 pd; 358 + u8 ref; 376 359 int err; 377 - 378 - if (!platform_data || !platform_data->vref_mv) { 379 - dev_err(&client->dev, "invalid platform data"); 380 - return -EINVAL; 381 - } 382 360 383 361 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 384 362 if (indio_dev == NULL) ··· 406 344 data = iio_priv(indio_dev); 407 345 i2c_set_clientdata(client, indio_dev); 408 346 data->client = client; 347 + data->id = id->driver_data; 348 + pdata = dev_get_platdata(&client->dev); 349 + 350 + if (!pdata) { 351 + err = mcp4725_probe_dt(&client->dev, &pdata_dt); 352 + if (err) { 353 + dev_err(&client->dev, 354 + "invalid platform or devicetree data"); 355 + return err; 356 + } 357 + pdata = &pdata_dt; 358 + } 359 + 360 + if (data->id == MCP4725 && pdata->use_vref) { 361 + dev_err(&client->dev, 362 + "external reference is unavailable on MCP4725"); 363 + return -EINVAL; 364 + } 365 + 366 + if (!pdata->use_vref && pdata->vref_buffered) { 367 + dev_err(&client->dev, 368 + "buffering is unavailable on the internal reference"); 369 + return -EINVAL; 370 + } 371 + 372 + if (!pdata->use_vref) 373 + data->ref_mode = MCP472X_REF_VDD; 374 + else 375 + data->ref_mode = pdata->vref_buffered ? 376 + MCP472X_REF_VREF_BUFFERED : 377 + MCP472X_REF_VREF_UNBUFFERED; 378 + 379 + data->vdd_reg = devm_regulator_get(&client->dev, "vdd"); 380 + if (IS_ERR(data->vdd_reg)) 381 + return PTR_ERR(data->vdd_reg); 382 + 383 + err = regulator_enable(data->vdd_reg); 384 + if (err) 385 + return err; 386 + 387 + if (pdata->use_vref) { 388 + data->vref_reg = devm_regulator_get(&client->dev, "vref"); 389 + if (IS_ERR(data->vref_reg)) { 390 + err = PTR_ERR(data->vref_reg); 391 + goto err_disable_vdd_reg; 392 + } 393 + 394 + err = regulator_enable(data->vref_reg); 395 + if (err) 396 + goto err_disable_vdd_reg; 397 + } 409 398 410 399 indio_dev->dev.parent = &client->dev; 411 400 indio_dev->name = id->name; ··· 465 352 indio_dev->num_channels = 1; 466 353 indio_dev->modes = INDIO_DIRECT_MODE; 467 354 468 - data->vref_mv = platform_data->vref_mv; 355 + /* read current DAC value and settings */ 356 + err = i2c_master_recv(client, inbuf, data->id == MCP4725 ? 3 : 4); 469 357 470 - /* read current DAC value */ 471 - err = i2c_master_recv(client, inbuf, 3); 472 358 if (err < 0) { 473 359 dev_err(&client->dev, "failed to read DAC value"); 474 - return err; 360 + goto err_disable_vref_reg; 475 361 } 476 362 pd = (inbuf[0] >> 1) & 0x3; 477 363 data->powerdown = pd > 0 ? true : false; 478 - data->powerdown_mode = pd ? pd - 1 : 2; /* largest register to gnd */ 364 + data->powerdown_mode = pd ? pd - 1 : 2; /* largest resistor to gnd */ 479 365 data->dac_value = (inbuf[1] << 4) | (inbuf[2] >> 4); 366 + if (data->id == MCP4726) 367 + ref = (inbuf[3] >> 3) & 0x3; 480 368 481 - return iio_device_register(indio_dev); 369 + if (data->id == MCP4726 && ref != data->ref_mode) { 370 + dev_info(&client->dev, 371 + "voltage reference mode differs (conf: %u, eeprom: %u), setting %u", 372 + data->ref_mode, ref, data->ref_mode); 373 + err = mcp4726_set_cfg(indio_dev); 374 + if (err < 0) 375 + goto err_disable_vref_reg; 376 + } 377 + 378 + err = iio_device_register(indio_dev); 379 + if (err) 380 + goto err_disable_vref_reg; 381 + 382 + return 0; 383 + 384 + err_disable_vref_reg: 385 + if (data->vref_reg) 386 + regulator_disable(data->vref_reg); 387 + 388 + err_disable_vdd_reg: 389 + regulator_disable(data->vdd_reg); 390 + 391 + return err; 482 392 } 483 393 484 394 static int mcp4725_remove(struct i2c_client *client) 485 395 { 486 - iio_device_unregister(i2c_get_clientdata(client)); 396 + struct iio_dev *indio_dev = i2c_get_clientdata(client); 397 + struct mcp4725_data *data = iio_priv(indio_dev); 398 + 399 + iio_device_unregister(indio_dev); 400 + 401 + if (data->vref_reg) 402 + regulator_disable(data->vref_reg); 403 + regulator_disable(data->vdd_reg); 404 + 487 405 return 0; 488 406 } 489 407
+24
drivers/iio/humidity/Kconfig
··· 27 27 config HDC100X 28 28 tristate "TI HDC100x relative humidity and temperature sensor" 29 29 depends on I2C 30 + select IIO_BUFFER 31 + select IIO_TRIGGERED_BUFFER 30 32 help 31 33 Say yes here to build support for the Texas Instruments 32 34 HDC1000 and HDC1008 relative humidity and temperature sensors. 33 35 34 36 To compile this driver as a module, choose M here: the module 35 37 will be called hdc100x. 38 + 39 + config HTS221 40 + tristate "STMicroelectronics HTS221 sensor Driver" 41 + depends on (I2C || SPI) 42 + select IIO_BUFFER 43 + select IIO_TRIGGERED_BUFFER 44 + select HTS221_I2C if (I2C) 45 + select HTS221_SPI if (SPI_MASTER) 46 + help 47 + Say yes here to build support for STMicroelectronics HTS221 48 + temperature-humidity sensor 49 + 50 + To compile this driver as a module, choose M here: the module 51 + will be called hts221. 52 + 53 + config HTS221_I2C 54 + tristate 55 + depends on HTS221 56 + 57 + config HTS221_SPI 58 + tristate 59 + depends on HTS221 36 60 37 61 config HTU21 38 62 tristate "Measurement Specialties HTU21 humidity & temperature sensor"
+7
drivers/iio/humidity/Makefile
··· 5 5 obj-$(CONFIG_AM2315) += am2315.o 6 6 obj-$(CONFIG_DHT11) += dht11.o 7 7 obj-$(CONFIG_HDC100X) += hdc100x.o 8 + 9 + hts221-y := hts221_core.o \ 10 + hts221_buffer.o 11 + obj-$(CONFIG_HTS221) += hts221.o 12 + obj-$(CONFIG_HTS221_I2C) += hts221_i2c.o 13 + obj-$(CONFIG_HTS221_SPI) += hts221_spi.o 14 + 8 15 obj-$(CONFIG_HTU21) += htu21.o 9 16 obj-$(CONFIG_SI7005) += si7005.o 10 17 obj-$(CONFIG_SI7020) += si7020.o
+128 -2
drivers/iio/humidity/hdc100x.c
··· 22 22 23 23 #include <linux/iio/iio.h> 24 24 #include <linux/iio/sysfs.h> 25 + #include <linux/iio/buffer.h> 26 + #include <linux/iio/trigger_consumer.h> 27 + #include <linux/iio/triggered_buffer.h> 25 28 26 29 #define HDC100X_REG_TEMP 0x00 27 30 #define HDC100X_REG_HUMIDITY 0x01 28 31 29 32 #define HDC100X_REG_CONFIG 0x02 33 + #define HDC100X_REG_CONFIG_ACQ_MODE BIT(12) 30 34 #define HDC100X_REG_CONFIG_HEATER_EN BIT(13) 31 35 32 36 struct hdc100x_data { ··· 91 87 BIT(IIO_CHAN_INFO_SCALE) | 92 88 BIT(IIO_CHAN_INFO_INT_TIME) | 93 89 BIT(IIO_CHAN_INFO_OFFSET), 90 + .scan_index = 0, 91 + .scan_type = { 92 + .sign = 's', 93 + .realbits = 16, 94 + .storagebits = 16, 95 + .endianness = IIO_BE, 96 + }, 94 97 }, 95 98 { 96 99 .type = IIO_HUMIDITYRELATIVE, 97 100 .address = HDC100X_REG_HUMIDITY, 98 101 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 99 102 BIT(IIO_CHAN_INFO_SCALE) | 100 - BIT(IIO_CHAN_INFO_INT_TIME) 103 + BIT(IIO_CHAN_INFO_INT_TIME), 104 + .scan_index = 1, 105 + .scan_type = { 106 + .sign = 'u', 107 + .realbits = 16, 108 + .storagebits = 16, 109 + .endianness = IIO_BE, 110 + }, 101 111 }, 102 112 { 103 113 .type = IIO_CURRENT, 104 114 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 105 115 .extend_name = "heater", 106 116 .output = 1, 117 + .scan_index = -1, 107 118 }, 119 + IIO_CHAN_SOFT_TIMESTAMP(2), 108 120 }; 121 + 122 + static const unsigned long hdc100x_scan_masks[] = {0x3, 0}; 109 123 110 124 static int hdc100x_update_config(struct hdc100x_data *data, int mask, int val) 111 125 { ··· 205 183 *val = hdc100x_get_heater_status(data); 206 184 ret = IIO_VAL_INT; 207 185 } else { 186 + ret = iio_device_claim_direct_mode(indio_dev); 187 + if (ret) { 188 + mutex_unlock(&data->lock); 189 + return ret; 190 + } 191 + 208 192 ret = hdc100x_get_measurement(data, chan); 193 + iio_device_release_direct_mode(indio_dev); 209 194 if (ret >= 0) { 210 195 *val = ret; 211 196 ret = IIO_VAL_INT; ··· 275 246 } 276 247 } 277 248 249 + static int hdc100x_buffer_postenable(struct iio_dev *indio_dev) 250 + { 251 + struct hdc100x_data *data = iio_priv(indio_dev); 252 + int ret; 253 + 254 + /* Buffer is enabled. First set ACQ Mode, then attach poll func */ 255 + mutex_lock(&data->lock); 256 + ret = hdc100x_update_config(data, HDC100X_REG_CONFIG_ACQ_MODE, 257 + HDC100X_REG_CONFIG_ACQ_MODE); 258 + mutex_unlock(&data->lock); 259 + if (ret) 260 + return ret; 261 + 262 + return iio_triggered_buffer_postenable(indio_dev); 263 + } 264 + 265 + static int hdc100x_buffer_predisable(struct iio_dev *indio_dev) 266 + { 267 + struct hdc100x_data *data = iio_priv(indio_dev); 268 + int ret; 269 + 270 + /* First detach poll func, then reset ACQ mode. OK to disable buffer */ 271 + ret = iio_triggered_buffer_predisable(indio_dev); 272 + if (ret) 273 + return ret; 274 + 275 + mutex_lock(&data->lock); 276 + ret = hdc100x_update_config(data, HDC100X_REG_CONFIG_ACQ_MODE, 0); 277 + mutex_unlock(&data->lock); 278 + 279 + return ret; 280 + } 281 + 282 + static const struct iio_buffer_setup_ops hdc_buffer_setup_ops = { 283 + .postenable = hdc100x_buffer_postenable, 284 + .predisable = hdc100x_buffer_predisable, 285 + }; 286 + 287 + static irqreturn_t hdc100x_trigger_handler(int irq, void *p) 288 + { 289 + struct iio_poll_func *pf = p; 290 + struct iio_dev *indio_dev = pf->indio_dev; 291 + struct hdc100x_data *data = iio_priv(indio_dev); 292 + struct i2c_client *client = data->client; 293 + int delay = data->adc_int_us[0] + data->adc_int_us[1]; 294 + int ret; 295 + s16 buf[8]; /* 2x s16 + padding + 8 byte timestamp */ 296 + 297 + /* dual read starts at temp register */ 298 + mutex_lock(&data->lock); 299 + ret = i2c_smbus_write_byte(client, HDC100X_REG_TEMP); 300 + if (ret < 0) { 301 + dev_err(&client->dev, "cannot start measurement\n"); 302 + goto err; 303 + } 304 + usleep_range(delay, delay + 1000); 305 + 306 + ret = i2c_master_recv(client, (u8 *)buf, 4); 307 + if (ret < 0) { 308 + dev_err(&client->dev, "cannot read sensor data\n"); 309 + goto err; 310 + } 311 + 312 + iio_push_to_buffers_with_timestamp(indio_dev, buf, 313 + iio_get_time_ns(indio_dev)); 314 + err: 315 + mutex_unlock(&data->lock); 316 + iio_trigger_notify_done(indio_dev->trig); 317 + 318 + return IRQ_HANDLED; 319 + } 320 + 278 321 static const struct iio_info hdc100x_info = { 279 322 .read_raw = hdc100x_read_raw, 280 323 .write_raw = hdc100x_write_raw, ··· 359 258 { 360 259 struct iio_dev *indio_dev; 361 260 struct hdc100x_data *data; 261 + int ret; 362 262 363 263 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA | 364 264 I2C_FUNC_SMBUS_BYTE | I2C_FUNC_I2C)) ··· 381 279 382 280 indio_dev->channels = hdc100x_channels; 383 281 indio_dev->num_channels = ARRAY_SIZE(hdc100x_channels); 282 + indio_dev->available_scan_masks = hdc100x_scan_masks; 384 283 385 284 /* be sure we are in a known state */ 386 285 hdc100x_set_it_time(data, 0, hdc100x_int_time[0][0]); 387 286 hdc100x_set_it_time(data, 1, hdc100x_int_time[1][0]); 287 + hdc100x_update_config(data, HDC100X_REG_CONFIG_ACQ_MODE, 0); 388 288 389 - return devm_iio_device_register(&client->dev, indio_dev); 289 + ret = iio_triggered_buffer_setup(indio_dev, NULL, 290 + hdc100x_trigger_handler, 291 + &hdc_buffer_setup_ops); 292 + if (ret < 0) { 293 + dev_err(&client->dev, "iio triggered buffer setup failed\n"); 294 + return ret; 295 + } 296 + ret = iio_device_register(indio_dev); 297 + if (ret < 0) 298 + iio_triggered_buffer_cleanup(indio_dev); 299 + 300 + return ret; 301 + } 302 + 303 + static int hdc100x_remove(struct i2c_client *client) 304 + { 305 + struct iio_dev *indio_dev = i2c_get_clientdata(client); 306 + 307 + iio_device_unregister(indio_dev); 308 + iio_triggered_buffer_cleanup(indio_dev); 309 + 310 + return 0; 390 311 } 391 312 392 313 static const struct i2c_device_id hdc100x_id[] = { ··· 423 298 .name = "hdc100x", 424 299 }, 425 300 .probe = hdc100x_probe, 301 + .remove = hdc100x_remove, 426 302 .id_table = hdc100x_id, 427 303 }; 428 304 module_i2c_driver(hdc100x_driver);
+73
drivers/iio/humidity/hts221.h
··· 1 + /* 2 + * STMicroelectronics hts221 sensor driver 3 + * 4 + * Copyright 2016 STMicroelectronics Inc. 5 + * 6 + * Lorenzo Bianconi <lorenzo.bianconi@st.com> 7 + * 8 + * Licensed under the GPL-2. 9 + */ 10 + 11 + #ifndef HTS221_H 12 + #define HTS221_H 13 + 14 + #define HTS221_DEV_NAME "hts221" 15 + 16 + #include <linux/iio/iio.h> 17 + 18 + #define HTS221_RX_MAX_LENGTH 8 19 + #define HTS221_TX_MAX_LENGTH 8 20 + 21 + #define HTS221_DATA_SIZE 2 22 + 23 + struct hts221_transfer_buffer { 24 + u8 rx_buf[HTS221_RX_MAX_LENGTH]; 25 + u8 tx_buf[HTS221_TX_MAX_LENGTH] ____cacheline_aligned; 26 + }; 27 + 28 + struct hts221_transfer_function { 29 + int (*read)(struct device *dev, u8 addr, int len, u8 *data); 30 + int (*write)(struct device *dev, u8 addr, int len, u8 *data); 31 + }; 32 + 33 + #define HTS221_AVG_DEPTH 8 34 + struct hts221_avg_avl { 35 + u16 avg; 36 + u8 val; 37 + }; 38 + 39 + enum hts221_sensor_type { 40 + HTS221_SENSOR_H, 41 + HTS221_SENSOR_T, 42 + HTS221_SENSOR_MAX, 43 + }; 44 + 45 + struct hts221_sensor { 46 + u8 cur_avg_idx; 47 + int slope, b_gen; 48 + }; 49 + 50 + struct hts221_hw { 51 + const char *name; 52 + struct device *dev; 53 + 54 + struct mutex lock; 55 + struct iio_trigger *trig; 56 + int irq; 57 + 58 + struct hts221_sensor sensors[HTS221_SENSOR_MAX]; 59 + 60 + u8 odr; 61 + 62 + const struct hts221_transfer_function *tf; 63 + struct hts221_transfer_buffer tb; 64 + }; 65 + 66 + int hts221_config_drdy(struct hts221_hw *hw, bool enable); 67 + int hts221_probe(struct iio_dev *iio_dev); 68 + int hts221_power_on(struct hts221_hw *hw); 69 + int hts221_power_off(struct hts221_hw *hw); 70 + int hts221_allocate_buffers(struct hts221_hw *hw); 71 + int hts221_allocate_trigger(struct hts221_hw *hw); 72 + 73 + #endif /* HTS221_H */
+169
drivers/iio/humidity/hts221_buffer.c
··· 1 + /* 2 + * STMicroelectronics hts221 sensor driver 3 + * 4 + * Copyright 2016 STMicroelectronics Inc. 5 + * 6 + * Lorenzo Bianconi <lorenzo.bianconi@st.com> 7 + * 8 + * Licensed under the GPL-2. 9 + */ 10 + #include <linux/kernel.h> 11 + #include <linux/module.h> 12 + #include <linux/device.h> 13 + #include <linux/interrupt.h> 14 + #include <linux/irqreturn.h> 15 + 16 + #include <linux/iio/iio.h> 17 + #include <linux/iio/trigger.h> 18 + #include <linux/interrupt.h> 19 + #include <linux/iio/events.h> 20 + #include <linux/iio/trigger_consumer.h> 21 + #include <linux/iio/triggered_buffer.h> 22 + #include <linux/iio/buffer.h> 23 + 24 + #include "hts221.h" 25 + 26 + #define HTS221_REG_STATUS_ADDR 0x27 27 + #define HTS221_RH_DRDY_MASK BIT(1) 28 + #define HTS221_TEMP_DRDY_MASK BIT(0) 29 + 30 + static int hts221_trig_set_state(struct iio_trigger *trig, bool state) 31 + { 32 + struct iio_dev *iio_dev = iio_trigger_get_drvdata(trig); 33 + struct hts221_hw *hw = iio_priv(iio_dev); 34 + 35 + return hts221_config_drdy(hw, state); 36 + } 37 + 38 + static const struct iio_trigger_ops hts221_trigger_ops = { 39 + .owner = THIS_MODULE, 40 + .set_trigger_state = hts221_trig_set_state, 41 + }; 42 + 43 + static irqreturn_t hts221_trigger_handler_thread(int irq, void *private) 44 + { 45 + struct hts221_hw *hw = (struct hts221_hw *)private; 46 + u8 status; 47 + int err; 48 + 49 + err = hw->tf->read(hw->dev, HTS221_REG_STATUS_ADDR, sizeof(status), 50 + &status); 51 + if (err < 0) 52 + return IRQ_HANDLED; 53 + 54 + /* 55 + * H_DA bit (humidity data available) is routed to DRDY line. 56 + * Humidity sample is computed after temperature one. 57 + * Here we can assume data channels are both available if H_DA bit 58 + * is set in status register 59 + */ 60 + if (!(status & HTS221_RH_DRDY_MASK)) 61 + return IRQ_NONE; 62 + 63 + iio_trigger_poll_chained(hw->trig); 64 + 65 + return IRQ_HANDLED; 66 + } 67 + 68 + int hts221_allocate_trigger(struct hts221_hw *hw) 69 + { 70 + struct iio_dev *iio_dev = iio_priv_to_dev(hw); 71 + unsigned long irq_type; 72 + int err; 73 + 74 + irq_type = irqd_get_trigger_type(irq_get_irq_data(hw->irq)); 75 + 76 + switch (irq_type) { 77 + case IRQF_TRIGGER_HIGH: 78 + case IRQF_TRIGGER_RISING: 79 + break; 80 + default: 81 + dev_info(hw->dev, 82 + "mode %lx unsupported, using IRQF_TRIGGER_RISING\n", 83 + irq_type); 84 + irq_type = IRQF_TRIGGER_RISING; 85 + break; 86 + } 87 + 88 + err = devm_request_threaded_irq(hw->dev, hw->irq, NULL, 89 + hts221_trigger_handler_thread, 90 + irq_type | IRQF_ONESHOT, 91 + hw->name, hw); 92 + if (err) { 93 + dev_err(hw->dev, "failed to request trigger irq %d\n", 94 + hw->irq); 95 + return err; 96 + } 97 + 98 + hw->trig = devm_iio_trigger_alloc(hw->dev, "%s-trigger", 99 + iio_dev->name); 100 + if (!hw->trig) 101 + return -ENOMEM; 102 + 103 + iio_trigger_set_drvdata(hw->trig, iio_dev); 104 + hw->trig->ops = &hts221_trigger_ops; 105 + hw->trig->dev.parent = hw->dev; 106 + iio_dev->trig = iio_trigger_get(hw->trig); 107 + 108 + return devm_iio_trigger_register(hw->dev, hw->trig); 109 + } 110 + 111 + static int hts221_buffer_preenable(struct iio_dev *iio_dev) 112 + { 113 + return hts221_power_on(iio_priv(iio_dev)); 114 + } 115 + 116 + static int hts221_buffer_postdisable(struct iio_dev *iio_dev) 117 + { 118 + return hts221_power_off(iio_priv(iio_dev)); 119 + } 120 + 121 + static const struct iio_buffer_setup_ops hts221_buffer_ops = { 122 + .preenable = hts221_buffer_preenable, 123 + .postenable = iio_triggered_buffer_postenable, 124 + .predisable = iio_triggered_buffer_predisable, 125 + .postdisable = hts221_buffer_postdisable, 126 + }; 127 + 128 + static irqreturn_t hts221_buffer_handler_thread(int irq, void *p) 129 + { 130 + u8 buffer[ALIGN(2 * HTS221_DATA_SIZE, sizeof(s64)) + sizeof(s64)]; 131 + struct iio_poll_func *pf = p; 132 + struct iio_dev *iio_dev = pf->indio_dev; 133 + struct hts221_hw *hw = iio_priv(iio_dev); 134 + struct iio_chan_spec const *ch; 135 + int err; 136 + 137 + /* humidity data */ 138 + ch = &iio_dev->channels[HTS221_SENSOR_H]; 139 + err = hw->tf->read(hw->dev, ch->address, HTS221_DATA_SIZE, 140 + buffer); 141 + if (err < 0) 142 + goto out; 143 + 144 + /* temperature data */ 145 + ch = &iio_dev->channels[HTS221_SENSOR_T]; 146 + err = hw->tf->read(hw->dev, ch->address, HTS221_DATA_SIZE, 147 + buffer + HTS221_DATA_SIZE); 148 + if (err < 0) 149 + goto out; 150 + 151 + iio_push_to_buffers_with_timestamp(iio_dev, buffer, 152 + iio_get_time_ns(iio_dev)); 153 + 154 + out: 155 + iio_trigger_notify_done(hw->trig); 156 + 157 + return IRQ_HANDLED; 158 + } 159 + 160 + int hts221_allocate_buffers(struct hts221_hw *hw) 161 + { 162 + return devm_iio_triggered_buffer_setup(hw->dev, iio_priv_to_dev(hw), 163 + NULL, hts221_buffer_handler_thread, 164 + &hts221_buffer_ops); 165 + } 166 + 167 + MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi@st.com>"); 168 + MODULE_DESCRIPTION("STMicroelectronics hts221 buffer driver"); 169 + MODULE_LICENSE("GPL v2");
+687
drivers/iio/humidity/hts221_core.c
··· 1 + /* 2 + * STMicroelectronics hts221 sensor driver 3 + * 4 + * Copyright 2016 STMicroelectronics Inc. 5 + * 6 + * Lorenzo Bianconi <lorenzo.bianconi@st.com> 7 + * 8 + * Licensed under the GPL-2. 9 + */ 10 + 11 + #include <linux/kernel.h> 12 + #include <linux/module.h> 13 + #include <linux/device.h> 14 + #include <linux/iio/sysfs.h> 15 + #include <linux/delay.h> 16 + #include <asm/unaligned.h> 17 + 18 + #include "hts221.h" 19 + 20 + #define HTS221_REG_WHOAMI_ADDR 0x0f 21 + #define HTS221_REG_WHOAMI_VAL 0xbc 22 + 23 + #define HTS221_REG_CNTRL1_ADDR 0x20 24 + #define HTS221_REG_CNTRL2_ADDR 0x21 25 + #define HTS221_REG_CNTRL3_ADDR 0x22 26 + 27 + #define HTS221_REG_AVG_ADDR 0x10 28 + #define HTS221_REG_H_OUT_L 0x28 29 + #define HTS221_REG_T_OUT_L 0x2a 30 + 31 + #define HTS221_HUMIDITY_AVG_MASK 0x07 32 + #define HTS221_TEMP_AVG_MASK 0x38 33 + 34 + #define HTS221_ODR_MASK 0x87 35 + #define HTS221_BDU_MASK BIT(2) 36 + 37 + #define HTS221_DRDY_MASK BIT(2) 38 + 39 + #define HTS221_ENABLE_SENSOR BIT(7) 40 + 41 + #define HTS221_HUMIDITY_AVG_4 0x00 /* 0.4 %RH */ 42 + #define HTS221_HUMIDITY_AVG_8 0x01 /* 0.3 %RH */ 43 + #define HTS221_HUMIDITY_AVG_16 0x02 /* 0.2 %RH */ 44 + #define HTS221_HUMIDITY_AVG_32 0x03 /* 0.15 %RH */ 45 + #define HTS221_HUMIDITY_AVG_64 0x04 /* 0.1 %RH */ 46 + #define HTS221_HUMIDITY_AVG_128 0x05 /* 0.07 %RH */ 47 + #define HTS221_HUMIDITY_AVG_256 0x06 /* 0.05 %RH */ 48 + #define HTS221_HUMIDITY_AVG_512 0x07 /* 0.03 %RH */ 49 + 50 + #define HTS221_TEMP_AVG_2 0x00 /* 0.08 degC */ 51 + #define HTS221_TEMP_AVG_4 0x08 /* 0.05 degC */ 52 + #define HTS221_TEMP_AVG_8 0x10 /* 0.04 degC */ 53 + #define HTS221_TEMP_AVG_16 0x18 /* 0.03 degC */ 54 + #define HTS221_TEMP_AVG_32 0x20 /* 0.02 degC */ 55 + #define HTS221_TEMP_AVG_64 0x28 /* 0.015 degC */ 56 + #define HTS221_TEMP_AVG_128 0x30 /* 0.01 degC */ 57 + #define HTS221_TEMP_AVG_256 0x38 /* 0.007 degC */ 58 + 59 + /* calibration registers */ 60 + #define HTS221_REG_0RH_CAL_X_H 0x36 61 + #define HTS221_REG_1RH_CAL_X_H 0x3a 62 + #define HTS221_REG_0RH_CAL_Y_H 0x30 63 + #define HTS221_REG_1RH_CAL_Y_H 0x31 64 + #define HTS221_REG_0T_CAL_X_L 0x3c 65 + #define HTS221_REG_1T_CAL_X_L 0x3e 66 + #define HTS221_REG_0T_CAL_Y_H 0x32 67 + #define HTS221_REG_1T_CAL_Y_H 0x33 68 + #define HTS221_REG_T1_T0_CAL_Y_H 0x35 69 + 70 + struct hts221_odr { 71 + u8 hz; 72 + u8 val; 73 + }; 74 + 75 + struct hts221_avg { 76 + u8 addr; 77 + u8 mask; 78 + struct hts221_avg_avl avg_avl[HTS221_AVG_DEPTH]; 79 + }; 80 + 81 + static const struct hts221_odr hts221_odr_table[] = { 82 + { 1, 0x01 }, /* 1Hz */ 83 + { 7, 0x02 }, /* 7Hz */ 84 + { 13, 0x03 }, /* 12.5Hz */ 85 + }; 86 + 87 + static const struct hts221_avg hts221_avg_list[] = { 88 + { 89 + .addr = HTS221_REG_AVG_ADDR, 90 + .mask = HTS221_HUMIDITY_AVG_MASK, 91 + .avg_avl = { 92 + { 4, HTS221_HUMIDITY_AVG_4 }, 93 + { 8, HTS221_HUMIDITY_AVG_8 }, 94 + { 16, HTS221_HUMIDITY_AVG_16 }, 95 + { 32, HTS221_HUMIDITY_AVG_32 }, 96 + { 64, HTS221_HUMIDITY_AVG_64 }, 97 + { 128, HTS221_HUMIDITY_AVG_128 }, 98 + { 256, HTS221_HUMIDITY_AVG_256 }, 99 + { 512, HTS221_HUMIDITY_AVG_512 }, 100 + }, 101 + }, 102 + { 103 + .addr = HTS221_REG_AVG_ADDR, 104 + .mask = HTS221_TEMP_AVG_MASK, 105 + .avg_avl = { 106 + { 2, HTS221_TEMP_AVG_2 }, 107 + { 4, HTS221_TEMP_AVG_4 }, 108 + { 8, HTS221_TEMP_AVG_8 }, 109 + { 16, HTS221_TEMP_AVG_16 }, 110 + { 32, HTS221_TEMP_AVG_32 }, 111 + { 64, HTS221_TEMP_AVG_64 }, 112 + { 128, HTS221_TEMP_AVG_128 }, 113 + { 256, HTS221_TEMP_AVG_256 }, 114 + }, 115 + }, 116 + }; 117 + 118 + static const struct iio_chan_spec hts221_channels[] = { 119 + { 120 + .type = IIO_HUMIDITYRELATIVE, 121 + .address = HTS221_REG_H_OUT_L, 122 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 123 + BIT(IIO_CHAN_INFO_OFFSET) | 124 + BIT(IIO_CHAN_INFO_SCALE) | 125 + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), 126 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), 127 + .scan_index = 0, 128 + .scan_type = { 129 + .sign = 's', 130 + .realbits = 16, 131 + .storagebits = 16, 132 + .endianness = IIO_LE, 133 + }, 134 + }, 135 + { 136 + .type = IIO_TEMP, 137 + .address = HTS221_REG_T_OUT_L, 138 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 139 + BIT(IIO_CHAN_INFO_OFFSET) | 140 + BIT(IIO_CHAN_INFO_SCALE) | 141 + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), 142 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), 143 + .scan_index = 1, 144 + .scan_type = { 145 + .sign = 's', 146 + .realbits = 16, 147 + .storagebits = 16, 148 + .endianness = IIO_LE, 149 + }, 150 + }, 151 + IIO_CHAN_SOFT_TIMESTAMP(2), 152 + }; 153 + 154 + static int hts221_write_with_mask(struct hts221_hw *hw, u8 addr, u8 mask, 155 + u8 val) 156 + { 157 + u8 data; 158 + int err; 159 + 160 + mutex_lock(&hw->lock); 161 + 162 + err = hw->tf->read(hw->dev, addr, sizeof(data), &data); 163 + if (err < 0) { 164 + dev_err(hw->dev, "failed to read %02x register\n", addr); 165 + goto unlock; 166 + } 167 + 168 + data = (data & ~mask) | (val & mask); 169 + 170 + err = hw->tf->write(hw->dev, addr, sizeof(data), &data); 171 + if (err < 0) 172 + dev_err(hw->dev, "failed to write %02x register\n", addr); 173 + 174 + unlock: 175 + mutex_unlock(&hw->lock); 176 + 177 + return err; 178 + } 179 + 180 + static int hts221_check_whoami(struct hts221_hw *hw) 181 + { 182 + u8 data; 183 + int err; 184 + 185 + err = hw->tf->read(hw->dev, HTS221_REG_WHOAMI_ADDR, sizeof(data), 186 + &data); 187 + if (err < 0) { 188 + dev_err(hw->dev, "failed to read whoami register\n"); 189 + return err; 190 + } 191 + 192 + if (data != HTS221_REG_WHOAMI_VAL) { 193 + dev_err(hw->dev, "wrong whoami {%02x vs %02x}\n", 194 + data, HTS221_REG_WHOAMI_VAL); 195 + return -ENODEV; 196 + } 197 + 198 + return 0; 199 + } 200 + 201 + int hts221_config_drdy(struct hts221_hw *hw, bool enable) 202 + { 203 + u8 val = enable ? BIT(2) : 0; 204 + int err; 205 + 206 + err = hts221_write_with_mask(hw, HTS221_REG_CNTRL3_ADDR, 207 + HTS221_DRDY_MASK, val); 208 + 209 + return err < 0 ? err : 0; 210 + } 211 + 212 + static int hts221_update_odr(struct hts221_hw *hw, u8 odr) 213 + { 214 + int i, err; 215 + u8 val; 216 + 217 + for (i = 0; i < ARRAY_SIZE(hts221_odr_table); i++) 218 + if (hts221_odr_table[i].hz == odr) 219 + break; 220 + 221 + if (i == ARRAY_SIZE(hts221_odr_table)) 222 + return -EINVAL; 223 + 224 + val = HTS221_ENABLE_SENSOR | HTS221_BDU_MASK | hts221_odr_table[i].val; 225 + err = hts221_write_with_mask(hw, HTS221_REG_CNTRL1_ADDR, 226 + HTS221_ODR_MASK, val); 227 + if (err < 0) 228 + return err; 229 + 230 + hw->odr = odr; 231 + 232 + return 0; 233 + } 234 + 235 + static int hts221_update_avg(struct hts221_hw *hw, 236 + enum hts221_sensor_type type, 237 + u16 val) 238 + { 239 + int i, err; 240 + const struct hts221_avg *avg = &hts221_avg_list[type]; 241 + 242 + for (i = 0; i < HTS221_AVG_DEPTH; i++) 243 + if (avg->avg_avl[i].avg == val) 244 + break; 245 + 246 + if (i == HTS221_AVG_DEPTH) 247 + return -EINVAL; 248 + 249 + err = hts221_write_with_mask(hw, avg->addr, avg->mask, 250 + avg->avg_avl[i].val); 251 + if (err < 0) 252 + return err; 253 + 254 + hw->sensors[type].cur_avg_idx = i; 255 + 256 + return 0; 257 + } 258 + 259 + static ssize_t hts221_sysfs_sampling_freq(struct device *dev, 260 + struct device_attribute *attr, 261 + char *buf) 262 + { 263 + int i; 264 + ssize_t len = 0; 265 + 266 + for (i = 0; i < ARRAY_SIZE(hts221_odr_table); i++) 267 + len += scnprintf(buf + len, PAGE_SIZE - len, "%d ", 268 + hts221_odr_table[i].hz); 269 + buf[len - 1] = '\n'; 270 + 271 + return len; 272 + } 273 + 274 + static ssize_t 275 + hts221_sysfs_rh_oversampling_avail(struct device *dev, 276 + struct device_attribute *attr, 277 + char *buf) 278 + { 279 + const struct hts221_avg *avg = &hts221_avg_list[HTS221_SENSOR_H]; 280 + ssize_t len = 0; 281 + int i; 282 + 283 + for (i = 0; i < ARRAY_SIZE(avg->avg_avl); i++) 284 + len += scnprintf(buf + len, PAGE_SIZE - len, "%d ", 285 + avg->avg_avl[i].avg); 286 + buf[len - 1] = '\n'; 287 + 288 + return len; 289 + } 290 + 291 + static ssize_t 292 + hts221_sysfs_temp_oversampling_avail(struct device *dev, 293 + struct device_attribute *attr, 294 + char *buf) 295 + { 296 + const struct hts221_avg *avg = &hts221_avg_list[HTS221_SENSOR_T]; 297 + ssize_t len = 0; 298 + int i; 299 + 300 + for (i = 0; i < ARRAY_SIZE(avg->avg_avl); i++) 301 + len += scnprintf(buf + len, PAGE_SIZE - len, "%d ", 302 + avg->avg_avl[i].avg); 303 + buf[len - 1] = '\n'; 304 + 305 + return len; 306 + } 307 + 308 + int hts221_power_on(struct hts221_hw *hw) 309 + { 310 + return hts221_update_odr(hw, hw->odr); 311 + } 312 + 313 + int hts221_power_off(struct hts221_hw *hw) 314 + { 315 + u8 data[] = {0x00, 0x00}; 316 + 317 + return hw->tf->write(hw->dev, HTS221_REG_CNTRL1_ADDR, sizeof(data), 318 + data); 319 + } 320 + 321 + static int hts221_parse_temp_caldata(struct hts221_hw *hw) 322 + { 323 + int err, *slope, *b_gen; 324 + s16 cal_x0, cal_x1, cal_y0, cal_y1; 325 + u8 cal0, cal1; 326 + 327 + err = hw->tf->read(hw->dev, HTS221_REG_0T_CAL_Y_H, 328 + sizeof(cal0), &cal0); 329 + if (err < 0) 330 + return err; 331 + 332 + err = hw->tf->read(hw->dev, HTS221_REG_T1_T0_CAL_Y_H, 333 + sizeof(cal1), &cal1); 334 + if (err < 0) 335 + return err; 336 + cal_y0 = (le16_to_cpu(cal1 & 0x3) << 8) | cal0; 337 + 338 + err = hw->tf->read(hw->dev, HTS221_REG_1T_CAL_Y_H, 339 + sizeof(cal0), &cal0); 340 + if (err < 0) 341 + return err; 342 + cal_y1 = (((cal1 & 0xc) >> 2) << 8) | cal0; 343 + 344 + err = hw->tf->read(hw->dev, HTS221_REG_0T_CAL_X_L, sizeof(cal_x0), 345 + (u8 *)&cal_x0); 346 + if (err < 0) 347 + return err; 348 + cal_x0 = le16_to_cpu(cal_x0); 349 + 350 + err = hw->tf->read(hw->dev, HTS221_REG_1T_CAL_X_L, sizeof(cal_x1), 351 + (u8 *)&cal_x1); 352 + if (err < 0) 353 + return err; 354 + cal_x1 = le16_to_cpu(cal_x1); 355 + 356 + slope = &hw->sensors[HTS221_SENSOR_T].slope; 357 + b_gen = &hw->sensors[HTS221_SENSOR_T].b_gen; 358 + 359 + *slope = ((cal_y1 - cal_y0) * 8000) / (cal_x1 - cal_x0); 360 + *b_gen = (((s32)cal_x1 * cal_y0 - (s32)cal_x0 * cal_y1) * 1000) / 361 + (cal_x1 - cal_x0); 362 + *b_gen *= 8; 363 + 364 + return 0; 365 + } 366 + 367 + static int hts221_parse_rh_caldata(struct hts221_hw *hw) 368 + { 369 + int err, *slope, *b_gen; 370 + s16 cal_x0, cal_x1, cal_y0, cal_y1; 371 + u8 data; 372 + 373 + err = hw->tf->read(hw->dev, HTS221_REG_0RH_CAL_Y_H, sizeof(data), 374 + &data); 375 + if (err < 0) 376 + return err; 377 + cal_y0 = data; 378 + 379 + err = hw->tf->read(hw->dev, HTS221_REG_1RH_CAL_Y_H, sizeof(data), 380 + &data); 381 + if (err < 0) 382 + return err; 383 + cal_y1 = data; 384 + 385 + err = hw->tf->read(hw->dev, HTS221_REG_0RH_CAL_X_H, sizeof(cal_x0), 386 + (u8 *)&cal_x0); 387 + if (err < 0) 388 + return err; 389 + cal_x0 = le16_to_cpu(cal_x0); 390 + 391 + err = hw->tf->read(hw->dev, HTS221_REG_1RH_CAL_X_H, sizeof(cal_x1), 392 + (u8 *)&cal_x1); 393 + if (err < 0) 394 + return err; 395 + cal_x1 = le16_to_cpu(cal_x1); 396 + 397 + slope = &hw->sensors[HTS221_SENSOR_H].slope; 398 + b_gen = &hw->sensors[HTS221_SENSOR_H].b_gen; 399 + 400 + *slope = ((cal_y1 - cal_y0) * 8000) / (cal_x1 - cal_x0); 401 + *b_gen = (((s32)cal_x1 * cal_y0 - (s32)cal_x0 * cal_y1) * 1000) / 402 + (cal_x1 - cal_x0); 403 + *b_gen *= 8; 404 + 405 + return 0; 406 + } 407 + 408 + static int hts221_get_sensor_scale(struct hts221_hw *hw, 409 + enum iio_chan_type ch_type, 410 + int *val, int *val2) 411 + { 412 + s64 tmp; 413 + s32 rem, div, data; 414 + 415 + switch (ch_type) { 416 + case IIO_HUMIDITYRELATIVE: 417 + data = hw->sensors[HTS221_SENSOR_H].slope; 418 + div = (1 << 4) * 1000; 419 + break; 420 + case IIO_TEMP: 421 + data = hw->sensors[HTS221_SENSOR_T].slope; 422 + div = (1 << 6) * 1000; 423 + break; 424 + default: 425 + return -EINVAL; 426 + } 427 + 428 + tmp = div_s64(data * 1000000000LL, div); 429 + tmp = div_s64_rem(tmp, 1000000000LL, &rem); 430 + 431 + *val = tmp; 432 + *val2 = rem; 433 + 434 + return IIO_VAL_INT_PLUS_NANO; 435 + } 436 + 437 + static int hts221_get_sensor_offset(struct hts221_hw *hw, 438 + enum iio_chan_type ch_type, 439 + int *val, int *val2) 440 + { 441 + s64 tmp; 442 + s32 rem, div, data; 443 + 444 + switch (ch_type) { 445 + case IIO_HUMIDITYRELATIVE: 446 + data = hw->sensors[HTS221_SENSOR_H].b_gen; 447 + div = hw->sensors[HTS221_SENSOR_H].slope; 448 + break; 449 + case IIO_TEMP: 450 + data = hw->sensors[HTS221_SENSOR_T].b_gen; 451 + div = hw->sensors[HTS221_SENSOR_T].slope; 452 + break; 453 + default: 454 + return -EINVAL; 455 + } 456 + 457 + tmp = div_s64(data * 1000000000LL, div); 458 + tmp = div_s64_rem(tmp, 1000000000LL, &rem); 459 + 460 + *val = tmp; 461 + *val2 = rem; 462 + 463 + return IIO_VAL_INT_PLUS_NANO; 464 + } 465 + 466 + static int hts221_read_oneshot(struct hts221_hw *hw, u8 addr, int *val) 467 + { 468 + u8 data[HTS221_DATA_SIZE]; 469 + int err; 470 + 471 + err = hts221_power_on(hw); 472 + if (err < 0) 473 + return err; 474 + 475 + msleep(50); 476 + 477 + err = hw->tf->read(hw->dev, addr, sizeof(data), data); 478 + if (err < 0) 479 + return err; 480 + 481 + hts221_power_off(hw); 482 + 483 + *val = (s16)get_unaligned_le16(data); 484 + 485 + return IIO_VAL_INT; 486 + } 487 + 488 + static int hts221_read_raw(struct iio_dev *iio_dev, 489 + struct iio_chan_spec const *ch, 490 + int *val, int *val2, long mask) 491 + { 492 + struct hts221_hw *hw = iio_priv(iio_dev); 493 + int ret; 494 + 495 + ret = iio_device_claim_direct_mode(iio_dev); 496 + if (ret) 497 + return ret; 498 + 499 + switch (mask) { 500 + case IIO_CHAN_INFO_RAW: 501 + ret = hts221_read_oneshot(hw, ch->address, val); 502 + break; 503 + case IIO_CHAN_INFO_SCALE: 504 + ret = hts221_get_sensor_scale(hw, ch->type, val, val2); 505 + break; 506 + case IIO_CHAN_INFO_OFFSET: 507 + ret = hts221_get_sensor_offset(hw, ch->type, val, val2); 508 + break; 509 + case IIO_CHAN_INFO_SAMP_FREQ: 510 + *val = hw->odr; 511 + ret = IIO_VAL_INT; 512 + break; 513 + case IIO_CHAN_INFO_OVERSAMPLING_RATIO: { 514 + u8 idx; 515 + const struct hts221_avg *avg; 516 + 517 + switch (ch->type) { 518 + case IIO_HUMIDITYRELATIVE: 519 + avg = &hts221_avg_list[HTS221_SENSOR_H]; 520 + idx = hw->sensors[HTS221_SENSOR_H].cur_avg_idx; 521 + *val = avg->avg_avl[idx].avg; 522 + ret = IIO_VAL_INT; 523 + break; 524 + case IIO_TEMP: 525 + avg = &hts221_avg_list[HTS221_SENSOR_T]; 526 + idx = hw->sensors[HTS221_SENSOR_T].cur_avg_idx; 527 + *val = avg->avg_avl[idx].avg; 528 + ret = IIO_VAL_INT; 529 + break; 530 + default: 531 + ret = -EINVAL; 532 + break; 533 + } 534 + break; 535 + } 536 + default: 537 + ret = -EINVAL; 538 + break; 539 + } 540 + 541 + iio_device_release_direct_mode(iio_dev); 542 + 543 + return ret; 544 + } 545 + 546 + static int hts221_write_raw(struct iio_dev *iio_dev, 547 + struct iio_chan_spec const *chan, 548 + int val, int val2, long mask) 549 + { 550 + struct hts221_hw *hw = iio_priv(iio_dev); 551 + int ret; 552 + 553 + ret = iio_device_claim_direct_mode(iio_dev); 554 + if (ret) 555 + return ret; 556 + 557 + switch (mask) { 558 + case IIO_CHAN_INFO_SAMP_FREQ: 559 + ret = hts221_update_odr(hw, val); 560 + break; 561 + case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 562 + switch (chan->type) { 563 + case IIO_HUMIDITYRELATIVE: 564 + ret = hts221_update_avg(hw, HTS221_SENSOR_H, val); 565 + break; 566 + case IIO_TEMP: 567 + ret = hts221_update_avg(hw, HTS221_SENSOR_T, val); 568 + break; 569 + default: 570 + ret = -EINVAL; 571 + break; 572 + } 573 + break; 574 + default: 575 + ret = -EINVAL; 576 + break; 577 + } 578 + 579 + iio_device_release_direct_mode(iio_dev); 580 + 581 + return ret; 582 + } 583 + 584 + static int hts221_validate_trigger(struct iio_dev *iio_dev, 585 + struct iio_trigger *trig) 586 + { 587 + struct hts221_hw *hw = iio_priv(iio_dev); 588 + 589 + return hw->trig == trig ? 0 : -EINVAL; 590 + } 591 + 592 + static IIO_DEVICE_ATTR(in_humidity_oversampling_ratio_available, S_IRUGO, 593 + hts221_sysfs_rh_oversampling_avail, NULL, 0); 594 + static IIO_DEVICE_ATTR(in_temp_oversampling_ratio_available, S_IRUGO, 595 + hts221_sysfs_temp_oversampling_avail, NULL, 0); 596 + static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(hts221_sysfs_sampling_freq); 597 + 598 + static struct attribute *hts221_attributes[] = { 599 + &iio_dev_attr_sampling_frequency_available.dev_attr.attr, 600 + &iio_dev_attr_in_humidity_oversampling_ratio_available.dev_attr.attr, 601 + &iio_dev_attr_in_temp_oversampling_ratio_available.dev_attr.attr, 602 + NULL, 603 + }; 604 + 605 + static const struct attribute_group hts221_attribute_group = { 606 + .attrs = hts221_attributes, 607 + }; 608 + 609 + static const struct iio_info hts221_info = { 610 + .driver_module = THIS_MODULE, 611 + .attrs = &hts221_attribute_group, 612 + .read_raw = hts221_read_raw, 613 + .write_raw = hts221_write_raw, 614 + .validate_trigger = hts221_validate_trigger, 615 + }; 616 + 617 + static const unsigned long hts221_scan_masks[] = {0x3, 0x0}; 618 + 619 + int hts221_probe(struct iio_dev *iio_dev) 620 + { 621 + struct hts221_hw *hw = iio_priv(iio_dev); 622 + int err; 623 + u8 data; 624 + 625 + mutex_init(&hw->lock); 626 + 627 + err = hts221_check_whoami(hw); 628 + if (err < 0) 629 + return err; 630 + 631 + hw->odr = hts221_odr_table[0].hz; 632 + 633 + iio_dev->modes = INDIO_DIRECT_MODE; 634 + iio_dev->dev.parent = hw->dev; 635 + iio_dev->available_scan_masks = hts221_scan_masks; 636 + iio_dev->channels = hts221_channels; 637 + iio_dev->num_channels = ARRAY_SIZE(hts221_channels); 638 + iio_dev->name = HTS221_DEV_NAME; 639 + iio_dev->info = &hts221_info; 640 + 641 + /* configure humidity sensor */ 642 + err = hts221_parse_rh_caldata(hw); 643 + if (err < 0) { 644 + dev_err(hw->dev, "failed to get rh calibration data\n"); 645 + return err; 646 + } 647 + 648 + data = hts221_avg_list[HTS221_SENSOR_H].avg_avl[3].avg; 649 + err = hts221_update_avg(hw, HTS221_SENSOR_H, data); 650 + if (err < 0) { 651 + dev_err(hw->dev, "failed to set rh oversampling ratio\n"); 652 + return err; 653 + } 654 + 655 + /* configure temperature sensor */ 656 + err = hts221_parse_temp_caldata(hw); 657 + if (err < 0) { 658 + dev_err(hw->dev, 659 + "failed to get temperature calibration data\n"); 660 + return err; 661 + } 662 + 663 + data = hts221_avg_list[HTS221_SENSOR_T].avg_avl[3].avg; 664 + err = hts221_update_avg(hw, HTS221_SENSOR_T, data); 665 + if (err < 0) { 666 + dev_err(hw->dev, 667 + "failed to set temperature oversampling ratio\n"); 668 + return err; 669 + } 670 + 671 + if (hw->irq > 0) { 672 + err = hts221_allocate_buffers(hw); 673 + if (err < 0) 674 + return err; 675 + 676 + err = hts221_allocate_trigger(hw); 677 + if (err) 678 + return err; 679 + } 680 + 681 + return devm_iio_device_register(hw->dev, iio_dev); 682 + } 683 + EXPORT_SYMBOL(hts221_probe); 684 + 685 + MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi@st.com>"); 686 + MODULE_DESCRIPTION("STMicroelectronics hts221 sensor driver"); 687 + MODULE_LICENSE("GPL v2");
+110
drivers/iio/humidity/hts221_i2c.c
··· 1 + /* 2 + * STMicroelectronics hts221 i2c driver 3 + * 4 + * Copyright 2016 STMicroelectronics Inc. 5 + * 6 + * Lorenzo Bianconi <lorenzo.bianconi@st.com> 7 + * 8 + * Licensed under the GPL-2. 9 + */ 10 + 11 + #include <linux/kernel.h> 12 + #include <linux/module.h> 13 + #include <linux/i2c.h> 14 + #include <linux/slab.h> 15 + #include "hts221.h" 16 + 17 + #define I2C_AUTO_INCREMENT 0x80 18 + 19 + static int hts221_i2c_read(struct device *dev, u8 addr, int len, u8 *data) 20 + { 21 + struct i2c_msg msg[2]; 22 + struct i2c_client *client = to_i2c_client(dev); 23 + 24 + if (len > 1) 25 + addr |= I2C_AUTO_INCREMENT; 26 + 27 + msg[0].addr = client->addr; 28 + msg[0].flags = client->flags; 29 + msg[0].len = 1; 30 + msg[0].buf = &addr; 31 + 32 + msg[1].addr = client->addr; 33 + msg[1].flags = client->flags | I2C_M_RD; 34 + msg[1].len = len; 35 + msg[1].buf = data; 36 + 37 + return i2c_transfer(client->adapter, msg, 2); 38 + } 39 + 40 + static int hts221_i2c_write(struct device *dev, u8 addr, int len, u8 *data) 41 + { 42 + u8 send[len + 1]; 43 + struct i2c_msg msg; 44 + struct i2c_client *client = to_i2c_client(dev); 45 + 46 + if (len > 1) 47 + addr |= I2C_AUTO_INCREMENT; 48 + 49 + send[0] = addr; 50 + memcpy(&send[1], data, len * sizeof(u8)); 51 + 52 + msg.addr = client->addr; 53 + msg.flags = client->flags; 54 + msg.len = len + 1; 55 + msg.buf = send; 56 + 57 + return i2c_transfer(client->adapter, &msg, 1); 58 + } 59 + 60 + static const struct hts221_transfer_function hts221_transfer_fn = { 61 + .read = hts221_i2c_read, 62 + .write = hts221_i2c_write, 63 + }; 64 + 65 + static int hts221_i2c_probe(struct i2c_client *client, 66 + const struct i2c_device_id *id) 67 + { 68 + struct hts221_hw *hw; 69 + struct iio_dev *iio_dev; 70 + 71 + iio_dev = devm_iio_device_alloc(&client->dev, sizeof(*hw)); 72 + if (!iio_dev) 73 + return -ENOMEM; 74 + 75 + i2c_set_clientdata(client, iio_dev); 76 + 77 + hw = iio_priv(iio_dev); 78 + hw->name = client->name; 79 + hw->dev = &client->dev; 80 + hw->irq = client->irq; 81 + hw->tf = &hts221_transfer_fn; 82 + 83 + return hts221_probe(iio_dev); 84 + } 85 + 86 + static const struct of_device_id hts221_i2c_of_match[] = { 87 + { .compatible = "st,hts221", }, 88 + {}, 89 + }; 90 + MODULE_DEVICE_TABLE(of, hts221_i2c_of_match); 91 + 92 + static const struct i2c_device_id hts221_i2c_id_table[] = { 93 + { HTS221_DEV_NAME }, 94 + {}, 95 + }; 96 + MODULE_DEVICE_TABLE(i2c, hts221_i2c_id_table); 97 + 98 + static struct i2c_driver hts221_driver = { 99 + .driver = { 100 + .name = "hts221_i2c", 101 + .of_match_table = of_match_ptr(hts221_i2c_of_match), 102 + }, 103 + .probe = hts221_i2c_probe, 104 + .id_table = hts221_i2c_id_table, 105 + }; 106 + module_i2c_driver(hts221_driver); 107 + 108 + MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi@st.com>"); 109 + MODULE_DESCRIPTION("STMicroelectronics hts221 i2c driver"); 110 + MODULE_LICENSE("GPL v2");
+125
drivers/iio/humidity/hts221_spi.c
··· 1 + /* 2 + * STMicroelectronics hts221 spi driver 3 + * 4 + * Copyright 2016 STMicroelectronics Inc. 5 + * 6 + * Lorenzo Bianconi <lorenzo.bianconi@st.com> 7 + * 8 + * Licensed under the GPL-2. 9 + */ 10 + 11 + #include <linux/kernel.h> 12 + #include <linux/module.h> 13 + #include <linux/spi/spi.h> 14 + #include <linux/slab.h> 15 + #include "hts221.h" 16 + 17 + #define SENSORS_SPI_READ 0x80 18 + #define SPI_AUTO_INCREMENT 0x40 19 + 20 + static int hts221_spi_read(struct device *dev, u8 addr, int len, u8 *data) 21 + { 22 + int err; 23 + struct spi_device *spi = to_spi_device(dev); 24 + struct iio_dev *iio_dev = spi_get_drvdata(spi); 25 + struct hts221_hw *hw = iio_priv(iio_dev); 26 + 27 + struct spi_transfer xfers[] = { 28 + { 29 + .tx_buf = hw->tb.tx_buf, 30 + .bits_per_word = 8, 31 + .len = 1, 32 + }, 33 + { 34 + .rx_buf = hw->tb.rx_buf, 35 + .bits_per_word = 8, 36 + .len = len, 37 + } 38 + }; 39 + 40 + if (len > 1) 41 + addr |= SPI_AUTO_INCREMENT; 42 + hw->tb.tx_buf[0] = addr | SENSORS_SPI_READ; 43 + 44 + err = spi_sync_transfer(spi, xfers, ARRAY_SIZE(xfers)); 45 + if (err < 0) 46 + return err; 47 + 48 + memcpy(data, hw->tb.rx_buf, len * sizeof(u8)); 49 + 50 + return len; 51 + } 52 + 53 + static int hts221_spi_write(struct device *dev, u8 addr, int len, u8 *data) 54 + { 55 + struct spi_device *spi = to_spi_device(dev); 56 + struct iio_dev *iio_dev = spi_get_drvdata(spi); 57 + struct hts221_hw *hw = iio_priv(iio_dev); 58 + 59 + struct spi_transfer xfers = { 60 + .tx_buf = hw->tb.tx_buf, 61 + .bits_per_word = 8, 62 + .len = len + 1, 63 + }; 64 + 65 + if (len >= HTS221_TX_MAX_LENGTH) 66 + return -ENOMEM; 67 + 68 + if (len > 1) 69 + addr |= SPI_AUTO_INCREMENT; 70 + hw->tb.tx_buf[0] = addr; 71 + memcpy(&hw->tb.tx_buf[1], data, len); 72 + 73 + return spi_sync_transfer(spi, &xfers, 1); 74 + } 75 + 76 + static const struct hts221_transfer_function hts221_transfer_fn = { 77 + .read = hts221_spi_read, 78 + .write = hts221_spi_write, 79 + }; 80 + 81 + static int hts221_spi_probe(struct spi_device *spi) 82 + { 83 + struct hts221_hw *hw; 84 + struct iio_dev *iio_dev; 85 + 86 + iio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*hw)); 87 + if (!iio_dev) 88 + return -ENOMEM; 89 + 90 + spi_set_drvdata(spi, iio_dev); 91 + 92 + hw = iio_priv(iio_dev); 93 + hw->name = spi->modalias; 94 + hw->dev = &spi->dev; 95 + hw->irq = spi->irq; 96 + hw->tf = &hts221_transfer_fn; 97 + 98 + return hts221_probe(iio_dev); 99 + } 100 + 101 + static const struct of_device_id hts221_spi_of_match[] = { 102 + { .compatible = "st,hts221", }, 103 + {}, 104 + }; 105 + MODULE_DEVICE_TABLE(of, hts221_spi_of_match); 106 + 107 + static const struct spi_device_id hts221_spi_id_table[] = { 108 + { HTS221_DEV_NAME }, 109 + {}, 110 + }; 111 + MODULE_DEVICE_TABLE(spi, hts221_spi_id_table); 112 + 113 + static struct spi_driver hts221_driver = { 114 + .driver = { 115 + .name = "hts221_spi", 116 + .of_match_table = of_match_ptr(hts221_spi_of_match), 117 + }, 118 + .probe = hts221_spi_probe, 119 + .id_table = hts221_spi_id_table, 120 + }; 121 + module_spi_driver(hts221_driver); 122 + 123 + MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi@st.com>"); 124 + MODULE_DESCRIPTION("STMicroelectronics hts221 spi driver"); 125 + MODULE_LICENSE("GPL v2");
+2 -1
drivers/iio/imu/bmi160/bmi160_core.c
··· 398 398 struct iio_poll_func *pf = p; 399 399 struct iio_dev *indio_dev = pf->indio_dev; 400 400 struct bmi160_data *data = iio_priv(indio_dev); 401 - s16 buf[16]; /* 3 sens x 3 axis x s16 + 3 x s16 pad + 4 x s16 tstamp */ 401 + __le16 buf[16]; 402 + /* 3 sens x 3 axis x __le16 + 3 x __le16 pad + 4 x __le16 tstamp */ 402 403 int i, ret, j = 0, base = BMI160_REG_DATA_MAGN_XOUT_L; 403 404 __le16 sample; 404 405
+3 -4
drivers/iio/industrialio-buffer.c
··· 307 307 const unsigned long *mask; 308 308 unsigned long *trialmask; 309 309 310 - trialmask = kmalloc(sizeof(*trialmask)* 311 - BITS_TO_LONGS(indio_dev->masklength), 312 - GFP_KERNEL); 313 - 310 + trialmask = kmalloc_array(BITS_TO_LONGS(indio_dev->masklength), 311 + sizeof(*trialmask), 312 + GFP_KERNEL); 314 313 if (trialmask == NULL) 315 314 return -ENOMEM; 316 315 if (!indio_dev->masklength) {
+2
drivers/iio/industrialio-core.c
··· 81 81 [IIO_PH] = "ph", 82 82 [IIO_UVINDEX] = "uvindex", 83 83 [IIO_ELECTRICALCONDUCTIVITY] = "electricalconductivity", 84 + [IIO_COUNT] = "count", 85 + [IIO_INDEX] = "index", 84 86 }; 85 87 86 88 static const char * const iio_modifier_names[] = {
+21
drivers/iio/industrialio-trigger.c
··· 717 717 } 718 718 EXPORT_SYMBOL(iio_trigger_using_own); 719 719 720 + /** 721 + * iio_trigger_validate_own_device - Check if a trigger and IIO device belong to 722 + * the same device 723 + * @trig: The IIO trigger to check 724 + * @indio_dev: the IIO device to check 725 + * 726 + * This function can be used as the validate_device callback for triggers that 727 + * can only be attached to their own device. 728 + * 729 + * Return: 0 if both the trigger and the IIO device belong to the same 730 + * device, -EINVAL otherwise. 731 + */ 732 + int iio_trigger_validate_own_device(struct iio_trigger *trig, 733 + struct iio_dev *indio_dev) 734 + { 735 + if (indio_dev->dev.parent != trig->dev.parent) 736 + return -EINVAL; 737 + return 0; 738 + } 739 + EXPORT_SYMBOL(iio_trigger_validate_own_device); 740 + 720 741 void iio_device_register_trigger_consumer(struct iio_dev *indio_dev) 721 742 { 722 743 indio_dev->groups[indio_dev->groupcounter++] =
+26 -13
drivers/iio/inkern.c
··· 658 658 } 659 659 EXPORT_SYMBOL_GPL(iio_convert_raw_to_processed); 660 660 661 + static int iio_read_channel_attribute(struct iio_channel *chan, 662 + int *val, int *val2, 663 + enum iio_chan_info_enum attribute) 664 + { 665 + int ret; 666 + 667 + mutex_lock(&chan->indio_dev->info_exist_lock); 668 + if (chan->indio_dev->info == NULL) { 669 + ret = -ENODEV; 670 + goto err_unlock; 671 + } 672 + 673 + ret = iio_channel_read(chan, val, val2, attribute); 674 + err_unlock: 675 + mutex_unlock(&chan->indio_dev->info_exist_lock); 676 + 677 + return ret; 678 + } 679 + 680 + int iio_read_channel_offset(struct iio_channel *chan, int *val, int *val2) 681 + { 682 + return iio_read_channel_attribute(chan, val, val2, IIO_CHAN_INFO_OFFSET); 683 + } 684 + EXPORT_SYMBOL_GPL(iio_read_channel_offset); 685 + 661 686 int iio_read_channel_processed(struct iio_channel *chan, int *val) 662 687 { 663 688 int ret; ··· 712 687 713 688 int iio_read_channel_scale(struct iio_channel *chan, int *val, int *val2) 714 689 { 715 - int ret; 716 - 717 - mutex_lock(&chan->indio_dev->info_exist_lock); 718 - if (chan->indio_dev->info == NULL) { 719 - ret = -ENODEV; 720 - goto err_unlock; 721 - } 722 - 723 - ret = iio_channel_read(chan, val, val2, IIO_CHAN_INFO_SCALE); 724 - err_unlock: 725 - mutex_unlock(&chan->indio_dev->info_exist_lock); 726 - 727 - return ret; 690 + return iio_read_channel_attribute(chan, val, val2, IIO_CHAN_INFO_SCALE); 728 691 } 729 692 EXPORT_SYMBOL_GPL(iio_read_channel_scale); 730 693
+12
drivers/iio/light/Kconfig
··· 140 140 To compile this driver as a module, choose M here: the 141 141 module will be called gp2ap020a00f. 142 142 143 + config SENSORS_ISL29018 144 + tristate "Intersil 29018 light and proximity sensor" 145 + depends on I2C 146 + select REGMAP_I2C 147 + default n 148 + help 149 + If you say yes here you get support for ambient light sensing and 150 + proximity infrared sensing from Intersil ISL29018. 151 + This driver will provide the measurements of ambient light intensity 152 + in lux, proximity infrared sensing and normal infrared sensing. 153 + Data from sensor is accessible via sysfs. 154 + 143 155 config ISL29125 144 156 tristate "Intersil ISL29125 digital color light sensor" 145 157 depends on I2C
+1
drivers/iio/light/Makefile
··· 17 17 obj-$(CONFIG_GP2AP020A00F) += gp2ap020a00f.o 18 18 obj-$(CONFIG_HID_SENSOR_ALS) += hid-sensor-als.o 19 19 obj-$(CONFIG_HID_SENSOR_PROX) += hid-sensor-prox.o 20 + obj-$(CONFIG_SENSORS_ISL29018) += isl29018.o 20 21 obj-$(CONFIG_ISL29125) += isl29125.o 21 22 obj-$(CONFIG_JSA1212) += jsa1212.o 22 23 obj-$(CONFIG_SENSORS_LM3533) += lm3533-als.o
+71 -40
drivers/iio/light/ltr501.c
··· 631 631 632 632 switch (mask) { 633 633 case IIO_CHAN_INFO_PROCESSED: 634 - if (iio_buffer_enabled(indio_dev)) 635 - return -EBUSY; 636 - 637 634 switch (chan->type) { 638 635 case IIO_LIGHT: 636 + ret = iio_device_claim_direct_mode(indio_dev); 637 + if (ret) 638 + return ret; 639 + 639 640 mutex_lock(&data->lock_als); 640 641 ret = ltr501_read_als(data, buf); 641 642 mutex_unlock(&data->lock_als); 643 + iio_device_release_direct_mode(indio_dev); 642 644 if (ret < 0) 643 645 return ret; 644 646 *val = ltr501_calculate_lux(le16_to_cpu(buf[1]), ··· 650 648 return -EINVAL; 651 649 } 652 650 case IIO_CHAN_INFO_RAW: 653 - if (iio_buffer_enabled(indio_dev)) 654 - return -EBUSY; 651 + ret = iio_device_claim_direct_mode(indio_dev); 652 + if (ret) 653 + return ret; 655 654 656 655 switch (chan->type) { 657 656 case IIO_INTENSITY: ··· 660 657 ret = ltr501_read_als(data, buf); 661 658 mutex_unlock(&data->lock_als); 662 659 if (ret < 0) 663 - return ret; 660 + break; 664 661 *val = le16_to_cpu(chan->address == LTR501_ALS_DATA1 ? 665 662 buf[0] : buf[1]); 666 - return IIO_VAL_INT; 663 + ret = IIO_VAL_INT; 664 + break; 667 665 case IIO_PROXIMITY: 668 666 mutex_lock(&data->lock_ps); 669 667 ret = ltr501_read_ps(data); 670 668 mutex_unlock(&data->lock_ps); 671 669 if (ret < 0) 672 - return ret; 670 + break; 673 671 *val = ret & LTR501_PS_DATA_MASK; 674 - return IIO_VAL_INT; 672 + ret = IIO_VAL_INT; 673 + break; 675 674 default: 676 - return -EINVAL; 675 + ret = -EINVAL; 676 + break; 677 677 } 678 + 679 + iio_device_release_direct_mode(indio_dev); 680 + return ret; 681 + 678 682 case IIO_CHAN_INFO_SCALE: 679 683 switch (chan->type) { 680 684 case IIO_INTENSITY: ··· 739 729 int i, ret, freq_val, freq_val2; 740 730 struct ltr501_chip_info *info = data->chip_info; 741 731 742 - if (iio_buffer_enabled(indio_dev)) 743 - return -EBUSY; 732 + ret = iio_device_claim_direct_mode(indio_dev); 733 + if (ret) 734 + return ret; 744 735 745 736 switch (mask) { 746 737 case IIO_CHAN_INFO_SCALE: ··· 750 739 i = ltr501_get_gain_index(info->als_gain, 751 740 info->als_gain_tbl_size, 752 741 val, val2); 753 - if (i < 0) 754 - return -EINVAL; 742 + if (i < 0) { 743 + ret = -EINVAL; 744 + break; 745 + } 755 746 756 747 data->als_contr &= ~info->als_gain_mask; 757 748 data->als_contr |= i << info->als_gain_shift; 758 749 759 - return regmap_write(data->regmap, LTR501_ALS_CONTR, 760 - data->als_contr); 750 + ret = regmap_write(data->regmap, LTR501_ALS_CONTR, 751 + data->als_contr); 752 + break; 761 753 case IIO_PROXIMITY: 762 754 i = ltr501_get_gain_index(info->ps_gain, 763 755 info->ps_gain_tbl_size, 764 756 val, val2); 765 - if (i < 0) 766 - return -EINVAL; 757 + if (i < 0) { 758 + ret = -EINVAL; 759 + break; 760 + } 767 761 data->ps_contr &= ~LTR501_CONTR_PS_GAIN_MASK; 768 762 data->ps_contr |= i << LTR501_CONTR_PS_GAIN_SHIFT; 769 763 770 - return regmap_write(data->regmap, LTR501_PS_CONTR, 771 - data->ps_contr); 764 + ret = regmap_write(data->regmap, LTR501_PS_CONTR, 765 + data->ps_contr); 766 + break; 772 767 default: 773 - return -EINVAL; 768 + ret = -EINVAL; 769 + break; 774 770 } 771 + break; 772 + 775 773 case IIO_CHAN_INFO_INT_TIME: 776 774 switch (chan->type) { 777 775 case IIO_INTENSITY: 778 - if (val != 0) 779 - return -EINVAL; 776 + if (val != 0) { 777 + ret = -EINVAL; 778 + break; 779 + } 780 780 mutex_lock(&data->lock_als); 781 - i = ltr501_set_it_time(data, val2); 781 + ret = ltr501_set_it_time(data, val2); 782 782 mutex_unlock(&data->lock_als); 783 - return i; 783 + break; 784 784 default: 785 - return -EINVAL; 785 + ret = -EINVAL; 786 + break; 786 787 } 788 + break; 789 + 787 790 case IIO_CHAN_INFO_SAMP_FREQ: 788 791 switch (chan->type) { 789 792 case IIO_INTENSITY: 790 793 ret = ltr501_als_read_samp_freq(data, &freq_val, 791 794 &freq_val2); 792 795 if (ret < 0) 793 - return ret; 796 + break; 794 797 795 798 ret = ltr501_als_write_samp_freq(data, val, val2); 796 799 if (ret < 0) 797 - return ret; 800 + break; 798 801 799 802 /* update persistence count when changing frequency */ 800 803 ret = ltr501_write_intr_prst(data, chan->type, 801 804 0, data->als_period); 802 805 803 806 if (ret < 0) 804 - return ltr501_als_write_samp_freq(data, 805 - freq_val, 806 - freq_val2); 807 - return ret; 807 + ret = ltr501_als_write_samp_freq(data, freq_val, 808 + freq_val2); 809 + break; 808 810 case IIO_PROXIMITY: 809 811 ret = ltr501_ps_read_samp_freq(data, &freq_val, 810 812 &freq_val2); 811 813 if (ret < 0) 812 - return ret; 814 + break; 813 815 814 816 ret = ltr501_ps_write_samp_freq(data, val, val2); 815 817 if (ret < 0) 816 - return ret; 818 + break; 817 819 818 820 /* update persistence count when changing frequency */ 819 821 ret = ltr501_write_intr_prst(data, chan->type, 820 822 0, data->ps_period); 821 823 822 824 if (ret < 0) 823 - return ltr501_ps_write_samp_freq(data, 824 - freq_val, 825 - freq_val2); 826 - return ret; 825 + ret = ltr501_ps_write_samp_freq(data, freq_val, 826 + freq_val2); 827 + break; 827 828 default: 828 - return -EINVAL; 829 + ret = -EINVAL; 830 + break; 829 831 } 832 + break; 833 + 834 + default: 835 + ret = -EINVAL; 836 + break; 830 837 } 831 - return -EINVAL; 838 + 839 + iio_device_release_direct_mode(indio_dev); 840 + return ret; 832 841 } 833 842 834 843 static int ltr501_read_thresh(struct iio_dev *indio_dev,
+3 -2
drivers/iio/light/max44000.c
··· 204 204 static int max44000_read_alsval(struct max44000_data *data) 205 205 { 206 206 u16 regval; 207 + __be16 val; 207 208 int alstim, ret; 208 209 209 210 ret = regmap_bulk_read(data->regmap, MAX44000_REG_ALS_DATA_HI, 210 - &regval, sizeof(regval)); 211 + &val, sizeof(val)); 211 212 if (ret < 0) 212 213 return ret; 213 214 alstim = ret = max44000_read_alstim(data); 214 215 if (ret < 0) 215 216 return ret; 216 217 217 - regval = be16_to_cpu(regval); 218 + regval = be16_to_cpu(val); 218 219 219 220 /* 220 221 * Overflow is explained on datasheet page 17.
+4 -4
drivers/iio/magnetometer/ak8974.c
··· 287 287 return 0; 288 288 } 289 289 290 - static int ak8974_getresult(struct ak8974 *ak8974, s16 *result) 290 + static int ak8974_getresult(struct ak8974 *ak8974, __le16 *result) 291 291 { 292 292 unsigned int src; 293 293 int ret; ··· 395 395 static int ak8974_get_u16_val(struct ak8974 *ak8974, u8 reg, u16 *val) 396 396 { 397 397 int ret; 398 - u16 bulk; 398 + __le16 bulk; 399 399 400 400 ret = regmap_bulk_read(ak8974->map, reg, &bulk, 2); 401 401 if (ret) ··· 453 453 long mask) 454 454 { 455 455 struct ak8974 *ak8974 = iio_priv(indio_dev); 456 - s16 hw_values[3]; 456 + __le16 hw_values[3]; 457 457 int ret = -EINVAL; 458 458 459 459 pm_runtime_get_sync(&ak8974->i2c->dev); ··· 494 494 { 495 495 struct ak8974 *ak8974 = iio_priv(indio_dev); 496 496 int ret; 497 - s16 hw_values[8]; /* Three axes + 64bit padding */ 497 + __le16 hw_values[8]; /* Three axes + 64bit padding */ 498 498 499 499 pm_runtime_get_sync(&ak8974->i2c->dev); 500 500 mutex_lock(&ak8974->lock);
+9 -7
drivers/iio/magnetometer/ak8975.c
··· 690 690 struct ak8975_data *data = iio_priv(indio_dev); 691 691 const struct i2c_client *client = data->client; 692 692 const struct ak_def *def = data->def; 693 + __le16 rval; 693 694 u16 buff; 694 695 int ret; 695 696 ··· 704 703 705 704 ret = i2c_smbus_read_i2c_block_data_or_emulated( 706 705 client, def->data_regs[index], 707 - sizeof(buff), (u8*)&buff); 706 + sizeof(rval), (u8*)&rval); 708 707 if (ret < 0) 709 708 goto exit; 710 709 ··· 714 713 pm_runtime_put_autosuspend(&data->client->dev); 715 714 716 715 /* Swap bytes and convert to valid range. */ 717 - buff = le16_to_cpu(buff); 716 + buff = le16_to_cpu(rval); 718 717 *val = clamp_t(s16, buff, -def->range, def->range); 719 718 return IIO_VAL_INT; 720 719 ··· 814 813 const struct ak_def *def = data->def; 815 814 int ret; 816 815 s16 buff[8]; /* 3 x 16 bits axis values + 1 aligned 64 bits timestamp */ 816 + __le16 fval[3]; 817 817 818 818 mutex_lock(&data->lock); 819 819 ··· 828 826 */ 829 827 ret = i2c_smbus_read_i2c_block_data_or_emulated(client, 830 828 def->data_regs[0], 831 - 3 * sizeof(buff[0]), 832 - (u8 *)buff); 829 + 3 * sizeof(fval[0]), 830 + (u8 *)fval); 833 831 if (ret < 0) 834 832 goto unlock; 835 833 836 834 mutex_unlock(&data->lock); 837 835 838 836 /* Clamp to valid range. */ 839 - buff[0] = clamp_t(s16, le16_to_cpu(buff[0]), -def->range, def->range); 840 - buff[1] = clamp_t(s16, le16_to_cpu(buff[1]), -def->range, def->range); 841 - buff[2] = clamp_t(s16, le16_to_cpu(buff[2]), -def->range, def->range); 837 + buff[0] = clamp_t(s16, le16_to_cpu(fval[0]), -def->range, def->range); 838 + buff[1] = clamp_t(s16, le16_to_cpu(fval[1]), -def->range, def->range); 839 + buff[2] = clamp_t(s16, le16_to_cpu(fval[2]), -def->range, def->range); 842 840 843 841 iio_push_to_buffers_with_timestamp(indio_dev, buff, 844 842 iio_get_time_ns(indio_dev));
+22
drivers/iio/potentiostat/Kconfig
··· 1 + # 2 + # Potentiostat drivers 3 + # 4 + # When adding new entries keep the list in alphabetical order 5 + 6 + menu "Digital potentiostats" 7 + 8 + config LMP91000 9 + tristate "Texas Instruments LMP91000 potentiostat driver" 10 + depends on I2C 11 + select REGMAP_I2C 12 + select IIO_BUFFER 13 + select IIO_BUFFER_CB 14 + select IIO_TRIGGERED_BUFFER 15 + help 16 + Say yes here to build support for the Texas Instruments 17 + LMP91000 digital potentiostat chip. 18 + 19 + To compile this driver as a module, choose M here: the 20 + module will be called lmp91000 21 + 22 + endmenu
+6
drivers/iio/potentiostat/Makefile
··· 1 + # 2 + # Makefile for industrial I/O potentiostat drivers 3 + # 4 + 5 + # When adding new entries keep the list in alphabetical order 6 + obj-$(CONFIG_LMP91000) += lmp91000.o
+446
drivers/iio/potentiostat/lmp91000.c
··· 1 + /* 2 + * lmp91000.c - Support for Texas Instruments digital potentiostats 3 + * 4 + * Copyright (C) 2016 Matt Ranostay <mranostay@gmail.com> 5 + * 6 + * This program is free software; you can redistribute it and/or modify 7 + * it under the terms of the GNU General Public License as published by 8 + * the Free Software Foundation; either version 2 of the License, or 9 + * (at your option) any later version. 10 + * 11 + * This program is distributed in the hope that it will be useful, 12 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 + * GNU General Public License for more details. 15 + * 16 + * TODO: bias voltage + polarity control, and multiple chip support 17 + */ 18 + 19 + #include <linux/module.h> 20 + #include <linux/i2c.h> 21 + #include <linux/delay.h> 22 + #include <linux/of.h> 23 + #include <linux/regmap.h> 24 + #include <linux/iio/iio.h> 25 + #include <linux/iio/buffer.h> 26 + #include <linux/iio/consumer.h> 27 + #include <linux/iio/trigger.h> 28 + #include <linux/iio/trigger_consumer.h> 29 + #include <linux/iio/triggered_buffer.h> 30 + 31 + #define LMP91000_REG_LOCK 0x01 32 + #define LMP91000_REG_TIACN 0x10 33 + #define LMP91000_REG_TIACN_GAIN_SHIFT 2 34 + 35 + #define LMP91000_REG_REFCN 0x11 36 + #define LMP91000_REG_REFCN_EXT_REF 0x20 37 + #define LMP91000_REG_REFCN_50_ZERO 0x80 38 + 39 + #define LMP91000_REG_MODECN 0x12 40 + #define LMP91000_REG_MODECN_3LEAD 0x03 41 + #define LMP91000_REG_MODECN_TEMP 0x07 42 + 43 + #define LMP91000_DRV_NAME "lmp91000" 44 + 45 + static const int lmp91000_tia_gain[] = { 0, 2750, 3500, 7000, 14000, 35000, 46 + 120000, 350000 }; 47 + 48 + static const int lmp91000_rload[] = { 10, 33, 50, 100 }; 49 + 50 + #define LMP91000_TEMP_BASE -40 51 + 52 + static const u16 lmp91000_temp_lut[] = { 53 + 1875, 1867, 1860, 1852, 1844, 1836, 1828, 1821, 1813, 1805, 54 + 1797, 1789, 1782, 1774, 1766, 1758, 1750, 1742, 1734, 1727, 55 + 1719, 1711, 1703, 1695, 1687, 1679, 1671, 1663, 1656, 1648, 56 + 1640, 1632, 1624, 1616, 1608, 1600, 1592, 1584, 1576, 1568, 57 + 1560, 1552, 1544, 1536, 1528, 1520, 1512, 1504, 1496, 1488, 58 + 1480, 1472, 1464, 1456, 1448, 1440, 1432, 1424, 1415, 1407, 59 + 1399, 1391, 1383, 1375, 1367, 1359, 1351, 1342, 1334, 1326, 60 + 1318, 1310, 1302, 1293, 1285, 1277, 1269, 1261, 1253, 1244, 61 + 1236, 1228, 1220, 1212, 1203, 1195, 1187, 1179, 1170, 1162, 62 + 1154, 1146, 1137, 1129, 1121, 1112, 1104, 1096, 1087, 1079, 63 + 1071, 1063, 1054, 1046, 1038, 1029, 1021, 1012, 1004, 996, 64 + 987, 979, 971, 962, 954, 945, 937, 929, 920, 912, 65 + 903, 895, 886, 878, 870, 861 }; 66 + 67 + static const struct regmap_config lmp91000_regmap_config = { 68 + .reg_bits = 8, 69 + .val_bits = 8, 70 + }; 71 + 72 + struct lmp91000_data { 73 + struct regmap *regmap; 74 + struct device *dev; 75 + 76 + struct iio_trigger *trig; 77 + struct iio_cb_buffer *cb_buffer; 78 + struct iio_channel *adc_chan; 79 + 80 + struct completion completion; 81 + u8 chan_select; 82 + 83 + u32 buffer[4]; /* 64-bit data + 64-bit timestamp */ 84 + }; 85 + 86 + static const struct iio_chan_spec lmp91000_channels[] = { 87 + { /* chemical channel mV */ 88 + .type = IIO_VOLTAGE, 89 + .channel = 0, 90 + .address = LMP91000_REG_MODECN_3LEAD, 91 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 92 + BIT(IIO_CHAN_INFO_OFFSET) | 93 + BIT(IIO_CHAN_INFO_SCALE), 94 + .scan_index = 0, 95 + .scan_type = { 96 + .sign = 's', 97 + .realbits = 32, 98 + .storagebits = 32, 99 + }, 100 + }, 101 + IIO_CHAN_SOFT_TIMESTAMP(1), 102 + { /* temperature channel mV */ 103 + .type = IIO_TEMP, 104 + .channel = 1, 105 + .address = LMP91000_REG_MODECN_TEMP, 106 + .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), 107 + .scan_index = -1, 108 + }, 109 + }; 110 + 111 + static int lmp91000_read(struct lmp91000_data *data, int channel, int *val) 112 + { 113 + int state, ret; 114 + 115 + ret = regmap_read(data->regmap, LMP91000_REG_MODECN, &state); 116 + if (ret) 117 + return -EINVAL; 118 + 119 + ret = regmap_write(data->regmap, LMP91000_REG_MODECN, channel); 120 + if (ret) 121 + return -EINVAL; 122 + 123 + /* delay till first temperature reading is complete */ 124 + if ((state != channel) && (channel == LMP91000_REG_MODECN_TEMP)) 125 + usleep_range(3000, 4000); 126 + 127 + data->chan_select = channel != LMP91000_REG_MODECN_3LEAD; 128 + 129 + iio_trigger_poll_chained(data->trig); 130 + 131 + ret = wait_for_completion_timeout(&data->completion, HZ); 132 + reinit_completion(&data->completion); 133 + 134 + if (!ret) 135 + return -ETIMEDOUT; 136 + 137 + *val = data->buffer[data->chan_select]; 138 + 139 + return 0; 140 + } 141 + 142 + static irqreturn_t lmp91000_buffer_handler(int irq, void *private) 143 + { 144 + struct iio_poll_func *pf = private; 145 + struct iio_dev *indio_dev = pf->indio_dev; 146 + struct lmp91000_data *data = iio_priv(indio_dev); 147 + int ret, val; 148 + 149 + memset(data->buffer, 0, sizeof(data->buffer)); 150 + 151 + ret = lmp91000_read(data, LMP91000_REG_MODECN_3LEAD, &val); 152 + if (!ret) { 153 + data->buffer[0] = val; 154 + iio_push_to_buffers_with_timestamp(indio_dev, data->buffer, 155 + iio_get_time_ns(indio_dev)); 156 + } 157 + 158 + iio_trigger_notify_done(indio_dev->trig); 159 + 160 + return IRQ_HANDLED; 161 + } 162 + 163 + static int lmp91000_read_raw(struct iio_dev *indio_dev, 164 + struct iio_chan_spec const *chan, 165 + int *val, int *val2, long mask) 166 + { 167 + struct lmp91000_data *data = iio_priv(indio_dev); 168 + 169 + switch (mask) { 170 + case IIO_CHAN_INFO_RAW: 171 + case IIO_CHAN_INFO_PROCESSED: { 172 + int ret = iio_channel_start_all_cb(data->cb_buffer); 173 + 174 + if (ret) 175 + return ret; 176 + 177 + ret = lmp91000_read(data, chan->address, val); 178 + 179 + iio_channel_stop_all_cb(data->cb_buffer); 180 + 181 + if (ret) 182 + return ret; 183 + 184 + if (mask == IIO_CHAN_INFO_PROCESSED) { 185 + int tmp, i; 186 + 187 + ret = iio_convert_raw_to_processed(data->adc_chan, 188 + *val, &tmp, 1); 189 + if (ret) 190 + return ret; 191 + 192 + for (i = 0; i < ARRAY_SIZE(lmp91000_temp_lut); i++) 193 + if (lmp91000_temp_lut[i] < tmp) 194 + break; 195 + 196 + *val = (LMP91000_TEMP_BASE + i) * 1000; 197 + } 198 + return IIO_VAL_INT; 199 + } 200 + case IIO_CHAN_INFO_OFFSET: 201 + return iio_read_channel_offset(data->adc_chan, val, val2); 202 + case IIO_CHAN_INFO_SCALE: 203 + return iio_read_channel_scale(data->adc_chan, val, val2); 204 + } 205 + 206 + return -EINVAL; 207 + } 208 + 209 + static const struct iio_info lmp91000_info = { 210 + .driver_module = THIS_MODULE, 211 + .read_raw = lmp91000_read_raw, 212 + }; 213 + 214 + static int lmp91000_read_config(struct lmp91000_data *data) 215 + { 216 + struct device *dev = data->dev; 217 + struct device_node *np = dev->of_node; 218 + unsigned int reg, val; 219 + int i, ret; 220 + 221 + ret = of_property_read_u32(np, "ti,tia-gain-ohm", &val); 222 + if (ret) { 223 + if (of_property_read_bool(np, "ti,external-tia-resistor")) 224 + val = 0; 225 + else { 226 + dev_err(dev, "no ti,tia-gain-ohm defined"); 227 + return ret; 228 + } 229 + } 230 + 231 + ret = -EINVAL; 232 + for (i = 0; i < ARRAY_SIZE(lmp91000_tia_gain); i++) { 233 + if (lmp91000_tia_gain[i] == val) { 234 + reg = i << LMP91000_REG_TIACN_GAIN_SHIFT; 235 + ret = 0; 236 + break; 237 + } 238 + } 239 + 240 + if (ret) { 241 + dev_err(dev, "invalid ti,tia-gain-ohm %d\n", val); 242 + return ret; 243 + } 244 + 245 + ret = of_property_read_u32(np, "ti,rload-ohm", &val); 246 + if (ret) { 247 + val = 100; 248 + dev_info(dev, "no ti,rload-ohm defined, default to %d\n", val); 249 + } 250 + 251 + ret = -EINVAL; 252 + for (i = 0; i < ARRAY_SIZE(lmp91000_rload); i++) { 253 + if (lmp91000_rload[i] == val) { 254 + reg |= i; 255 + ret = 0; 256 + break; 257 + } 258 + } 259 + 260 + if (ret) { 261 + dev_err(dev, "invalid ti,rload-ohm %d\n", val); 262 + return ret; 263 + } 264 + 265 + regmap_write(data->regmap, LMP91000_REG_LOCK, 0); 266 + regmap_write(data->regmap, LMP91000_REG_TIACN, reg); 267 + regmap_write(data->regmap, LMP91000_REG_REFCN, LMP91000_REG_REFCN_EXT_REF 268 + | LMP91000_REG_REFCN_50_ZERO); 269 + regmap_write(data->regmap, LMP91000_REG_LOCK, 1); 270 + 271 + return 0; 272 + } 273 + 274 + static int lmp91000_buffer_cb(const void *val, void *private) 275 + { 276 + struct iio_dev *indio_dev = private; 277 + struct lmp91000_data *data = iio_priv(indio_dev); 278 + 279 + data->buffer[data->chan_select] = *((int *)val); 280 + complete_all(&data->completion); 281 + 282 + return 0; 283 + } 284 + 285 + static const struct iio_trigger_ops lmp91000_trigger_ops = { 286 + .owner = THIS_MODULE, 287 + }; 288 + 289 + 290 + static int lmp91000_buffer_preenable(struct iio_dev *indio_dev) 291 + { 292 + struct lmp91000_data *data = iio_priv(indio_dev); 293 + 294 + return iio_channel_start_all_cb(data->cb_buffer); 295 + } 296 + 297 + static int lmp91000_buffer_predisable(struct iio_dev *indio_dev) 298 + { 299 + struct lmp91000_data *data = iio_priv(indio_dev); 300 + 301 + iio_channel_stop_all_cb(data->cb_buffer); 302 + 303 + return 0; 304 + } 305 + 306 + static const struct iio_buffer_setup_ops lmp91000_buffer_setup_ops = { 307 + .preenable = lmp91000_buffer_preenable, 308 + .postenable = iio_triggered_buffer_postenable, 309 + .predisable = lmp91000_buffer_predisable, 310 + }; 311 + 312 + static int lmp91000_probe(struct i2c_client *client, 313 + const struct i2c_device_id *id) 314 + { 315 + struct device *dev = &client->dev; 316 + struct lmp91000_data *data; 317 + struct iio_dev *indio_dev; 318 + int ret; 319 + 320 + indio_dev = devm_iio_device_alloc(dev, sizeof(*data)); 321 + if (!indio_dev) 322 + return -ENOMEM; 323 + 324 + indio_dev->info = &lmp91000_info; 325 + indio_dev->channels = lmp91000_channels; 326 + indio_dev->num_channels = ARRAY_SIZE(lmp91000_channels); 327 + indio_dev->name = LMP91000_DRV_NAME; 328 + indio_dev->modes = INDIO_DIRECT_MODE; 329 + i2c_set_clientdata(client, indio_dev); 330 + 331 + data = iio_priv(indio_dev); 332 + data->dev = dev; 333 + data->regmap = devm_regmap_init_i2c(client, &lmp91000_regmap_config); 334 + if (IS_ERR(data->regmap)) { 335 + dev_err(dev, "regmap initialization failed.\n"); 336 + return PTR_ERR(data->regmap); 337 + } 338 + 339 + data->trig = devm_iio_trigger_alloc(data->dev, "%s-mux%d", 340 + indio_dev->name, indio_dev->id); 341 + if (!data->trig) { 342 + dev_err(dev, "cannot allocate iio trigger.\n"); 343 + return -ENOMEM; 344 + } 345 + 346 + data->trig->ops = &lmp91000_trigger_ops; 347 + data->trig->dev.parent = dev; 348 + init_completion(&data->completion); 349 + 350 + ret = lmp91000_read_config(data); 351 + if (ret) 352 + return ret; 353 + 354 + ret = iio_trigger_set_immutable(iio_channel_cb_get_iio_dev(data->cb_buffer), 355 + data->trig); 356 + if (ret) { 357 + dev_err(dev, "cannot set immutable trigger.\n"); 358 + return ret; 359 + } 360 + 361 + ret = iio_trigger_register(data->trig); 362 + if (ret) { 363 + dev_err(dev, "cannot register iio trigger.\n"); 364 + return ret; 365 + } 366 + 367 + ret = iio_triggered_buffer_setup(indio_dev, NULL, 368 + &lmp91000_buffer_handler, 369 + &lmp91000_buffer_setup_ops); 370 + if (ret) 371 + goto error_unreg_trigger; 372 + 373 + data->cb_buffer = iio_channel_get_all_cb(dev, &lmp91000_buffer_cb, 374 + indio_dev); 375 + 376 + if (IS_ERR(data->cb_buffer)) { 377 + if (PTR_ERR(data->cb_buffer) == -ENODEV) 378 + ret = -EPROBE_DEFER; 379 + else 380 + ret = PTR_ERR(data->cb_buffer); 381 + 382 + goto error_unreg_buffer; 383 + } 384 + 385 + data->adc_chan = iio_channel_cb_get_channels(data->cb_buffer); 386 + 387 + ret = iio_device_register(indio_dev); 388 + if (ret) 389 + goto error_unreg_cb_buffer; 390 + 391 + return 0; 392 + 393 + error_unreg_cb_buffer: 394 + iio_channel_release_all_cb(data->cb_buffer); 395 + 396 + error_unreg_buffer: 397 + iio_triggered_buffer_cleanup(indio_dev); 398 + 399 + error_unreg_trigger: 400 + iio_trigger_unregister(data->trig); 401 + 402 + return ret; 403 + } 404 + 405 + static int lmp91000_remove(struct i2c_client *client) 406 + { 407 + struct iio_dev *indio_dev = i2c_get_clientdata(client); 408 + struct lmp91000_data *data = iio_priv(indio_dev); 409 + 410 + iio_device_unregister(indio_dev); 411 + 412 + iio_channel_stop_all_cb(data->cb_buffer); 413 + iio_channel_release_all_cb(data->cb_buffer); 414 + 415 + iio_triggered_buffer_cleanup(indio_dev); 416 + iio_trigger_unregister(data->trig); 417 + 418 + return 0; 419 + } 420 + 421 + static const struct of_device_id lmp91000_of_match[] = { 422 + { .compatible = "ti,lmp91000", }, 423 + { }, 424 + }; 425 + MODULE_DEVICE_TABLE(of, lmp91000_of_match); 426 + 427 + static const struct i2c_device_id lmp91000_id[] = { 428 + { "lmp91000", 0 }, 429 + {} 430 + }; 431 + MODULE_DEVICE_TABLE(i2c, lmp91000_id); 432 + 433 + static struct i2c_driver lmp91000_driver = { 434 + .driver = { 435 + .name = LMP91000_DRV_NAME, 436 + .of_match_table = of_match_ptr(lmp91000_of_match), 437 + }, 438 + .probe = lmp91000_probe, 439 + .remove = lmp91000_remove, 440 + .id_table = lmp91000_id, 441 + }; 442 + module_i2c_driver(lmp91000_driver); 443 + 444 + MODULE_AUTHOR("Matt Ranostay <mranostay@gmail.com>"); 445 + MODULE_DESCRIPTION("LMP91000 digital potentiostat"); 446 + MODULE_LICENSE("GPL");
+10
drivers/iio/pressure/Kconfig
··· 5 5 6 6 menu "Pressure sensors" 7 7 8 + config ABP060MG 9 + tristate "Honeywell ABP pressure sensor driver" 10 + depends on I2C 11 + help 12 + Say yes here to build support for the Honeywell ABP pressure 13 + sensors. 14 + 15 + To compile this driver as a module, choose M here: the module 16 + will be called abp060mg. 17 + 8 18 config BMP280 9 19 tristate "Bosch Sensortec BMP180/BMP280 pressure sensor I2C driver" 10 20 depends on (I2C || SPI_MASTER)
+1
drivers/iio/pressure/Makefile
··· 3 3 # 4 4 5 5 # When adding new entries keep the list in alphabetical order 6 + obj-$(CONFIG_ABP060MG) += abp060mg.o 6 7 obj-$(CONFIG_BMP280) += bmp280.o 7 8 bmp280-objs := bmp280-core.o bmp280-regmap.o 8 9 obj-$(CONFIG_BMP280_I2C) += bmp280-i2c.o
+276
drivers/iio/pressure/abp060mg.c
··· 1 + /* 2 + * Copyright (C) 2016 - Marcin Malagowski <mrc@bourne.st> 3 + * 4 + * This program is free software; you can redistribute it and/or modify 5 + * it under the terms of the GNU General Public License as published by 6 + * the Free Software Foundation; either version 2 of the License, or 7 + * (at your option) any later version. 8 + * 9 + * This program is distributed in the hope that it will be useful, 10 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 + * GNU General Public License for more details. 13 + */ 14 + #include <linux/delay.h> 15 + #include <linux/device.h> 16 + #include <linux/err.h> 17 + #include <linux/i2c.h> 18 + #include <linux/io.h> 19 + #include <linux/kernel.h> 20 + #include <linux/module.h> 21 + #include <linux/iio/iio.h> 22 + 23 + #define ABP060MG_ERROR_MASK 0xC000 24 + #define ABP060MG_RESP_TIME_MS 40 25 + #define ABP060MG_MIN_COUNTS 1638 /* = 0x0666 (10% of u14) */ 26 + #define ABP060MG_MAX_COUNTS 14745 /* = 0x3999 (90% of u14) */ 27 + #define ABP060MG_NUM_COUNTS (ABP060MG_MAX_COUNTS - ABP060MG_MIN_COUNTS) 28 + 29 + enum abp_variant { 30 + /* gage [kPa] */ 31 + ABP006KG, ABP010KG, ABP016KG, ABP025KG, ABP040KG, ABP060KG, ABP100KG, 32 + ABP160KG, ABP250KG, ABP400KG, ABP600KG, ABP001GG, 33 + /* differential [kPa] */ 34 + ABP006KD, ABP010KD, ABP016KD, ABP025KD, ABP040KD, ABP060KD, ABP100KD, 35 + ABP160KD, ABP250KD, ABP400KD, 36 + /* gage [psi] */ 37 + ABP001PG, ABP005PG, ABP015PG, ABP030PG, ABP060PG, ABP100PG, ABP150PG, 38 + /* differential [psi] */ 39 + ABP001PD, ABP005PD, ABP015PD, ABP030PD, ABP060PD, 40 + }; 41 + 42 + struct abp_config { 43 + int min; 44 + int max; 45 + }; 46 + 47 + static struct abp_config abp_config[] = { 48 + /* mbar & kPa variants */ 49 + [ABP006KG] = { .min = 0, .max = 6000 }, 50 + [ABP010KG] = { .min = 0, .max = 10000 }, 51 + [ABP016KG] = { .min = 0, .max = 16000 }, 52 + [ABP025KG] = { .min = 0, .max = 25000 }, 53 + [ABP040KG] = { .min = 0, .max = 40000 }, 54 + [ABP060KG] = { .min = 0, .max = 60000 }, 55 + [ABP100KG] = { .min = 0, .max = 100000 }, 56 + [ABP160KG] = { .min = 0, .max = 160000 }, 57 + [ABP250KG] = { .min = 0, .max = 250000 }, 58 + [ABP400KG] = { .min = 0, .max = 400000 }, 59 + [ABP600KG] = { .min = 0, .max = 600000 }, 60 + [ABP001GG] = { .min = 0, .max = 1000000 }, 61 + [ABP006KD] = { .min = -6000, .max = 6000 }, 62 + [ABP010KD] = { .min = -10000, .max = 10000 }, 63 + [ABP016KD] = { .min = -16000, .max = 16000 }, 64 + [ABP025KD] = { .min = -25000, .max = 25000 }, 65 + [ABP040KD] = { .min = -40000, .max = 40000 }, 66 + [ABP060KD] = { .min = -60000, .max = 60000 }, 67 + [ABP100KD] = { .min = -100000, .max = 100000 }, 68 + [ABP160KD] = { .min = -160000, .max = 160000 }, 69 + [ABP250KD] = { .min = -250000, .max = 250000 }, 70 + [ABP400KD] = { .min = -400000, .max = 400000 }, 71 + /* psi variants (1 psi ~ 6895 Pa) */ 72 + [ABP001PG] = { .min = 0, .max = 6985 }, 73 + [ABP005PG] = { .min = 0, .max = 34474 }, 74 + [ABP015PG] = { .min = 0, .max = 103421 }, 75 + [ABP030PG] = { .min = 0, .max = 206843 }, 76 + [ABP060PG] = { .min = 0, .max = 413686 }, 77 + [ABP100PG] = { .min = 0, .max = 689476 }, 78 + [ABP150PG] = { .min = 0, .max = 1034214 }, 79 + [ABP001PD] = { .min = -6895, .max = 6895 }, 80 + [ABP005PD] = { .min = -34474, .max = 34474 }, 81 + [ABP015PD] = { .min = -103421, .max = 103421 }, 82 + [ABP030PD] = { .min = -206843, .max = 206843 }, 83 + [ABP060PD] = { .min = -413686, .max = 413686 }, 84 + }; 85 + 86 + struct abp_state { 87 + struct i2c_client *client; 88 + struct mutex lock; 89 + 90 + /* 91 + * bus-dependent MEASURE_REQUEST length. 92 + * If no SMBUS_QUICK support, need to send dummy byte 93 + */ 94 + int mreq_len; 95 + 96 + /* model-dependent values (calculated on probe) */ 97 + int scale; 98 + int offset; 99 + }; 100 + 101 + static const struct iio_chan_spec abp060mg_channels[] = { 102 + { 103 + .type = IIO_PRESSURE, 104 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 105 + BIT(IIO_CHAN_INFO_OFFSET) | BIT(IIO_CHAN_INFO_SCALE), 106 + }, 107 + }; 108 + 109 + static int abp060mg_get_measurement(struct abp_state *state, int *val) 110 + { 111 + struct i2c_client *client = state->client; 112 + __be16 buf[2]; 113 + u16 pressure; 114 + int ret; 115 + 116 + buf[0] = 0; 117 + ret = i2c_master_send(client, (u8 *)&buf, state->mreq_len); 118 + if (ret < 0) 119 + return ret; 120 + 121 + msleep_interruptible(ABP060MG_RESP_TIME_MS); 122 + 123 + ret = i2c_master_recv(client, (u8 *)&buf, sizeof(buf)); 124 + if (ret < 0) 125 + return ret; 126 + 127 + pressure = be16_to_cpu(buf[0]); 128 + if (pressure & ABP060MG_ERROR_MASK) 129 + return -EIO; 130 + 131 + if (pressure < ABP060MG_MIN_COUNTS || pressure > ABP060MG_MAX_COUNTS) 132 + return -EIO; 133 + 134 + *val = pressure; 135 + 136 + return IIO_VAL_INT; 137 + } 138 + 139 + static int abp060mg_read_raw(struct iio_dev *indio_dev, 140 + struct iio_chan_spec const *chan, int *val, 141 + int *val2, long mask) 142 + { 143 + struct abp_state *state = iio_priv(indio_dev); 144 + int ret; 145 + 146 + mutex_lock(&state->lock); 147 + 148 + switch (mask) { 149 + case IIO_CHAN_INFO_RAW: 150 + ret = abp060mg_get_measurement(state, val); 151 + break; 152 + case IIO_CHAN_INFO_OFFSET: 153 + *val = state->offset; 154 + ret = IIO_VAL_INT; 155 + break; 156 + case IIO_CHAN_INFO_SCALE: 157 + *val = state->scale; 158 + *val2 = ABP060MG_NUM_COUNTS * 1000; /* to kPa */ 159 + ret = IIO_VAL_FRACTIONAL; 160 + break; 161 + default: 162 + ret = -EINVAL; 163 + break; 164 + } 165 + 166 + mutex_unlock(&state->lock); 167 + return ret; 168 + } 169 + 170 + static const struct iio_info abp060mg_info = { 171 + .driver_module = THIS_MODULE, 172 + .read_raw = abp060mg_read_raw, 173 + }; 174 + 175 + static void abp060mg_init_device(struct iio_dev *indio_dev, unsigned long id) 176 + { 177 + struct abp_state *state = iio_priv(indio_dev); 178 + struct abp_config *cfg = &abp_config[id]; 179 + 180 + state->scale = cfg->max - cfg->min; 181 + state->offset = -ABP060MG_MIN_COUNTS; 182 + 183 + if (cfg->min < 0) /* differential */ 184 + state->offset -= ABP060MG_NUM_COUNTS >> 1; 185 + } 186 + 187 + static int abp060mg_probe(struct i2c_client *client, 188 + const struct i2c_device_id *id) 189 + { 190 + struct iio_dev *indio_dev; 191 + struct abp_state *state; 192 + unsigned long cfg_id = id->driver_data; 193 + 194 + indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*state)); 195 + if (!indio_dev) 196 + return -ENOMEM; 197 + 198 + state = iio_priv(indio_dev); 199 + i2c_set_clientdata(client, state); 200 + state->client = client; 201 + 202 + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_QUICK)) 203 + state->mreq_len = 1; 204 + 205 + abp060mg_init_device(indio_dev, cfg_id); 206 + 207 + indio_dev->dev.parent = &client->dev; 208 + indio_dev->name = dev_name(&client->dev); 209 + indio_dev->modes = INDIO_DIRECT_MODE; 210 + indio_dev->info = &abp060mg_info; 211 + 212 + indio_dev->channels = abp060mg_channels; 213 + indio_dev->num_channels = ARRAY_SIZE(abp060mg_channels); 214 + 215 + mutex_init(&state->lock); 216 + 217 + return devm_iio_device_register(&client->dev, indio_dev); 218 + } 219 + 220 + static const struct i2c_device_id abp060mg_id_table[] = { 221 + /* mbar & kPa variants (abp060m [60 mbar] == abp006k [6 kPa]) */ 222 + /* gage: */ 223 + { "abp060mg", ABP006KG }, { "abp006kg", ABP006KG }, 224 + { "abp100mg", ABP010KG }, { "abp010kg", ABP010KG }, 225 + { "abp160mg", ABP016KG }, { "abp016kg", ABP016KG }, 226 + { "abp250mg", ABP025KG }, { "abp025kg", ABP025KG }, 227 + { "abp400mg", ABP040KG }, { "abp040kg", ABP040KG }, 228 + { "abp600mg", ABP060KG }, { "abp060kg", ABP060KG }, 229 + { "abp001bg", ABP100KG }, { "abp100kg", ABP100KG }, 230 + { "abp1_6bg", ABP160KG }, { "abp160kg", ABP160KG }, 231 + { "abp2_5bg", ABP250KG }, { "abp250kg", ABP250KG }, 232 + { "abp004bg", ABP400KG }, { "abp400kg", ABP400KG }, 233 + { "abp006bg", ABP600KG }, { "abp600kg", ABP600KG }, 234 + { "abp010bg", ABP001GG }, { "abp001gg", ABP001GG }, 235 + /* differential: */ 236 + { "abp060md", ABP006KD }, { "abp006kd", ABP006KD }, 237 + { "abp100md", ABP010KD }, { "abp010kd", ABP010KD }, 238 + { "abp160md", ABP016KD }, { "abp016kd", ABP016KD }, 239 + { "abp250md", ABP025KD }, { "abp025kd", ABP025KD }, 240 + { "abp400md", ABP040KD }, { "abp040kd", ABP040KD }, 241 + { "abp600md", ABP060KD }, { "abp060kd", ABP060KD }, 242 + { "abp001bd", ABP100KD }, { "abp100kd", ABP100KD }, 243 + { "abp1_6bd", ABP160KD }, { "abp160kd", ABP160KD }, 244 + { "abp2_5bd", ABP250KD }, { "abp250kd", ABP250KD }, 245 + { "abp004bd", ABP400KD }, { "abp400kd", ABP400KD }, 246 + /* psi variants */ 247 + /* gage: */ 248 + { "abp001pg", ABP001PG }, 249 + { "abp005pg", ABP005PG }, 250 + { "abp015pg", ABP015PG }, 251 + { "abp030pg", ABP030PG }, 252 + { "abp060pg", ABP060PG }, 253 + { "abp100pg", ABP100PG }, 254 + { "abp150pg", ABP150PG }, 255 + /* differential: */ 256 + { "abp001pd", ABP001PD }, 257 + { "abp005pd", ABP005PD }, 258 + { "abp015pd", ABP015PD }, 259 + { "abp030pd", ABP030PD }, 260 + { "abp060pd", ABP060PD }, 261 + { /* empty */ }, 262 + }; 263 + MODULE_DEVICE_TABLE(i2c, abp060mg_id_table); 264 + 265 + static struct i2c_driver abp060mg_driver = { 266 + .driver = { 267 + .name = "abp060mg", 268 + }, 269 + .probe = abp060mg_probe, 270 + .id_table = abp060mg_id_table, 271 + }; 272 + module_i2c_driver(abp060mg_driver); 273 + 274 + MODULE_AUTHOR("Marcin Malagowski <mrc@bourne.st>"); 275 + MODULE_DESCRIPTION("Honeywell ABP pressure sensor driver"); 276 + MODULE_LICENSE("GPL");
+17 -9
drivers/iio/pressure/mpl3115.c
··· 82 82 83 83 switch (mask) { 84 84 case IIO_CHAN_INFO_RAW: 85 - if (iio_buffer_enabled(indio_dev)) 86 - return -EBUSY; 85 + ret = iio_device_claim_direct_mode(indio_dev); 86 + if (ret) 87 + return ret; 87 88 88 89 switch (chan->type) { 89 90 case IIO_PRESSURE: /* in 0.25 pascal / LSB */ ··· 92 91 ret = mpl3115_request(data); 93 92 if (ret < 0) { 94 93 mutex_unlock(&data->lock); 95 - return ret; 94 + break; 96 95 } 97 96 ret = i2c_smbus_read_i2c_block_data(data->client, 98 97 MPL3115_OUT_PRESS, 3, (u8 *) &tmp); 99 98 mutex_unlock(&data->lock); 100 99 if (ret < 0) 101 - return ret; 100 + break; 102 101 *val = be32_to_cpu(tmp) >> 12; 103 - return IIO_VAL_INT; 102 + ret = IIO_VAL_INT; 103 + break; 104 104 case IIO_TEMP: /* in 0.0625 celsius / LSB */ 105 105 mutex_lock(&data->lock); 106 106 ret = mpl3115_request(data); 107 107 if (ret < 0) { 108 108 mutex_unlock(&data->lock); 109 - return ret; 109 + break; 110 110 } 111 111 ret = i2c_smbus_read_i2c_block_data(data->client, 112 112 MPL3115_OUT_TEMP, 2, (u8 *) &tmp); 113 113 mutex_unlock(&data->lock); 114 114 if (ret < 0) 115 - return ret; 115 + break; 116 116 *val = sign_extend32(be32_to_cpu(tmp) >> 20, 11); 117 - return IIO_VAL_INT; 117 + ret = IIO_VAL_INT; 118 + break; 118 119 default: 119 - return -EINVAL; 120 + ret = -EINVAL; 121 + break; 120 122 } 123 + 124 + iio_device_release_direct_mode(indio_dev); 125 + return ret; 126 + 121 127 case IIO_CHAN_INFO_SCALE: 122 128 switch (chan->type) { 123 129 case IIO_PRESSURE:
+8 -11
drivers/iio/pressure/ms5611_core.c
··· 392 392 393 393 /* Enable attached regulator if any. */ 394 394 st->vdd = devm_regulator_get(indio_dev->dev.parent, "vdd"); 395 - if (!IS_ERR(st->vdd)) { 396 - ret = regulator_enable(st->vdd); 397 - if (ret) { 398 - dev_err(indio_dev->dev.parent, 399 - "failed to enable Vdd supply: %d\n", ret); 400 - return ret; 401 - } 402 - } else { 403 - ret = PTR_ERR(st->vdd); 404 - if (ret != -ENODEV) 405 - return ret; 395 + if (IS_ERR(st->vdd)) 396 + return PTR_ERR(st->vdd); 397 + 398 + ret = regulator_enable(st->vdd); 399 + if (ret) { 400 + dev_err(indio_dev->dev.parent, 401 + "failed to enable Vdd supply: %d\n", ret); 402 + return ret; 406 403 } 407 404 408 405 ret = ms5611_reset(indio_dev);
-4
drivers/iio/pressure/zpa2326.c
··· 147 147 #define zpa2326_warn(_idev, _format, _arg...) \ 148 148 dev_warn(_idev->dev.parent, _format, ##_arg) 149 149 150 - #ifdef DEBUG 151 150 #define zpa2326_dbg(_idev, _format, _arg...) \ 152 151 dev_dbg(_idev->dev.parent, _format, ##_arg) 153 - #else 154 - #define zpa2326_dbg(_idev, _format, _arg...) 155 - #endif 156 152 157 153 bool zpa2326_isreg_writeable(struct device *dev, unsigned int reg) 158 154 {
-2
drivers/iio/proximity/pulsedlight-lidar-lite-v2.c
··· 301 301 if (ret) 302 302 goto error_unreg_buffer; 303 303 pm_runtime_enable(&client->dev); 304 - 305 - pm_runtime_mark_last_busy(&client->dev); 306 304 pm_runtime_idle(&client->dev); 307 305 308 306 return 0;
+1 -69
drivers/staging/iio/TODO
··· 1 - 2009 8/18 2 - 3 - Core: 4 - 1) Get reviews 5 - 2) Additional testing 6 - 3) Ensure all desirable features present by adding more devices. 7 - Major changes not expected except in response to comments 8 - 9 - Max1363 core: 10 - 1) Possibly add sysfs exports of constant useful to userspace. 11 - Would be nice 12 - 2) Support hardware generated interrupts 13 - 3) Expand device set. Lots of other maxim adc's have very 14 - similar interfaces. 15 - 16 - MXS LRADC driver: 17 - This is a classic MFD device as it combines the following subdevices 18 - - touchscreen controller (input subsystem related device) 19 - - general purpose ADC channels 20 - - battery voltage monitor (power subsystem related device) 21 - - die temperature monitor (thermal management) 22 - 23 - At least the battery voltage and die temperature feature is required in-kernel 24 - by a driver of the SoC's battery charging unit to avoid any damage to the 25 - silicon and the battery. 26 - 27 - TSL2561 28 - Would be nice 29 - 1) Open question of userspace vs kernel space balance when 30 - converting to useful light measurements from device ones. 31 - 2) Add sysfs elements necessary to allow device agnostic 32 - unit conversion. 33 - 34 - LIS3L02DQ core 35 - 36 - LIS3L02DQ ring 37 - 38 - KXSD9 39 - Currently minimal driver, would be nice to add: 40 - 1) Support for all chip generated interrupts (events), 41 - basically get support up to level of lis3l02dq driver. 42 - 43 - Ring buffer core 44 - 45 - SCA3000 46 - Would be nice 47 - 1) Testing on devices other than sca3000-e05 48 - 49 - Trigger core support 50 - 1) Discussion of approach. Is it general enough? 51 - 52 - Ring Buffer: 53 - 1) Discussion of approach. 54 - There are probably better ways of doing this. The 55 - intention is to allow for more than one software ring 56 - buffer implementation as different users will have 57 - different requirements. This one suits mid range 58 - frequencies (100Hz - 4kHz). 59 - 2) Lots of testing 60 - 61 - GPIO trigger 62 - 1) Add control over the type of interrupt etc. This will 63 - necessitate a header that is also visible from arch board 64 - files. (avoided at the moment to keep the driver set 65 - contained in staging). 1 + 2016 10/09 66 2 67 3 ADI Drivers: 68 4 CC the device-drivers-devel@blackfin.uclinux.org mailing list when 69 5 e-mailing the normal IIO list (see below). 70 - 71 - Documentation 72 - 1) Lots of cleanup and expansion. 73 - 2) Some device require individual docs. 74 6 75 7 Contact: Jonathan Cameron <jic23@kernel.org>. 76 8 Mailing list: linux-iio@vger.kernel.org
-10
drivers/staging/iio/accel/Kconfig
··· 51 51 To compile this driver as a module, say M here: the module will be 52 52 called adis16240. 53 53 54 - config SCA3000 55 - depends on IIO_BUFFER 56 - depends on SPI 57 - tristate "VTI SCA3000 series accelerometers" 58 - help 59 - Say Y here to build support for the VTI SCA3000 series of SPI 60 - accelerometers. These devices use a hardware ring buffer. 61 - 62 - To compile this driver as a module, say M here: the module will be 63 - called sca3000. 64 54 endmenu
-3
drivers/staging/iio/accel/Makefile
··· 13 13 14 14 adis16240-y := adis16240_core.o 15 15 obj-$(CONFIG_ADIS16240) += adis16240.o 16 - 17 - sca3000-y := sca3000_core.o sca3000_ring.o 18 - obj-$(CONFIG_SCA3000) += sca3000.o
-279
drivers/staging/iio/accel/sca3000.h
··· 1 - /* 2 - * sca3000.c -- support VTI sca3000 series accelerometers 3 - * via SPI 4 - * 5 - * Copyright (c) 2007 Jonathan Cameron <jic23@kernel.org> 6 - * 7 - * Partly based upon tle62x0.c 8 - * 9 - * This program is free software; you can redistribute it and/or modify 10 - * it under the terms of the GNU General Public License version 2 as 11 - * published by the Free Software Foundation. 12 - * 13 - * Initial mode is direct measurement. 14 - * 15 - * Untested things 16 - * 17 - * Temperature reading (the e05 I'm testing with doesn't have a sensor) 18 - * 19 - * Free fall detection mode - supported but untested as I'm not droping my 20 - * dubious wire rig far enough to test it. 21 - * 22 - * Unsupported as yet 23 - * 24 - * Time stamping of data from ring. Various ideas on how to do this but none 25 - * are remotely simple. Suggestions welcome. 26 - * 27 - * Individual enabling disabling of channels going into ring buffer 28 - * 29 - * Overflow handling (this is signaled for all but 8 bit ring buffer mode.) 30 - * 31 - * Motion detector using AND combinations of signals. 32 - * 33 - * Note: Be very careful about not touching an register bytes marked 34 - * as reserved on the data sheet. They really mean it as changing convents of 35 - * some will cause the device to lock up. 36 - * 37 - * Known issues - on rare occasions the interrupts lock up. Not sure why as yet. 38 - * Can probably alleviate this by reading the interrupt register on start, but 39 - * that is really just brushing the problem under the carpet. 40 - */ 41 - #ifndef _SCA3000 42 - #define _SCA3000 43 - 44 - #define SCA3000_WRITE_REG(a) (((a) << 2) | 0x02) 45 - #define SCA3000_READ_REG(a) ((a) << 2) 46 - 47 - #define SCA3000_REG_ADDR_REVID 0x00 48 - #define SCA3000_REVID_MAJOR_MASK 0xf0 49 - #define SCA3000_REVID_MINOR_MASK 0x0f 50 - 51 - #define SCA3000_REG_ADDR_STATUS 0x02 52 - #define SCA3000_LOCKED 0x20 53 - #define SCA3000_EEPROM_CS_ERROR 0x02 54 - #define SCA3000_SPI_FRAME_ERROR 0x01 55 - 56 - /* All reads done using register decrement so no need to directly access LSBs */ 57 - #define SCA3000_REG_ADDR_X_MSB 0x05 58 - #define SCA3000_REG_ADDR_Y_MSB 0x07 59 - #define SCA3000_REG_ADDR_Z_MSB 0x09 60 - 61 - #define SCA3000_REG_ADDR_RING_OUT 0x0f 62 - 63 - /* Temp read untested - the e05 doesn't have the sensor */ 64 - #define SCA3000_REG_ADDR_TEMP_MSB 0x13 65 - 66 - #define SCA3000_REG_ADDR_MODE 0x14 67 - #define SCA3000_MODE_PROT_MASK 0x28 68 - 69 - #define SCA3000_RING_BUF_ENABLE 0x80 70 - #define SCA3000_RING_BUF_8BIT 0x40 71 - /* 72 - * Free fall detection triggers an interrupt if the acceleration 73 - * is below a threshold for equivalent of 25cm drop 74 - */ 75 - #define SCA3000_FREE_FALL_DETECT 0x10 76 - #define SCA3000_MEAS_MODE_NORMAL 0x00 77 - #define SCA3000_MEAS_MODE_OP_1 0x01 78 - #define SCA3000_MEAS_MODE_OP_2 0x02 79 - 80 - /* 81 - * In motion detection mode the accelerations are band pass filtered 82 - * (approx 1 - 25Hz) and then a programmable threshold used to trigger 83 - * and interrupt. 84 - */ 85 - #define SCA3000_MEAS_MODE_MOT_DET 0x03 86 - 87 - #define SCA3000_REG_ADDR_BUF_COUNT 0x15 88 - 89 - #define SCA3000_REG_ADDR_INT_STATUS 0x16 90 - 91 - #define SCA3000_INT_STATUS_THREE_QUARTERS 0x80 92 - #define SCA3000_INT_STATUS_HALF 0x40 93 - 94 - #define SCA3000_INT_STATUS_FREE_FALL 0x08 95 - #define SCA3000_INT_STATUS_Y_TRIGGER 0x04 96 - #define SCA3000_INT_STATUS_X_TRIGGER 0x02 97 - #define SCA3000_INT_STATUS_Z_TRIGGER 0x01 98 - 99 - /* Used to allow access to multiplexed registers */ 100 - #define SCA3000_REG_ADDR_CTRL_SEL 0x18 101 - /* Only available for SCA3000-D03 and SCA3000-D01 */ 102 - #define SCA3000_REG_CTRL_SEL_I2C_DISABLE 0x01 103 - #define SCA3000_REG_CTRL_SEL_MD_CTRL 0x02 104 - #define SCA3000_REG_CTRL_SEL_MD_Y_TH 0x03 105 - #define SCA3000_REG_CTRL_SEL_MD_X_TH 0x04 106 - #define SCA3000_REG_CTRL_SEL_MD_Z_TH 0x05 107 - /* 108 - * BE VERY CAREFUL WITH THIS, IF 3 BITS ARE NOT SET the device 109 - * will not function 110 - */ 111 - #define SCA3000_REG_CTRL_SEL_OUT_CTRL 0x0B 112 - #define SCA3000_OUT_CTRL_PROT_MASK 0xE0 113 - #define SCA3000_OUT_CTRL_BUF_X_EN 0x10 114 - #define SCA3000_OUT_CTRL_BUF_Y_EN 0x08 115 - #define SCA3000_OUT_CTRL_BUF_Z_EN 0x04 116 - #define SCA3000_OUT_CTRL_BUF_DIV_MASK 0x03 117 - #define SCA3000_OUT_CTRL_BUF_DIV_4 0x02 118 - #define SCA3000_OUT_CTRL_BUF_DIV_2 0x01 119 - 120 - /* 121 - * Control which motion detector interrupts are on. 122 - * For now only OR combinations are supported. 123 - */ 124 - #define SCA3000_MD_CTRL_PROT_MASK 0xC0 125 - #define SCA3000_MD_CTRL_OR_Y 0x01 126 - #define SCA3000_MD_CTRL_OR_X 0x02 127 - #define SCA3000_MD_CTRL_OR_Z 0x04 128 - /* Currently unsupported */ 129 - #define SCA3000_MD_CTRL_AND_Y 0x08 130 - #define SCA3000_MD_CTRL_AND_X 0x10 131 - #define SAC3000_MD_CTRL_AND_Z 0x20 132 - 133 - /* 134 - * Some control registers of complex access methods requiring this register to 135 - * be used to remove a lock. 136 - */ 137 - #define SCA3000_REG_ADDR_UNLOCK 0x1e 138 - 139 - #define SCA3000_REG_ADDR_INT_MASK 0x21 140 - #define SCA3000_INT_MASK_PROT_MASK 0x1C 141 - 142 - #define SCA3000_INT_MASK_RING_THREE_QUARTER 0x80 143 - #define SCA3000_INT_MASK_RING_HALF 0x40 144 - 145 - #define SCA3000_INT_MASK_ALL_INTS 0x02 146 - #define SCA3000_INT_MASK_ACTIVE_HIGH 0x01 147 - #define SCA3000_INT_MASK_ACTIVE_LOW 0x00 148 - 149 - /* Values of multiplexed registers (write to ctrl_data after select) */ 150 - #define SCA3000_REG_ADDR_CTRL_DATA 0x22 151 - 152 - /* 153 - * Measurement modes available on some sca3000 series chips. Code assumes others 154 - * may become available in the future. 155 - * 156 - * Bypass - Bypass the low-pass filter in the signal channel so as to increase 157 - * signal bandwidth. 158 - * 159 - * Narrow - Narrow low-pass filtering of the signal channel and half output 160 - * data rate by decimation. 161 - * 162 - * Wide - Widen low-pass filtering of signal channel to increase bandwidth 163 - */ 164 - #define SCA3000_OP_MODE_BYPASS 0x01 165 - #define SCA3000_OP_MODE_NARROW 0x02 166 - #define SCA3000_OP_MODE_WIDE 0x04 167 - #define SCA3000_MAX_TX 6 168 - #define SCA3000_MAX_RX 2 169 - 170 - /** 171 - * struct sca3000_state - device instance state information 172 - * @us: the associated spi device 173 - * @info: chip variant information 174 - * @interrupt_handler_ws: event interrupt handler for all events 175 - * @last_timestamp: the timestamp of the last event 176 - * @mo_det_use_count: reference counter for the motion detection unit 177 - * @lock: lock used to protect elements of sca3000_state 178 - * and the underlying device state. 179 - * @bpse: number of bits per scan element 180 - * @tx: dma-able transmit buffer 181 - * @rx: dma-able receive buffer 182 - **/ 183 - struct sca3000_state { 184 - struct spi_device *us; 185 - const struct sca3000_chip_info *info; 186 - struct work_struct interrupt_handler_ws; 187 - s64 last_timestamp; 188 - int mo_det_use_count; 189 - struct mutex lock; 190 - int bpse; 191 - /* Can these share a cacheline ? */ 192 - u8 rx[2] ____cacheline_aligned; 193 - u8 tx[6] ____cacheline_aligned; 194 - }; 195 - 196 - /** 197 - * struct sca3000_chip_info - model dependent parameters 198 - * @scale: scale * 10^-6 199 - * @temp_output: some devices have temperature sensors. 200 - * @measurement_mode_freq: normal mode sampling frequency 201 - * @option_mode_1: first optional mode. Not all models have one 202 - * @option_mode_1_freq: option mode 1 sampling frequency 203 - * @option_mode_2: second optional mode. Not all chips have one 204 - * @option_mode_2_freq: option mode 2 sampling frequency 205 - * 206 - * This structure is used to hold information about the functionality of a given 207 - * sca3000 variant. 208 - **/ 209 - struct sca3000_chip_info { 210 - unsigned int scale; 211 - bool temp_output; 212 - int measurement_mode_freq; 213 - int option_mode_1; 214 - int option_mode_1_freq; 215 - int option_mode_2; 216 - int option_mode_2_freq; 217 - int mot_det_mult_xz[6]; 218 - int mot_det_mult_y[7]; 219 - }; 220 - 221 - int sca3000_read_data_short(struct sca3000_state *st, 222 - u8 reg_address_high, 223 - int len); 224 - 225 - /** 226 - * sca3000_write_reg() write a single register 227 - * @address: address of register on chip 228 - * @val: value to be written to register 229 - * 230 - * The main lock must be held. 231 - **/ 232 - int sca3000_write_reg(struct sca3000_state *st, u8 address, u8 val); 233 - 234 - #ifdef CONFIG_IIO_BUFFER 235 - /** 236 - * sca3000_register_ring_funcs() setup the ring state change functions 237 - **/ 238 - void sca3000_register_ring_funcs(struct iio_dev *indio_dev); 239 - 240 - /** 241 - * sca3000_configure_ring() - allocate and configure ring buffer 242 - * @indio_dev: iio-core device whose ring is to be configured 243 - * 244 - * The hardware ring buffer needs far fewer ring buffer functions than 245 - * a software one as a lot of things are handled automatically. 246 - * This function also tells the iio core that our device supports a 247 - * hardware ring buffer mode. 248 - **/ 249 - int sca3000_configure_ring(struct iio_dev *indio_dev); 250 - 251 - /** 252 - * sca3000_unconfigure_ring() - deallocate the ring buffer 253 - * @indio_dev: iio-core device whose ring we are freeing 254 - **/ 255 - void sca3000_unconfigure_ring(struct iio_dev *indio_dev); 256 - 257 - /** 258 - * sca3000_ring_int_process() handles ring related event pushing and escalation 259 - * @val: the event code 260 - **/ 261 - void sca3000_ring_int_process(u8 val, struct iio_buffer *ring); 262 - 263 - #else 264 - static inline void sca3000_register_ring_funcs(struct iio_dev *indio_dev) 265 - { 266 - } 267 - 268 - static inline 269 - int sca3000_register_ring_access_and_init(struct iio_dev *indio_dev) 270 - { 271 - return 0; 272 - } 273 - 274 - static inline void sca3000_ring_int_process(u8 val, void *ring) 275 - { 276 - } 277 - 278 - #endif 279 - #endif /* _SCA3000 */
-1208
drivers/staging/iio/accel/sca3000_core.c
··· 1 - /* 2 - * sca3000_core.c -- support VTI sca3000 series accelerometers via SPI 3 - * 4 - * This program is free software; you can redistribute it and/or modify it 5 - * under the terms of the GNU General Public License version 2 as published by 6 - * the Free Software Foundation. 7 - * 8 - * Copyright (c) 2009 Jonathan Cameron <jic23@kernel.org> 9 - * 10 - * See industrialio/accels/sca3000.h for comments. 11 - */ 12 - 13 - #include <linux/interrupt.h> 14 - #include <linux/fs.h> 15 - #include <linux/device.h> 16 - #include <linux/slab.h> 17 - #include <linux/kernel.h> 18 - #include <linux/spi/spi.h> 19 - #include <linux/sysfs.h> 20 - #include <linux/module.h> 21 - #include <linux/iio/iio.h> 22 - #include <linux/iio/sysfs.h> 23 - #include <linux/iio/events.h> 24 - #include <linux/iio/buffer.h> 25 - 26 - #include "sca3000.h" 27 - 28 - enum sca3000_variant { 29 - d01, 30 - e02, 31 - e04, 32 - e05, 33 - }; 34 - 35 - /* 36 - * Note where option modes are not defined, the chip simply does not 37 - * support any. 38 - * Other chips in the sca3000 series use i2c and are not included here. 39 - * 40 - * Some of these devices are only listed in the family data sheet and 41 - * do not actually appear to be available. 42 - */ 43 - static const struct sca3000_chip_info sca3000_spi_chip_info_tbl[] = { 44 - [d01] = { 45 - .scale = 7357, 46 - .temp_output = true, 47 - .measurement_mode_freq = 250, 48 - .option_mode_1 = SCA3000_OP_MODE_BYPASS, 49 - .option_mode_1_freq = 250, 50 - .mot_det_mult_xz = {50, 100, 200, 350, 650, 1300}, 51 - .mot_det_mult_y = {50, 100, 150, 250, 450, 850, 1750}, 52 - }, 53 - [e02] = { 54 - .scale = 9810, 55 - .measurement_mode_freq = 125, 56 - .option_mode_1 = SCA3000_OP_MODE_NARROW, 57 - .option_mode_1_freq = 63, 58 - .mot_det_mult_xz = {100, 150, 300, 550, 1050, 2050}, 59 - .mot_det_mult_y = {50, 100, 200, 350, 700, 1350, 2700}, 60 - }, 61 - [e04] = { 62 - .scale = 19620, 63 - .measurement_mode_freq = 100, 64 - .option_mode_1 = SCA3000_OP_MODE_NARROW, 65 - .option_mode_1_freq = 50, 66 - .option_mode_2 = SCA3000_OP_MODE_WIDE, 67 - .option_mode_2_freq = 400, 68 - .mot_det_mult_xz = {200, 300, 600, 1100, 2100, 4100}, 69 - .mot_det_mult_y = {100, 200, 400, 7000, 1400, 2700, 54000}, 70 - }, 71 - [e05] = { 72 - .scale = 61313, 73 - .measurement_mode_freq = 200, 74 - .option_mode_1 = SCA3000_OP_MODE_NARROW, 75 - .option_mode_1_freq = 50, 76 - .option_mode_2 = SCA3000_OP_MODE_WIDE, 77 - .option_mode_2_freq = 400, 78 - .mot_det_mult_xz = {600, 900, 1700, 3200, 6100, 11900}, 79 - .mot_det_mult_y = {300, 600, 1200, 2000, 4100, 7800, 15600}, 80 - }, 81 - }; 82 - 83 - int sca3000_write_reg(struct sca3000_state *st, u8 address, u8 val) 84 - { 85 - st->tx[0] = SCA3000_WRITE_REG(address); 86 - st->tx[1] = val; 87 - return spi_write(st->us, st->tx, 2); 88 - } 89 - 90 - int sca3000_read_data_short(struct sca3000_state *st, 91 - u8 reg_address_high, 92 - int len) 93 - { 94 - struct spi_transfer xfer[2] = { 95 - { 96 - .len = 1, 97 - .tx_buf = st->tx, 98 - }, { 99 - .len = len, 100 - .rx_buf = st->rx, 101 - } 102 - }; 103 - st->tx[0] = SCA3000_READ_REG(reg_address_high); 104 - 105 - return spi_sync_transfer(st->us, xfer, ARRAY_SIZE(xfer)); 106 - } 107 - 108 - /** 109 - * sca3000_reg_lock_on() test if the ctrl register lock is on 110 - * 111 - * Lock must be held. 112 - **/ 113 - static int sca3000_reg_lock_on(struct sca3000_state *st) 114 - { 115 - int ret; 116 - 117 - ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_STATUS, 1); 118 - if (ret < 0) 119 - return ret; 120 - 121 - return !(st->rx[0] & SCA3000_LOCKED); 122 - } 123 - 124 - /** 125 - * __sca3000_unlock_reg_lock() unlock the control registers 126 - * 127 - * Note the device does not appear to support doing this in a single transfer. 128 - * This should only ever be used as part of ctrl reg read. 129 - * Lock must be held before calling this 130 - **/ 131 - static int __sca3000_unlock_reg_lock(struct sca3000_state *st) 132 - { 133 - struct spi_transfer xfer[3] = { 134 - { 135 - .len = 2, 136 - .cs_change = 1, 137 - .tx_buf = st->tx, 138 - }, { 139 - .len = 2, 140 - .cs_change = 1, 141 - .tx_buf = st->tx + 2, 142 - }, { 143 - .len = 2, 144 - .tx_buf = st->tx + 4, 145 - }, 146 - }; 147 - st->tx[0] = SCA3000_WRITE_REG(SCA3000_REG_ADDR_UNLOCK); 148 - st->tx[1] = 0x00; 149 - st->tx[2] = SCA3000_WRITE_REG(SCA3000_REG_ADDR_UNLOCK); 150 - st->tx[3] = 0x50; 151 - st->tx[4] = SCA3000_WRITE_REG(SCA3000_REG_ADDR_UNLOCK); 152 - st->tx[5] = 0xA0; 153 - 154 - return spi_sync_transfer(st->us, xfer, ARRAY_SIZE(xfer)); 155 - } 156 - 157 - /** 158 - * sca3000_write_ctrl_reg() write to a lock protect ctrl register 159 - * @sel: selects which registers we wish to write to 160 - * @val: the value to be written 161 - * 162 - * Certain control registers are protected against overwriting by the lock 163 - * register and use a shared write address. This function allows writing of 164 - * these registers. 165 - * Lock must be held. 166 - **/ 167 - static int sca3000_write_ctrl_reg(struct sca3000_state *st, 168 - u8 sel, 169 - uint8_t val) 170 - { 171 - int ret; 172 - 173 - ret = sca3000_reg_lock_on(st); 174 - if (ret < 0) 175 - goto error_ret; 176 - if (ret) { 177 - ret = __sca3000_unlock_reg_lock(st); 178 - if (ret) 179 - goto error_ret; 180 - } 181 - 182 - /* Set the control select register */ 183 - ret = sca3000_write_reg(st, SCA3000_REG_ADDR_CTRL_SEL, sel); 184 - if (ret) 185 - goto error_ret; 186 - 187 - /* Write the actual value into the register */ 188 - ret = sca3000_write_reg(st, SCA3000_REG_ADDR_CTRL_DATA, val); 189 - 190 - error_ret: 191 - return ret; 192 - } 193 - 194 - /** 195 - * sca3000_read_ctrl_reg() read from lock protected control register. 196 - * 197 - * Lock must be held. 198 - **/ 199 - static int sca3000_read_ctrl_reg(struct sca3000_state *st, 200 - u8 ctrl_reg) 201 - { 202 - int ret; 203 - 204 - ret = sca3000_reg_lock_on(st); 205 - if (ret < 0) 206 - goto error_ret; 207 - if (ret) { 208 - ret = __sca3000_unlock_reg_lock(st); 209 - if (ret) 210 - goto error_ret; 211 - } 212 - /* Set the control select register */ 213 - ret = sca3000_write_reg(st, SCA3000_REG_ADDR_CTRL_SEL, ctrl_reg); 214 - if (ret) 215 - goto error_ret; 216 - ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_CTRL_DATA, 1); 217 - if (ret) 218 - goto error_ret; 219 - return st->rx[0]; 220 - error_ret: 221 - return ret; 222 - } 223 - 224 - /** 225 - * sca3000_show_rev() - sysfs interface to read the chip revision number 226 - **/ 227 - static ssize_t sca3000_show_rev(struct device *dev, 228 - struct device_attribute *attr, 229 - char *buf) 230 - { 231 - int len = 0, ret; 232 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 233 - struct sca3000_state *st = iio_priv(indio_dev); 234 - 235 - mutex_lock(&st->lock); 236 - ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_REVID, 1); 237 - if (ret < 0) 238 - goto error_ret; 239 - len += sprintf(buf + len, 240 - "major=%d, minor=%d\n", 241 - st->rx[0] & SCA3000_REVID_MAJOR_MASK, 242 - st->rx[0] & SCA3000_REVID_MINOR_MASK); 243 - error_ret: 244 - mutex_unlock(&st->lock); 245 - 246 - return ret ? ret : len; 247 - } 248 - 249 - /** 250 - * sca3000_show_available_measurement_modes() display available modes 251 - * 252 - * This is all read from chip specific data in the driver. Not all 253 - * of the sca3000 series support modes other than normal. 254 - **/ 255 - static ssize_t 256 - sca3000_show_available_measurement_modes(struct device *dev, 257 - struct device_attribute *attr, 258 - char *buf) 259 - { 260 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 261 - struct sca3000_state *st = iio_priv(indio_dev); 262 - int len = 0; 263 - 264 - len += sprintf(buf + len, "0 - normal mode"); 265 - switch (st->info->option_mode_1) { 266 - case SCA3000_OP_MODE_NARROW: 267 - len += sprintf(buf + len, ", 1 - narrow mode"); 268 - break; 269 - case SCA3000_OP_MODE_BYPASS: 270 - len += sprintf(buf + len, ", 1 - bypass mode"); 271 - break; 272 - } 273 - switch (st->info->option_mode_2) { 274 - case SCA3000_OP_MODE_WIDE: 275 - len += sprintf(buf + len, ", 2 - wide mode"); 276 - break; 277 - } 278 - /* always supported */ 279 - len += sprintf(buf + len, " 3 - motion detection\n"); 280 - 281 - return len; 282 - } 283 - 284 - /** 285 - * sca3000_show_measurement_mode() sysfs read of current mode 286 - **/ 287 - static ssize_t 288 - sca3000_show_measurement_mode(struct device *dev, 289 - struct device_attribute *attr, 290 - char *buf) 291 - { 292 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 293 - struct sca3000_state *st = iio_priv(indio_dev); 294 - int len = 0, ret; 295 - 296 - mutex_lock(&st->lock); 297 - ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1); 298 - if (ret) 299 - goto error_ret; 300 - /* mask bottom 2 bits - only ones that are relevant */ 301 - st->rx[0] &= 0x03; 302 - switch (st->rx[0]) { 303 - case SCA3000_MEAS_MODE_NORMAL: 304 - len += sprintf(buf + len, "0 - normal mode\n"); 305 - break; 306 - case SCA3000_MEAS_MODE_MOT_DET: 307 - len += sprintf(buf + len, "3 - motion detection\n"); 308 - break; 309 - case SCA3000_MEAS_MODE_OP_1: 310 - switch (st->info->option_mode_1) { 311 - case SCA3000_OP_MODE_NARROW: 312 - len += sprintf(buf + len, "1 - narrow mode\n"); 313 - break; 314 - case SCA3000_OP_MODE_BYPASS: 315 - len += sprintf(buf + len, "1 - bypass mode\n"); 316 - break; 317 - } 318 - break; 319 - case SCA3000_MEAS_MODE_OP_2: 320 - switch (st->info->option_mode_2) { 321 - case SCA3000_OP_MODE_WIDE: 322 - len += sprintf(buf + len, "2 - wide mode\n"); 323 - break; 324 - } 325 - break; 326 - } 327 - 328 - error_ret: 329 - mutex_unlock(&st->lock); 330 - 331 - return ret ? ret : len; 332 - } 333 - 334 - /** 335 - * sca3000_store_measurement_mode() set the current mode 336 - **/ 337 - static ssize_t 338 - sca3000_store_measurement_mode(struct device *dev, 339 - struct device_attribute *attr, 340 - const char *buf, 341 - size_t len) 342 - { 343 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 344 - struct sca3000_state *st = iio_priv(indio_dev); 345 - int ret; 346 - u8 mask = 0x03; 347 - u8 val; 348 - 349 - mutex_lock(&st->lock); 350 - ret = kstrtou8(buf, 10, &val); 351 - if (ret) 352 - goto error_ret; 353 - if (val > 3) { 354 - ret = -EINVAL; 355 - goto error_ret; 356 - } 357 - ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1); 358 - if (ret) 359 - goto error_ret; 360 - st->rx[0] &= ~mask; 361 - st->rx[0] |= (val & mask); 362 - ret = sca3000_write_reg(st, SCA3000_REG_ADDR_MODE, st->rx[0]); 363 - if (ret) 364 - goto error_ret; 365 - mutex_unlock(&st->lock); 366 - 367 - return len; 368 - 369 - error_ret: 370 - mutex_unlock(&st->lock); 371 - 372 - return ret; 373 - } 374 - 375 - /* 376 - * Not even vaguely standard attributes so defined here rather than 377 - * in the relevant IIO core headers 378 - */ 379 - static IIO_DEVICE_ATTR(measurement_mode_available, S_IRUGO, 380 - sca3000_show_available_measurement_modes, 381 - NULL, 0); 382 - 383 - static IIO_DEVICE_ATTR(measurement_mode, S_IRUGO | S_IWUSR, 384 - sca3000_show_measurement_mode, 385 - sca3000_store_measurement_mode, 386 - 0); 387 - 388 - /* More standard attributes */ 389 - 390 - static IIO_DEVICE_ATTR(revision, S_IRUGO, sca3000_show_rev, NULL, 0); 391 - 392 - static const struct iio_event_spec sca3000_event = { 393 - .type = IIO_EV_TYPE_MAG, 394 - .dir = IIO_EV_DIR_RISING, 395 - .mask_separate = BIT(IIO_EV_INFO_VALUE) | BIT(IIO_EV_INFO_ENABLE), 396 - }; 397 - 398 - #define SCA3000_CHAN(index, mod) \ 399 - { \ 400 - .type = IIO_ACCEL, \ 401 - .modified = 1, \ 402 - .channel2 = mod, \ 403 - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 404 - .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),\ 405 - .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),\ 406 - .address = index, \ 407 - .scan_index = index, \ 408 - .scan_type = { \ 409 - .sign = 's', \ 410 - .realbits = 11, \ 411 - .storagebits = 16, \ 412 - .shift = 5, \ 413 - }, \ 414 - .event_spec = &sca3000_event, \ 415 - .num_event_specs = 1, \ 416 - } 417 - 418 - static const struct iio_chan_spec sca3000_channels[] = { 419 - SCA3000_CHAN(0, IIO_MOD_X), 420 - SCA3000_CHAN(1, IIO_MOD_Y), 421 - SCA3000_CHAN(2, IIO_MOD_Z), 422 - }; 423 - 424 - static const struct iio_chan_spec sca3000_channels_with_temp[] = { 425 - SCA3000_CHAN(0, IIO_MOD_X), 426 - SCA3000_CHAN(1, IIO_MOD_Y), 427 - SCA3000_CHAN(2, IIO_MOD_Z), 428 - { 429 - .type = IIO_TEMP, 430 - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 431 - .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | 432 - BIT(IIO_CHAN_INFO_OFFSET), 433 - /* No buffer support */ 434 - .scan_index = -1, 435 - }, 436 - }; 437 - 438 - static u8 sca3000_addresses[3][3] = { 439 - [0] = {SCA3000_REG_ADDR_X_MSB, SCA3000_REG_CTRL_SEL_MD_X_TH, 440 - SCA3000_MD_CTRL_OR_X}, 441 - [1] = {SCA3000_REG_ADDR_Y_MSB, SCA3000_REG_CTRL_SEL_MD_Y_TH, 442 - SCA3000_MD_CTRL_OR_Y}, 443 - [2] = {SCA3000_REG_ADDR_Z_MSB, SCA3000_REG_CTRL_SEL_MD_Z_TH, 444 - SCA3000_MD_CTRL_OR_Z}, 445 - }; 446 - 447 - /** 448 - * __sca3000_get_base_freq() obtain mode specific base frequency 449 - * 450 - * lock must be held 451 - **/ 452 - static inline int __sca3000_get_base_freq(struct sca3000_state *st, 453 - const struct sca3000_chip_info *info, 454 - int *base_freq) 455 - { 456 - int ret; 457 - 458 - ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1); 459 - if (ret) 460 - goto error_ret; 461 - switch (0x03 & st->rx[0]) { 462 - case SCA3000_MEAS_MODE_NORMAL: 463 - *base_freq = info->measurement_mode_freq; 464 - break; 465 - case SCA3000_MEAS_MODE_OP_1: 466 - *base_freq = info->option_mode_1_freq; 467 - break; 468 - case SCA3000_MEAS_MODE_OP_2: 469 - *base_freq = info->option_mode_2_freq; 470 - break; 471 - } 472 - error_ret: 473 - return ret; 474 - } 475 - 476 - /** 477 - * read_raw handler for IIO_CHAN_INFO_SAMP_FREQ 478 - * 479 - * lock must be held 480 - **/ 481 - static int read_raw_samp_freq(struct sca3000_state *st, int *val) 482 - { 483 - int ret; 484 - 485 - ret = __sca3000_get_base_freq(st, st->info, val); 486 - if (ret) 487 - return ret; 488 - 489 - ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL); 490 - if (ret < 0) 491 - return ret; 492 - 493 - if (*val > 0) { 494 - ret &= SCA3000_OUT_CTRL_BUF_DIV_MASK; 495 - switch (ret) { 496 - case SCA3000_OUT_CTRL_BUF_DIV_2: 497 - *val /= 2; 498 - break; 499 - case SCA3000_OUT_CTRL_BUF_DIV_4: 500 - *val /= 4; 501 - break; 502 - } 503 - } 504 - 505 - return 0; 506 - } 507 - 508 - /** 509 - * write_raw handler for IIO_CHAN_INFO_SAMP_FREQ 510 - * 511 - * lock must be held 512 - **/ 513 - static int write_raw_samp_freq(struct sca3000_state *st, int val) 514 - { 515 - int ret, base_freq, ctrlval; 516 - 517 - ret = __sca3000_get_base_freq(st, st->info, &base_freq); 518 - if (ret) 519 - return ret; 520 - 521 - ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL); 522 - if (ret < 0) 523 - return ret; 524 - 525 - ctrlval = ret & ~SCA3000_OUT_CTRL_BUF_DIV_MASK; 526 - 527 - if (val == base_freq / 2) 528 - ctrlval |= SCA3000_OUT_CTRL_BUF_DIV_2; 529 - if (val == base_freq / 4) 530 - ctrlval |= SCA3000_OUT_CTRL_BUF_DIV_4; 531 - else if (val != base_freq) 532 - return -EINVAL; 533 - 534 - return sca3000_write_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL, 535 - ctrlval); 536 - } 537 - 538 - static int sca3000_read_raw(struct iio_dev *indio_dev, 539 - struct iio_chan_spec const *chan, 540 - int *val, 541 - int *val2, 542 - long mask) 543 - { 544 - struct sca3000_state *st = iio_priv(indio_dev); 545 - int ret; 546 - u8 address; 547 - 548 - switch (mask) { 549 - case IIO_CHAN_INFO_RAW: 550 - mutex_lock(&st->lock); 551 - if (chan->type == IIO_ACCEL) { 552 - if (st->mo_det_use_count) { 553 - mutex_unlock(&st->lock); 554 - return -EBUSY; 555 - } 556 - address = sca3000_addresses[chan->address][0]; 557 - ret = sca3000_read_data_short(st, address, 2); 558 - if (ret < 0) { 559 - mutex_unlock(&st->lock); 560 - return ret; 561 - } 562 - *val = (be16_to_cpup((__be16 *)st->rx) >> 3) & 0x1FFF; 563 - *val = ((*val) << (sizeof(*val) * 8 - 13)) >> 564 - (sizeof(*val) * 8 - 13); 565 - } else { 566 - /* get the temperature when available */ 567 - ret = sca3000_read_data_short(st, 568 - SCA3000_REG_ADDR_TEMP_MSB, 569 - 2); 570 - if (ret < 0) { 571 - mutex_unlock(&st->lock); 572 - return ret; 573 - } 574 - *val = ((st->rx[0] & 0x3F) << 3) | 575 - ((st->rx[1] & 0xE0) >> 5); 576 - } 577 - mutex_unlock(&st->lock); 578 - return IIO_VAL_INT; 579 - case IIO_CHAN_INFO_SCALE: 580 - *val = 0; 581 - if (chan->type == IIO_ACCEL) 582 - *val2 = st->info->scale; 583 - else /* temperature */ 584 - *val2 = 555556; 585 - return IIO_VAL_INT_PLUS_MICRO; 586 - case IIO_CHAN_INFO_OFFSET: 587 - *val = -214; 588 - *val2 = 600000; 589 - return IIO_VAL_INT_PLUS_MICRO; 590 - case IIO_CHAN_INFO_SAMP_FREQ: 591 - mutex_lock(&st->lock); 592 - ret = read_raw_samp_freq(st, val); 593 - mutex_unlock(&st->lock); 594 - return ret ? ret : IIO_VAL_INT; 595 - default: 596 - return -EINVAL; 597 - } 598 - } 599 - 600 - static int sca3000_write_raw(struct iio_dev *indio_dev, 601 - struct iio_chan_spec const *chan, 602 - int val, int val2, long mask) 603 - { 604 - struct sca3000_state *st = iio_priv(indio_dev); 605 - int ret; 606 - 607 - switch (mask) { 608 - case IIO_CHAN_INFO_SAMP_FREQ: 609 - if (val2) 610 - return -EINVAL; 611 - mutex_lock(&st->lock); 612 - ret = write_raw_samp_freq(st, val); 613 - mutex_unlock(&st->lock); 614 - return ret; 615 - default: 616 - return -EINVAL; 617 - } 618 - 619 - return ret; 620 - } 621 - 622 - /** 623 - * sca3000_read_av_freq() sysfs function to get available frequencies 624 - * 625 - * The later modes are only relevant to the ring buffer - and depend on current 626 - * mode. Note that data sheet gives rather wide tolerances for these so integer 627 - * division will give good enough answer and not all chips have them specified 628 - * at all. 629 - **/ 630 - static ssize_t sca3000_read_av_freq(struct device *dev, 631 - struct device_attribute *attr, 632 - char *buf) 633 - { 634 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 635 - struct sca3000_state *st = iio_priv(indio_dev); 636 - int len = 0, ret, val; 637 - 638 - mutex_lock(&st->lock); 639 - ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1); 640 - val = st->rx[0]; 641 - mutex_unlock(&st->lock); 642 - if (ret) 643 - goto error_ret; 644 - 645 - switch (val & 0x03) { 646 - case SCA3000_MEAS_MODE_NORMAL: 647 - len += sprintf(buf + len, "%d %d %d\n", 648 - st->info->measurement_mode_freq, 649 - st->info->measurement_mode_freq / 2, 650 - st->info->measurement_mode_freq / 4); 651 - break; 652 - case SCA3000_MEAS_MODE_OP_1: 653 - len += sprintf(buf + len, "%d %d %d\n", 654 - st->info->option_mode_1_freq, 655 - st->info->option_mode_1_freq / 2, 656 - st->info->option_mode_1_freq / 4); 657 - break; 658 - case SCA3000_MEAS_MODE_OP_2: 659 - len += sprintf(buf + len, "%d %d %d\n", 660 - st->info->option_mode_2_freq, 661 - st->info->option_mode_2_freq / 2, 662 - st->info->option_mode_2_freq / 4); 663 - break; 664 - } 665 - return len; 666 - error_ret: 667 - return ret; 668 - } 669 - 670 - /* 671 - * Should only really be registered if ring buffer support is compiled in. 672 - * Does no harm however and doing it right would add a fair bit of complexity 673 - */ 674 - static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(sca3000_read_av_freq); 675 - 676 - /** 677 - * sca3000_read_thresh() - query of a threshold 678 - **/ 679 - static int sca3000_read_thresh(struct iio_dev *indio_dev, 680 - const struct iio_chan_spec *chan, 681 - enum iio_event_type type, 682 - enum iio_event_direction dir, 683 - enum iio_event_info info, 684 - int *val, int *val2) 685 - { 686 - int ret, i; 687 - struct sca3000_state *st = iio_priv(indio_dev); 688 - int num = chan->channel2; 689 - 690 - mutex_lock(&st->lock); 691 - ret = sca3000_read_ctrl_reg(st, sca3000_addresses[num][1]); 692 - mutex_unlock(&st->lock); 693 - if (ret < 0) 694 - return ret; 695 - *val = 0; 696 - if (num == 1) 697 - for_each_set_bit(i, (unsigned long *)&ret, 698 - ARRAY_SIZE(st->info->mot_det_mult_y)) 699 - *val += st->info->mot_det_mult_y[i]; 700 - else 701 - for_each_set_bit(i, (unsigned long *)&ret, 702 - ARRAY_SIZE(st->info->mot_det_mult_xz)) 703 - *val += st->info->mot_det_mult_xz[i]; 704 - 705 - return IIO_VAL_INT; 706 - } 707 - 708 - /** 709 - * sca3000_write_thresh() control of threshold 710 - **/ 711 - static int sca3000_write_thresh(struct iio_dev *indio_dev, 712 - const struct iio_chan_spec *chan, 713 - enum iio_event_type type, 714 - enum iio_event_direction dir, 715 - enum iio_event_info info, 716 - int val, int val2) 717 - { 718 - struct sca3000_state *st = iio_priv(indio_dev); 719 - int num = chan->channel2; 720 - int ret; 721 - int i; 722 - u8 nonlinear = 0; 723 - 724 - if (num == 1) { 725 - i = ARRAY_SIZE(st->info->mot_det_mult_y); 726 - while (i > 0) 727 - if (val >= st->info->mot_det_mult_y[--i]) { 728 - nonlinear |= (1 << i); 729 - val -= st->info->mot_det_mult_y[i]; 730 - } 731 - } else { 732 - i = ARRAY_SIZE(st->info->mot_det_mult_xz); 733 - while (i > 0) 734 - if (val >= st->info->mot_det_mult_xz[--i]) { 735 - nonlinear |= (1 << i); 736 - val -= st->info->mot_det_mult_xz[i]; 737 - } 738 - } 739 - 740 - mutex_lock(&st->lock); 741 - ret = sca3000_write_ctrl_reg(st, sca3000_addresses[num][1], nonlinear); 742 - mutex_unlock(&st->lock); 743 - 744 - return ret; 745 - } 746 - 747 - static struct attribute *sca3000_attributes[] = { 748 - &iio_dev_attr_revision.dev_attr.attr, 749 - &iio_dev_attr_measurement_mode_available.dev_attr.attr, 750 - &iio_dev_attr_measurement_mode.dev_attr.attr, 751 - &iio_dev_attr_sampling_frequency_available.dev_attr.attr, 752 - NULL, 753 - }; 754 - 755 - static const struct attribute_group sca3000_attribute_group = { 756 - .attrs = sca3000_attributes, 757 - }; 758 - 759 - /** 760 - * sca3000_event_handler() - handling ring and non ring events 761 - * 762 - * Ring related interrupt handler. Depending on event, push to 763 - * the ring buffer event chrdev or the event one. 764 - * 765 - * This function is complicated by the fact that the devices can signify ring 766 - * and non ring events via the same interrupt line and they can only 767 - * be distinguished via a read of the relevant status register. 768 - **/ 769 - static irqreturn_t sca3000_event_handler(int irq, void *private) 770 - { 771 - struct iio_dev *indio_dev = private; 772 - struct sca3000_state *st = iio_priv(indio_dev); 773 - int ret, val; 774 - s64 last_timestamp = iio_get_time_ns(indio_dev); 775 - 776 - /* 777 - * Could lead if badly timed to an extra read of status reg, 778 - * but ensures no interrupt is missed. 779 - */ 780 - mutex_lock(&st->lock); 781 - ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_INT_STATUS, 1); 782 - val = st->rx[0]; 783 - mutex_unlock(&st->lock); 784 - if (ret) 785 - goto done; 786 - 787 - sca3000_ring_int_process(val, indio_dev->buffer); 788 - 789 - if (val & SCA3000_INT_STATUS_FREE_FALL) 790 - iio_push_event(indio_dev, 791 - IIO_MOD_EVENT_CODE(IIO_ACCEL, 792 - 0, 793 - IIO_MOD_X_AND_Y_AND_Z, 794 - IIO_EV_TYPE_MAG, 795 - IIO_EV_DIR_FALLING), 796 - last_timestamp); 797 - 798 - if (val & SCA3000_INT_STATUS_Y_TRIGGER) 799 - iio_push_event(indio_dev, 800 - IIO_MOD_EVENT_CODE(IIO_ACCEL, 801 - 0, 802 - IIO_MOD_Y, 803 - IIO_EV_TYPE_MAG, 804 - IIO_EV_DIR_RISING), 805 - last_timestamp); 806 - 807 - if (val & SCA3000_INT_STATUS_X_TRIGGER) 808 - iio_push_event(indio_dev, 809 - IIO_MOD_EVENT_CODE(IIO_ACCEL, 810 - 0, 811 - IIO_MOD_X, 812 - IIO_EV_TYPE_MAG, 813 - IIO_EV_DIR_RISING), 814 - last_timestamp); 815 - 816 - if (val & SCA3000_INT_STATUS_Z_TRIGGER) 817 - iio_push_event(indio_dev, 818 - IIO_MOD_EVENT_CODE(IIO_ACCEL, 819 - 0, 820 - IIO_MOD_Z, 821 - IIO_EV_TYPE_MAG, 822 - IIO_EV_DIR_RISING), 823 - last_timestamp); 824 - 825 - done: 826 - return IRQ_HANDLED; 827 - } 828 - 829 - /** 830 - * sca3000_read_event_config() what events are enabled 831 - **/ 832 - static int sca3000_read_event_config(struct iio_dev *indio_dev, 833 - const struct iio_chan_spec *chan, 834 - enum iio_event_type type, 835 - enum iio_event_direction dir) 836 - { 837 - struct sca3000_state *st = iio_priv(indio_dev); 838 - int ret; 839 - u8 protect_mask = 0x03; 840 - int num = chan->channel2; 841 - 842 - /* read current value of mode register */ 843 - mutex_lock(&st->lock); 844 - ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1); 845 - if (ret) 846 - goto error_ret; 847 - 848 - if ((st->rx[0] & protect_mask) != SCA3000_MEAS_MODE_MOT_DET) { 849 - ret = 0; 850 - } else { 851 - ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_MD_CTRL); 852 - if (ret < 0) 853 - goto error_ret; 854 - /* only supporting logical or's for now */ 855 - ret = !!(ret & sca3000_addresses[num][2]); 856 - } 857 - error_ret: 858 - mutex_unlock(&st->lock); 859 - 860 - return ret; 861 - } 862 - 863 - /** 864 - * sca3000_query_free_fall_mode() is free fall mode enabled 865 - **/ 866 - static ssize_t sca3000_query_free_fall_mode(struct device *dev, 867 - struct device_attribute *attr, 868 - char *buf) 869 - { 870 - int ret; 871 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 872 - struct sca3000_state *st = iio_priv(indio_dev); 873 - int val; 874 - 875 - mutex_lock(&st->lock); 876 - ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1); 877 - val = st->rx[0]; 878 - mutex_unlock(&st->lock); 879 - if (ret < 0) 880 - return ret; 881 - return sprintf(buf, "%d\n", !!(val & SCA3000_FREE_FALL_DETECT)); 882 - } 883 - 884 - /** 885 - * sca3000_set_free_fall_mode() simple on off control for free fall int 886 - * 887 - * In these chips the free fall detector should send an interrupt if 888 - * the device falls more than 25cm. This has not been tested due 889 - * to fragile wiring. 890 - **/ 891 - static ssize_t sca3000_set_free_fall_mode(struct device *dev, 892 - struct device_attribute *attr, 893 - const char *buf, 894 - size_t len) 895 - { 896 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 897 - struct sca3000_state *st = iio_priv(indio_dev); 898 - u8 val; 899 - int ret; 900 - u8 protect_mask = SCA3000_FREE_FALL_DETECT; 901 - 902 - mutex_lock(&st->lock); 903 - ret = kstrtou8(buf, 10, &val); 904 - if (ret) 905 - goto error_ret; 906 - 907 - /* read current value of mode register */ 908 - ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1); 909 - if (ret) 910 - goto error_ret; 911 - 912 - /* if off and should be on */ 913 - if (val && !(st->rx[0] & protect_mask)) 914 - ret = sca3000_write_reg(st, SCA3000_REG_ADDR_MODE, 915 - (st->rx[0] | SCA3000_FREE_FALL_DETECT)); 916 - /* if on and should be off */ 917 - else if (!val && (st->rx[0] & protect_mask)) 918 - ret = sca3000_write_reg(st, SCA3000_REG_ADDR_MODE, 919 - (st->rx[0] & ~protect_mask)); 920 - error_ret: 921 - mutex_unlock(&st->lock); 922 - 923 - return ret ? ret : len; 924 - } 925 - 926 - /** 927 - * sca3000_write_event_config() simple on off control for motion detector 928 - * 929 - * This is a per axis control, but enabling any will result in the 930 - * motion detector unit being enabled. 931 - * N.B. enabling motion detector stops normal data acquisition. 932 - * There is a complexity in knowing which mode to return to when 933 - * this mode is disabled. Currently normal mode is assumed. 934 - **/ 935 - static int sca3000_write_event_config(struct iio_dev *indio_dev, 936 - const struct iio_chan_spec *chan, 937 - enum iio_event_type type, 938 - enum iio_event_direction dir, 939 - int state) 940 - { 941 - struct sca3000_state *st = iio_priv(indio_dev); 942 - int ret, ctrlval; 943 - u8 protect_mask = 0x03; 944 - int num = chan->channel2; 945 - 946 - mutex_lock(&st->lock); 947 - /* 948 - * First read the motion detector config to find out if 949 - * this axis is on 950 - */ 951 - ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_MD_CTRL); 952 - if (ret < 0) 953 - goto exit_point; 954 - ctrlval = ret; 955 - /* if off and should be on */ 956 - if (state && !(ctrlval & sca3000_addresses[num][2])) { 957 - ret = sca3000_write_ctrl_reg(st, 958 - SCA3000_REG_CTRL_SEL_MD_CTRL, 959 - ctrlval | 960 - sca3000_addresses[num][2]); 961 - if (ret) 962 - goto exit_point; 963 - st->mo_det_use_count++; 964 - } else if (!state && (ctrlval & sca3000_addresses[num][2])) { 965 - ret = sca3000_write_ctrl_reg(st, 966 - SCA3000_REG_CTRL_SEL_MD_CTRL, 967 - ctrlval & 968 - ~(sca3000_addresses[num][2])); 969 - if (ret) 970 - goto exit_point; 971 - st->mo_det_use_count--; 972 - } 973 - 974 - /* read current value of mode register */ 975 - ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1); 976 - if (ret) 977 - goto exit_point; 978 - /* if off and should be on */ 979 - if ((st->mo_det_use_count) && 980 - ((st->rx[0] & protect_mask) != SCA3000_MEAS_MODE_MOT_DET)) 981 - ret = sca3000_write_reg(st, SCA3000_REG_ADDR_MODE, 982 - (st->rx[0] & ~protect_mask) 983 - | SCA3000_MEAS_MODE_MOT_DET); 984 - /* if on and should be off */ 985 - else if (!(st->mo_det_use_count) && 986 - ((st->rx[0] & protect_mask) == SCA3000_MEAS_MODE_MOT_DET)) 987 - ret = sca3000_write_reg(st, SCA3000_REG_ADDR_MODE, 988 - (st->rx[0] & ~protect_mask)); 989 - exit_point: 990 - mutex_unlock(&st->lock); 991 - 992 - return ret; 993 - } 994 - 995 - /* Free fall detector related event attribute */ 996 - static IIO_DEVICE_ATTR_NAMED(accel_xayaz_mag_falling_en, 997 - in_accel_x & y & z_mag_falling_en, 998 - S_IRUGO | S_IWUSR, 999 - sca3000_query_free_fall_mode, 1000 - sca3000_set_free_fall_mode, 1001 - 0); 1002 - 1003 - static IIO_CONST_ATTR_NAMED(accel_xayaz_mag_falling_period, 1004 - in_accel_x & y & z_mag_falling_period, 1005 - "0.226"); 1006 - 1007 - static struct attribute *sca3000_event_attributes[] = { 1008 - &iio_dev_attr_accel_xayaz_mag_falling_en.dev_attr.attr, 1009 - &iio_const_attr_accel_xayaz_mag_falling_period.dev_attr.attr, 1010 - NULL, 1011 - }; 1012 - 1013 - static struct attribute_group sca3000_event_attribute_group = { 1014 - .attrs = sca3000_event_attributes, 1015 - .name = "events", 1016 - }; 1017 - 1018 - /** 1019 - * sca3000_clean_setup() get the device into a predictable state 1020 - * 1021 - * Devices use flash memory to store many of the register values 1022 - * and hence can come up in somewhat unpredictable states. 1023 - * Hence reset everything on driver load. 1024 - **/ 1025 - static int sca3000_clean_setup(struct sca3000_state *st) 1026 - { 1027 - int ret; 1028 - 1029 - mutex_lock(&st->lock); 1030 - /* Ensure all interrupts have been acknowledged */ 1031 - ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_INT_STATUS, 1); 1032 - if (ret) 1033 - goto error_ret; 1034 - 1035 - /* Turn off all motion detection channels */ 1036 - ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_MD_CTRL); 1037 - if (ret < 0) 1038 - goto error_ret; 1039 - ret = sca3000_write_ctrl_reg(st, SCA3000_REG_CTRL_SEL_MD_CTRL, 1040 - ret & SCA3000_MD_CTRL_PROT_MASK); 1041 - if (ret) 1042 - goto error_ret; 1043 - 1044 - /* Disable ring buffer */ 1045 - ret = sca3000_read_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL); 1046 - if (ret < 0) 1047 - goto error_ret; 1048 - ret = sca3000_write_ctrl_reg(st, SCA3000_REG_CTRL_SEL_OUT_CTRL, 1049 - (ret & SCA3000_OUT_CTRL_PROT_MASK) 1050 - | SCA3000_OUT_CTRL_BUF_X_EN 1051 - | SCA3000_OUT_CTRL_BUF_Y_EN 1052 - | SCA3000_OUT_CTRL_BUF_Z_EN 1053 - | SCA3000_OUT_CTRL_BUF_DIV_4); 1054 - if (ret) 1055 - goto error_ret; 1056 - /* Enable interrupts, relevant to mode and set up as active low */ 1057 - ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_INT_MASK, 1); 1058 - if (ret) 1059 - goto error_ret; 1060 - ret = sca3000_write_reg(st, 1061 - SCA3000_REG_ADDR_INT_MASK, 1062 - (ret & SCA3000_INT_MASK_PROT_MASK) 1063 - | SCA3000_INT_MASK_ACTIVE_LOW); 1064 - if (ret) 1065 - goto error_ret; 1066 - /* 1067 - * Select normal measurement mode, free fall off, ring off 1068 - * Ring in 12 bit mode - it is fine to overwrite reserved bits 3,5 1069 - * as that occurs in one of the example on the datasheet 1070 - */ 1071 - ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1); 1072 - if (ret) 1073 - goto error_ret; 1074 - ret = sca3000_write_reg(st, SCA3000_REG_ADDR_MODE, 1075 - (st->rx[0] & SCA3000_MODE_PROT_MASK)); 1076 - st->bpse = 11; 1077 - 1078 - error_ret: 1079 - mutex_unlock(&st->lock); 1080 - return ret; 1081 - } 1082 - 1083 - static const struct iio_info sca3000_info = { 1084 - .attrs = &sca3000_attribute_group, 1085 - .read_raw = &sca3000_read_raw, 1086 - .write_raw = &sca3000_write_raw, 1087 - .event_attrs = &sca3000_event_attribute_group, 1088 - .read_event_value = &sca3000_read_thresh, 1089 - .write_event_value = &sca3000_write_thresh, 1090 - .read_event_config = &sca3000_read_event_config, 1091 - .write_event_config = &sca3000_write_event_config, 1092 - .driver_module = THIS_MODULE, 1093 - }; 1094 - 1095 - static int sca3000_probe(struct spi_device *spi) 1096 - { 1097 - int ret; 1098 - struct sca3000_state *st; 1099 - struct iio_dev *indio_dev; 1100 - 1101 - indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 1102 - if (!indio_dev) 1103 - return -ENOMEM; 1104 - 1105 - st = iio_priv(indio_dev); 1106 - spi_set_drvdata(spi, indio_dev); 1107 - st->us = spi; 1108 - mutex_init(&st->lock); 1109 - st->info = &sca3000_spi_chip_info_tbl[spi_get_device_id(spi) 1110 - ->driver_data]; 1111 - 1112 - indio_dev->dev.parent = &spi->dev; 1113 - indio_dev->name = spi_get_device_id(spi)->name; 1114 - indio_dev->info = &sca3000_info; 1115 - if (st->info->temp_output) { 1116 - indio_dev->channels = sca3000_channels_with_temp; 1117 - indio_dev->num_channels = 1118 - ARRAY_SIZE(sca3000_channels_with_temp); 1119 - } else { 1120 - indio_dev->channels = sca3000_channels; 1121 - indio_dev->num_channels = ARRAY_SIZE(sca3000_channels); 1122 - } 1123 - indio_dev->modes = INDIO_DIRECT_MODE; 1124 - 1125 - sca3000_configure_ring(indio_dev); 1126 - ret = iio_device_register(indio_dev); 1127 - if (ret < 0) 1128 - return ret; 1129 - 1130 - if (spi->irq) { 1131 - ret = request_threaded_irq(spi->irq, 1132 - NULL, 1133 - &sca3000_event_handler, 1134 - IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 1135 - "sca3000", 1136 - indio_dev); 1137 - if (ret) 1138 - goto error_unregister_dev; 1139 - } 1140 - sca3000_register_ring_funcs(indio_dev); 1141 - ret = sca3000_clean_setup(st); 1142 - if (ret) 1143 - goto error_free_irq; 1144 - return 0; 1145 - 1146 - error_free_irq: 1147 - if (spi->irq) 1148 - free_irq(spi->irq, indio_dev); 1149 - error_unregister_dev: 1150 - iio_device_unregister(indio_dev); 1151 - return ret; 1152 - } 1153 - 1154 - static int sca3000_stop_all_interrupts(struct sca3000_state *st) 1155 - { 1156 - int ret; 1157 - 1158 - mutex_lock(&st->lock); 1159 - ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_INT_MASK, 1); 1160 - if (ret) 1161 - goto error_ret; 1162 - ret = sca3000_write_reg(st, SCA3000_REG_ADDR_INT_MASK, 1163 - (st->rx[0] & 1164 - ~(SCA3000_INT_MASK_RING_THREE_QUARTER | 1165 - SCA3000_INT_MASK_RING_HALF | 1166 - SCA3000_INT_MASK_ALL_INTS))); 1167 - error_ret: 1168 - mutex_unlock(&st->lock); 1169 - return ret; 1170 - } 1171 - 1172 - static int sca3000_remove(struct spi_device *spi) 1173 - { 1174 - struct iio_dev *indio_dev = spi_get_drvdata(spi); 1175 - struct sca3000_state *st = iio_priv(indio_dev); 1176 - 1177 - /* Must ensure no interrupts can be generated after this! */ 1178 - sca3000_stop_all_interrupts(st); 1179 - if (spi->irq) 1180 - free_irq(spi->irq, indio_dev); 1181 - iio_device_unregister(indio_dev); 1182 - sca3000_unconfigure_ring(indio_dev); 1183 - 1184 - return 0; 1185 - } 1186 - 1187 - static const struct spi_device_id sca3000_id[] = { 1188 - {"sca3000_d01", d01}, 1189 - {"sca3000_e02", e02}, 1190 - {"sca3000_e04", e04}, 1191 - {"sca3000_e05", e05}, 1192 - {} 1193 - }; 1194 - MODULE_DEVICE_TABLE(spi, sca3000_id); 1195 - 1196 - static struct spi_driver sca3000_driver = { 1197 - .driver = { 1198 - .name = "sca3000", 1199 - }, 1200 - .probe = sca3000_probe, 1201 - .remove = sca3000_remove, 1202 - .id_table = sca3000_id, 1203 - }; 1204 - module_spi_driver(sca3000_driver); 1205 - 1206 - MODULE_AUTHOR("Jonathan Cameron <jic23@kernel.org>"); 1207 - MODULE_DESCRIPTION("VTI SCA3000 Series Accelerometers SPI driver"); 1208 - MODULE_LICENSE("GPL v2");
-350
drivers/staging/iio/accel/sca3000_ring.c
··· 1 - /* 2 - * sca3000_ring.c -- support VTI sca3000 series accelerometers via SPI 3 - * 4 - * This program is free software; you can redistribute it and/or modify it 5 - * under the terms of the GNU General Public License version 2 as published by 6 - * the Free Software Foundation. 7 - * 8 - * Copyright (c) 2009 Jonathan Cameron <jic23@kernel.org> 9 - * 10 - */ 11 - 12 - #include <linux/interrupt.h> 13 - #include <linux/fs.h> 14 - #include <linux/slab.h> 15 - #include <linux/kernel.h> 16 - #include <linux/spi/spi.h> 17 - #include <linux/sysfs.h> 18 - #include <linux/sched.h> 19 - #include <linux/poll.h> 20 - 21 - #include <linux/iio/iio.h> 22 - #include <linux/iio/sysfs.h> 23 - #include <linux/iio/buffer.h> 24 - #include "../ring_hw.h" 25 - #include "sca3000.h" 26 - 27 - /* RFC / future work 28 - * 29 - * The internal ring buffer doesn't actually change what it holds depending 30 - * on which signals are enabled etc, merely whether you can read them. 31 - * As such the scan mode selection is somewhat different than for a software 32 - * ring buffer and changing it actually covers any data already in the buffer. 33 - * Currently scan elements aren't configured so it doesn't matter. 34 - */ 35 - 36 - static int sca3000_read_data(struct sca3000_state *st, 37 - u8 reg_address_high, 38 - u8 **rx_p, 39 - int len) 40 - { 41 - int ret; 42 - struct spi_transfer xfer[2] = { 43 - { 44 - .len = 1, 45 - .tx_buf = st->tx, 46 - }, { 47 - .len = len, 48 - } 49 - }; 50 - *rx_p = kmalloc(len, GFP_KERNEL); 51 - if (!*rx_p) { 52 - ret = -ENOMEM; 53 - goto error_ret; 54 - } 55 - xfer[1].rx_buf = *rx_p; 56 - st->tx[0] = SCA3000_READ_REG(reg_address_high); 57 - ret = spi_sync_transfer(st->us, xfer, ARRAY_SIZE(xfer)); 58 - if (ret) { 59 - dev_err(get_device(&st->us->dev), "problem reading register"); 60 - goto error_free_rx; 61 - } 62 - 63 - return 0; 64 - error_free_rx: 65 - kfree(*rx_p); 66 - error_ret: 67 - return ret; 68 - } 69 - 70 - /** 71 - * sca3000_read_first_n_hw_rb() - main ring access, pulls data from ring 72 - * @r: the ring 73 - * @count: number of samples to try and pull 74 - * @data: output the actual samples pulled from the hw ring 75 - * 76 - * Currently does not provide timestamps. As the hardware doesn't add them they 77 - * can only be inferred approximately from ring buffer events such as 50% full 78 - * and knowledge of when buffer was last emptied. This is left to userspace. 79 - **/ 80 - static int sca3000_read_first_n_hw_rb(struct iio_buffer *r, 81 - size_t count, char __user *buf) 82 - { 83 - struct iio_hw_buffer *hw_ring = iio_to_hw_buf(r); 84 - struct iio_dev *indio_dev = hw_ring->private; 85 - struct sca3000_state *st = iio_priv(indio_dev); 86 - u8 *rx; 87 - int ret, i, num_available, num_read = 0; 88 - int bytes_per_sample = 1; 89 - 90 - if (st->bpse == 11) 91 - bytes_per_sample = 2; 92 - 93 - mutex_lock(&st->lock); 94 - if (count % bytes_per_sample) { 95 - ret = -EINVAL; 96 - goto error_ret; 97 - } 98 - 99 - ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_BUF_COUNT, 1); 100 - if (ret) 101 - goto error_ret; 102 - num_available = st->rx[0]; 103 - /* 104 - * num_available is the total number of samples available 105 - * i.e. number of time points * number of channels. 106 - */ 107 - if (count > num_available * bytes_per_sample) 108 - num_read = num_available * bytes_per_sample; 109 - else 110 - num_read = count; 111 - 112 - ret = sca3000_read_data(st, 113 - SCA3000_REG_ADDR_RING_OUT, 114 - &rx, num_read); 115 - if (ret) 116 - goto error_ret; 117 - 118 - for (i = 0; i < num_read / sizeof(u16); i++) 119 - *(((u16 *)rx) + i) = be16_to_cpup((__be16 *)rx + i); 120 - 121 - if (copy_to_user(buf, rx, num_read)) 122 - ret = -EFAULT; 123 - kfree(rx); 124 - r->stufftoread = 0; 125 - error_ret: 126 - mutex_unlock(&st->lock); 127 - 128 - return ret ? ret : num_read; 129 - } 130 - 131 - static size_t sca3000_ring_buf_data_available(struct iio_buffer *r) 132 - { 133 - return r->stufftoread ? r->watermark : 0; 134 - } 135 - 136 - /** 137 - * sca3000_query_ring_int() is the hardware ring status interrupt enabled 138 - **/ 139 - static ssize_t sca3000_query_ring_int(struct device *dev, 140 - struct device_attribute *attr, 141 - char *buf) 142 - { 143 - struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 144 - int ret, val; 145 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 146 - struct sca3000_state *st = iio_priv(indio_dev); 147 - 148 - mutex_lock(&st->lock); 149 - ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_INT_MASK, 1); 150 - val = st->rx[0]; 151 - mutex_unlock(&st->lock); 152 - if (ret) 153 - return ret; 154 - 155 - return sprintf(buf, "%d\n", !!(val & this_attr->address)); 156 - } 157 - 158 - /** 159 - * sca3000_set_ring_int() set state of ring status interrupt 160 - **/ 161 - static ssize_t sca3000_set_ring_int(struct device *dev, 162 - struct device_attribute *attr, 163 - const char *buf, 164 - size_t len) 165 - { 166 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 167 - struct sca3000_state *st = iio_priv(indio_dev); 168 - struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 169 - u8 val; 170 - int ret; 171 - 172 - mutex_lock(&st->lock); 173 - ret = kstrtou8(buf, 10, &val); 174 - if (ret) 175 - goto error_ret; 176 - ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_INT_MASK, 1); 177 - if (ret) 178 - goto error_ret; 179 - if (val) 180 - ret = sca3000_write_reg(st, 181 - SCA3000_REG_ADDR_INT_MASK, 182 - st->rx[0] | this_attr->address); 183 - else 184 - ret = sca3000_write_reg(st, 185 - SCA3000_REG_ADDR_INT_MASK, 186 - st->rx[0] & ~this_attr->address); 187 - error_ret: 188 - mutex_unlock(&st->lock); 189 - 190 - return ret ? ret : len; 191 - } 192 - 193 - static IIO_DEVICE_ATTR(50_percent, S_IRUGO | S_IWUSR, 194 - sca3000_query_ring_int, 195 - sca3000_set_ring_int, 196 - SCA3000_INT_MASK_RING_HALF); 197 - 198 - static IIO_DEVICE_ATTR(75_percent, S_IRUGO | S_IWUSR, 199 - sca3000_query_ring_int, 200 - sca3000_set_ring_int, 201 - SCA3000_INT_MASK_RING_THREE_QUARTER); 202 - 203 - static ssize_t sca3000_show_buffer_scale(struct device *dev, 204 - struct device_attribute *attr, 205 - char *buf) 206 - { 207 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 208 - struct sca3000_state *st = iio_priv(indio_dev); 209 - 210 - return sprintf(buf, "0.%06d\n", 4 * st->info->scale); 211 - } 212 - 213 - static IIO_DEVICE_ATTR(in_accel_scale, 214 - S_IRUGO, 215 - sca3000_show_buffer_scale, 216 - NULL, 217 - 0); 218 - 219 - /* 220 - * Ring buffer attributes 221 - * This device is a bit unusual in that the sampling frequency and bpse 222 - * only apply to the ring buffer. At all times full rate and accuracy 223 - * is available via direct reading from registers. 224 - */ 225 - static const struct attribute *sca3000_ring_attributes[] = { 226 - &iio_dev_attr_50_percent.dev_attr.attr, 227 - &iio_dev_attr_75_percent.dev_attr.attr, 228 - &iio_dev_attr_in_accel_scale.dev_attr.attr, 229 - NULL, 230 - }; 231 - 232 - static struct iio_buffer *sca3000_rb_allocate(struct iio_dev *indio_dev) 233 - { 234 - struct iio_buffer *buf; 235 - struct iio_hw_buffer *ring; 236 - 237 - ring = kzalloc(sizeof(*ring), GFP_KERNEL); 238 - if (!ring) 239 - return NULL; 240 - 241 - ring->private = indio_dev; 242 - buf = &ring->buf; 243 - buf->stufftoread = 0; 244 - buf->length = 64; 245 - buf->attrs = sca3000_ring_attributes; 246 - iio_buffer_init(buf); 247 - 248 - return buf; 249 - } 250 - 251 - static void sca3000_ring_release(struct iio_buffer *r) 252 - { 253 - kfree(iio_to_hw_buf(r)); 254 - } 255 - 256 - static const struct iio_buffer_access_funcs sca3000_ring_access_funcs = { 257 - .read_first_n = &sca3000_read_first_n_hw_rb, 258 - .data_available = sca3000_ring_buf_data_available, 259 - .release = sca3000_ring_release, 260 - 261 - .modes = INDIO_BUFFER_HARDWARE, 262 - }; 263 - 264 - int sca3000_configure_ring(struct iio_dev *indio_dev) 265 - { 266 - struct iio_buffer *buffer; 267 - 268 - buffer = sca3000_rb_allocate(indio_dev); 269 - if (!buffer) 270 - return -ENOMEM; 271 - indio_dev->modes |= INDIO_BUFFER_HARDWARE; 272 - 273 - indio_dev->buffer->access = &sca3000_ring_access_funcs; 274 - 275 - iio_device_attach_buffer(indio_dev, buffer); 276 - 277 - return 0; 278 - } 279 - 280 - void sca3000_unconfigure_ring(struct iio_dev *indio_dev) 281 - { 282 - iio_buffer_put(indio_dev->buffer); 283 - } 284 - 285 - static inline 286 - int __sca3000_hw_ring_state_set(struct iio_dev *indio_dev, bool state) 287 - { 288 - struct sca3000_state *st = iio_priv(indio_dev); 289 - int ret; 290 - 291 - mutex_lock(&st->lock); 292 - ret = sca3000_read_data_short(st, SCA3000_REG_ADDR_MODE, 1); 293 - if (ret) 294 - goto error_ret; 295 - if (state) { 296 - dev_info(&indio_dev->dev, "supposedly enabling ring buffer\n"); 297 - ret = sca3000_write_reg(st, 298 - SCA3000_REG_ADDR_MODE, 299 - (st->rx[0] | SCA3000_RING_BUF_ENABLE)); 300 - } else 301 - ret = sca3000_write_reg(st, 302 - SCA3000_REG_ADDR_MODE, 303 - (st->rx[0] & ~SCA3000_RING_BUF_ENABLE)); 304 - error_ret: 305 - mutex_unlock(&st->lock); 306 - 307 - return ret; 308 - } 309 - 310 - /** 311 - * sca3000_hw_ring_preenable() hw ring buffer preenable function 312 - * 313 - * Very simple enable function as the chip will allows normal reads 314 - * during ring buffer operation so as long as it is indeed running 315 - * before we notify the core, the precise ordering does not matter. 316 - **/ 317 - static int sca3000_hw_ring_preenable(struct iio_dev *indio_dev) 318 - { 319 - return __sca3000_hw_ring_state_set(indio_dev, 1); 320 - } 321 - 322 - static int sca3000_hw_ring_postdisable(struct iio_dev *indio_dev) 323 - { 324 - return __sca3000_hw_ring_state_set(indio_dev, 0); 325 - } 326 - 327 - static const struct iio_buffer_setup_ops sca3000_ring_setup_ops = { 328 - .preenable = &sca3000_hw_ring_preenable, 329 - .postdisable = &sca3000_hw_ring_postdisable, 330 - }; 331 - 332 - void sca3000_register_ring_funcs(struct iio_dev *indio_dev) 333 - { 334 - indio_dev->setup_ops = &sca3000_ring_setup_ops; 335 - } 336 - 337 - /** 338 - * sca3000_ring_int_process() ring specific interrupt handling. 339 - * 340 - * This is only split from the main interrupt handler so as to 341 - * reduce the amount of code if the ring buffer is not enabled. 342 - **/ 343 - void sca3000_ring_int_process(u8 val, struct iio_buffer *ring) 344 - { 345 - if (val & (SCA3000_INT_STATUS_THREE_QUARTERS | 346 - SCA3000_INT_STATUS_HALF)) { 347 - ring->stufftoread = true; 348 - wake_up_interruptible(&ring->pollq); 349 - } 350 - }
-1
drivers/staging/iio/adc/Makefile
··· 2 2 # Makefile for industrial I/O ADC drivers 3 3 # 4 4 5 - ad7606-y := ad7606_core.o ad7606_ring.o 6 5 obj-$(CONFIG_AD7606_IFACE_PARALLEL) += ad7606_par.o 7 6 obj-$(CONFIG_AD7606_IFACE_SPI) += ad7606_spi.o 8 7 obj-$(CONFIG_AD7606) += ad7606.o
+29 -55
drivers/staging/iio/adc/ad7192.c
··· 322 322 return ret; 323 323 } 324 324 325 - static ssize_t ad7192_read_frequency(struct device *dev, 326 - struct device_attribute *attr, 327 - char *buf) 328 - { 329 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 330 - struct ad7192_state *st = iio_priv(indio_dev); 331 - 332 - return sprintf(buf, "%d\n", st->mclk / 333 - (st->f_order * 1024 * AD7192_MODE_RATE(st->mode))); 334 - } 335 - 336 - static ssize_t ad7192_write_frequency(struct device *dev, 337 - struct device_attribute *attr, 338 - const char *buf, 339 - size_t len) 340 - { 341 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 342 - struct ad7192_state *st = iio_priv(indio_dev); 343 - unsigned long lval; 344 - int div, ret; 345 - 346 - ret = kstrtoul(buf, 10, &lval); 347 - if (ret) 348 - return ret; 349 - if (lval == 0) 350 - return -EINVAL; 351 - 352 - ret = iio_device_claim_direct_mode(indio_dev); 353 - if (ret) 354 - return ret; 355 - 356 - div = st->mclk / (lval * st->f_order * 1024); 357 - if (div < 1 || div > 1023) { 358 - ret = -EINVAL; 359 - goto out; 360 - } 361 - 362 - st->mode &= ~AD7192_MODE_RATE(-1); 363 - st->mode |= AD7192_MODE_RATE(div); 364 - ad_sd_write_reg(&st->sd, AD7192_REG_MODE, 3, st->mode); 365 - 366 - out: 367 - iio_device_release_direct_mode(indio_dev); 368 - 369 - return ret ? ret : len; 370 - } 371 - 372 - static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO, 373 - ad7192_read_frequency, 374 - ad7192_write_frequency); 375 - 376 325 static ssize_t 377 326 ad7192_show_scale_available(struct device *dev, 378 327 struct device_attribute *attr, char *buf) ··· 420 471 AD7192_REG_MODE); 421 472 422 473 static struct attribute *ad7192_attributes[] = { 423 - &iio_dev_attr_sampling_frequency.dev_attr.attr, 424 474 &iio_dev_attr_in_v_m_v_scale_available.dev_attr.attr, 425 475 &iio_dev_attr_in_voltage_scale_available.dev_attr.attr, 426 476 &iio_dev_attr_bridge_switch_en.dev_attr.attr, ··· 432 484 }; 433 485 434 486 static struct attribute *ad7195_attributes[] = { 435 - &iio_dev_attr_sampling_frequency.dev_attr.attr, 436 487 &iio_dev_attr_in_v_m_v_scale_available.dev_attr.attr, 437 488 &iio_dev_attr_in_voltage_scale_available.dev_attr.attr, 438 489 &iio_dev_attr_bridge_switch_en.dev_attr.attr, ··· 483 536 if (chan->type == IIO_TEMP) 484 537 *val -= 273 * ad7192_get_temp_scale(unipolar); 485 538 return IIO_VAL_INT; 539 + case IIO_CHAN_INFO_SAMP_FREQ: 540 + *val = st->mclk / 541 + (st->f_order * 1024 * AD7192_MODE_RATE(st->mode)); 542 + return IIO_VAL_INT; 486 543 } 487 544 488 545 return -EINVAL; ··· 499 548 long mask) 500 549 { 501 550 struct ad7192_state *st = iio_priv(indio_dev); 502 - int ret, i; 551 + int ret, i, div; 503 552 unsigned int tmp; 504 553 505 554 ret = iio_device_claim_direct_mode(indio_dev); ··· 523 572 break; 524 573 } 525 574 break; 575 + case IIO_CHAN_INFO_SAMP_FREQ: 576 + if (!val) { 577 + ret = -EINVAL; 578 + break; 579 + } 580 + 581 + div = st->mclk / (val * st->f_order * 1024); 582 + if (div < 1 || div > 1023) { 583 + ret = -EINVAL; 584 + break; 585 + } 586 + 587 + st->mode &= ~AD7192_MODE_RATE(-1); 588 + st->mode |= AD7192_MODE_RATE(div); 589 + ad_sd_write_reg(&st->sd, AD7192_REG_MODE, 3, st->mode); 590 + break; 526 591 default: 527 592 ret = -EINVAL; 528 593 } ··· 552 585 struct iio_chan_spec const *chan, 553 586 long mask) 554 587 { 555 - return IIO_VAL_INT_PLUS_NANO; 588 + switch (mask) { 589 + case IIO_CHAN_INFO_SCALE: 590 + return IIO_VAL_INT_PLUS_NANO; 591 + case IIO_CHAN_INFO_SAMP_FREQ: 592 + return IIO_VAL_INT; 593 + default: 594 + return -EINVAL; 595 + } 556 596 } 557 597 558 598 static const struct iio_info ad7192_info = {
+1 -1
drivers/staging/iio/adc/ad7280a.c
··· 777 777 NULL, 778 778 }; 779 779 780 - static struct attribute_group ad7280_event_attrs_group = { 780 + static const struct attribute_group ad7280_event_attrs_group = { 781 781 .attrs = ad7280_event_attributes, 782 782 }; 783 783
+543
drivers/staging/iio/adc/ad7606.c
··· 1 + /* 2 + * AD7606 SPI ADC driver 3 + * 4 + * Copyright 2011 Analog Devices Inc. 5 + * 6 + * Licensed under the GPL-2. 7 + */ 8 + 9 + #include <linux/interrupt.h> 10 + #include <linux/device.h> 11 + #include <linux/kernel.h> 12 + #include <linux/slab.h> 13 + #include <linux/sysfs.h> 14 + #include <linux/regulator/consumer.h> 15 + #include <linux/err.h> 16 + #include <linux/gpio/consumer.h> 17 + #include <linux/delay.h> 18 + #include <linux/sched.h> 19 + #include <linux/module.h> 20 + 21 + #include <linux/iio/iio.h> 22 + #include <linux/iio/sysfs.h> 23 + #include <linux/iio/buffer.h> 24 + #include <linux/iio/trigger_consumer.h> 25 + #include <linux/iio/triggered_buffer.h> 26 + 27 + #include "ad7606.h" 28 + 29 + static int ad7606_reset(struct ad7606_state *st) 30 + { 31 + if (st->gpio_reset) { 32 + gpiod_set_value(st->gpio_reset, 1); 33 + ndelay(100); /* t_reset >= 100ns */ 34 + gpiod_set_value(st->gpio_reset, 0); 35 + return 0; 36 + } 37 + 38 + return -ENODEV; 39 + } 40 + 41 + static int ad7606_read_samples(struct ad7606_state *st) 42 + { 43 + unsigned int num = st->chip_info->num_channels; 44 + u16 *data = st->data; 45 + int ret; 46 + 47 + /* 48 + * The frstdata signal is set to high while and after reading the sample 49 + * of the first channel and low for all other channels. This can be used 50 + * to check that the incoming data is correctly aligned. During normal 51 + * operation the data should never become unaligned, but some glitch or 52 + * electrostatic discharge might cause an extra read or clock cycle. 53 + * Monitoring the frstdata signal allows to recover from such failure 54 + * situations. 55 + */ 56 + 57 + if (st->gpio_frstdata) { 58 + ret = st->bops->read_block(st->dev, 1, data); 59 + if (ret) 60 + return ret; 61 + 62 + if (!gpiod_get_value(st->gpio_frstdata)) { 63 + ad7606_reset(st); 64 + return -EIO; 65 + } 66 + 67 + data++; 68 + num--; 69 + } 70 + 71 + return st->bops->read_block(st->dev, num, data); 72 + } 73 + 74 + static irqreturn_t ad7606_trigger_handler(int irq, void *p) 75 + { 76 + struct iio_poll_func *pf = p; 77 + struct ad7606_state *st = iio_priv(pf->indio_dev); 78 + 79 + gpiod_set_value(st->gpio_convst, 1); 80 + 81 + return IRQ_HANDLED; 82 + } 83 + 84 + /** 85 + * ad7606_poll_bh_to_ring() bh of trigger launched polling to ring buffer 86 + * @work_s: the work struct through which this was scheduled 87 + * 88 + * Currently there is no option in this driver to disable the saving of 89 + * timestamps within the ring. 90 + * I think the one copy of this at a time was to avoid problems if the 91 + * trigger was set far too high and the reads then locked up the computer. 92 + **/ 93 + static void ad7606_poll_bh_to_ring(struct work_struct *work_s) 94 + { 95 + struct ad7606_state *st = container_of(work_s, struct ad7606_state, 96 + poll_work); 97 + struct iio_dev *indio_dev = iio_priv_to_dev(st); 98 + int ret; 99 + 100 + ret = ad7606_read_samples(st); 101 + if (ret == 0) 102 + iio_push_to_buffers_with_timestamp(indio_dev, st->data, 103 + iio_get_time_ns(indio_dev)); 104 + 105 + gpiod_set_value(st->gpio_convst, 0); 106 + iio_trigger_notify_done(indio_dev->trig); 107 + } 108 + 109 + static int ad7606_scan_direct(struct iio_dev *indio_dev, unsigned int ch) 110 + { 111 + struct ad7606_state *st = iio_priv(indio_dev); 112 + int ret; 113 + 114 + st->done = false; 115 + gpiod_set_value(st->gpio_convst, 1); 116 + 117 + ret = wait_event_interruptible(st->wq_data_avail, st->done); 118 + if (ret) 119 + goto error_ret; 120 + 121 + ret = ad7606_read_samples(st); 122 + if (ret == 0) 123 + ret = st->data[ch]; 124 + 125 + error_ret: 126 + gpiod_set_value(st->gpio_convst, 0); 127 + 128 + return ret; 129 + } 130 + 131 + static int ad7606_read_raw(struct iio_dev *indio_dev, 132 + struct iio_chan_spec const *chan, 133 + int *val, 134 + int *val2, 135 + long m) 136 + { 137 + int ret; 138 + struct ad7606_state *st = iio_priv(indio_dev); 139 + 140 + switch (m) { 141 + case IIO_CHAN_INFO_RAW: 142 + ret = iio_device_claim_direct_mode(indio_dev); 143 + if (ret) 144 + return ret; 145 + 146 + ret = ad7606_scan_direct(indio_dev, chan->address); 147 + iio_device_release_direct_mode(indio_dev); 148 + 149 + if (ret < 0) 150 + return ret; 151 + *val = (short)ret; 152 + return IIO_VAL_INT; 153 + case IIO_CHAN_INFO_SCALE: 154 + *val = st->range * 2; 155 + *val2 = st->chip_info->channels[0].scan_type.realbits; 156 + return IIO_VAL_FRACTIONAL_LOG2; 157 + case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 158 + *val = st->oversampling; 159 + return IIO_VAL_INT; 160 + } 161 + return -EINVAL; 162 + } 163 + 164 + static ssize_t ad7606_show_range(struct device *dev, 165 + struct device_attribute *attr, char *buf) 166 + { 167 + struct iio_dev *indio_dev = dev_to_iio_dev(dev); 168 + struct ad7606_state *st = iio_priv(indio_dev); 169 + 170 + return sprintf(buf, "%u\n", st->range); 171 + } 172 + 173 + static ssize_t ad7606_store_range(struct device *dev, 174 + struct device_attribute *attr, 175 + const char *buf, size_t count) 176 + { 177 + struct iio_dev *indio_dev = dev_to_iio_dev(dev); 178 + struct ad7606_state *st = iio_priv(indio_dev); 179 + unsigned long lval; 180 + int ret; 181 + 182 + ret = kstrtoul(buf, 10, &lval); 183 + if (ret) 184 + return ret; 185 + 186 + if (!(lval == 5000 || lval == 10000)) 187 + return -EINVAL; 188 + 189 + mutex_lock(&indio_dev->mlock); 190 + gpiod_set_value(st->gpio_range, lval == 10000); 191 + st->range = lval; 192 + mutex_unlock(&indio_dev->mlock); 193 + 194 + return count; 195 + } 196 + 197 + static IIO_DEVICE_ATTR(in_voltage_range, S_IRUGO | S_IWUSR, 198 + ad7606_show_range, ad7606_store_range, 0); 199 + static IIO_CONST_ATTR(in_voltage_range_available, "5000 10000"); 200 + 201 + static int ad7606_oversampling_get_index(unsigned int val) 202 + { 203 + unsigned char supported[] = {1, 2, 4, 8, 16, 32, 64}; 204 + int i; 205 + 206 + for (i = 0; i < ARRAY_SIZE(supported); i++) 207 + if (val == supported[i]) 208 + return i; 209 + 210 + return -EINVAL; 211 + } 212 + 213 + static int ad7606_write_raw(struct iio_dev *indio_dev, 214 + struct iio_chan_spec const *chan, 215 + int val, 216 + int val2, 217 + long mask) 218 + { 219 + struct ad7606_state *st = iio_priv(indio_dev); 220 + int values[3]; 221 + int ret; 222 + 223 + switch (mask) { 224 + case IIO_CHAN_INFO_OVERSAMPLING_RATIO: 225 + if (val2) 226 + return -EINVAL; 227 + ret = ad7606_oversampling_get_index(val); 228 + if (ret < 0) 229 + return ret; 230 + 231 + values[0] = (ret >> 0) & 1; 232 + values[1] = (ret >> 1) & 1; 233 + values[2] = (ret >> 2) & 1; 234 + 235 + mutex_lock(&indio_dev->mlock); 236 + gpiod_set_array_value(ARRAY_SIZE(values), st->gpio_os->desc, 237 + values); 238 + st->oversampling = val; 239 + mutex_unlock(&indio_dev->mlock); 240 + 241 + return 0; 242 + default: 243 + return -EINVAL; 244 + } 245 + } 246 + 247 + static IIO_CONST_ATTR(oversampling_ratio_available, "1 2 4 8 16 32 64"); 248 + 249 + static struct attribute *ad7606_attributes_os_and_range[] = { 250 + &iio_dev_attr_in_voltage_range.dev_attr.attr, 251 + &iio_const_attr_in_voltage_range_available.dev_attr.attr, 252 + &iio_const_attr_oversampling_ratio_available.dev_attr.attr, 253 + NULL, 254 + }; 255 + 256 + static const struct attribute_group ad7606_attribute_group_os_and_range = { 257 + .attrs = ad7606_attributes_os_and_range, 258 + }; 259 + 260 + static struct attribute *ad7606_attributes_os[] = { 261 + &iio_const_attr_oversampling_ratio_available.dev_attr.attr, 262 + NULL, 263 + }; 264 + 265 + static const struct attribute_group ad7606_attribute_group_os = { 266 + .attrs = ad7606_attributes_os, 267 + }; 268 + 269 + static struct attribute *ad7606_attributes_range[] = { 270 + &iio_dev_attr_in_voltage_range.dev_attr.attr, 271 + &iio_const_attr_in_voltage_range_available.dev_attr.attr, 272 + NULL, 273 + }; 274 + 275 + static const struct attribute_group ad7606_attribute_group_range = { 276 + .attrs = ad7606_attributes_range, 277 + }; 278 + 279 + #define AD7606_CHANNEL(num) \ 280 + { \ 281 + .type = IIO_VOLTAGE, \ 282 + .indexed = 1, \ 283 + .channel = num, \ 284 + .address = num, \ 285 + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 286 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),\ 287 + .info_mask_shared_by_all = \ 288 + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ 289 + .scan_index = num, \ 290 + .scan_type = { \ 291 + .sign = 's', \ 292 + .realbits = 16, \ 293 + .storagebits = 16, \ 294 + .endianness = IIO_CPU, \ 295 + }, \ 296 + } 297 + 298 + static const struct iio_chan_spec ad7606_channels[] = { 299 + IIO_CHAN_SOFT_TIMESTAMP(8), 300 + AD7606_CHANNEL(0), 301 + AD7606_CHANNEL(1), 302 + AD7606_CHANNEL(2), 303 + AD7606_CHANNEL(3), 304 + AD7606_CHANNEL(4), 305 + AD7606_CHANNEL(5), 306 + AD7606_CHANNEL(6), 307 + AD7606_CHANNEL(7), 308 + }; 309 + 310 + static const struct ad7606_chip_info ad7606_chip_info_tbl[] = { 311 + /* 312 + * More devices added in future 313 + */ 314 + [ID_AD7606_8] = { 315 + .channels = ad7606_channels, 316 + .num_channels = 9, 317 + }, 318 + [ID_AD7606_6] = { 319 + .channels = ad7606_channels, 320 + .num_channels = 7, 321 + }, 322 + [ID_AD7606_4] = { 323 + .channels = ad7606_channels, 324 + .num_channels = 5, 325 + }, 326 + }; 327 + 328 + static int ad7606_request_gpios(struct ad7606_state *st) 329 + { 330 + struct device *dev = st->dev; 331 + 332 + st->gpio_convst = devm_gpiod_get(dev, "conversion-start", 333 + GPIOD_OUT_LOW); 334 + if (IS_ERR(st->gpio_convst)) 335 + return PTR_ERR(st->gpio_convst); 336 + 337 + st->gpio_reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); 338 + if (IS_ERR(st->gpio_reset)) 339 + return PTR_ERR(st->gpio_reset); 340 + 341 + st->gpio_range = devm_gpiod_get_optional(dev, "range", GPIOD_OUT_LOW); 342 + if (IS_ERR(st->gpio_range)) 343 + return PTR_ERR(st->gpio_range); 344 + 345 + st->gpio_standby = devm_gpiod_get_optional(dev, "standby", 346 + GPIOD_OUT_HIGH); 347 + if (IS_ERR(st->gpio_standby)) 348 + return PTR_ERR(st->gpio_standby); 349 + 350 + st->gpio_frstdata = devm_gpiod_get_optional(dev, "first-data", 351 + GPIOD_IN); 352 + if (IS_ERR(st->gpio_frstdata)) 353 + return PTR_ERR(st->gpio_frstdata); 354 + 355 + st->gpio_os = devm_gpiod_get_array_optional(dev, "oversampling-ratio", 356 + GPIOD_OUT_LOW); 357 + return PTR_ERR_OR_ZERO(st->gpio_os); 358 + } 359 + 360 + /** 361 + * Interrupt handler 362 + */ 363 + static irqreturn_t ad7606_interrupt(int irq, void *dev_id) 364 + { 365 + struct iio_dev *indio_dev = dev_id; 366 + struct ad7606_state *st = iio_priv(indio_dev); 367 + 368 + if (iio_buffer_enabled(indio_dev)) { 369 + schedule_work(&st->poll_work); 370 + } else { 371 + st->done = true; 372 + wake_up_interruptible(&st->wq_data_avail); 373 + } 374 + 375 + return IRQ_HANDLED; 376 + }; 377 + 378 + static const struct iio_info ad7606_info_no_os_or_range = { 379 + .driver_module = THIS_MODULE, 380 + .read_raw = &ad7606_read_raw, 381 + }; 382 + 383 + static const struct iio_info ad7606_info_os_and_range = { 384 + .driver_module = THIS_MODULE, 385 + .read_raw = &ad7606_read_raw, 386 + .write_raw = &ad7606_write_raw, 387 + .attrs = &ad7606_attribute_group_os_and_range, 388 + }; 389 + 390 + static const struct iio_info ad7606_info_os = { 391 + .driver_module = THIS_MODULE, 392 + .read_raw = &ad7606_read_raw, 393 + .write_raw = &ad7606_write_raw, 394 + .attrs = &ad7606_attribute_group_os, 395 + }; 396 + 397 + static const struct iio_info ad7606_info_range = { 398 + .driver_module = THIS_MODULE, 399 + .read_raw = &ad7606_read_raw, 400 + .attrs = &ad7606_attribute_group_range, 401 + }; 402 + 403 + int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, 404 + const char *name, unsigned int id, 405 + const struct ad7606_bus_ops *bops) 406 + { 407 + struct ad7606_state *st; 408 + int ret; 409 + struct iio_dev *indio_dev; 410 + 411 + indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); 412 + if (!indio_dev) 413 + return -ENOMEM; 414 + 415 + st = iio_priv(indio_dev); 416 + 417 + st->dev = dev; 418 + st->bops = bops; 419 + st->base_address = base_address; 420 + st->range = 5000; 421 + st->oversampling = 1; 422 + INIT_WORK(&st->poll_work, &ad7606_poll_bh_to_ring); 423 + 424 + st->reg = devm_regulator_get(dev, "avcc"); 425 + if (IS_ERR(st->reg)) 426 + return PTR_ERR(st->reg); 427 + 428 + ret = regulator_enable(st->reg); 429 + if (ret) { 430 + dev_err(dev, "Failed to enable specified AVcc supply\n"); 431 + return ret; 432 + } 433 + 434 + ret = ad7606_request_gpios(st); 435 + if (ret) 436 + goto error_disable_reg; 437 + 438 + st->chip_info = &ad7606_chip_info_tbl[id]; 439 + 440 + indio_dev->dev.parent = dev; 441 + if (st->gpio_os) { 442 + if (st->gpio_range) 443 + indio_dev->info = &ad7606_info_os_and_range; 444 + else 445 + indio_dev->info = &ad7606_info_os; 446 + } else { 447 + if (st->gpio_range) 448 + indio_dev->info = &ad7606_info_range; 449 + else 450 + indio_dev->info = &ad7606_info_no_os_or_range; 451 + } 452 + indio_dev->modes = INDIO_DIRECT_MODE; 453 + indio_dev->name = name; 454 + indio_dev->channels = st->chip_info->channels; 455 + indio_dev->num_channels = st->chip_info->num_channels; 456 + 457 + init_waitqueue_head(&st->wq_data_avail); 458 + 459 + ret = ad7606_reset(st); 460 + if (ret) 461 + dev_warn(st->dev, "failed to RESET: no RESET GPIO specified\n"); 462 + 463 + ret = request_irq(irq, ad7606_interrupt, IRQF_TRIGGER_FALLING, name, 464 + indio_dev); 465 + if (ret) 466 + goto error_disable_reg; 467 + 468 + ret = iio_triggered_buffer_setup(indio_dev, &ad7606_trigger_handler, 469 + NULL, NULL); 470 + if (ret) 471 + goto error_free_irq; 472 + 473 + ret = iio_device_register(indio_dev); 474 + if (ret) 475 + goto error_unregister_ring; 476 + 477 + dev_set_drvdata(dev, indio_dev); 478 + 479 + return 0; 480 + error_unregister_ring: 481 + iio_triggered_buffer_cleanup(indio_dev); 482 + 483 + error_free_irq: 484 + free_irq(irq, indio_dev); 485 + 486 + error_disable_reg: 487 + regulator_disable(st->reg); 488 + return ret; 489 + } 490 + EXPORT_SYMBOL_GPL(ad7606_probe); 491 + 492 + int ad7606_remove(struct device *dev, int irq) 493 + { 494 + struct iio_dev *indio_dev = dev_get_drvdata(dev); 495 + struct ad7606_state *st = iio_priv(indio_dev); 496 + 497 + iio_device_unregister(indio_dev); 498 + iio_triggered_buffer_cleanup(indio_dev); 499 + 500 + free_irq(irq, indio_dev); 501 + regulator_disable(st->reg); 502 + 503 + return 0; 504 + } 505 + EXPORT_SYMBOL_GPL(ad7606_remove); 506 + 507 + #ifdef CONFIG_PM_SLEEP 508 + 509 + static int ad7606_suspend(struct device *dev) 510 + { 511 + struct iio_dev *indio_dev = dev_get_drvdata(dev); 512 + struct ad7606_state *st = iio_priv(indio_dev); 513 + 514 + if (st->gpio_standby) { 515 + gpiod_set_value(st->gpio_range, 1); 516 + gpiod_set_value(st->gpio_standby, 0); 517 + } 518 + 519 + return 0; 520 + } 521 + 522 + static int ad7606_resume(struct device *dev) 523 + { 524 + struct iio_dev *indio_dev = dev_get_drvdata(dev); 525 + struct ad7606_state *st = iio_priv(indio_dev); 526 + 527 + if (st->gpio_standby) { 528 + gpiod_set_value(st->gpio_range, st->range == 10000); 529 + gpiod_set_value(st->gpio_standby, 1); 530 + ad7606_reset(st); 531 + } 532 + 533 + return 0; 534 + } 535 + 536 + SIMPLE_DEV_PM_OPS(ad7606_pm_ops, ad7606_suspend, ad7606_resume); 537 + EXPORT_SYMBOL_GPL(ad7606_pm_ops); 538 + 539 + #endif 540 + 541 + MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); 542 + MODULE_DESCRIPTION("Analog Devices AD7606 ADC"); 543 + MODULE_LICENSE("GPL v2");
+13 -45
drivers/staging/iio/adc/ad7606.h
··· 9 9 #ifndef IIO_ADC_AD7606_H_ 10 10 #define IIO_ADC_AD7606_H_ 11 11 12 - /* 13 - * TODO: struct ad7606_platform_data needs to go into include/linux/iio 14 - */ 15 - 16 - /** 17 - * struct ad7606_platform_data - platform/board specific information 18 - * @default_os: default oversampling value {0, 2, 4, 8, 16, 32, 64} 19 - * @default_range: default range +/-{5000, 10000} mVolt 20 - * @gpio_convst: number of gpio connected to the CONVST pin 21 - * @gpio_reset: gpio connected to the RESET pin, if not used set to -1 22 - * @gpio_range: gpio connected to the RANGE pin, if not used set to -1 23 - * @gpio_os0: gpio connected to the OS0 pin, if not used set to -1 24 - * @gpio_os1: gpio connected to the OS1 pin, if not used set to -1 25 - * @gpio_os2: gpio connected to the OS2 pin, if not used set to -1 26 - * @gpio_frstdata: gpio connected to the FRSTDAT pin, if not used set to -1 27 - * @gpio_stby: gpio connected to the STBY pin, if not used set to -1 28 - */ 29 - 30 - struct ad7606_platform_data { 31 - unsigned int default_os; 32 - unsigned int default_range; 33 - unsigned int gpio_convst; 34 - unsigned int gpio_reset; 35 - unsigned int gpio_range; 36 - unsigned int gpio_os0; 37 - unsigned int gpio_os1; 38 - unsigned int gpio_os2; 39 - unsigned int gpio_frstdata; 40 - unsigned int gpio_stby; 41 - }; 42 - 43 12 /** 44 13 * struct ad7606_chip_info - chip specific information 45 14 * @name: identification string for chip 46 - * @int_vref_mv: the internal reference voltage 47 15 * @channels: channel specification 48 16 * @num_channels: number of channels 49 17 */ 50 18 51 19 struct ad7606_chip_info { 52 - const char *name; 53 - u16 int_vref_mv; 54 20 const struct iio_chan_spec *channels; 55 21 unsigned int num_channels; 56 22 }; ··· 28 62 struct ad7606_state { 29 63 struct device *dev; 30 64 const struct ad7606_chip_info *chip_info; 31 - struct ad7606_platform_data *pdata; 32 65 struct regulator *reg; 33 66 struct work_struct poll_work; 34 67 wait_queue_head_t wq_data_avail; ··· 37 72 bool done; 38 73 void __iomem *base_address; 39 74 75 + struct gpio_desc *gpio_convst; 76 + struct gpio_desc *gpio_reset; 77 + struct gpio_desc *gpio_range; 78 + struct gpio_desc *gpio_standby; 79 + struct gpio_desc *gpio_frstdata; 80 + struct gpio_descs *gpio_os; 81 + 40 82 /* 41 83 * DMA (thus cache coherency maintenance) requires the 42 84 * transfer buffers to live in their own cache lines. 85 + * 8 * 16-bit samples + 64-bit timestamp 43 86 */ 44 - 45 - unsigned short data[8] ____cacheline_aligned; 87 + unsigned short data[12] ____cacheline_aligned; 46 88 }; 47 89 48 90 struct ad7606_bus_ops { ··· 57 85 int (*read_block)(struct device *, int, void *); 58 86 }; 59 87 60 - struct iio_dev *ad7606_probe(struct device *dev, int irq, 61 - void __iomem *base_address, unsigned int id, 62 - const struct ad7606_bus_ops *bops); 63 - int ad7606_remove(struct iio_dev *indio_dev, int irq); 64 - int ad7606_reset(struct ad7606_state *st); 88 + int ad7606_probe(struct device *dev, int irq, void __iomem *base_address, 89 + const char *name, unsigned int id, 90 + const struct ad7606_bus_ops *bops); 91 + int ad7606_remove(struct device *dev, int irq); 65 92 66 93 enum ad7606_supported_device_ids { 67 94 ID_AD7606_8, 68 95 ID_AD7606_6, 69 96 ID_AD7606_4 70 97 }; 71 - 72 - int ad7606_register_ring_funcs_and_init(struct iio_dev *indio_dev); 73 - void ad7606_ring_cleanup(struct iio_dev *indio_dev); 74 98 75 99 #ifdef CONFIG_PM_SLEEP 76 100 extern const struct dev_pm_ops ad7606_pm_ops;
-603
drivers/staging/iio/adc/ad7606_core.c
··· 1 - /* 2 - * AD7606 SPI ADC driver 3 - * 4 - * Copyright 2011 Analog Devices Inc. 5 - * 6 - * Licensed under the GPL-2. 7 - */ 8 - 9 - #include <linux/interrupt.h> 10 - #include <linux/device.h> 11 - #include <linux/kernel.h> 12 - #include <linux/slab.h> 13 - #include <linux/sysfs.h> 14 - #include <linux/regulator/consumer.h> 15 - #include <linux/err.h> 16 - #include <linux/gpio.h> 17 - #include <linux/delay.h> 18 - #include <linux/sched.h> 19 - #include <linux/module.h> 20 - 21 - #include <linux/iio/iio.h> 22 - #include <linux/iio/sysfs.h> 23 - #include <linux/iio/buffer.h> 24 - 25 - #include "ad7606.h" 26 - 27 - int ad7606_reset(struct ad7606_state *st) 28 - { 29 - if (gpio_is_valid(st->pdata->gpio_reset)) { 30 - gpio_set_value(st->pdata->gpio_reset, 1); 31 - ndelay(100); /* t_reset >= 100ns */ 32 - gpio_set_value(st->pdata->gpio_reset, 0); 33 - return 0; 34 - } 35 - 36 - return -ENODEV; 37 - } 38 - 39 - static int ad7606_scan_direct(struct iio_dev *indio_dev, unsigned int ch) 40 - { 41 - struct ad7606_state *st = iio_priv(indio_dev); 42 - int ret; 43 - 44 - st->done = false; 45 - gpio_set_value(st->pdata->gpio_convst, 1); 46 - 47 - ret = wait_event_interruptible(st->wq_data_avail, st->done); 48 - if (ret) 49 - goto error_ret; 50 - 51 - if (gpio_is_valid(st->pdata->gpio_frstdata)) { 52 - ret = st->bops->read_block(st->dev, 1, st->data); 53 - if (ret) 54 - goto error_ret; 55 - if (!gpio_get_value(st->pdata->gpio_frstdata)) { 56 - /* This should never happen */ 57 - ad7606_reset(st); 58 - ret = -EIO; 59 - goto error_ret; 60 - } 61 - ret = st->bops->read_block(st->dev, 62 - st->chip_info->num_channels - 1, &st->data[1]); 63 - if (ret) 64 - goto error_ret; 65 - } else { 66 - ret = st->bops->read_block(st->dev, 67 - st->chip_info->num_channels, st->data); 68 - if (ret) 69 - goto error_ret; 70 - } 71 - 72 - ret = st->data[ch]; 73 - 74 - error_ret: 75 - gpio_set_value(st->pdata->gpio_convst, 0); 76 - 77 - return ret; 78 - } 79 - 80 - static int ad7606_read_raw(struct iio_dev *indio_dev, 81 - struct iio_chan_spec const *chan, 82 - int *val, 83 - int *val2, 84 - long m) 85 - { 86 - int ret; 87 - struct ad7606_state *st = iio_priv(indio_dev); 88 - 89 - switch (m) { 90 - case IIO_CHAN_INFO_RAW: 91 - ret = iio_device_claim_direct_mode(indio_dev); 92 - if (ret) 93 - return ret; 94 - 95 - ret = ad7606_scan_direct(indio_dev, chan->address); 96 - iio_device_release_direct_mode(indio_dev); 97 - 98 - if (ret < 0) 99 - return ret; 100 - *val = (short)ret; 101 - return IIO_VAL_INT; 102 - case IIO_CHAN_INFO_SCALE: 103 - *val = st->range * 2; 104 - *val2 = st->chip_info->channels[0].scan_type.realbits; 105 - return IIO_VAL_FRACTIONAL_LOG2; 106 - } 107 - return -EINVAL; 108 - } 109 - 110 - static ssize_t ad7606_show_range(struct device *dev, 111 - struct device_attribute *attr, char *buf) 112 - { 113 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 114 - struct ad7606_state *st = iio_priv(indio_dev); 115 - 116 - return sprintf(buf, "%u\n", st->range); 117 - } 118 - 119 - static ssize_t ad7606_store_range(struct device *dev, 120 - struct device_attribute *attr, 121 - const char *buf, size_t count) 122 - { 123 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 124 - struct ad7606_state *st = iio_priv(indio_dev); 125 - unsigned long lval; 126 - int ret; 127 - 128 - ret = kstrtoul(buf, 10, &lval); 129 - if (ret) 130 - return ret; 131 - 132 - if (!(lval == 5000 || lval == 10000)) { 133 - dev_err(dev, "range is not supported\n"); 134 - return -EINVAL; 135 - } 136 - mutex_lock(&indio_dev->mlock); 137 - gpio_set_value(st->pdata->gpio_range, lval == 10000); 138 - st->range = lval; 139 - mutex_unlock(&indio_dev->mlock); 140 - 141 - return count; 142 - } 143 - 144 - static IIO_DEVICE_ATTR(in_voltage_range, S_IRUGO | S_IWUSR, 145 - ad7606_show_range, ad7606_store_range, 0); 146 - static IIO_CONST_ATTR(in_voltage_range_available, "5000 10000"); 147 - 148 - static ssize_t ad7606_show_oversampling_ratio(struct device *dev, 149 - struct device_attribute *attr, 150 - char *buf) 151 - { 152 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 153 - struct ad7606_state *st = iio_priv(indio_dev); 154 - 155 - return sprintf(buf, "%u\n", st->oversampling); 156 - } 157 - 158 - static int ad7606_oversampling_get_index(unsigned int val) 159 - { 160 - unsigned char supported[] = {0, 2, 4, 8, 16, 32, 64}; 161 - int i; 162 - 163 - for (i = 0; i < ARRAY_SIZE(supported); i++) 164 - if (val == supported[i]) 165 - return i; 166 - 167 - return -EINVAL; 168 - } 169 - 170 - static ssize_t ad7606_store_oversampling_ratio(struct device *dev, 171 - struct device_attribute *attr, 172 - const char *buf, size_t count) 173 - { 174 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 175 - struct ad7606_state *st = iio_priv(indio_dev); 176 - unsigned long lval; 177 - int ret; 178 - 179 - ret = kstrtoul(buf, 10, &lval); 180 - if (ret) 181 - return ret; 182 - 183 - ret = ad7606_oversampling_get_index(lval); 184 - if (ret < 0) { 185 - dev_err(dev, "oversampling %lu is not supported\n", lval); 186 - return ret; 187 - } 188 - 189 - mutex_lock(&indio_dev->mlock); 190 - gpio_set_value(st->pdata->gpio_os0, (ret >> 0) & 1); 191 - gpio_set_value(st->pdata->gpio_os1, (ret >> 1) & 1); 192 - gpio_set_value(st->pdata->gpio_os1, (ret >> 2) & 1); 193 - st->oversampling = lval; 194 - mutex_unlock(&indio_dev->mlock); 195 - 196 - return count; 197 - } 198 - 199 - static IIO_DEVICE_ATTR(oversampling_ratio, S_IRUGO | S_IWUSR, 200 - ad7606_show_oversampling_ratio, 201 - ad7606_store_oversampling_ratio, 0); 202 - static IIO_CONST_ATTR(oversampling_ratio_available, "0 2 4 8 16 32 64"); 203 - 204 - static struct attribute *ad7606_attributes_os_and_range[] = { 205 - &iio_dev_attr_in_voltage_range.dev_attr.attr, 206 - &iio_const_attr_in_voltage_range_available.dev_attr.attr, 207 - &iio_dev_attr_oversampling_ratio.dev_attr.attr, 208 - &iio_const_attr_oversampling_ratio_available.dev_attr.attr, 209 - NULL, 210 - }; 211 - 212 - static const struct attribute_group ad7606_attribute_group_os_and_range = { 213 - .attrs = ad7606_attributes_os_and_range, 214 - }; 215 - 216 - static struct attribute *ad7606_attributes_os[] = { 217 - &iio_dev_attr_oversampling_ratio.dev_attr.attr, 218 - &iio_const_attr_oversampling_ratio_available.dev_attr.attr, 219 - NULL, 220 - }; 221 - 222 - static const struct attribute_group ad7606_attribute_group_os = { 223 - .attrs = ad7606_attributes_os, 224 - }; 225 - 226 - static struct attribute *ad7606_attributes_range[] = { 227 - &iio_dev_attr_in_voltage_range.dev_attr.attr, 228 - &iio_const_attr_in_voltage_range_available.dev_attr.attr, 229 - NULL, 230 - }; 231 - 232 - static const struct attribute_group ad7606_attribute_group_range = { 233 - .attrs = ad7606_attributes_range, 234 - }; 235 - 236 - #define AD7606_CHANNEL(num) \ 237 - { \ 238 - .type = IIO_VOLTAGE, \ 239 - .indexed = 1, \ 240 - .channel = num, \ 241 - .address = num, \ 242 - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 243 - .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),\ 244 - .scan_index = num, \ 245 - .scan_type = { \ 246 - .sign = 's', \ 247 - .realbits = 16, \ 248 - .storagebits = 16, \ 249 - .endianness = IIO_CPU, \ 250 - }, \ 251 - } 252 - 253 - static const struct iio_chan_spec ad7606_channels[] = { 254 - IIO_CHAN_SOFT_TIMESTAMP(8), 255 - AD7606_CHANNEL(0), 256 - AD7606_CHANNEL(1), 257 - AD7606_CHANNEL(2), 258 - AD7606_CHANNEL(3), 259 - AD7606_CHANNEL(4), 260 - AD7606_CHANNEL(5), 261 - AD7606_CHANNEL(6), 262 - AD7606_CHANNEL(7), 263 - }; 264 - 265 - static const struct ad7606_chip_info ad7606_chip_info_tbl[] = { 266 - /* 267 - * More devices added in future 268 - */ 269 - [ID_AD7606_8] = { 270 - .name = "ad7606", 271 - .int_vref_mv = 2500, 272 - .channels = ad7606_channels, 273 - .num_channels = 9, 274 - }, 275 - [ID_AD7606_6] = { 276 - .name = "ad7606-6", 277 - .int_vref_mv = 2500, 278 - .channels = ad7606_channels, 279 - .num_channels = 7, 280 - }, 281 - [ID_AD7606_4] = { 282 - .name = "ad7606-4", 283 - .int_vref_mv = 2500, 284 - .channels = ad7606_channels, 285 - .num_channels = 5, 286 - }, 287 - }; 288 - 289 - static int ad7606_request_gpios(struct ad7606_state *st) 290 - { 291 - struct gpio gpio_array[3] = { 292 - [0] = { 293 - .gpio = st->pdata->gpio_os0, 294 - .flags = GPIOF_DIR_OUT | ((st->oversampling & 1) ? 295 - GPIOF_INIT_HIGH : GPIOF_INIT_LOW), 296 - .label = "AD7606_OS0", 297 - }, 298 - [1] = { 299 - .gpio = st->pdata->gpio_os1, 300 - .flags = GPIOF_DIR_OUT | ((st->oversampling & 2) ? 301 - GPIOF_INIT_HIGH : GPIOF_INIT_LOW), 302 - .label = "AD7606_OS1", 303 - }, 304 - [2] = { 305 - .gpio = st->pdata->gpio_os2, 306 - .flags = GPIOF_DIR_OUT | ((st->oversampling & 4) ? 307 - GPIOF_INIT_HIGH : GPIOF_INIT_LOW), 308 - .label = "AD7606_OS2", 309 - }, 310 - }; 311 - int ret; 312 - 313 - if (gpio_is_valid(st->pdata->gpio_convst)) { 314 - ret = gpio_request_one(st->pdata->gpio_convst, 315 - GPIOF_OUT_INIT_LOW, 316 - "AD7606_CONVST"); 317 - if (ret) { 318 - dev_err(st->dev, "failed to request GPIO CONVST\n"); 319 - goto error_ret; 320 - } 321 - } else { 322 - ret = -EIO; 323 - goto error_ret; 324 - } 325 - 326 - if (gpio_is_valid(st->pdata->gpio_os0) && 327 - gpio_is_valid(st->pdata->gpio_os1) && 328 - gpio_is_valid(st->pdata->gpio_os2)) { 329 - ret = gpio_request_array(gpio_array, ARRAY_SIZE(gpio_array)); 330 - if (ret < 0) 331 - goto error_free_convst; 332 - } 333 - 334 - if (gpio_is_valid(st->pdata->gpio_reset)) { 335 - ret = gpio_request_one(st->pdata->gpio_reset, 336 - GPIOF_OUT_INIT_LOW, 337 - "AD7606_RESET"); 338 - if (ret < 0) 339 - goto error_free_os; 340 - } 341 - 342 - if (gpio_is_valid(st->pdata->gpio_range)) { 343 - ret = gpio_request_one(st->pdata->gpio_range, GPIOF_DIR_OUT | 344 - ((st->range == 10000) ? GPIOF_INIT_HIGH : 345 - GPIOF_INIT_LOW), "AD7606_RANGE"); 346 - if (ret < 0) 347 - goto error_free_reset; 348 - } 349 - if (gpio_is_valid(st->pdata->gpio_stby)) { 350 - ret = gpio_request_one(st->pdata->gpio_stby, 351 - GPIOF_OUT_INIT_HIGH, 352 - "AD7606_STBY"); 353 - if (ret < 0) 354 - goto error_free_range; 355 - } 356 - 357 - if (gpio_is_valid(st->pdata->gpio_frstdata)) { 358 - ret = gpio_request_one(st->pdata->gpio_frstdata, GPIOF_IN, 359 - "AD7606_FRSTDATA"); 360 - if (ret < 0) 361 - goto error_free_stby; 362 - } 363 - 364 - return 0; 365 - 366 - error_free_stby: 367 - if (gpio_is_valid(st->pdata->gpio_stby)) 368 - gpio_free(st->pdata->gpio_stby); 369 - error_free_range: 370 - if (gpio_is_valid(st->pdata->gpio_range)) 371 - gpio_free(st->pdata->gpio_range); 372 - error_free_reset: 373 - if (gpio_is_valid(st->pdata->gpio_reset)) 374 - gpio_free(st->pdata->gpio_reset); 375 - error_free_os: 376 - if (gpio_is_valid(st->pdata->gpio_os0) && 377 - gpio_is_valid(st->pdata->gpio_os1) && 378 - gpio_is_valid(st->pdata->gpio_os2)) 379 - gpio_free_array(gpio_array, ARRAY_SIZE(gpio_array)); 380 - error_free_convst: 381 - gpio_free(st->pdata->gpio_convst); 382 - error_ret: 383 - return ret; 384 - } 385 - 386 - static void ad7606_free_gpios(struct ad7606_state *st) 387 - { 388 - if (gpio_is_valid(st->pdata->gpio_frstdata)) 389 - gpio_free(st->pdata->gpio_frstdata); 390 - if (gpio_is_valid(st->pdata->gpio_stby)) 391 - gpio_free(st->pdata->gpio_stby); 392 - if (gpio_is_valid(st->pdata->gpio_range)) 393 - gpio_free(st->pdata->gpio_range); 394 - if (gpio_is_valid(st->pdata->gpio_reset)) 395 - gpio_free(st->pdata->gpio_reset); 396 - if (gpio_is_valid(st->pdata->gpio_os0) && 397 - gpio_is_valid(st->pdata->gpio_os1) && 398 - gpio_is_valid(st->pdata->gpio_os2)) { 399 - gpio_free(st->pdata->gpio_os2); 400 - gpio_free(st->pdata->gpio_os1); 401 - gpio_free(st->pdata->gpio_os0); 402 - } 403 - gpio_free(st->pdata->gpio_convst); 404 - } 405 - 406 - /** 407 - * Interrupt handler 408 - */ 409 - static irqreturn_t ad7606_interrupt(int irq, void *dev_id) 410 - { 411 - struct iio_dev *indio_dev = dev_id; 412 - struct ad7606_state *st = iio_priv(indio_dev); 413 - 414 - if (iio_buffer_enabled(indio_dev)) { 415 - schedule_work(&st->poll_work); 416 - } else { 417 - st->done = true; 418 - wake_up_interruptible(&st->wq_data_avail); 419 - } 420 - 421 - return IRQ_HANDLED; 422 - }; 423 - 424 - static const struct iio_info ad7606_info_no_os_or_range = { 425 - .driver_module = THIS_MODULE, 426 - .read_raw = &ad7606_read_raw, 427 - }; 428 - 429 - static const struct iio_info ad7606_info_os_and_range = { 430 - .driver_module = THIS_MODULE, 431 - .read_raw = &ad7606_read_raw, 432 - .attrs = &ad7606_attribute_group_os_and_range, 433 - }; 434 - 435 - static const struct iio_info ad7606_info_os = { 436 - .driver_module = THIS_MODULE, 437 - .read_raw = &ad7606_read_raw, 438 - .attrs = &ad7606_attribute_group_os, 439 - }; 440 - 441 - static const struct iio_info ad7606_info_range = { 442 - .driver_module = THIS_MODULE, 443 - .read_raw = &ad7606_read_raw, 444 - .attrs = &ad7606_attribute_group_range, 445 - }; 446 - 447 - struct iio_dev *ad7606_probe(struct device *dev, int irq, 448 - void __iomem *base_address, 449 - unsigned int id, 450 - const struct ad7606_bus_ops *bops) 451 - { 452 - struct ad7606_platform_data *pdata = dev->platform_data; 453 - struct ad7606_state *st; 454 - int ret; 455 - struct iio_dev *indio_dev; 456 - 457 - indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); 458 - if (!indio_dev) 459 - return ERR_PTR(-ENOMEM); 460 - 461 - st = iio_priv(indio_dev); 462 - 463 - st->dev = dev; 464 - st->bops = bops; 465 - st->base_address = base_address; 466 - st->range = pdata->default_range == 10000 ? 10000 : 5000; 467 - 468 - ret = ad7606_oversampling_get_index(pdata->default_os); 469 - if (ret < 0) { 470 - dev_warn(dev, "oversampling %d is not supported\n", 471 - pdata->default_os); 472 - st->oversampling = 0; 473 - } else { 474 - st->oversampling = pdata->default_os; 475 - } 476 - 477 - st->reg = devm_regulator_get(dev, "vcc"); 478 - if (!IS_ERR(st->reg)) { 479 - ret = regulator_enable(st->reg); 480 - if (ret) 481 - return ERR_PTR(ret); 482 - } 483 - 484 - st->pdata = pdata; 485 - st->chip_info = &ad7606_chip_info_tbl[id]; 486 - 487 - indio_dev->dev.parent = dev; 488 - if (gpio_is_valid(st->pdata->gpio_os0) && 489 - gpio_is_valid(st->pdata->gpio_os1) && 490 - gpio_is_valid(st->pdata->gpio_os2)) { 491 - if (gpio_is_valid(st->pdata->gpio_range)) 492 - indio_dev->info = &ad7606_info_os_and_range; 493 - else 494 - indio_dev->info = &ad7606_info_os; 495 - } else { 496 - if (gpio_is_valid(st->pdata->gpio_range)) 497 - indio_dev->info = &ad7606_info_range; 498 - else 499 - indio_dev->info = &ad7606_info_no_os_or_range; 500 - } 501 - indio_dev->modes = INDIO_DIRECT_MODE; 502 - indio_dev->name = st->chip_info->name; 503 - indio_dev->channels = st->chip_info->channels; 504 - indio_dev->num_channels = st->chip_info->num_channels; 505 - 506 - init_waitqueue_head(&st->wq_data_avail); 507 - 508 - ret = ad7606_request_gpios(st); 509 - if (ret) 510 - goto error_disable_reg; 511 - 512 - ret = ad7606_reset(st); 513 - if (ret) 514 - dev_warn(st->dev, "failed to RESET: no RESET GPIO specified\n"); 515 - 516 - ret = request_irq(irq, ad7606_interrupt, 517 - IRQF_TRIGGER_FALLING, st->chip_info->name, indio_dev); 518 - if (ret) 519 - goto error_free_gpios; 520 - 521 - ret = ad7606_register_ring_funcs_and_init(indio_dev); 522 - if (ret) 523 - goto error_free_irq; 524 - 525 - ret = iio_device_register(indio_dev); 526 - if (ret) 527 - goto error_unregister_ring; 528 - 529 - return indio_dev; 530 - error_unregister_ring: 531 - ad7606_ring_cleanup(indio_dev); 532 - 533 - error_free_irq: 534 - free_irq(irq, indio_dev); 535 - 536 - error_free_gpios: 537 - ad7606_free_gpios(st); 538 - 539 - error_disable_reg: 540 - if (!IS_ERR(st->reg)) 541 - regulator_disable(st->reg); 542 - return ERR_PTR(ret); 543 - } 544 - EXPORT_SYMBOL_GPL(ad7606_probe); 545 - 546 - int ad7606_remove(struct iio_dev *indio_dev, int irq) 547 - { 548 - struct ad7606_state *st = iio_priv(indio_dev); 549 - 550 - iio_device_unregister(indio_dev); 551 - ad7606_ring_cleanup(indio_dev); 552 - 553 - free_irq(irq, indio_dev); 554 - if (!IS_ERR(st->reg)) 555 - regulator_disable(st->reg); 556 - 557 - ad7606_free_gpios(st); 558 - 559 - return 0; 560 - } 561 - EXPORT_SYMBOL_GPL(ad7606_remove); 562 - 563 - #ifdef CONFIG_PM_SLEEP 564 - 565 - static int ad7606_suspend(struct device *dev) 566 - { 567 - struct iio_dev *indio_dev = dev_get_drvdata(dev); 568 - struct ad7606_state *st = iio_priv(indio_dev); 569 - 570 - if (gpio_is_valid(st->pdata->gpio_stby)) { 571 - if (gpio_is_valid(st->pdata->gpio_range)) 572 - gpio_set_value(st->pdata->gpio_range, 1); 573 - gpio_set_value(st->pdata->gpio_stby, 0); 574 - } 575 - 576 - return 0; 577 - } 578 - 579 - static int ad7606_resume(struct device *dev) 580 - { 581 - struct iio_dev *indio_dev = dev_get_drvdata(dev); 582 - struct ad7606_state *st = iio_priv(indio_dev); 583 - 584 - if (gpio_is_valid(st->pdata->gpio_stby)) { 585 - if (gpio_is_valid(st->pdata->gpio_range)) 586 - gpio_set_value(st->pdata->gpio_range, 587 - st->range == 10000); 588 - 589 - gpio_set_value(st->pdata->gpio_stby, 1); 590 - ad7606_reset(st); 591 - } 592 - 593 - return 0; 594 - } 595 - 596 - SIMPLE_DEV_PM_OPS(ad7606_pm_ops, ad7606_suspend, ad7606_resume); 597 - EXPORT_SYMBOL_GPL(ad7606_pm_ops); 598 - 599 - #endif 600 - 601 - MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); 602 - MODULE_DESCRIPTION("Analog Devices AD7606 ADC"); 603 - MODULE_LICENSE("GPL v2");
+6 -17
drivers/staging/iio/adc/ad7606_par.c
··· 49 49 50 50 static int ad7606_par_probe(struct platform_device *pdev) 51 51 { 52 + const struct platform_device_id *id = platform_get_device_id(pdev); 52 53 struct resource *res; 53 - struct iio_dev *indio_dev; 54 54 void __iomem *addr; 55 55 resource_size_t remap_size; 56 56 int irq; ··· 68 68 69 69 remap_size = resource_size(res); 70 70 71 - indio_dev = ad7606_probe(&pdev->dev, irq, addr, 72 - platform_get_device_id(pdev)->driver_data, 73 - remap_size > 1 ? &ad7606_par16_bops : 74 - &ad7606_par8_bops); 75 - 76 - if (IS_ERR(indio_dev)) 77 - return PTR_ERR(indio_dev); 78 - 79 - platform_set_drvdata(pdev, indio_dev); 80 - 81 - return 0; 71 + return ad7606_probe(&pdev->dev, irq, addr, 72 + id->name, id->driver_data, 73 + remap_size > 1 ? &ad7606_par16_bops : 74 + &ad7606_par8_bops); 82 75 } 83 76 84 77 static int ad7606_par_remove(struct platform_device *pdev) 85 78 { 86 - struct iio_dev *indio_dev = platform_get_drvdata(pdev); 87 - 88 - ad7606_remove(indio_dev, platform_get_irq(pdev, 0)); 89 - 90 - return 0; 79 + return ad7606_remove(&pdev->dev, platform_get_irq(pdev, 0)); 91 80 } 92 81 93 82 static const struct platform_device_id ad7606_driver_ids[] = {
-102
drivers/staging/iio/adc/ad7606_ring.c
··· 1 - /* 2 - * Copyright 2011-2012 Analog Devices Inc. 3 - * 4 - * Licensed under the GPL-2. 5 - * 6 - */ 7 - 8 - #include <linux/interrupt.h> 9 - #include <linux/gpio.h> 10 - #include <linux/device.h> 11 - #include <linux/kernel.h> 12 - #include <linux/slab.h> 13 - 14 - #include <linux/iio/iio.h> 15 - #include <linux/iio/buffer.h> 16 - #include <linux/iio/trigger_consumer.h> 17 - #include <linux/iio/triggered_buffer.h> 18 - 19 - #include "ad7606.h" 20 - 21 - /** 22 - * ad7606_trigger_handler_th() th/bh of trigger launched polling to ring buffer 23 - * 24 - **/ 25 - static irqreturn_t ad7606_trigger_handler_th_bh(int irq, void *p) 26 - { 27 - struct iio_poll_func *pf = p; 28 - struct ad7606_state *st = iio_priv(pf->indio_dev); 29 - 30 - gpio_set_value(st->pdata->gpio_convst, 1); 31 - 32 - return IRQ_HANDLED; 33 - } 34 - 35 - /** 36 - * ad7606_poll_bh_to_ring() bh of trigger launched polling to ring buffer 37 - * @work_s: the work struct through which this was scheduled 38 - * 39 - * Currently there is no option in this driver to disable the saving of 40 - * timestamps within the ring. 41 - * I think the one copy of this at a time was to avoid problems if the 42 - * trigger was set far too high and the reads then locked up the computer. 43 - **/ 44 - static void ad7606_poll_bh_to_ring(struct work_struct *work_s) 45 - { 46 - struct ad7606_state *st = container_of(work_s, struct ad7606_state, 47 - poll_work); 48 - struct iio_dev *indio_dev = iio_priv_to_dev(st); 49 - __u8 *buf; 50 - int ret; 51 - 52 - buf = kzalloc(indio_dev->scan_bytes, GFP_KERNEL); 53 - if (!buf) 54 - return; 55 - 56 - if (gpio_is_valid(st->pdata->gpio_frstdata)) { 57 - ret = st->bops->read_block(st->dev, 1, buf); 58 - if (ret) 59 - goto done; 60 - if (!gpio_get_value(st->pdata->gpio_frstdata)) { 61 - /* This should never happen. However 62 - * some signal glitch caused by bad PCB desgin or 63 - * electrostatic discharge, could cause an extra read 64 - * or clock. This allows recovery. 65 - */ 66 - ad7606_reset(st); 67 - goto done; 68 - } 69 - ret = st->bops->read_block(st->dev, 70 - st->chip_info->num_channels - 1, buf + 2); 71 - if (ret) 72 - goto done; 73 - } else { 74 - ret = st->bops->read_block(st->dev, 75 - st->chip_info->num_channels, buf); 76 - if (ret) 77 - goto done; 78 - } 79 - 80 - iio_push_to_buffers_with_timestamp(indio_dev, buf, 81 - iio_get_time_ns(indio_dev)); 82 - done: 83 - gpio_set_value(st->pdata->gpio_convst, 0); 84 - iio_trigger_notify_done(indio_dev->trig); 85 - kfree(buf); 86 - } 87 - 88 - int ad7606_register_ring_funcs_and_init(struct iio_dev *indio_dev) 89 - { 90 - struct ad7606_state *st = iio_priv(indio_dev); 91 - 92 - INIT_WORK(&st->poll_work, &ad7606_poll_bh_to_ring); 93 - 94 - return iio_triggered_buffer_setup(indio_dev, 95 - &ad7606_trigger_handler_th_bh, &ad7606_trigger_handler_th_bh, 96 - NULL); 97 - } 98 - 99 - void ad7606_ring_cleanup(struct iio_dev *indio_dev) 100 - { 101 - iio_triggered_buffer_cleanup(indio_dev); 102 - }
+5 -14
drivers/staging/iio/adc/ad7606_spi.c
··· 42 42 43 43 static int ad7606_spi_probe(struct spi_device *spi) 44 44 { 45 - struct iio_dev *indio_dev; 45 + const struct spi_device_id *id = spi_get_device_id(spi); 46 46 47 - indio_dev = ad7606_probe(&spi->dev, spi->irq, NULL, 48 - spi_get_device_id(spi)->driver_data, 49 - &ad7606_spi_bops); 50 - 51 - if (IS_ERR(indio_dev)) 52 - return PTR_ERR(indio_dev); 53 - 54 - spi_set_drvdata(spi, indio_dev); 55 - 56 - return 0; 47 + return ad7606_probe(&spi->dev, spi->irq, NULL, 48 + id->name, id->driver_data, 49 + &ad7606_spi_bops); 57 50 } 58 51 59 52 static int ad7606_spi_remove(struct spi_device *spi) 60 53 { 61 - struct iio_dev *indio_dev = dev_get_drvdata(&spi->dev); 62 - 63 - return ad7606_remove(indio_dev, spi->irq); 54 + return ad7606_remove(&spi->dev, spi->irq); 64 55 } 65 56 66 57 static const struct spi_device_id ad7606_id[] = {
+1 -1
drivers/staging/iio/adc/ad7816.c
··· 327 327 NULL, 328 328 }; 329 329 330 - static struct attribute_group ad7816_event_attribute_group = { 330 + static const struct attribute_group ad7816_event_attribute_group = { 331 331 .attrs = ad7816_event_attributes, 332 332 .name = "events", 333 333 };
+2 -2
drivers/staging/iio/addac/adt7316.c
··· 2039 2039 NULL, 2040 2040 }; 2041 2041 2042 - static struct attribute_group adt7316_event_attribute_group = { 2042 + static const struct attribute_group adt7316_event_attribute_group = { 2043 2043 .attrs = adt7316_event_attributes, 2044 2044 .name = "events", 2045 2045 }; ··· 2060 2060 NULL, 2061 2061 }; 2062 2062 2063 - static struct attribute_group adt7516_event_attribute_group = { 2063 + static const struct attribute_group adt7516_event_attribute_group = { 2064 2064 .attrs = adt7516_event_attributes, 2065 2065 .name = "events", 2066 2066 };
+1 -1
drivers/staging/iio/cdc/ad7150.c
··· 562 562 NULL, 563 563 }; 564 564 565 - static struct attribute_group ad7150_event_attribute_group = { 565 + static const struct attribute_group ad7150_event_attribute_group = { 566 566 .attrs = ad7150_event_attributes, 567 567 .name = "events", 568 568 };
+81 -59
drivers/staging/iio/cdc/ad7152.c
··· 89 89 */ 90 90 u8 filter_rate_setup; 91 91 u8 setup[2]; 92 + struct mutex state_lock; /* protect hardware state */ 92 93 }; 93 94 94 95 static inline ssize_t ad7152_start_calib(struct device *dev, ··· 116 115 else 117 116 regval |= AD7152_CONF_CH2EN; 118 117 119 - mutex_lock(&indio_dev->mlock); 118 + mutex_lock(&chip->state_lock); 120 119 ret = i2c_smbus_write_byte_data(chip->client, AD7152_REG_CFG, regval); 121 120 if (ret < 0) { 122 - mutex_unlock(&indio_dev->mlock); 121 + mutex_unlock(&chip->state_lock); 123 122 return ret; 124 123 } 125 124 ··· 127 126 mdelay(20); 128 127 ret = i2c_smbus_read_byte_data(chip->client, AD7152_REG_CFG); 129 128 if (ret < 0) { 130 - mutex_unlock(&indio_dev->mlock); 129 + mutex_unlock(&chip->state_lock); 131 130 return ret; 132 131 } 133 132 } while ((ret == regval) && timeout--); 134 133 135 - mutex_unlock(&indio_dev->mlock); 134 + mutex_unlock(&chip->state_lock); 136 135 return len; 137 136 } 137 + 138 138 static ssize_t ad7152_start_offset_calib(struct device *dev, 139 139 struct device_attribute *attr, 140 140 const char *buf, ··· 144 142 return ad7152_start_calib(dev, attr, buf, len, 145 143 AD7152_CONF_MODE_OFFS_CAL); 146 144 } 145 + 147 146 static ssize_t ad7152_start_gain_calib(struct device *dev, 148 147 struct device_attribute *attr, 149 148 const char *buf, ··· 168 165 {200, 5 + 1}, {50, 20 + 1}, {20, 50 + 1}, {17, 60 + 1}, 169 166 }; 170 167 171 - static ssize_t ad7152_show_filter_rate_setup(struct device *dev, 172 - struct device_attribute *attr, 173 - char *buf) 174 - { 175 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 176 - struct ad7152_chip_info *chip = iio_priv(indio_dev); 177 - 178 - return sprintf(buf, "%d\n", 179 - ad7152_filter_rate_table[chip->filter_rate_setup][0]); 180 - } 181 - 182 - static ssize_t ad7152_store_filter_rate_setup(struct device *dev, 183 - struct device_attribute *attr, 184 - const char *buf, 185 - size_t len) 186 - { 187 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 188 - struct ad7152_chip_info *chip = iio_priv(indio_dev); 189 - u8 data; 190 - int ret, i; 191 - 192 - ret = kstrtou8(buf, 10, &data); 193 - if (ret < 0) 194 - return ret; 195 - 196 - for (i = 0; i < ARRAY_SIZE(ad7152_filter_rate_table); i++) 197 - if (data >= ad7152_filter_rate_table[i][0]) 198 - break; 199 - 200 - if (i >= ARRAY_SIZE(ad7152_filter_rate_table)) 201 - i = ARRAY_SIZE(ad7152_filter_rate_table) - 1; 202 - 203 - mutex_lock(&indio_dev->mlock); 204 - ret = i2c_smbus_write_byte_data(chip->client, 205 - AD7152_REG_CFG2, AD7152_CFG2_OSR(i)); 206 - if (ret < 0) { 207 - mutex_unlock(&indio_dev->mlock); 208 - return ret; 209 - } 210 - 211 - chip->filter_rate_setup = i; 212 - mutex_unlock(&indio_dev->mlock); 213 - 214 - return len; 215 - } 216 - 217 - static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR, 218 - ad7152_show_filter_rate_setup, 219 - ad7152_store_filter_rate_setup); 220 - 221 168 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("200 50 20 17"); 222 169 223 170 static IIO_CONST_ATTR(in_capacitance_scale_available, 224 171 "0.000061050 0.000030525 0.000015263 0.000007631"); 225 172 226 173 static struct attribute *ad7152_attributes[] = { 227 - &iio_dev_attr_sampling_frequency.dev_attr.attr, 228 174 &iio_dev_attr_in_capacitance0_calibbias_calibration.dev_attr.attr, 229 175 &iio_dev_attr_in_capacitance1_calibbias_calibration.dev_attr.attr, 230 176 &iio_dev_attr_in_capacitance0_calibscale_calibration.dev_attr.attr, ··· 199 247 30525, 7631, 15263, 61050 200 248 }; 201 249 250 + /** 251 + * read_raw handler for IIO_CHAN_INFO_SAMP_FREQ 252 + * 253 + * lock must be held 254 + **/ 255 + static int ad7152_read_raw_samp_freq(struct device *dev, int *val) 256 + { 257 + struct ad7152_chip_info *chip = iio_priv(dev_to_iio_dev(dev)); 258 + 259 + *val = ad7152_filter_rate_table[chip->filter_rate_setup][0]; 260 + 261 + return 0; 262 + } 263 + 264 + /** 265 + * write_raw handler for IIO_CHAN_INFO_SAMP_FREQ 266 + * 267 + * lock must be held 268 + **/ 269 + static int ad7152_write_raw_samp_freq(struct device *dev, int val) 270 + { 271 + struct iio_dev *indio_dev = dev_to_iio_dev(dev); 272 + struct ad7152_chip_info *chip = iio_priv(indio_dev); 273 + int ret, i; 274 + 275 + for (i = 0; i < ARRAY_SIZE(ad7152_filter_rate_table); i++) 276 + if (val >= ad7152_filter_rate_table[i][0]) 277 + break; 278 + 279 + if (i >= ARRAY_SIZE(ad7152_filter_rate_table)) 280 + i = ARRAY_SIZE(ad7152_filter_rate_table) - 1; 281 + 282 + mutex_lock(&chip->state_lock); 283 + ret = i2c_smbus_write_byte_data(chip->client, 284 + AD7152_REG_CFG2, AD7152_CFG2_OSR(i)); 285 + if (ret < 0) { 286 + mutex_unlock(&chip->state_lock); 287 + return ret; 288 + } 289 + 290 + chip->filter_rate_setup = i; 291 + mutex_unlock(&chip->state_lock); 292 + 293 + return ret; 294 + } 202 295 static int ad7152_write_raw(struct iio_dev *indio_dev, 203 296 struct iio_chan_spec const *chan, 204 297 int val, ··· 253 256 struct ad7152_chip_info *chip = iio_priv(indio_dev); 254 257 int ret, i; 255 258 256 - mutex_lock(&indio_dev->mlock); 259 + mutex_lock(&chip->state_lock); 257 260 258 261 switch (mask) { 259 262 case IIO_CHAN_INFO_CALIBSCALE: ··· 306 309 307 310 ret = 0; 308 311 break; 312 + case IIO_CHAN_INFO_SAMP_FREQ: 313 + if (val2) { 314 + ret = -EINVAL; 315 + goto out; 316 + } 317 + ret = ad7152_write_raw_samp_freq(&indio_dev->dev, val); 318 + if (ret < 0) 319 + goto out; 320 + 321 + ret = 0; 322 + break; 309 323 default: 310 324 ret = -EINVAL; 311 325 } 312 326 313 327 out: 314 - mutex_unlock(&indio_dev->mlock); 328 + mutex_unlock(&chip->state_lock); 315 329 return ret; 316 330 } 331 + 317 332 static int ad7152_read_raw(struct iio_dev *indio_dev, 318 333 struct iio_chan_spec const *chan, 319 334 int *val, int *val2, ··· 335 326 int ret; 336 327 u8 regval = 0; 337 328 338 - mutex_lock(&indio_dev->mlock); 329 + mutex_lock(&chip->state_lock); 339 330 340 331 switch (mask) { 341 332 case IIO_CHAN_INFO_RAW: ··· 412 403 413 404 ret = IIO_VAL_INT_PLUS_NANO; 414 405 break; 406 + case IIO_CHAN_INFO_SAMP_FREQ: 407 + ret = ad7152_read_raw_samp_freq(&indio_dev->dev, val); 408 + if (ret < 0) 409 + goto out; 410 + 411 + ret = IIO_VAL_INT; 412 + break; 415 413 default: 416 414 ret = -EINVAL; 417 415 } 418 416 out: 419 - mutex_unlock(&indio_dev->mlock); 417 + mutex_unlock(&chip->state_lock); 420 418 return ret; 421 419 } 422 420 ··· 456 440 BIT(IIO_CHAN_INFO_CALIBSCALE) | 457 441 BIT(IIO_CHAN_INFO_CALIBBIAS) | 458 442 BIT(IIO_CHAN_INFO_SCALE), 443 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), 459 444 }, { 460 445 .type = IIO_CAPACITANCE, 461 446 .differential = 1, ··· 467 450 BIT(IIO_CHAN_INFO_CALIBSCALE) | 468 451 BIT(IIO_CHAN_INFO_CALIBBIAS) | 469 452 BIT(IIO_CHAN_INFO_SCALE), 453 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), 470 454 }, { 471 455 .type = IIO_CAPACITANCE, 472 456 .indexed = 1, ··· 476 458 BIT(IIO_CHAN_INFO_CALIBSCALE) | 477 459 BIT(IIO_CHAN_INFO_CALIBBIAS) | 478 460 BIT(IIO_CHAN_INFO_SCALE), 461 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), 479 462 }, { 480 463 .type = IIO_CAPACITANCE, 481 464 .differential = 1, ··· 487 468 BIT(IIO_CHAN_INFO_CALIBSCALE) | 488 469 BIT(IIO_CHAN_INFO_CALIBBIAS) | 489 470 BIT(IIO_CHAN_INFO_SCALE), 471 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), 490 472 } 491 473 }; 474 + 492 475 /* 493 476 * device probe and remove 494 477 */ ··· 510 489 i2c_set_clientdata(client, indio_dev); 511 490 512 491 chip->client = client; 492 + mutex_init(&chip->state_lock); 513 493 514 494 /* Establish that the iio_dev is a child of the i2c device */ 515 495 indio_dev->name = id->name;
+50 -70
drivers/staging/iio/cdc/ad7746.c
··· 122 122 .indexed = 1, 123 123 .channel = 0, 124 124 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 125 - .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 125 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | 126 + BIT(IIO_CHAN_INFO_SAMP_FREQ), 126 127 .address = AD7746_REG_VT_DATA_HIGH << 8 | 127 128 AD7746_VTSETUP_VTMD_EXT_VIN, 128 129 }, ··· 133 132 .channel = 1, 134 133 .extend_name = "supply", 135 134 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 136 - .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), 135 + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | 136 + BIT(IIO_CHAN_INFO_SAMP_FREQ), 137 137 .address = AD7746_REG_VT_DATA_HIGH << 8 | 138 138 AD7746_VTSETUP_VTMD_VDD_MON, 139 139 }, ··· 161 159 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 162 160 BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET), 163 161 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) | 164 - BIT(IIO_CHAN_INFO_SCALE), 162 + BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_SAMP_FREQ), 165 163 .address = AD7746_REG_CAP_DATA_HIGH << 8, 166 164 }, 167 165 [CIN1_DIFF] = { ··· 173 171 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 174 172 BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET), 175 173 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) | 176 - BIT(IIO_CHAN_INFO_SCALE), 174 + BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_SAMP_FREQ), 177 175 .address = AD7746_REG_CAP_DATA_HIGH << 8 | 178 176 AD7746_CAPSETUP_CAPDIFF 179 177 }, ··· 184 182 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 185 183 BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET), 186 184 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) | 187 - BIT(IIO_CHAN_INFO_SCALE), 185 + BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_SAMP_FREQ), 188 186 .address = AD7746_REG_CAP_DATA_HIGH << 8 | 189 187 AD7746_CAPSETUP_CIN2, 190 188 }, ··· 197 195 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 198 196 BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET), 199 197 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) | 200 - BIT(IIO_CHAN_INFO_SCALE), 198 + BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_SAMP_FREQ), 201 199 .address = AD7746_REG_CAP_DATA_HIGH << 8 | 202 200 AD7746_CAPSETUP_CAPDIFF | AD7746_CAPSETUP_CIN2, 203 201 } ··· 357 355 static IIO_DEVICE_ATTR(in_voltage0_calibscale_calibration, 358 356 S_IWUSR, NULL, ad7746_start_gain_calib, VIN); 359 357 360 - static ssize_t ad7746_show_cap_filter_rate_setup(struct device *dev, 361 - struct device_attribute *attr, 362 - char *buf) 358 + static int ad7746_store_cap_filter_rate_setup(struct ad7746_chip_info *chip, 359 + int val) 363 360 { 364 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 365 - struct ad7746_chip_info *chip = iio_priv(indio_dev); 366 - 367 - return sprintf(buf, "%d\n", ad7746_cap_filter_rate_table[ 368 - (chip->config >> 3) & 0x7][0]); 369 - } 370 - 371 - static ssize_t ad7746_store_cap_filter_rate_setup(struct device *dev, 372 - struct device_attribute *attr, 373 - const char *buf, 374 - size_t len) 375 - { 376 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 377 - struct ad7746_chip_info *chip = iio_priv(indio_dev); 378 - u8 data; 379 - int ret, i; 380 - 381 - ret = kstrtou8(buf, 10, &data); 382 - if (ret < 0) 383 - return ret; 361 + int i; 384 362 385 363 for (i = 0; i < ARRAY_SIZE(ad7746_cap_filter_rate_table); i++) 386 - if (data >= ad7746_cap_filter_rate_table[i][0]) 364 + if (val >= ad7746_cap_filter_rate_table[i][0]) 387 365 break; 388 366 389 367 if (i >= ARRAY_SIZE(ad7746_cap_filter_rate_table)) 390 368 i = ARRAY_SIZE(ad7746_cap_filter_rate_table) - 1; 391 369 392 - mutex_lock(&indio_dev->mlock); 393 370 chip->config &= ~AD7746_CONF_CAPFS(0x7); 394 371 chip->config |= AD7746_CONF_CAPFS(i); 395 - mutex_unlock(&indio_dev->mlock); 396 372 397 - return len; 373 + return 0; 398 374 } 399 375 400 - static ssize_t ad7746_show_vt_filter_rate_setup(struct device *dev, 401 - struct device_attribute *attr, 402 - char *buf) 376 + static int ad7746_store_vt_filter_rate_setup(struct ad7746_chip_info *chip, 377 + int val) 403 378 { 404 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 405 - struct ad7746_chip_info *chip = iio_priv(indio_dev); 406 - 407 - return sprintf(buf, "%d\n", ad7746_vt_filter_rate_table[ 408 - (chip->config >> 6) & 0x3][0]); 409 - } 410 - 411 - static ssize_t ad7746_store_vt_filter_rate_setup(struct device *dev, 412 - struct device_attribute *attr, 413 - const char *buf, 414 - size_t len) 415 - { 416 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 417 - struct ad7746_chip_info *chip = iio_priv(indio_dev); 418 - u8 data; 419 - int ret, i; 420 - 421 - ret = kstrtou8(buf, 10, &data); 422 - if (ret < 0) 423 - return ret; 379 + int i; 424 380 425 381 for (i = 0; i < ARRAY_SIZE(ad7746_vt_filter_rate_table); i++) 426 - if (data >= ad7746_vt_filter_rate_table[i][0]) 382 + if (val >= ad7746_vt_filter_rate_table[i][0]) 427 383 break; 428 384 429 385 if (i >= ARRAY_SIZE(ad7746_vt_filter_rate_table)) 430 386 i = ARRAY_SIZE(ad7746_vt_filter_rate_table) - 1; 431 387 432 - mutex_lock(&indio_dev->mlock); 433 388 chip->config &= ~AD7746_CONF_VTFS(0x3); 434 389 chip->config |= AD7746_CONF_VTFS(i); 435 - mutex_unlock(&indio_dev->mlock); 436 390 437 - return len; 391 + return 0; 438 392 } 439 - 440 - static IIO_DEVICE_ATTR(in_capacitance_sampling_frequency, 441 - S_IRUGO | S_IWUSR, ad7746_show_cap_filter_rate_setup, 442 - ad7746_store_cap_filter_rate_setup, 0); 443 - 444 - static IIO_DEVICE_ATTR(in_voltage_sampling_frequency, 445 - S_IRUGO | S_IWUSR, ad7746_show_vt_filter_rate_setup, 446 - ad7746_store_vt_filter_rate_setup, 0); 447 393 448 394 static IIO_CONST_ATTR(in_voltage_sampling_frequency_available, "50 31 16 8"); 449 395 static IIO_CONST_ATTR(in_capacitance_sampling_frequency_available, 450 396 "91 84 50 26 16 13 11 9"); 451 397 452 398 static struct attribute *ad7746_attributes[] = { 453 - &iio_dev_attr_in_capacitance_sampling_frequency.dev_attr.attr, 454 - &iio_dev_attr_in_voltage_sampling_frequency.dev_attr.attr, 455 399 &iio_dev_attr_in_capacitance0_calibbias_calibration.dev_attr.attr, 456 400 &iio_dev_attr_in_capacitance0_calibscale_calibration.dev_attr.attr, 457 401 &iio_dev_attr_in_capacitance1_calibscale_calibration.dev_attr.attr, ··· 494 546 chip->capdac_set = chan->channel; 495 547 496 548 ret = 0; 549 + break; 550 + case IIO_CHAN_INFO_SAMP_FREQ: 551 + if (val2) { 552 + ret = -EINVAL; 553 + goto out; 554 + } 555 + 556 + switch (chan->type) { 557 + case IIO_CAPACITANCE: 558 + ret = ad7746_store_cap_filter_rate_setup(chip, val); 559 + break; 560 + case IIO_VOLTAGE: 561 + ret = ad7746_store_vt_filter_rate_setup(chip, val); 562 + break; 563 + default: 564 + ret = -EINVAL; 565 + } 497 566 break; 498 567 default: 499 568 ret = -EINVAL; ··· 631 666 break; 632 667 } 633 668 669 + break; 670 + case IIO_CHAN_INFO_SAMP_FREQ: 671 + switch (chan->type) { 672 + case IIO_CAPACITANCE: 673 + *val = ad7746_cap_filter_rate_table[ 674 + (chip->config >> 3) & 0x7][0]; 675 + ret = IIO_VAL_INT; 676 + break; 677 + case IIO_VOLTAGE: 678 + *val = ad7746_vt_filter_rate_table[ 679 + (chip->config >> 6) & 0x3][0]; 680 + break; 681 + default: 682 + ret = -EINVAL; 683 + } 634 684 break; 635 685 default: 636 686 ret = -EINVAL;
-12
drivers/staging/iio/light/Kconfig
··· 3 3 # 4 4 menu "Light sensors" 5 5 6 - config SENSORS_ISL29018 7 - tristate "ISL 29018 light and proximity sensor" 8 - depends on I2C 9 - select REGMAP_I2C 10 - default n 11 - help 12 - If you say yes here you get support for ambient light sensing and 13 - proximity infrared sensing from Intersil ISL29018. 14 - This driver will provide the measurements of ambient light intensity 15 - in lux, proximity infrared sensing and normal infrared sensing. 16 - Data from sensor is accessible via sysfs. 17 - 18 6 config SENSORS_ISL29028 19 7 tristate "Intersil ISL29028 Concurrent Light and Proximity Sensor" 20 8 depends on I2C
-1
drivers/staging/iio/light/Makefile
··· 2 2 # Makefile for industrial I/O Light sensors 3 3 # 4 4 5 - obj-$(CONFIG_SENSORS_ISL29018) += isl29018.o 6 5 obj-$(CONFIG_SENSORS_ISL29028) += isl29028.o 7 6 obj-$(CONFIG_TSL2583) += tsl2583.o 8 7 obj-$(CONFIG_TSL2x7x) += tsl2x7x_core.o
+86 -73
drivers/staging/iio/light/isl29018.c drivers/iio/light/isl29018.c
··· 62 62 #define ISL29035_BOUT_SHIFT 0x07 63 63 #define ISL29035_BOUT_MASK (0x01 << ISL29035_BOUT_SHIFT) 64 64 65 - #define ISL29018_INT_TIME_AVAIL "0.090000 0.005630 0.000351 0.000021" 66 - #define ISL29023_INT_TIME_AVAIL "0.090000 0.005600 0.000352 0.000022" 67 - #define ISL29035_INT_TIME_AVAIL "0.105000 0.006500 0.000410 0.000025" 68 - 69 - static const char * const int_time_avail[] = { 70 - ISL29018_INT_TIME_AVAIL, 71 - ISL29023_INT_TIME_AVAIL, 72 - ISL29035_INT_TIME_AVAIL, 73 - }; 74 - 75 65 enum isl29018_int_time { 76 66 ISL29018_INT_TIME_16, 77 67 ISL29018_INT_TIME_12, ··· 100 110 static int isl29018_set_integration_time(struct isl29018_chip *chip, 101 111 unsigned int utime) 102 112 { 103 - int i, ret; 113 + unsigned int i; 114 + int ret; 104 115 unsigned int int_time, new_int_time; 105 116 106 117 for (i = 0; i < ARRAY_SIZE(isl29018_int_utimes[chip->type]); ++i) { ··· 136 145 137 146 static int isl29018_set_scale(struct isl29018_chip *chip, int scale, int uscale) 138 147 { 139 - int i, ret; 148 + unsigned int i; 149 + int ret; 140 150 struct isl29018_scale new_scale; 141 151 142 152 for (i = 0; i < ARRAY_SIZE(isl29018_scales[chip->int_time]); ++i) { ··· 268 276 return 0; 269 277 } 270 278 271 - static ssize_t isl29018_show_scale_available(struct device *dev, 272 - struct device_attribute *attr, char *buf) 279 + static ssize_t in_illuminance_scale_available_show 280 + (struct device *dev, struct device_attribute *attr, 281 + char *buf) 273 282 { 274 283 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 275 284 struct isl29018_chip *chip = iio_priv(indio_dev); 276 - int i, len = 0; 285 + unsigned int i; 286 + int len = 0; 277 287 288 + mutex_lock(&chip->lock); 278 289 for (i = 0; i < ARRAY_SIZE(isl29018_scales[chip->int_time]); ++i) 279 290 len += sprintf(buf + len, "%d.%06d ", 280 291 isl29018_scales[chip->int_time][i].scale, 281 292 isl29018_scales[chip->int_time][i].uscale); 293 + mutex_unlock(&chip->lock); 282 294 283 295 buf[len - 1] = '\n'; 284 296 285 297 return len; 286 298 } 287 299 288 - static ssize_t isl29018_show_int_time_available(struct device *dev, 289 - struct device_attribute *attr, char *buf) 300 + static ssize_t in_illuminance_integration_time_available_show 301 + (struct device *dev, struct device_attribute *attr, 302 + char *buf) 290 303 { 291 304 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 292 305 struct isl29018_chip *chip = iio_priv(indio_dev); 293 - int i, len = 0; 306 + unsigned int i; 307 + int len = 0; 294 308 295 309 for (i = 0; i < ARRAY_SIZE(isl29018_int_utimes[chip->type]); ++i) 296 310 len += sprintf(buf + len, "0.%06d ", ··· 307 309 return len; 308 310 } 309 311 310 - static ssize_t isl29018_show_prox_infrared_suppression(struct device *dev, 311 - struct device_attribute *attr, 312 - char *buf) 312 + /* 313 + * From ISL29018 Data Sheet (FN6619.4, Oct 8, 2012) regarding the 314 + * infrared suppression: 315 + * 316 + * Proximity Sensing Scheme: Bit 7. This bit programs the function 317 + * of the proximity detection. Logic 0 of this bit, Scheme 0, makes 318 + * full n (4, 8, 12, 16) bits (unsigned) proximity detection. The range 319 + * of Scheme 0 proximity count is from 0 to 2^n. Logic 1 of this bit, 320 + * Scheme 1, makes n-1 (3, 7, 11, 15) bits (2's complementary) 321 + * proximity_less_ambient detection. The range of Scheme 1 322 + * proximity count is from -2^(n-1) to 2^(n-1) . The sign bit is extended 323 + * for resolutions less than 16. While Scheme 0 has wider dynamic 324 + * range, Scheme 1 proximity detection is less affected by the 325 + * ambient IR noise variation. 326 + * 327 + * 0 Sensing IR from LED and ambient 328 + * 1 Sensing IR from LED with ambient IR rejection 329 + */ 330 + static ssize_t proximity_on_chip_ambient_infrared_suppression_show 331 + (struct device *dev, struct device_attribute *attr, 332 + char *buf) 313 333 { 314 334 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 315 335 struct isl29018_chip *chip = iio_priv(indio_dev); ··· 339 323 return sprintf(buf, "%d\n", chip->prox_scheme); 340 324 } 341 325 342 - static ssize_t isl29018_store_prox_infrared_suppression(struct device *dev, 343 - struct device_attribute *attr, 344 - const char *buf, size_t count) 326 + static ssize_t proximity_on_chip_ambient_infrared_suppression_store 327 + (struct device *dev, struct device_attribute *attr, 328 + const char *buf, size_t count) 345 329 { 346 330 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 347 331 struct isl29018_chip *chip = iio_priv(indio_dev); ··· 373 357 int ret = -EINVAL; 374 358 375 359 mutex_lock(&chip->lock); 360 + if (chip->suspended) { 361 + ret = -EBUSY; 362 + goto write_done; 363 + } 376 364 switch (mask) { 377 365 case IIO_CHAN_INFO_CALIBSCALE: 378 366 if (chan->type == IIO_LIGHT) { ··· 386 366 } 387 367 break; 388 368 case IIO_CHAN_INFO_INT_TIME: 389 - if (chan->type == IIO_LIGHT) { 390 - if (val) { 391 - mutex_unlock(&chip->lock); 392 - return -EINVAL; 393 - } 369 + if (chan->type == IIO_LIGHT && !val) 394 370 ret = isl29018_set_integration_time(chip, val2); 395 - } 396 371 break; 397 372 case IIO_CHAN_INFO_SCALE: 398 373 if (chan->type == IIO_LIGHT) ··· 396 381 default: 397 382 break; 398 383 } 384 + 385 + write_done: 399 386 mutex_unlock(&chip->lock); 400 387 401 388 return ret; ··· 414 397 415 398 mutex_lock(&chip->lock); 416 399 if (chip->suspended) { 417 - mutex_unlock(&chip->lock); 418 - return -EBUSY; 400 + ret = -EBUSY; 401 + goto read_done; 419 402 } 420 403 switch (mask) { 421 404 case IIO_CHAN_INFO_RAW: ··· 462 445 default: 463 446 break; 464 447 } 448 + 449 + read_done: 465 450 mutex_unlock(&chip->lock); 451 + 466 452 return ret; 467 453 } 468 454 ··· 502 482 ISL29018_IR_CHANNEL, 503 483 }; 504 484 505 - static IIO_DEVICE_ATTR(in_illuminance_integration_time_available, S_IRUGO, 506 - isl29018_show_int_time_available, NULL, 0); 507 - static IIO_DEVICE_ATTR(in_illuminance_scale_available, S_IRUGO, 508 - isl29018_show_scale_available, NULL, 0); 509 - static IIO_DEVICE_ATTR(proximity_on_chip_ambient_infrared_suppression, 510 - S_IRUGO | S_IWUSR, 511 - isl29018_show_prox_infrared_suppression, 512 - isl29018_store_prox_infrared_suppression, 0); 485 + static IIO_DEVICE_ATTR_RO(in_illuminance_integration_time_available, 0); 486 + static IIO_DEVICE_ATTR_RO(in_illuminance_scale_available, 0); 487 + static IIO_DEVICE_ATTR_RW(proximity_on_chip_ambient_infrared_suppression, 0); 513 488 514 489 #define ISL29018_DEV_ATTR(name) (&iio_dev_attr_##name.dev_attr.attr) 515 490 ··· 529 514 .attrs = isl29023_attributes, 530 515 }; 531 516 532 - static int isl29035_detect(struct isl29018_chip *chip) 533 - { 534 - int status; 535 - unsigned int id; 536 - struct device *dev = regmap_get_device(chip->regmap); 537 - 538 - status = regmap_read(chip->regmap, ISL29035_REG_DEVICE_ID, &id); 539 - if (status < 0) { 540 - dev_err(dev, 541 - "Error reading ID register with error %d\n", 542 - status); 543 - return status; 544 - } 545 - 546 - id = (id & ISL29035_DEVICE_ID_MASK) >> ISL29035_DEVICE_ID_SHIFT; 547 - 548 - if (id != ISL29035_DEVICE_ID) 549 - return -ENODEV; 550 - 551 - /* Clear brownout bit */ 552 - return regmap_update_bits(chip->regmap, ISL29035_REG_DEVICE_ID, 553 - ISL29035_BOUT_MASK, 0); 554 - } 555 - 556 517 enum { 557 518 isl29018, 558 519 isl29023, ··· 541 550 struct device *dev = regmap_get_device(chip->regmap); 542 551 543 552 if (chip->type == isl29035) { 544 - status = isl29035_detect(chip); 553 + unsigned int id; 554 + 555 + status = regmap_read(chip->regmap, ISL29035_REG_DEVICE_ID, &id); 556 + if (status < 0) { 557 + dev_err(dev, 558 + "Error reading ID register with error %d\n", 559 + status); 560 + return status; 561 + } 562 + 563 + id = (id & ISL29035_DEVICE_ID_MASK) >> ISL29035_DEVICE_ID_SHIFT; 564 + 565 + if (id != ISL29035_DEVICE_ID) 566 + return -ENODEV; 567 + 568 + /* Clear brownout bit */ 569 + status = regmap_update_bits(chip->regmap, 570 + ISL29035_REG_DEVICE_ID, 571 + ISL29035_BOUT_MASK, 0); 545 572 if (status < 0) 546 573 return status; 547 574 } 548 575 549 - /* Code added per Intersil Application Note 1534: 576 + /* 577 + * Code added per Intersil Application Note 1534: 550 578 * When VDD sinks to approximately 1.8V or below, some of 551 579 * the part's registers may change their state. When VDD 552 580 * recovers to 2.25V (or greater), the part may thus be in an ··· 592 582 return status; 593 583 } 594 584 595 - /* See Intersil AN1534 comments above. 585 + /* 586 + * See Intersil AN1534 comments above. 596 587 * "Operating Mode" (COMMAND1) register is reprogrammed when 597 588 * data is read from the device. 598 589 */ ··· 616 605 617 606 status = isl29018_set_integration_time(chip, 618 607 isl29018_int_utimes[chip->type][chip->int_time]); 619 - if (status < 0) { 608 + if (status < 0) 620 609 dev_err(dev, "Init of isl29018 fails\n"); 621 - return status; 622 - } 623 610 624 - return 0; 611 + return status; 625 612 } 626 613 627 614 static const struct iio_info isl29018_info = { ··· 722 713 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip)); 723 714 if (!indio_dev) 724 715 return -ENOMEM; 716 + 725 717 chip = iio_priv(indio_dev); 726 718 727 719 i2c_set_clientdata(client, indio_dev); ··· 762 752 indio_dev->name = name; 763 753 indio_dev->dev.parent = &client->dev; 764 754 indio_dev->modes = INDIO_DIRECT_MODE; 755 + 765 756 return devm_iio_device_register(&client->dev, indio_dev); 766 757 } 767 758 ··· 773 762 774 763 mutex_lock(&chip->lock); 775 764 776 - /* Since this driver uses only polling commands, we are by default in 765 + /* 766 + * Since this driver uses only polling commands, we are by default in 777 767 * auto shutdown (ie, power-down) mode. 778 768 * So we do not have much to do here. 779 769 */ 780 770 chip->suspended = true; 781 771 782 772 mutex_unlock(&chip->lock); 773 + 783 774 return 0; 784 775 } 785 776 ··· 797 784 chip->suspended = false; 798 785 799 786 mutex_unlock(&chip->lock); 787 + 800 788 return err; 801 789 } 802 790 ··· 821 807 {"isl29035", isl29035}, 822 808 {} 823 809 }; 824 - 825 810 MODULE_DEVICE_TABLE(i2c, isl29018_id); 826 811 827 812 static const struct of_device_id isl29018_of_match[] = {
+63 -23
drivers/staging/iio/meter/ade7758_core.c
··· 465 465 return ret; 466 466 } 467 467 468 - static ssize_t ade7758_read_frequency(struct device *dev, 469 - struct device_attribute *attr, char *buf) 468 + static int ade7758_read_samp_freq(struct device *dev, int *val) 470 469 { 471 470 int ret; 472 471 u8 t; 473 - int sps; 474 472 475 473 ret = ade7758_spi_read_reg_8(dev, ADE7758_WAVMODE, &t); 476 474 if (ret) 477 475 return ret; 478 476 479 477 t = (t >> 5) & 0x3; 480 - sps = 26040 / (1 << t); 478 + *val = 26040 / (1 << t); 481 479 482 - return sprintf(buf, "%d SPS\n", sps); 480 + return 0; 483 481 } 484 482 485 - static ssize_t ade7758_write_frequency(struct device *dev, 486 - struct device_attribute *attr, 487 - const char *buf, size_t len) 483 + static int ade7758_write_samp_freq(struct device *dev, int val) 488 484 { 489 - struct iio_dev *indio_dev = dev_to_iio_dev(dev); 490 - u16 val; 491 485 int ret; 492 486 u8 reg, t; 493 - 494 - ret = kstrtou16(buf, 10, &val); 495 - if (ret) 496 - return ret; 497 - 498 - mutex_lock(&indio_dev->mlock); 499 487 500 488 switch (val) { 501 489 case 26040: ··· 513 525 ret = ade7758_spi_write_reg_8(dev, ADE7758_WAVMODE, reg); 514 526 515 527 out: 516 - mutex_unlock(&indio_dev->mlock); 528 + return ret; 529 + } 517 530 518 - return ret ? ret : len; 531 + static int ade7758_read_raw(struct iio_dev *indio_dev, 532 + struct iio_chan_spec const *chan, 533 + int *val, 534 + int *val2, 535 + long mask) 536 + { 537 + int ret; 538 + 539 + switch (mask) { 540 + case IIO_CHAN_INFO_SAMP_FREQ: 541 + mutex_lock(&indio_dev->mlock); 542 + ret = ade7758_read_samp_freq(&indio_dev->dev, val); 543 + mutex_unlock(&indio_dev->mlock); 544 + return ret; 545 + default: 546 + return -EINVAL; 547 + } 548 + 549 + return ret; 550 + } 551 + 552 + static int ade7758_write_raw(struct iio_dev *indio_dev, 553 + struct iio_chan_spec const *chan, 554 + int val, int val2, long mask) 555 + { 556 + int ret; 557 + 558 + switch (mask) { 559 + case IIO_CHAN_INFO_SAMP_FREQ: 560 + if (val2) 561 + return -EINVAL; 562 + mutex_lock(&indio_dev->mlock); 563 + ret = ade7758_write_samp_freq(&indio_dev->dev, val); 564 + mutex_unlock(&indio_dev->mlock); 565 + return ret; 566 + default: 567 + return -EINVAL; 568 + } 569 + 570 + return ret; 519 571 } 520 572 521 573 static IIO_DEV_ATTR_TEMP_RAW(ade7758_read_8bit); ··· 581 553 static IIO_DEV_ATTR_CVAHR(ade7758_read_16bit, 582 554 ADE7758_CVAHR); 583 555 584 - static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO, 585 - ade7758_read_frequency, 586 - ade7758_write_frequency); 587 - 588 556 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("26040 13020 6510 3255"); 589 557 590 558 static struct attribute *ade7758_attributes[] = { 591 559 &iio_dev_attr_in_temp_raw.dev_attr.attr, 592 560 &iio_const_attr_in_temp_offset.dev_attr.attr, 593 561 &iio_const_attr_in_temp_scale.dev_attr.attr, 594 - &iio_dev_attr_sampling_frequency.dev_attr.attr, 595 562 &iio_const_attr_sampling_frequency_available.dev_attr.attr, 596 563 &iio_dev_attr_awatthr.dev_attr.attr, 597 564 &iio_dev_attr_bwatthr.dev_attr.attr, ··· 634 611 .type = IIO_VOLTAGE, 635 612 .indexed = 1, 636 613 .channel = 0, 614 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), 637 615 .address = AD7758_WT(AD7758_PHASE_A, AD7758_VOLTAGE), 638 616 .scan_index = 0, 639 617 .scan_type = { ··· 646 622 .type = IIO_CURRENT, 647 623 .indexed = 1, 648 624 .channel = 0, 625 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), 649 626 .address = AD7758_WT(AD7758_PHASE_A, AD7758_CURRENT), 650 627 .scan_index = 1, 651 628 .scan_type = { ··· 659 634 .indexed = 1, 660 635 .channel = 0, 661 636 .extend_name = "apparent", 637 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), 662 638 .address = AD7758_WT(AD7758_PHASE_A, AD7758_APP_PWR), 663 639 .scan_index = 2, 664 640 .scan_type = { ··· 672 646 .indexed = 1, 673 647 .channel = 0, 674 648 .extend_name = "active", 649 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), 675 650 .address = AD7758_WT(AD7758_PHASE_A, AD7758_ACT_PWR), 676 651 .scan_index = 3, 677 652 .scan_type = { ··· 685 658 .indexed = 1, 686 659 .channel = 0, 687 660 .extend_name = "reactive", 661 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), 688 662 .address = AD7758_WT(AD7758_PHASE_A, AD7758_REACT_PWR), 689 663 .scan_index = 4, 690 664 .scan_type = { ··· 697 669 .type = IIO_VOLTAGE, 698 670 .indexed = 1, 699 671 .channel = 1, 672 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), 700 673 .address = AD7758_WT(AD7758_PHASE_B, AD7758_VOLTAGE), 701 674 .scan_index = 5, 702 675 .scan_type = { ··· 709 680 .type = IIO_CURRENT, 710 681 .indexed = 1, 711 682 .channel = 1, 683 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), 712 684 .address = AD7758_WT(AD7758_PHASE_B, AD7758_CURRENT), 713 685 .scan_index = 6, 714 686 .scan_type = { ··· 722 692 .indexed = 1, 723 693 .channel = 1, 724 694 .extend_name = "apparent", 695 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), 725 696 .address = AD7758_WT(AD7758_PHASE_B, AD7758_APP_PWR), 726 697 .scan_index = 7, 727 698 .scan_type = { ··· 735 704 .indexed = 1, 736 705 .channel = 1, 737 706 .extend_name = "active", 707 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), 738 708 .address = AD7758_WT(AD7758_PHASE_B, AD7758_ACT_PWR), 739 709 .scan_index = 8, 740 710 .scan_type = { ··· 748 716 .indexed = 1, 749 717 .channel = 1, 750 718 .extend_name = "reactive", 719 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), 751 720 .address = AD7758_WT(AD7758_PHASE_B, AD7758_REACT_PWR), 752 721 .scan_index = 9, 753 722 .scan_type = { ··· 760 727 .type = IIO_VOLTAGE, 761 728 .indexed = 1, 762 729 .channel = 2, 730 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), 763 731 .address = AD7758_WT(AD7758_PHASE_C, AD7758_VOLTAGE), 764 732 .scan_index = 10, 765 733 .scan_type = { ··· 772 738 .type = IIO_CURRENT, 773 739 .indexed = 1, 774 740 .channel = 2, 741 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), 775 742 .address = AD7758_WT(AD7758_PHASE_C, AD7758_CURRENT), 776 743 .scan_index = 11, 777 744 .scan_type = { ··· 785 750 .indexed = 1, 786 751 .channel = 2, 787 752 .extend_name = "apparent", 753 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), 788 754 .address = AD7758_WT(AD7758_PHASE_C, AD7758_APP_PWR), 789 755 .scan_index = 12, 790 756 .scan_type = { ··· 798 762 .indexed = 1, 799 763 .channel = 2, 800 764 .extend_name = "active", 765 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), 801 766 .address = AD7758_WT(AD7758_PHASE_C, AD7758_ACT_PWR), 802 767 .scan_index = 13, 803 768 .scan_type = { ··· 811 774 .indexed = 1, 812 775 .channel = 2, 813 776 .extend_name = "reactive", 777 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), 814 778 .address = AD7758_WT(AD7758_PHASE_C, AD7758_REACT_PWR), 815 779 .scan_index = 14, 816 780 .scan_type = { ··· 825 787 826 788 static const struct iio_info ade7758_info = { 827 789 .attrs = &ade7758_attribute_group, 790 + .read_raw = &ade7758_read_raw, 791 + .write_raw = &ade7758_write_raw, 828 792 .driver_module = THIS_MODULE, 829 793 }; 830 794
-27
drivers/staging/iio/ring_hw.h
··· 1 - /* 2 - * ring_hw.h - common functionality for iio hardware ring buffers 3 - * 4 - * This program is free software; you can redistribute it and/or modify it 5 - * under the terms of the GNU General Public License version 2 as published by 6 - * the Free Software Foundation. 7 - * 8 - * Copyright (c) 2009 Jonathan Cameron <jic23@kernel.org> 9 - * 10 - */ 11 - 12 - #ifndef _RING_HW_H_ 13 - #define _RING_HW_H_ 14 - 15 - /** 16 - * struct iio_hw_ring_buffer- hardware ring buffer 17 - * @buf: generic ring buffer elements 18 - * @private: device specific data 19 - */ 20 - struct iio_hw_buffer { 21 - struct iio_buffer buf; 22 - void *private; 23 - }; 24 - 25 - #define iio_to_hw_buf(r) container_of(r, struct iio_hw_buffer, buf) 26 - 27 - #endif /* _RING_HW_H_ */
+1
include/linux/iio/adc/ad_sigma_delta.h
··· 136 136 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 137 137 BIT(IIO_CHAN_INFO_OFFSET), \ 138 138 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 139 + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 139 140 .scan_index = (_si), \ 140 141 .scan_type = { \ 141 142 .sign = 'u', \
+13
include/linux/iio/consumer.h
··· 236 236 enum iio_chan_type *type); 237 237 238 238 /** 239 + * iio_read_channel_offset() - read the offset value for a channel 240 + * @chan: The channel being queried. 241 + * @val: First part of value read back. 242 + * @val2: Second part of value read back. 243 + * 244 + * Note returns a description of what is in val and val2, such 245 + * as IIO_VAL_INT_PLUS_MICRO telling us we have a value of val 246 + * + val2/1e6 247 + */ 248 + int iio_read_channel_offset(struct iio_channel *chan, int *val, 249 + int *val2); 250 + 251 + /** 239 252 * iio_read_channel_scale() - read the scale value for a channel 240 253 * @chan: The channel being queried. 241 254 * @val: First part of value read back.
+11 -1
include/linux/iio/dac/mcp4725.h
··· 9 9 #ifndef IIO_DAC_MCP4725_H_ 10 10 #define IIO_DAC_MCP4725_H_ 11 11 12 + /** 13 + * struct mcp4725_platform_data - MCP4725/6 DAC specific data. 14 + * @use_vref: Whether an external reference voltage on Vref pin should be used. 15 + * Additional vref-supply must be specified when used. 16 + * @vref_buffered: Controls buffering of the external reference voltage. 17 + * 18 + * Vref related settings are available only on MCP4756. See 19 + * Documentation/devicetree/bindings/iio/dac/mcp4725.txt for more information. 20 + */ 12 21 struct mcp4725_platform_data { 13 - u16 vref_mv; 22 + bool use_vref; 23 + bool vref_buffered; 14 24 }; 15 25 16 26 #endif /* IIO_DAC_MCP4725_H_ */
+1 -1
include/linux/iio/iio.h
··· 381 381 **/ 382 382 struct iio_info { 383 383 struct module *driver_module; 384 - struct attribute_group *event_attrs; 384 + const struct attribute_group *event_attrs; 385 385 const struct attribute_group *attrs; 386 386 387 387 int (*read_raw)(struct iio_dev *indio_dev,
+24
include/linux/iio/sysfs.h
··· 55 55 { .dev_attr = __ATTR(_name, _mode, _show, _store), \ 56 56 .address = _addr } 57 57 58 + #define IIO_ATTR_RO(_name, _addr) \ 59 + { .dev_attr = __ATTR_RO(_name), \ 60 + .address = _addr } 61 + 62 + #define IIO_ATTR_WO(_name, _addr) \ 63 + { .dev_attr = __ATTR_WO(_name), \ 64 + .address = _addr } 65 + 66 + #define IIO_ATTR_RW(_name, _addr) \ 67 + { .dev_attr = __ATTR_RW(_name), \ 68 + .address = _addr } 69 + 58 70 #define IIO_DEVICE_ATTR(_name, _mode, _show, _store, _addr) \ 59 71 struct iio_dev_attr iio_dev_attr_##_name \ 60 72 = IIO_ATTR(_name, _mode, _show, _store, _addr) 73 + 74 + #define IIO_DEVICE_ATTR_RO(_name, _addr) \ 75 + struct iio_dev_attr iio_dev_attr_##_name \ 76 + = IIO_ATTR_RO(_name, _addr) 77 + 78 + #define IIO_DEVICE_ATTR_WO(_name, _addr) \ 79 + struct iio_dev_attr iio_dev_attr_##_name \ 80 + = IIO_ATTR_WO(_name, _addr) 81 + 82 + #define IIO_DEVICE_ATTR_RW(_name, _addr) \ 83 + struct iio_dev_attr iio_dev_attr_##_name \ 84 + = IIO_ATTR_RW(_name, _addr) 61 85 62 86 #define IIO_DEVICE_ATTR_NAMED(_vname, _name, _mode, _show, _store, _addr) \ 63 87 struct iio_dev_attr iio_dev_attr_##_vname \
+2
include/linux/iio/trigger.h
··· 170 170 */ 171 171 bool iio_trigger_using_own(struct iio_dev *indio_dev); 172 172 173 + int iio_trigger_validate_own_device(struct iio_trigger *trig, 174 + struct iio_dev *indio_dev); 173 175 174 176 #else 175 177 struct iio_trigger;
+2
include/uapi/linux/iio/types.h
··· 40 40 IIO_PH, 41 41 IIO_UVINDEX, 42 42 IIO_ELECTRICALCONDUCTIVITY, 43 + IIO_COUNT, 44 + IIO_INDEX, 43 45 }; 44 46 45 47 enum iio_modifier {
+13 -5
tools/iio/iio_generic_buffer.c
··· 247 247 fprintf(stderr, "Usage: generic_buffer [options]...\n" 248 248 "Capture, convert and output data from IIO device buffer\n" 249 249 " -a Auto-activate all available channels\n" 250 + " -A Force-activate ALL channels\n" 250 251 " -c <n> Do n conversions\n" 251 252 " -e Disable wait for event (new data)\n" 252 253 " -g Use trigger-less mode\n" ··· 348 347 int noevents = 0; 349 348 int notrigger = 0; 350 349 char *dummy; 350 + bool force_autochannels = false; 351 351 352 352 struct iio_channel_info *channels = NULL; 353 353 354 354 register_cleanup(); 355 355 356 - while ((c = getopt_long(argc, argv, "ac:egl:n:N:t:T:w:", longopts, NULL)) != -1) { 356 + while ((c = getopt_long(argc, argv, "aAc:egl:n:N:t:T:w:?", longopts, 357 + NULL)) != -1) { 357 358 switch (c) { 358 359 case 'a': 359 360 autochannels = AUTOCHANNELS_ENABLED; 360 361 break; 362 + case 'A': 363 + autochannels = AUTOCHANNELS_ENABLED; 364 + force_autochannels = true; 365 + break; 361 366 case 'c': 362 367 errno = 0; 363 368 num_loops = strtoul(optarg, &dummy, 10); ··· 526 519 "diag %s\n", dev_dir_name); 527 520 goto error; 528 521 } 529 - if (num_channels && autochannels == AUTOCHANNELS_ENABLED) { 522 + if (num_channels && autochannels == AUTOCHANNELS_ENABLED && 523 + !force_autochannels) { 530 524 fprintf(stderr, "Auto-channels selected but some channels " 531 525 "are already activated in sysfs\n"); 532 526 fprintf(stderr, "Proceeding without activating any channels\n"); 533 527 } 534 528 535 - if (!num_channels && autochannels == AUTOCHANNELS_ENABLED) { 536 - fprintf(stderr, 537 - "No channels are enabled, enabling all channels\n"); 529 + if ((!num_channels && autochannels == AUTOCHANNELS_ENABLED) || 530 + (autochannels == AUTOCHANNELS_ENABLED && force_autochannels)) { 531 + fprintf(stderr, "Enabling all channels\n"); 538 532 539 533 ret = enable_disable_all_channels(dev_dir_name, 1); 540 534 if (ret) {