Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

perf jevents: Add set of common metrics based on default ones

Add support to getting a common set of metrics from a default
table. It simplifies the generation to add json metrics at the same
time. The metrics added are CPUs_utilized, cs_per_second,
migrations_per_second, page_faults_per_second, insn_per_cycle,
stalled_cycles_per_instruction, frontend_cycles_idle,
backend_cycles_idle, cycles_frequency, branch_frequency and
branch_miss_rate based on the shadow metric definitions.

Following this change the default perf stat output on an alderlake
looks like:
```
$ perf stat -a -- sleep 2

Performance counter stats for 'system wide':

0.00 msec cpu-clock # 0.000 CPUs utilized
77,739 context-switches
15,033 cpu-migrations
321,313 page-faults
14,355,634,225 cpu_atom/instructions/ # 1.40 insn per cycle (35.37%)
134,561,560,583 cpu_core/instructions/ # 3.44 insn per cycle (57.85%)
10,263,836,145 cpu_atom/cycles/ (35.42%)
39,138,632,894 cpu_core/cycles/ (57.60%)
2,989,658,777 cpu_atom/branches/ (42.60%)
32,170,570,388 cpu_core/branches/ (57.39%)
29,789,870 cpu_atom/branch-misses/ # 1.00% of all branches (42.69%)
165,991,152 cpu_core/branch-misses/ # 0.52% of all branches (57.19%)
(software) # nan cs/sec cs_per_second
TopdownL1 (cpu_core) # 11.9 % tma_bad_speculation
# 19.6 % tma_frontend_bound (63.97%)
TopdownL1 (cpu_core) # 18.8 % tma_backend_bound
# 49.7 % tma_retiring (63.97%)
(software) # nan faults/sec page_faults_per_second
# nan GHz cycles_frequency (42.88%)
# nan GHz cycles_frequency (69.88%)
TopdownL1 (cpu_atom) # 11.7 % tma_bad_speculation
# 29.9 % tma_retiring (50.07%)
TopdownL1 (cpu_atom) # 31.3 % tma_frontend_bound (43.09%)
(cpu_atom) # nan M/sec branch_frequency (43.09%)
# nan M/sec branch_frequency (70.07%)
# nan migrations/sec migrations_per_second
TopdownL1 (cpu_atom) # 27.1 % tma_backend_bound (43.08%)
(software) # 0.0 CPUs CPUs_utilized
# 1.4 instructions insn_per_cycle (43.04%)
# 3.5 instructions insn_per_cycle (69.99%)
# 1.0 % branch_miss_rate (35.46%)
# 0.5 % branch_miss_rate (65.02%)

2.005626564 seconds time elapsed
```

Signed-off-by: Ian Rogers <irogers@google.com>
Signed-off-by: Namhyung Kim <namhyung@kernel.org>

authored by

Ian Rogers and committed by
Namhyung Kim
c7adeb09 2e514084

+212 -42
+86
tools/perf/pmu-events/arch/common/common/metrics.json
··· 1 + [ 2 + { 3 + "BriefDescription": "Average CPU utilization", 4 + "MetricExpr": "(software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@) / (duration_time * 1e9)", 5 + "MetricGroup": "Default", 6 + "MetricName": "CPUs_utilized", 7 + "ScaleUnit": "1CPUs", 8 + "MetricConstraint": "NO_GROUP_EVENTS" 9 + }, 10 + { 11 + "BriefDescription": "Context switches per CPU second", 12 + "MetricExpr": "(software@context\\-switches\\,name\\=context\\-switches@ * 1e9) / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)", 13 + "MetricGroup": "Default", 14 + "MetricName": "cs_per_second", 15 + "ScaleUnit": "1cs/sec", 16 + "MetricConstraint": "NO_GROUP_EVENTS" 17 + }, 18 + { 19 + "BriefDescription": "Process migrations to a new CPU per CPU second", 20 + "MetricExpr": "(software@cpu\\-migrations\\,name\\=cpu\\-migrations@ * 1e9) / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)", 21 + "MetricGroup": "Default", 22 + "MetricName": "migrations_per_second", 23 + "ScaleUnit": "1migrations/sec", 24 + "MetricConstraint": "NO_GROUP_EVENTS" 25 + }, 26 + { 27 + "BriefDescription": "Page faults per CPU second", 28 + "MetricExpr": "(software@page\\-faults\\,name\\=page\\-faults@ * 1e9) / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)", 29 + "MetricGroup": "Default", 30 + "MetricName": "page_faults_per_second", 31 + "ScaleUnit": "1faults/sec", 32 + "MetricConstraint": "NO_GROUP_EVENTS" 33 + }, 34 + { 35 + "BriefDescription": "Instructions Per Cycle", 36 + "MetricExpr": "instructions / cpu\\-cycles", 37 + "MetricGroup": "Default", 38 + "MetricName": "insn_per_cycle", 39 + "MetricThreshold": "insn_per_cycle < 1", 40 + "ScaleUnit": "1instructions" 41 + }, 42 + { 43 + "BriefDescription": "Max front or backend stalls per instruction", 44 + "MetricExpr": "max(stalled\\-cycles\\-frontend, stalled\\-cycles\\-backend) / instructions", 45 + "MetricGroup": "Default", 46 + "MetricName": "stalled_cycles_per_instruction" 47 + }, 48 + { 49 + "BriefDescription": "Frontend stalls per cycle", 50 + "MetricExpr": "stalled\\-cycles\\-frontend / cpu\\-cycles", 51 + "MetricGroup": "Default", 52 + "MetricName": "frontend_cycles_idle", 53 + "MetricThreshold": "frontend_cycles_idle > 0.1" 54 + }, 55 + { 56 + "BriefDescription": "Backend stalls per cycle", 57 + "MetricExpr": "stalled\\-cycles\\-backend / cpu\\-cycles", 58 + "MetricGroup": "Default", 59 + "MetricName": "backend_cycles_idle", 60 + "MetricThreshold": "backend_cycles_idle > 0.2" 61 + }, 62 + { 63 + "BriefDescription": "Cycles per CPU second", 64 + "MetricExpr": "cpu\\-cycles / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)", 65 + "MetricGroup": "Default", 66 + "MetricName": "cycles_frequency", 67 + "ScaleUnit": "1GHz", 68 + "MetricConstraint": "NO_GROUP_EVENTS" 69 + }, 70 + { 71 + "BriefDescription": "Branches per CPU second", 72 + "MetricExpr": "branches / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)", 73 + "MetricGroup": "Default", 74 + "MetricName": "branch_frequency", 75 + "ScaleUnit": "1000M/sec", 76 + "MetricConstraint": "NO_GROUP_EVENTS" 77 + }, 78 + { 79 + "BriefDescription": "Branch miss rate", 80 + "MetricExpr": "branch\\-misses / branches", 81 + "MetricGroup": "Default", 82 + "MetricName": "branch_miss_rate", 83 + "MetricThreshold": "branch_miss_rate > 0.05", 84 + "ScaleUnit": "100%" 85 + } 86 + ]
+84 -31
tools/perf/pmu-events/empty-pmu-events.c
··· 1303 1303 /* offset=127519 */ "sys_ccn_pmu.read_cycles\000uncore\000ccn read-cycles event\000config=0x2c\0000x01\00000\000\000\000\000\000" 1304 1304 /* offset=127596 */ "uncore_sys_cmn_pmu\000" 1305 1305 /* offset=127615 */ "sys_cmn_pmu.hnf_cache_miss\000uncore\000Counts total cache misses in first lookup result (high priority)\000eventid=1,type=5\000(434|436|43c|43a).*\00000\000\000\000\000\000" 1306 - /* offset=127758 */ "CPI\000\0001 / IPC\000\000\000\000\000\000\000\00000" 1307 - /* offset=127780 */ "IPC\000group1\000inst_retired.any / cpu_clk_unhalted.thread\000\000\000\000\000\000\000\00000" 1308 - /* offset=127843 */ "Frontend_Bound_SMT\000\000idq_uops_not_delivered.core / (4 * (cpu_clk_unhalted.thread / 2 * (1 + cpu_clk_unhalted.one_thread_active / cpu_clk_unhalted.ref_xclk)))\000\000\000\000\000\000\000\00000" 1309 - /* offset=128009 */ "dcache_miss_cpi\000\000l1d\\-loads\\-misses / inst_retired.any\000\000\000\000\000\000\000\00000" 1310 - /* offset=128073 */ "icache_miss_cycles\000\000l1i\\-loads\\-misses / inst_retired.any\000\000\000\000\000\000\000\00000" 1311 - /* offset=128140 */ "cache_miss_cycles\000group1\000dcache_miss_cpi + icache_miss_cycles\000\000\000\000\000\000\000\00000" 1312 - /* offset=128211 */ "DCache_L2_All_Hits\000\000l2_rqsts.demand_data_rd_hit + l2_rqsts.pf_hit + l2_rqsts.rfo_hit\000\000\000\000\000\000\000\00000" 1313 - /* offset=128305 */ "DCache_L2_All_Miss\000\000max(l2_rqsts.all_demand_data_rd - l2_rqsts.demand_data_rd_hit, 0) + l2_rqsts.pf_miss + l2_rqsts.rfo_miss\000\000\000\000\000\000\000\00000" 1314 - /* offset=128439 */ "DCache_L2_All\000\000DCache_L2_All_Hits + DCache_L2_All_Miss\000\000\000\000\000\000\000\00000" 1315 - /* offset=128503 */ "DCache_L2_Hits\000\000d_ratio(DCache_L2_All_Hits, DCache_L2_All)\000\000\000\000\000\000\000\00000" 1316 - /* offset=128571 */ "DCache_L2_Misses\000\000d_ratio(DCache_L2_All_Miss, DCache_L2_All)\000\000\000\000\000\000\000\00000" 1317 - /* offset=128641 */ "M1\000\000ipc + M2\000\000\000\000\000\000\000\00000" 1318 - /* offset=128663 */ "M2\000\000ipc + M1\000\000\000\000\000\000\000\00000" 1319 - /* offset=128685 */ "M3\000\0001 / M3\000\000\000\000\000\000\000\00000" 1320 - /* offset=128705 */ "L1D_Cache_Fill_BW\000\00064 * l1d.replacement / 1e9 / duration_time\000\000\000\000\000\000\000\00000" 1306 + /* offset=127758 */ "CPUs_utilized\000Default\000(software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@) / (duration_time * 1e9)\000\000Average CPU utilization\000\0001CPUs\000\000\000\00001" 1307 + /* offset=127943 */ "cs_per_second\000Default\000software@context\\-switches\\,name\\=context\\-switches@ * 1e9 / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)\000\000Context switches per CPU second\000\0001cs/sec\000\000\000\00001" 1308 + /* offset=128175 */ "migrations_per_second\000Default\000software@cpu\\-migrations\\,name\\=cpu\\-migrations@ * 1e9 / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)\000\000Process migrations to a new CPU per CPU second\000\0001migrations/sec\000\000\000\00001" 1309 + /* offset=128434 */ "page_faults_per_second\000Default\000software@page\\-faults\\,name\\=page\\-faults@ * 1e9 / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)\000\000Page faults per CPU second\000\0001faults/sec\000\000\000\00001" 1310 + /* offset=128664 */ "insn_per_cycle\000Default\000instructions / cpu\\-cycles\000insn_per_cycle < 1\000Instructions Per Cycle\000\0001instructions\000\000\000\00000" 1311 + /* offset=128776 */ "stalled_cycles_per_instruction\000Default\000max(stalled\\-cycles\\-frontend, stalled\\-cycles\\-backend) / instructions\000\000Max front or backend stalls per instruction\000\000\000\000\000\00000" 1312 + /* offset=128939 */ "frontend_cycles_idle\000Default\000stalled\\-cycles\\-frontend / cpu\\-cycles\000frontend_cycles_idle > 0.1\000Frontend stalls per cycle\000\000\000\000\000\00000" 1313 + /* offset=129068 */ "backend_cycles_idle\000Default\000stalled\\-cycles\\-backend / cpu\\-cycles\000backend_cycles_idle > 0.2\000Backend stalls per cycle\000\000\000\000\000\00000" 1314 + /* offset=129193 */ "cycles_frequency\000Default\000cpu\\-cycles / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)\000\000Cycles per CPU second\000\0001GHz\000\000\000\00001" 1315 + /* offset=129368 */ "branch_frequency\000Default\000branches / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)\000\000Branches per CPU second\000\0001000M/sec\000\000\000\00001" 1316 + /* offset=129547 */ "branch_miss_rate\000Default\000branch\\-misses / branches\000branch_miss_rate > 0.05\000Branch miss rate\000\000100%\000\000\000\00000" 1317 + /* offset=129650 */ "CPI\000\0001 / IPC\000\000\000\000\000\000\000\00000" 1318 + /* offset=129672 */ "IPC\000group1\000inst_retired.any / cpu_clk_unhalted.thread\000\000\000\000\000\000\000\00000" 1319 + /* offset=129735 */ "Frontend_Bound_SMT\000\000idq_uops_not_delivered.core / (4 * (cpu_clk_unhalted.thread / 2 * (1 + cpu_clk_unhalted.one_thread_active / cpu_clk_unhalted.ref_xclk)))\000\000\000\000\000\000\000\00000" 1320 + /* offset=129901 */ "dcache_miss_cpi\000\000l1d\\-loads\\-misses / inst_retired.any\000\000\000\000\000\000\000\00000" 1321 + /* offset=129965 */ "icache_miss_cycles\000\000l1i\\-loads\\-misses / inst_retired.any\000\000\000\000\000\000\000\00000" 1322 + /* offset=130032 */ "cache_miss_cycles\000group1\000dcache_miss_cpi + icache_miss_cycles\000\000\000\000\000\000\000\00000" 1323 + /* offset=130103 */ "DCache_L2_All_Hits\000\000l2_rqsts.demand_data_rd_hit + l2_rqsts.pf_hit + l2_rqsts.rfo_hit\000\000\000\000\000\000\000\00000" 1324 + /* offset=130197 */ "DCache_L2_All_Miss\000\000max(l2_rqsts.all_demand_data_rd - l2_rqsts.demand_data_rd_hit, 0) + l2_rqsts.pf_miss + l2_rqsts.rfo_miss\000\000\000\000\000\000\000\00000" 1325 + /* offset=130331 */ "DCache_L2_All\000\000DCache_L2_All_Hits + DCache_L2_All_Miss\000\000\000\000\000\000\000\00000" 1326 + /* offset=130395 */ "DCache_L2_Hits\000\000d_ratio(DCache_L2_All_Hits, DCache_L2_All)\000\000\000\000\000\000\000\00000" 1327 + /* offset=130463 */ "DCache_L2_Misses\000\000d_ratio(DCache_L2_All_Miss, DCache_L2_All)\000\000\000\000\000\000\000\00000" 1328 + /* offset=130533 */ "M1\000\000ipc + M2\000\000\000\000\000\000\000\00000" 1329 + /* offset=130555 */ "M2\000\000ipc + M1\000\000\000\000\000\000\000\00000" 1330 + /* offset=130577 */ "M3\000\0001 / M3\000\000\000\000\000\000\000\00000" 1331 + /* offset=130597 */ "L1D_Cache_Fill_BW\000\00064 * l1d.replacement / 1e9 / duration_time\000\000\000\000\000\000\000\00000" 1321 1332 ; 1322 1333 1323 1334 static const struct compact_pmu_event pmu_events__common_default_core[] = { ··· 2614 2603 }, 2615 2604 }; 2616 2605 2606 + static const struct compact_pmu_event pmu_metrics__common_default_core[] = { 2607 + { 127758 }, /* CPUs_utilized\000Default\000(software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@) / (duration_time * 1e9)\000\000Average CPU utilization\000\0001CPUs\000\000\000\00001 */ 2608 + { 129068 }, /* backend_cycles_idle\000Default\000stalled\\-cycles\\-backend / cpu\\-cycles\000backend_cycles_idle > 0.2\000Backend stalls per cycle\000\000\000\000\000\00000 */ 2609 + { 129368 }, /* branch_frequency\000Default\000branches / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)\000\000Branches per CPU second\000\0001000M/sec\000\000\000\00001 */ 2610 + { 129547 }, /* branch_miss_rate\000Default\000branch\\-misses / branches\000branch_miss_rate > 0.05\000Branch miss rate\000\000100%\000\000\000\00000 */ 2611 + { 127943 }, /* cs_per_second\000Default\000software@context\\-switches\\,name\\=context\\-switches@ * 1e9 / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)\000\000Context switches per CPU second\000\0001cs/sec\000\000\000\00001 */ 2612 + { 129193 }, /* cycles_frequency\000Default\000cpu\\-cycles / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)\000\000Cycles per CPU second\000\0001GHz\000\000\000\00001 */ 2613 + { 128939 }, /* frontend_cycles_idle\000Default\000stalled\\-cycles\\-frontend / cpu\\-cycles\000frontend_cycles_idle > 0.1\000Frontend stalls per cycle\000\000\000\000\000\00000 */ 2614 + { 128664 }, /* insn_per_cycle\000Default\000instructions / cpu\\-cycles\000insn_per_cycle < 1\000Instructions Per Cycle\000\0001instructions\000\000\000\00000 */ 2615 + { 128175 }, /* migrations_per_second\000Default\000software@cpu\\-migrations\\,name\\=cpu\\-migrations@ * 1e9 / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)\000\000Process migrations to a new CPU per CPU second\000\0001migrations/sec\000\000\000\00001 */ 2616 + { 128434 }, /* page_faults_per_second\000Default\000software@page\\-faults\\,name\\=page\\-faults@ * 1e9 / (software@cpu\\-clock\\,name\\=cpu\\-clock@ if #target_cpu else software@task\\-clock\\,name\\=task\\-clock@)\000\000Page faults per CPU second\000\0001faults/sec\000\000\000\00001 */ 2617 + { 128776 }, /* stalled_cycles_per_instruction\000Default\000max(stalled\\-cycles\\-frontend, stalled\\-cycles\\-backend) / instructions\000\000Max front or backend stalls per instruction\000\000\000\000\000\00000 */ 2618 + 2619 + }; 2620 + 2621 + static const struct pmu_table_entry pmu_metrics__common[] = { 2622 + { 2623 + .entries = pmu_metrics__common_default_core, 2624 + .num_entries = ARRAY_SIZE(pmu_metrics__common_default_core), 2625 + .pmu_name = { 0 /* default_core\000 */ }, 2626 + }, 2627 + }; 2628 + 2617 2629 static const struct compact_pmu_event pmu_events__test_soc_cpu_default_core[] = { 2618 2630 { 126205 }, /* bp_l1_btb_correct\000branch\000L1 BTB Correction\000event=0x8a\000\00000\000\000\000\000\000 */ 2619 2631 { 126267 }, /* bp_l2_btb_correct\000branch\000L2 BTB Correction\000event=0x8b\000\00000\000\000\000\000\000 */ ··· 2698 2664 }; 2699 2665 2700 2666 static const struct compact_pmu_event pmu_metrics__test_soc_cpu_default_core[] = { 2701 - { 127758 }, /* CPI\000\0001 / IPC\000\000\000\000\000\000\000\00000 */ 2702 - { 128439 }, /* DCache_L2_All\000\000DCache_L2_All_Hits + DCache_L2_All_Miss\000\000\000\000\000\000\000\00000 */ 2703 - { 128211 }, /* DCache_L2_All_Hits\000\000l2_rqsts.demand_data_rd_hit + l2_rqsts.pf_hit + l2_rqsts.rfo_hit\000\000\000\000\000\000\000\00000 */ 2704 - { 128305 }, /* DCache_L2_All_Miss\000\000max(l2_rqsts.all_demand_data_rd - l2_rqsts.demand_data_rd_hit, 0) + l2_rqsts.pf_miss + l2_rqsts.rfo_miss\000\000\000\000\000\000\000\00000 */ 2705 - { 128503 }, /* DCache_L2_Hits\000\000d_ratio(DCache_L2_All_Hits, DCache_L2_All)\000\000\000\000\000\000\000\00000 */ 2706 - { 128571 }, /* DCache_L2_Misses\000\000d_ratio(DCache_L2_All_Miss, DCache_L2_All)\000\000\000\000\000\000\000\00000 */ 2707 - { 127843 }, /* Frontend_Bound_SMT\000\000idq_uops_not_delivered.core / (4 * (cpu_clk_unhalted.thread / 2 * (1 + cpu_clk_unhalted.one_thread_active / cpu_clk_unhalted.ref_xclk)))\000\000\000\000\000\000\000\00000 */ 2708 - { 127780 }, /* IPC\000group1\000inst_retired.any / cpu_clk_unhalted.thread\000\000\000\000\000\000\000\00000 */ 2709 - { 128705 }, /* L1D_Cache_Fill_BW\000\00064 * l1d.replacement / 1e9 / duration_time\000\000\000\000\000\000\000\00000 */ 2710 - { 128641 }, /* M1\000\000ipc + M2\000\000\000\000\000\000\000\00000 */ 2711 - { 128663 }, /* M2\000\000ipc + M1\000\000\000\000\000\000\000\00000 */ 2712 - { 128685 }, /* M3\000\0001 / M3\000\000\000\000\000\000\000\00000 */ 2713 - { 128140 }, /* cache_miss_cycles\000group1\000dcache_miss_cpi + icache_miss_cycles\000\000\000\000\000\000\000\00000 */ 2714 - { 128009 }, /* dcache_miss_cpi\000\000l1d\\-loads\\-misses / inst_retired.any\000\000\000\000\000\000\000\00000 */ 2715 - { 128073 }, /* icache_miss_cycles\000\000l1i\\-loads\\-misses / inst_retired.any\000\000\000\000\000\000\000\00000 */ 2667 + { 129650 }, /* CPI\000\0001 / IPC\000\000\000\000\000\000\000\00000 */ 2668 + { 130331 }, /* DCache_L2_All\000\000DCache_L2_All_Hits + DCache_L2_All_Miss\000\000\000\000\000\000\000\00000 */ 2669 + { 130103 }, /* DCache_L2_All_Hits\000\000l2_rqsts.demand_data_rd_hit + l2_rqsts.pf_hit + l2_rqsts.rfo_hit\000\000\000\000\000\000\000\00000 */ 2670 + { 130197 }, /* DCache_L2_All_Miss\000\000max(l2_rqsts.all_demand_data_rd - l2_rqsts.demand_data_rd_hit, 0) + l2_rqsts.pf_miss + l2_rqsts.rfo_miss\000\000\000\000\000\000\000\00000 */ 2671 + { 130395 }, /* DCache_L2_Hits\000\000d_ratio(DCache_L2_All_Hits, DCache_L2_All)\000\000\000\000\000\000\000\00000 */ 2672 + { 130463 }, /* DCache_L2_Misses\000\000d_ratio(DCache_L2_All_Miss, DCache_L2_All)\000\000\000\000\000\000\000\00000 */ 2673 + { 129735 }, /* Frontend_Bound_SMT\000\000idq_uops_not_delivered.core / (4 * (cpu_clk_unhalted.thread / 2 * (1 + cpu_clk_unhalted.one_thread_active / cpu_clk_unhalted.ref_xclk)))\000\000\000\000\000\000\000\00000 */ 2674 + { 129672 }, /* IPC\000group1\000inst_retired.any / cpu_clk_unhalted.thread\000\000\000\000\000\000\000\00000 */ 2675 + { 130597 }, /* L1D_Cache_Fill_BW\000\00064 * l1d.replacement / 1e9 / duration_time\000\000\000\000\000\000\000\00000 */ 2676 + { 130533 }, /* M1\000\000ipc + M2\000\000\000\000\000\000\000\00000 */ 2677 + { 130555 }, /* M2\000\000ipc + M1\000\000\000\000\000\000\000\00000 */ 2678 + { 130577 }, /* M3\000\0001 / M3\000\000\000\000\000\000\000\00000 */ 2679 + { 130032 }, /* cache_miss_cycles\000group1\000dcache_miss_cpi + icache_miss_cycles\000\000\000\000\000\000\000\00000 */ 2680 + { 129901 }, /* dcache_miss_cpi\000\000l1d\\-loads\\-misses / inst_retired.any\000\000\000\000\000\000\000\00000 */ 2681 + { 129965 }, /* icache_miss_cycles\000\000l1i\\-loads\\-misses / inst_retired.any\000\000\000\000\000\000\000\00000 */ 2716 2682 2717 2683 }; 2718 2684 ··· 2793 2759 .pmus = pmu_events__common, 2794 2760 .num_pmus = ARRAY_SIZE(pmu_events__common), 2795 2761 }, 2796 - .metric_table = {}, 2762 + .metric_table = { 2763 + .pmus = pmu_metrics__common, 2764 + .num_pmus = ARRAY_SIZE(pmu_metrics__common), 2765 + }, 2797 2766 }, 2798 2767 { 2799 2768 .arch = "testarch", ··· 3243 3206 const struct pmu_events_map *map = map_for_cpu(cpu); 3244 3207 3245 3208 return map ? &map->metric_table : NULL; 3209 + } 3210 + 3211 + const struct pmu_metrics_table *pmu_metrics_table__default(void) 3212 + { 3213 + int i = 0; 3214 + 3215 + for (;;) { 3216 + const struct pmu_events_map *map = &pmu_events_map[i++]; 3217 + 3218 + if (!map->arch) 3219 + break; 3220 + 3221 + if (!strcmp(map->cpuid, "common")) 3222 + return &map->metric_table; 3223 + } 3224 + return NULL; 3246 3225 } 3247 3226 3248 3227 const struct pmu_events_table *find_core_events_table(const char *arch, const char *cpuid)
+20 -1
tools/perf/pmu-events/jevents.py
··· 755 755 \t\t.pmus = pmu_events__common, 756 756 \t\t.num_pmus = ARRAY_SIZE(pmu_events__common), 757 757 \t}, 758 - \t.metric_table = {}, 758 + \t.metric_table = { 759 + \t\t.pmus = pmu_metrics__common, 760 + \t\t.num_pmus = ARRAY_SIZE(pmu_metrics__common), 761 + \t}, 759 762 }, 760 763 """) 761 764 else: ··· 1238 1235 const struct pmu_events_map *map = map_for_cpu(cpu); 1239 1236 1240 1237 return map ? &map->metric_table : NULL; 1238 + } 1239 + 1240 + const struct pmu_metrics_table *pmu_metrics_table__default(void) 1241 + { 1242 + int i = 0; 1243 + 1244 + for (;;) { 1245 + const struct pmu_events_map *map = &pmu_events_map[i++]; 1246 + 1247 + if (!map->arch) 1248 + break; 1249 + 1250 + if (!strcmp(map->cpuid, "common")) 1251 + return &map->metric_table; 1252 + } 1253 + return NULL; 1241 1254 } 1242 1255 1243 1256 const struct pmu_events_table *find_core_events_table(const char *arch, const char *cpuid)
+1
tools/perf/pmu-events/pmu-events.h
··· 127 127 const struct pmu_events_table *perf_pmu__find_events_table(struct perf_pmu *pmu); 128 128 const struct pmu_events_table *perf_pmu__default_core_events_table(void); 129 129 const struct pmu_metrics_table *pmu_metrics_table__find(void); 130 + const struct pmu_metrics_table *pmu_metrics_table__default(void); 130 131 const struct pmu_events_table *find_core_events_table(const char *arch, const char *cpuid); 131 132 const struct pmu_metrics_table *find_core_metrics_table(const char *arch, const char *cpuid); 132 133 int pmu_for_each_core_event(pmu_event_iter_fn fn, void *data);
+21 -10
tools/perf/util/metricgroup.c
··· 424 424 .fn = fn, 425 425 .data = data, 426 426 }; 427 + const struct pmu_metrics_table *tables[2] = { 428 + table, 429 + pmu_metrics_table__default(), 430 + }; 427 431 428 - if (table) { 429 - int ret = pmu_metrics_table__for_each_metric(table, fn, data); 432 + for (size_t i = 0; i < ARRAY_SIZE(tables); i++) { 433 + int ret; 430 434 435 + if (!tables[i]) 436 + continue; 437 + 438 + ret = pmu_metrics_table__for_each_metric(tables[i], fn, data); 431 439 if (ret) 432 440 return ret; 433 441 } ··· 1589 1581 1590 1582 bool metricgroup__has_metric_or_groups(const char *pmu, const char *metric_or_groups) 1591 1583 { 1592 - const struct pmu_metrics_table *table = pmu_metrics_table__find(); 1584 + const struct pmu_metrics_table *tables[2] = { 1585 + pmu_metrics_table__find(), 1586 + pmu_metrics_table__default(), 1587 + }; 1593 1588 struct metricgroup__has_metric_data data = { 1594 1589 .pmu = pmu, 1595 1590 .metric_or_groups = metric_or_groups, 1596 1591 }; 1597 1592 1598 - if (!table) 1599 - return false; 1600 - 1601 - return pmu_metrics_table__for_each_metric(table, 1602 - metricgroup__has_metric_or_groups_callback, 1603 - &data) 1604 - ? true : false; 1593 + for (size_t i = 0; i < ARRAY_SIZE(tables); i++) { 1594 + if (pmu_metrics_table__for_each_metric(tables[i], 1595 + metricgroup__has_metric_or_groups_callback, 1596 + &data)) 1597 + return true; 1598 + } 1599 + return false; 1605 1600 } 1606 1601 1607 1602 static int metricgroup__topdown_max_level_callback(const struct pmu_metric *pm,