Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'tegra-for-5.20-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

arm64: tegra: Device tree changes for v5.20-rc1

This adds and enables various hardware on Tegra234 (host1x, VIC, GPCDMA)
as well as the Control BackBone related device tree nodes on Tegra194
and Tegra234.

Native timers are enabled on Tegra186, Tegra194 and Tegra234, which
allow keeping track of SoC-wide timestamps as well as hardware watchdog
functionality.

The audio subsystem is enhanced with the Output Processing Engine (OPE)
on Tegra210 and later.

Finally there are a handful of minor cleanups and fixes.

* tag 'tegra-for-5.20-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Fix SDMMC1 CD on P2888
arm64: tegra: Update compatible for Tegra234 GPCDMA
arm64: tegra: Add Host1x and VIC on Tegra234
arm64: tegra: Add Host1x context stream IDs on Tegra186+
arm64: tegra: Enable native timers on Tegra234
arm64: tegra: Enable native timers on Tegra194
arm64: tegra: Enable native timers on Tegra186
arm64: tegra: Add node for CBB 2.0 on Tegra234
arm64: tegra: Add node for CBB 1.0 on Tegra194
arm64: tegra: Align gpio-keys node names with dtschema
arm64: tegra: Mark BPMP channels as no-memory-wc
arm64: tegra: Add Tegra234 GPCDMA device tree node
arm64: tegra: Adjust whitespace around '='
arm64: tegra: Enable OPE on various platforms
arm64: tegra: Add OPE device on Tegra210 and later

Link: https://lore.kernel.org/r/20220708185608.676474-7-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

+733 -30
+2 -2
arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
··· 1030 1030 gpio-keys { 1031 1031 compatible = "gpio-keys"; 1032 1032 1033 - lid { 1033 + switch-lid { 1034 1034 label = "Lid"; 1035 1035 gpios = <&gpio TEGRA_GPIO(R, 4) GPIO_ACTIVE_LOW>; 1036 1036 linux,input-type = <5>; ··· 1039 1039 wakeup-source; 1040 1040 }; 1041 1041 1042 - power { 1042 + key-power { 1043 1043 label = "Power"; 1044 1044 gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>; 1045 1045 linux,code = <KEY_POWER>;
+46 -3
arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
··· 915 915 remote-endpoint = <&asrc_in7_ep>; 916 916 }; 917 917 }; 918 + 919 + xbar_ope1_in_port: port@70 { 920 + reg = <0x70>; 921 + 922 + xbar_ope1_in_ep: endpoint { 923 + remote-endpoint = <&ope1_cif_in_ep>; 924 + }; 925 + }; 926 + 927 + port@71 { 928 + reg = <0x71>; 929 + 930 + xbar_ope1_out_ep: endpoint { 931 + remote-endpoint = <&ope1_cif_out_ep>; 932 + }; 933 + }; 918 934 }; 919 935 920 936 admaif@290f000 { ··· 1927 1911 }; 1928 1912 }; 1929 1913 1914 + processing-engine@2908000 { 1915 + status = "okay"; 1916 + 1917 + ports { 1918 + #address-cells = <1>; 1919 + #size-cells = <0>; 1920 + 1921 + port@0 { 1922 + reg = <0x0>; 1923 + 1924 + ope1_cif_in_ep: endpoint { 1925 + remote-endpoint = <&xbar_ope1_in_ep>; 1926 + }; 1927 + }; 1928 + 1929 + ope1_out_port: port@1 { 1930 + reg = <0x1>; 1931 + 1932 + ope1_cif_out_ep: endpoint { 1933 + remote-endpoint = <&xbar_ope1_out_ep>; 1934 + }; 1935 + }; 1936 + }; 1937 + }; 1938 + 1930 1939 amixer@290bb00 { 1931 1940 status = "okay"; 1932 1941 ··· 2478 2437 gpio-keys { 2479 2438 compatible = "gpio-keys"; 2480 2439 2481 - power { 2440 + key-power { 2482 2441 label = "Power"; 2483 2442 gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 0) 2484 2443 GPIO_ACTIVE_LOW>; ··· 2489 2448 wakeup-source; 2490 2449 }; 2491 2450 2492 - volume-up { 2451 + key-volume-up { 2493 2452 label = "Volume Up"; 2494 2453 gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 1) 2495 2454 GPIO_ACTIVE_LOW>; ··· 2498 2457 debounce-interval = <10>; 2499 2458 }; 2500 2459 2501 - volume-down { 2460 + key-volume-down { 2502 2461 label = "Volume Down"; 2503 2462 gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 2) 2504 2463 GPIO_ACTIVE_LOW>; ··· 2593 2552 <&xbar_asrc_in3_port>, <&xbar_asrc_in4_port>, 2594 2553 <&xbar_asrc_in5_port>, <&xbar_asrc_in6_port>, 2595 2554 <&xbar_asrc_in7_port>, 2555 + <&xbar_ope1_in_port>, 2596 2556 /* HW accelerators */ 2597 2557 <&sfc1_out_port>, <&sfc2_out_port>, 2598 2558 <&sfc3_out_port>, <&sfc4_out_port>, ··· 2613 2571 <&mixer_out5_port>, 2614 2572 <&asrc_out1_port>, <&asrc_out2_port>, <&asrc_out3_port>, 2615 2573 <&asrc_out4_port>, <&asrc_out5_port>, <&asrc_out6_port>, 2574 + <&ope1_out_port>, 2616 2575 /* I/O */ 2617 2576 <&i2s1_port>, <&i2s2_port>, <&i2s3_port>, <&i2s4_port>, 2618 2577 <&i2s5_port>, <&i2s6_port>, <&dmic1_port>, <&dmic2_port>,
+3 -3
arch/arm64/boot/dts/nvidia/tegra186-p3509-0000+p3636-0001.dts
··· 360 360 gpio-keys { 361 361 compatible = "gpio-keys"; 362 362 363 - power { 363 + key-power { 364 364 label = "Power"; 365 365 gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 0) 366 366 GPIO_ACTIVE_LOW>; ··· 371 371 wakeup-source; 372 372 }; 373 373 374 - volume-up { 374 + key-volume-up { 375 375 label = "Volume Up"; 376 376 gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 1) 377 377 GPIO_ACTIVE_LOW>; ··· 380 380 debounce-interval = <10>; 381 381 }; 382 382 383 - volume-down { 383 + key-volume-down { 384 384 label = "Volume Down"; 385 385 gpios = <&gpio_aon TEGRA186_AON_GPIO(FF, 2) 386 386 GPIO_ACTIVE_LOW>;
+36 -1
arch/arm64/boot/dts/nvidia/tegra186.dtsi
··· 509 509 status = "disabled"; 510 510 }; 511 511 512 + tegra_ope1: processing-engine@2908000 { 513 + compatible = "nvidia,tegra186-ope", 514 + "nvidia,tegra210-ope"; 515 + reg = <0x2908000 0x100>; 516 + #address-cells = <1>; 517 + #size-cells = <1>; 518 + ranges; 519 + sound-name-prefix = "OPE1"; 520 + status = "disabled"; 521 + 522 + equalizer@2908100 { 523 + compatible = "nvidia,tegra186-peq", 524 + "nvidia,tegra210-peq"; 525 + reg = <0x2908100 0x100>; 526 + }; 527 + 528 + dynamic-range-compressor@2908200 { 529 + compatible = "nvidia,tegra186-mbdrc", 530 + "nvidia,tegra210-mbdrc"; 531 + reg = <0x2908200 0x200>; 532 + }; 533 + }; 534 + 512 535 tegra_amixer: amixer@290bb00 { 513 536 compatible = "nvidia,tegra186-amixer", 514 537 "nvidia,tegra210-amixer"; ··· 599 576 <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, 600 577 <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, 601 578 <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 602 - status = "disabled"; 579 + status = "okay"; 603 580 }; 604 581 605 582 uarta: serial@3100000 { ··· 1484 1461 1485 1462 iommus = <&smmu TEGRA186_SID_HOST1X>; 1486 1463 1464 + /* Context isolation domains */ 1465 + iommu-map = < 1466 + 0 &smmu TEGRA186_SID_HOST1X_CTX0 1 1467 + 1 &smmu TEGRA186_SID_HOST1X_CTX1 1 1468 + 2 &smmu TEGRA186_SID_HOST1X_CTX2 1 1469 + 3 &smmu TEGRA186_SID_HOST1X_CTX3 1 1470 + 4 &smmu TEGRA186_SID_HOST1X_CTX4 1 1471 + 5 &smmu TEGRA186_SID_HOST1X_CTX5 1 1472 + 6 &smmu TEGRA186_SID_HOST1X_CTX6 1 1473 + 7 &smmu TEGRA186_SID_HOST1X_CTX7 1>; 1474 + 1487 1475 dpaux1: dpaux@15040000 { 1488 1476 compatible = "nvidia,tegra186-dpaux"; 1489 1477 reg = <0x15040000 0x10000>; ··· 1854 1820 #address-cells = <1>; 1855 1821 #size-cells = <1>; 1856 1822 ranges = <0x0 0x0 0x30000000 0x50000>; 1823 + no-memory-wc; 1857 1824 1858 1825 cpu_bpmp_tx: sram@4e000 { 1859 1826 reg = <0x4e000 0x1000>;
+1 -1
arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
··· 75 75 76 76 /* SDMMC1 (SD/MMC) */ 77 77 mmc@3400000 { 78 - cd-gpios = <&gpio TEGRA194_MAIN_GPIO(A, 0) GPIO_ACTIVE_LOW>; 78 + cd-gpios = <&gpio TEGRA194_MAIN_GPIO(G, 7) GPIO_ACTIVE_LOW>; 79 79 }; 80 80 81 81 /* SDMMC4 (eMMC) */
+45 -2
arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
··· 868 868 remote-endpoint = <&asrc_in7_ep>; 869 869 }; 870 870 }; 871 + 872 + xbar_ope1_in_port: port@70 { 873 + reg = <0x70>; 874 + 875 + xbar_ope1_in_ep: endpoint { 876 + remote-endpoint = <&ope1_cif_in_ep>; 877 + }; 878 + }; 879 + 880 + port@71 { 881 + reg = <0x71>; 882 + 883 + xbar_ope1_out_ep: endpoint { 884 + remote-endpoint = <&ope1_cif_out_ep>; 885 + }; 886 + }; 871 887 }; 872 888 873 889 admaif@290f000 { ··· 1726 1710 }; 1727 1711 }; 1728 1712 1713 + processing-engine@2908000 { 1714 + status = "okay"; 1715 + 1716 + ports { 1717 + #address-cells = <1>; 1718 + #size-cells = <0>; 1719 + 1720 + port@0 { 1721 + reg = <0x0>; 1722 + 1723 + ope1_cif_in_ep: endpoint { 1724 + remote-endpoint = <&xbar_ope1_in_ep>; 1725 + }; 1726 + }; 1727 + 1728 + ope1_out_port: port@1 { 1729 + reg = <0x1>; 1730 + 1731 + ope1_cif_out_ep: endpoint { 1732 + remote-endpoint = <&xbar_ope1_out_ep>; 1733 + }; 1734 + }; 1735 + }; 1736 + }; 1737 + 1729 1738 amixer@290bb00 { 1730 1739 status = "okay"; 1731 1740 ··· 2258 2217 gpio-keys { 2259 2218 compatible = "gpio-keys"; 2260 2219 2261 - force-recovery { 2220 + key-force-recovery { 2262 2221 label = "Force Recovery"; 2263 2222 gpios = <&gpio TEGRA194_MAIN_GPIO(G, 0) 2264 2223 GPIO_ACTIVE_LOW>; ··· 2267 2226 debounce-interval = <10>; 2268 2227 }; 2269 2228 2270 - power { 2229 + key-power { 2271 2230 label = "Power"; 2272 2231 gpios = <&gpio_aon TEGRA194_AON_GPIO(EE, 4) 2273 2232 GPIO_ACTIVE_LOW>; ··· 2314 2273 <&xbar_asrc_in3_port>, <&xbar_asrc_in4_port>, 2315 2274 <&xbar_asrc_in5_port>, <&xbar_asrc_in6_port>, 2316 2275 <&xbar_asrc_in7_port>, 2276 + <&xbar_ope1_in_port>, 2317 2277 /* HW accelerators */ 2318 2278 <&sfc1_out_port>, <&sfc2_out_port>, 2319 2279 <&sfc3_out_port>, <&sfc4_out_port>, ··· 2333 2291 <&mixer_out4_port>, <&mixer_out5_port>, 2334 2292 <&asrc_out1_port>, <&asrc_out2_port>, <&asrc_out3_port>, 2335 2293 <&asrc_out4_port>, <&asrc_out5_port>, <&asrc_out6_port>, 2294 + <&ope1_out_port>, 2336 2295 /* BE I/O Ports */ 2337 2296 <&i2s1_port>, <&i2s2_port>, <&i2s4_port>, <&i2s6_port>, 2338 2297 <&dmic3_port>;
+45 -2
arch/arm64/boot/dts/nvidia/tegra194-p3509-0000.dtsi
··· 878 878 remote-endpoint = <&asrc_in7_ep>; 879 879 }; 880 880 }; 881 + 882 + xbar_ope1_in_port: port@70 { 883 + reg = <0x70>; 884 + 885 + xbar_ope1_in_ep: endpoint { 886 + remote-endpoint = <&ope1_cif_in_ep>; 887 + }; 888 + }; 889 + 890 + port@71 { 891 + reg = <0x71>; 892 + 893 + xbar_ope1_out_ep: endpoint { 894 + remote-endpoint = <&ope1_cif_out_ep>; 895 + }; 896 + }; 881 897 }; 882 898 883 899 admaif@290f000 { ··· 1786 1770 }; 1787 1771 }; 1788 1772 1773 + processing-engine@2908000 { 1774 + status = "okay"; 1775 + 1776 + ports { 1777 + #address-cells = <1>; 1778 + #size-cells = <0>; 1779 + 1780 + port@0 { 1781 + reg = <0x0>; 1782 + 1783 + ope1_cif_in_ep: endpoint { 1784 + remote-endpoint = <&xbar_ope1_in_ep>; 1785 + }; 1786 + }; 1787 + 1788 + ope1_out_port: port@1 { 1789 + reg = <0x1>; 1790 + 1791 + ope1_cif_out_ep: endpoint { 1792 + remote-endpoint = <&xbar_ope1_out_ep>; 1793 + }; 1794 + }; 1795 + }; 1796 + }; 1797 + 1789 1798 amixer@290bb00 { 1790 1799 status = "okay"; 1791 1800 ··· 2262 2221 gpio-keys { 2263 2222 compatible = "gpio-keys"; 2264 2223 2265 - force-recovery { 2224 + key-force-recovery { 2266 2225 label = "Force Recovery"; 2267 2226 gpios = <&gpio TEGRA194_MAIN_GPIO(G, 0) 2268 2227 GPIO_ACTIVE_LOW>; ··· 2271 2230 debounce-interval = <10>; 2272 2231 }; 2273 2232 2274 - power { 2233 + key-power { 2275 2234 label = "Power"; 2276 2235 gpios = <&gpio_aon TEGRA194_AON_GPIO(EE, 4) 2277 2236 GPIO_ACTIVE_LOW>; ··· 2364 2323 <&xbar_asrc_in3_port>, <&xbar_asrc_in4_port>, 2365 2324 <&xbar_asrc_in5_port>, <&xbar_asrc_in6_port>, 2366 2325 <&xbar_asrc_in7_port>, 2326 + <&xbar_ope1_in_port>, 2367 2327 /* HW accelerators */ 2368 2328 <&sfc1_out_port>, <&sfc2_out_port>, 2369 2329 <&sfc3_out_port>, <&sfc4_out_port>, ··· 2384 2342 <&mixer_out5_port>, 2385 2343 <&asrc_out1_port>, <&asrc_out2_port>, <&asrc_out3_port>, 2386 2344 <&asrc_out4_port>, <&asrc_out5_port>, <&asrc_out6_port>, 2345 + <&ope1_out_port>, 2387 2346 /* BE I/O Ports */ 2388 2347 <&i2s3_port>, <&i2s5_port>, 2389 2348 <&dmic1_port>, <&dmic2_port>, <&dmic4_port>,
+112 -1
arch/arm64/boot/dts/nvidia/tegra194.dtsi
··· 23 23 #size-cells = <1>; 24 24 ranges = <0x0 0x0 0x0 0x40000000>; 25 25 26 - misc@100000 { 26 + apbmisc: misc@100000 { 27 27 compatible = "nvidia,tegra194-misc"; 28 28 reg = <0x00100000 0xf000>, 29 29 <0x0010f000 0x1000>; ··· 86 86 interrupt-controller; 87 87 #gpio-cells = <2>; 88 88 gpio-controller; 89 + }; 90 + 91 + cbb-noc@2300000 { 92 + compatible = "nvidia,tegra194-cbb-noc"; 93 + reg = <0x02300000 0x1000>; 94 + interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>, 95 + <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>; 96 + nvidia,axi2apb = <&axi2apb>; 97 + nvidia,apbmisc = <&apbmisc>; 98 + status = "okay"; 99 + }; 100 + 101 + axi2apb: axi2apb@2390000 { 102 + compatible = "nvidia,tegra194-axi2apb"; 103 + reg = <0x2390000 0x1000>, 104 + <0x23a0000 0x1000>, 105 + <0x23b0000 0x1000>, 106 + <0x23c0000 0x1000>, 107 + <0x23d0000 0x1000>, 108 + <0x23e0000 0x1000>; 109 + status = "okay"; 89 110 }; 90 111 91 112 ethernet@2490000 { ··· 583 562 status = "disabled"; 584 563 }; 585 564 565 + tegra_ope1: processing-engine@2908000 { 566 + compatible = "nvidia,tegra194-ope", 567 + "nvidia,tegra210-ope"; 568 + reg = <0x2908000 0x100>; 569 + #address-cells = <1>; 570 + #size-cells = <1>; 571 + ranges; 572 + sound-name-prefix = "OPE1"; 573 + status = "disabled"; 574 + 575 + equalizer@2908100 { 576 + compatible = "nvidia,tegra194-peq", 577 + "nvidia,tegra210-peq"; 578 + reg = <0x2908100 0x100>; 579 + }; 580 + 581 + dynamic-range-compressor@2908200 { 582 + compatible = "nvidia,tegra194-mbdrc", 583 + "nvidia,tegra210-mbdrc"; 584 + reg = <0x2908200 0x200>; 585 + }; 586 + }; 587 + 586 588 tegra_amixer: amixer@290bb00 { 587 589 compatible = "nvidia,tegra194-amixer", 588 590 "nvidia,tegra210-amixer"; ··· 717 673 718 674 nvidia,bpmp = <&bpmp>; 719 675 }; 676 + }; 677 + 678 + timer@3010000 { 679 + compatible = "nvidia,tegra186-timer"; 680 + reg = <0x03010000 0x000e0000>; 681 + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 682 + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 683 + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 684 + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 685 + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 686 + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, 687 + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, 688 + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, 689 + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, 690 + <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 691 + status = "okay"; 720 692 }; 721 693 722 694 uarta: serial@3100000 { ··· 1520 1460 #phy-cells = <0>; 1521 1461 }; 1522 1462 1463 + sce-noc@b600000 { 1464 + compatible = "nvidia,tegra194-sce-noc"; 1465 + reg = <0xb600000 0x1000>; 1466 + interrupts = <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>, 1467 + <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 1468 + nvidia,axi2apb = <&axi2apb>; 1469 + nvidia,apbmisc = <&apbmisc>; 1470 + status = "okay"; 1471 + }; 1472 + 1473 + rce-noc@be00000 { 1474 + compatible = "nvidia,tegra194-rce-noc"; 1475 + reg = <0xbe00000 0x1000>; 1476 + interrupts = <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>, 1477 + <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1478 + nvidia,axi2apb = <&axi2apb>; 1479 + nvidia,apbmisc = <&apbmisc>; 1480 + status = "okay"; 1481 + }; 1482 + 1523 1483 hsp_aon: hsp@c150000 { 1524 1484 compatible = "nvidia,tegra194-hsp"; 1525 1485 reg = <0x0c150000 0x90000>; ··· 1672 1592 power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>; 1673 1593 }; 1674 1594 1595 + }; 1596 + 1597 + aon-noc@c600000 { 1598 + compatible = "nvidia,tegra194-aon-noc"; 1599 + reg = <0xc600000 0x1000>; 1600 + interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 1601 + <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; 1602 + nvidia,apbmisc = <&apbmisc>; 1603 + status = "okay"; 1604 + }; 1605 + 1606 + bpmp-noc@d600000 { 1607 + compatible = "nvidia,tegra194-bpmp-noc"; 1608 + reg = <0xd600000 0x1000>; 1609 + interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>, 1610 + <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1611 + nvidia,axi2apb = <&axi2apb>; 1612 + nvidia,apbmisc = <&apbmisc>; 1613 + status = "okay"; 1675 1614 }; 1676 1615 1677 1616 iommu@10000000 { ··· 1867 1768 interconnects = <&mc TEGRA194_MEMORY_CLIENT_HOST1XDMAR &emc>; 1868 1769 interconnect-names = "dma-mem"; 1869 1770 iommus = <&smmu TEGRA194_SID_HOST1X>; 1771 + 1772 + /* Context isolation domains */ 1773 + iommu-map = < 1774 + 0 &smmu TEGRA194_SID_HOST1X_CTX0 1 1775 + 1 &smmu TEGRA194_SID_HOST1X_CTX1 1 1776 + 2 &smmu TEGRA194_SID_HOST1X_CTX2 1 1777 + 3 &smmu TEGRA194_SID_HOST1X_CTX3 1 1778 + 4 &smmu TEGRA194_SID_HOST1X_CTX4 1 1779 + 5 &smmu TEGRA194_SID_HOST1X_CTX5 1 1780 + 6 &smmu TEGRA194_SID_HOST1X_CTX6 1 1781 + 7 &smmu TEGRA194_SID_HOST1X_CTX7 1>; 1870 1782 1871 1783 nvdec@15140000 { 1872 1784 compatible = "nvidia,tegra194-nvdec"; ··· 2794 2684 #address-cells = <1>; 2795 2685 #size-cells = <1>; 2796 2686 ranges = <0x0 0x0 0x40000000 0x50000>; 2687 + no-memory-wc; 2797 2688 2798 2689 cpu_bpmp_tx: sram@4e000 { 2799 2690 reg = <0x4e000 0x1000>;
+84
arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts
··· 682 682 }; 683 683 }; 684 684 685 + processing-engine@702d8000 { 686 + status = "okay"; 687 + 688 + ports { 689 + #address-cells = <1>; 690 + #size-cells = <0>; 691 + 692 + port@0 { 693 + reg = <0x0>; 694 + 695 + ope1_cif_in_ep: endpoint { 696 + remote-endpoint = <&xbar_ope1_in_ep>; 697 + }; 698 + }; 699 + 700 + ope1_out_port: port@1 { 701 + reg = <0x1>; 702 + 703 + ope1_cif_out_ep: endpoint { 704 + remote-endpoint = <&xbar_ope1_out_ep>; 705 + }; 706 + }; 707 + }; 708 + }; 709 + 710 + processing-engine@702d8400 { 711 + status = "okay"; 712 + 713 + ports { 714 + #address-cells = <1>; 715 + #size-cells = <0>; 716 + 717 + port@0 { 718 + reg = <0x0>; 719 + 720 + ope2_cif_in_ep: endpoint { 721 + remote-endpoint = <&xbar_ope2_in_ep>; 722 + }; 723 + }; 724 + 725 + ope2_out_port: port@1 { 726 + reg = <0x1>; 727 + 728 + ope2_cif_out_ep: endpoint { 729 + remote-endpoint = <&xbar_ope2_out_ep>; 730 + }; 731 + }; 732 + }; 733 + }; 734 + 685 735 amixer@702dbb00 { 686 736 status = "okay"; 687 737 ··· 1301 1251 remote-endpoint = <&mixer_out5_ep>; 1302 1252 }; 1303 1253 }; 1254 + 1255 + xbar_ope1_in_port: port@41 { 1256 + reg = <0x41>; 1257 + 1258 + xbar_ope1_in_ep: endpoint { 1259 + remote-endpoint = <&ope1_cif_in_ep>; 1260 + }; 1261 + }; 1262 + 1263 + port@42 { 1264 + reg = <0x42>; 1265 + 1266 + xbar_ope1_out_ep: endpoint { 1267 + remote-endpoint = <&ope1_cif_out_ep>; 1268 + }; 1269 + }; 1270 + 1271 + xbar_ope2_in_port: port@43 { 1272 + reg = <0x43>; 1273 + 1274 + xbar_ope2_in_ep: endpoint { 1275 + remote-endpoint = <&ope2_cif_in_ep>; 1276 + }; 1277 + }; 1278 + 1279 + port@44 { 1280 + reg = <0x44>; 1281 + 1282 + xbar_ope2_out_ep: endpoint { 1283 + remote-endpoint = <&ope2_cif_out_ep>; 1284 + }; 1285 + }; 1304 1286 }; 1305 1287 }; 1306 1288 }; ··· 1363 1281 <&xbar_mixer_in5_port>, <&xbar_mixer_in6_port>, 1364 1282 <&xbar_mixer_in7_port>, <&xbar_mixer_in8_port>, 1365 1283 <&xbar_mixer_in9_port>, <&xbar_mixer_in10_port>, 1284 + <&xbar_ope1_in_port>, <&xbar_ope2_in_port>, 1366 1285 /* HW accelerators */ 1367 1286 <&sfc1_out_port>, <&sfc2_out_port>, 1368 1287 <&sfc3_out_port>, <&sfc4_out_port>, ··· 1376 1293 <&mixer_out1_port>, <&mixer_out2_port>, 1377 1294 <&mixer_out3_port>, <&mixer_out4_port>, 1378 1295 <&mixer_out5_port>, 1296 + <&ope1_out_port>, <&ope2_out_port>, 1379 1297 /* I/O DAP Ports */ 1380 1298 <&i2s1_port>, <&i2s2_port>, <&i2s3_port>, <&i2s4_port>, 1381 1299 <&i2s5_port>, <&dmic1_port>, <&dmic2_port>, <&dmic3_port>;
+3 -3
arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
··· 1530 1530 compatible = "gpio-keys"; 1531 1531 label = "gpio-keys"; 1532 1532 1533 - power { 1533 + key-power { 1534 1534 label = "Power"; 1535 1535 gpios = <&gpio TEGRA_GPIO(X, 5) GPIO_ACTIVE_LOW>; 1536 1536 linux,code = <KEY_POWER>; 1537 1537 wakeup-source; 1538 1538 }; 1539 1539 1540 - volume_down { 1540 + key-volume-down { 1541 1541 label = "Volume Down"; 1542 1542 gpios = <&gpio TEGRA_GPIO(Y, 0) GPIO_ACTIVE_LOW>; 1543 1543 linux,code = <KEY_VOLUMEDOWN>; 1544 1544 }; 1545 1545 1546 - volume_up { 1546 + key-volume-up { 1547 1547 label = "Volume Up"; 1548 1548 gpios = <&gpio TEGRA_GPIO(X, 6) GPIO_ACTIVE_LOW>; 1549 1549 linux,code = <KEY_VOLUMEUP>;
+1 -1
arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
··· 1596 1596 compatible = "gpio-keys"; 1597 1597 status = "okay"; 1598 1598 1599 - power { 1599 + key-power { 1600 1600 debounce-interval = <30>; 1601 1601 gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>; 1602 1602 label = "Power";
+86 -2
arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
··· 1074 1074 }; 1075 1075 }; 1076 1076 1077 + processing-engine@702d8000 { 1078 + status = "okay"; 1079 + 1080 + ports { 1081 + #address-cells = <1>; 1082 + #size-cells = <0>; 1083 + 1084 + port@0 { 1085 + reg = <0x0>; 1086 + 1087 + ope1_cif_in_ep: endpoint { 1088 + remote-endpoint = <&xbar_ope1_in_ep>; 1089 + }; 1090 + }; 1091 + 1092 + ope1_out_port: port@1 { 1093 + reg = <0x1>; 1094 + 1095 + ope1_cif_out_ep: endpoint { 1096 + remote-endpoint = <&xbar_ope1_out_ep>; 1097 + }; 1098 + }; 1099 + }; 1100 + }; 1101 + 1102 + processing-engine@702d8400 { 1103 + status = "okay"; 1104 + 1105 + ports { 1106 + #address-cells = <1>; 1107 + #size-cells = <0>; 1108 + 1109 + port@0 { 1110 + reg = <0x0>; 1111 + 1112 + ope2_cif_in_ep: endpoint { 1113 + remote-endpoint = <&xbar_ope2_in_ep>; 1114 + }; 1115 + }; 1116 + 1117 + ope2_out_port: port@1 { 1118 + reg = <0x1>; 1119 + 1120 + ope2_cif_out_ep: endpoint { 1121 + remote-endpoint = <&xbar_ope2_out_ep>; 1122 + }; 1123 + }; 1124 + }; 1125 + }; 1126 + 1077 1127 amixer@702dbb00 { 1078 1128 status = "okay"; 1079 1129 ··· 1661 1611 remote-endpoint = <&mixer_out5_ep>; 1662 1612 }; 1663 1613 }; 1614 + 1615 + xbar_ope1_in_port: port@41 { 1616 + reg = <0x41>; 1617 + 1618 + xbar_ope1_in_ep: endpoint { 1619 + remote-endpoint = <&ope1_cif_in_ep>; 1620 + }; 1621 + }; 1622 + 1623 + port@42 { 1624 + reg = <0x42>; 1625 + 1626 + xbar_ope1_out_ep: endpoint { 1627 + remote-endpoint = <&ope1_cif_out_ep>; 1628 + }; 1629 + }; 1630 + 1631 + xbar_ope2_in_port: port@43 { 1632 + reg = <0x43>; 1633 + 1634 + xbar_ope2_in_ep: endpoint { 1635 + remote-endpoint = <&ope2_cif_in_ep>; 1636 + }; 1637 + }; 1638 + 1639 + port@44 { 1640 + reg = <0x44>; 1641 + 1642 + xbar_ope2_out_ep: endpoint { 1643 + remote-endpoint = <&ope2_cif_out_ep>; 1644 + }; 1645 + }; 1664 1646 }; 1665 1647 }; 1666 1648 }; ··· 1802 1720 gpio-keys { 1803 1721 compatible = "gpio-keys"; 1804 1722 1805 - power { 1723 + key-power { 1806 1724 label = "Power"; 1807 1725 gpios = <&gpio TEGRA_GPIO(X, 5) GPIO_ACTIVE_LOW>; 1808 1726 linux,input-type = <EV_KEY>; ··· 1812 1730 wakeup-source; 1813 1731 }; 1814 1732 1815 - force-recovery { 1733 + key-force-recovery { 1816 1734 label = "Force Recovery"; 1817 1735 gpios = <&gpio TEGRA_GPIO(X, 6) GPIO_ACTIVE_LOW>; 1818 1736 linux,input-type = <EV_KEY>; ··· 1966 1884 <&xbar_mixer_in5_port>, <&xbar_mixer_in6_port>, 1967 1885 <&xbar_mixer_in7_port>, <&xbar_mixer_in8_port>, 1968 1886 <&xbar_mixer_in9_port>, <&xbar_mixer_in10_port>, 1887 + <&xbar_ope1_in_port>, <&xbar_ope2_in_port>, 1969 1888 /* HW accelerators */ 1970 1889 <&sfc1_out_port>, <&sfc2_out_port>, 1971 1890 <&sfc3_out_port>, <&sfc4_out_port>, ··· 1979 1896 <&mixer_out1_port>, <&mixer_out2_port>, 1980 1897 <&mixer_out3_port>, <&mixer_out4_port>, 1981 1898 <&mixer_out5_port>, 1899 + <&ope1_out_port>, <&ope2_out_port>, 1982 1900 /* I/O DAP Ports */ 1983 1901 <&i2s3_port>, <&i2s4_port>, 1984 1902 <&dmic1_port>, <&dmic2_port>;
+5 -5
arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
··· 1756 1756 gpio-keys { 1757 1757 compatible = "gpio-keys"; 1758 1758 1759 - power { 1759 + key-power { 1760 1760 label = "Power"; 1761 1761 gpios = <&gpio TEGRA_GPIO(X, 5) GPIO_ACTIVE_LOW>; 1762 1762 linux,code = <KEY_POWER>; ··· 1764 1764 wakeup-source; 1765 1765 }; 1766 1766 1767 - lid { 1767 + switch-lid { 1768 1768 label = "Lid"; 1769 1769 gpios = <&gpio TEGRA_GPIO(B, 4) GPIO_ACTIVE_LOW>; 1770 1770 linux,input-type = <EV_SW>; ··· 1772 1772 wakeup-source; 1773 1773 }; 1774 1774 1775 - tablet_mode { 1775 + switch-tablet-mode { 1776 1776 label = "Tablet Mode"; 1777 1777 gpios = <&gpio TEGRA_GPIO(Z, 2) GPIO_ACTIVE_HIGH>; 1778 1778 linux,input-type = <EV_SW>; ··· 1780 1780 wakeup-source; 1781 1781 }; 1782 1782 1783 - volume_down { 1783 + key-volume-down { 1784 1784 label = "Volume Down"; 1785 1785 gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>; 1786 1786 linux,code = <KEY_VOLUMEDOWN>; 1787 1787 }; 1788 1788 1789 - volume_up { 1789 + key-volume-up { 1790 1790 label = "Volume Up"; 1791 1791 gpios = <&gpio TEGRA_GPIO(M, 4) GPIO_ACTIVE_LOW>; 1792 1792 linux,code = <KEY_VOLUMEUP>;
+41 -1
arch/arm64/boot/dts/nvidia/tegra210.dtsi
··· 1055 1055 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; 1056 1056 resets = <&tegra_car 142>; 1057 1057 reset-names = "padctl"; 1058 - nvidia,pmc = <&tegra_pmc>; 1058 + nvidia,pmc = <&tegra_pmc>; 1059 1059 1060 1060 status = "disabled"; 1061 1061 ··· 1721 1721 reg = <0x702d3900 0x100>; 1722 1722 sound-name-prefix = "ADX2"; 1723 1723 status = "disabled"; 1724 + }; 1725 + 1726 + tegra_ope1: processing-engine@702d8000 { 1727 + compatible = "nvidia,tegra210-ope"; 1728 + reg = <0x702d8000 0x100>; 1729 + #address-cells = <1>; 1730 + #size-cells = <1>; 1731 + ranges; 1732 + sound-name-prefix = "OPE1"; 1733 + status = "disabled"; 1734 + 1735 + equalizer@702d8100 { 1736 + compatible = "nvidia,tegra210-peq"; 1737 + reg = <0x702d8100 0x100>; 1738 + }; 1739 + 1740 + dynamic-range-compressor@702d8200 { 1741 + compatible = "nvidia,tegra210-mbdrc"; 1742 + reg = <0x702d8200 0x200>; 1743 + }; 1744 + }; 1745 + 1746 + tegra_ope2: processing-engine@702d8400 { 1747 + compatible = "nvidia,tegra210-ope"; 1748 + reg = <0x702d8400 0x100>; 1749 + #address-cells = <1>; 1750 + #size-cells = <1>; 1751 + ranges; 1752 + sound-name-prefix = "OPE2"; 1753 + status = "disabled"; 1754 + 1755 + equalizer@702d8500 { 1756 + compatible = "nvidia,tegra210-peq"; 1757 + reg = <0x702d8500 0x100>; 1758 + }; 1759 + 1760 + dynamic-range-compressor@702d8600 { 1761 + compatible = "nvidia,tegra210-mbdrc"; 1762 + reg = <0x702d8600 0x200>; 1763 + }; 1724 1764 }; 1725 1765 1726 1766 tegra_amixer: amixer@702dbb00 {
+46 -3
arch/arm64/boot/dts/nvidia/tegra234-p3737-0000+p3701-0000.dts
··· 867 867 remote-endpoint = <&asrc_in7_ep>; 868 868 }; 869 869 }; 870 + 871 + xbar_ope1_in_port: port@70 { 872 + reg = <0x70>; 873 + 874 + xbar_ope1_in_ep: endpoint { 875 + remote-endpoint = <&ope1_cif_in_ep>; 876 + }; 877 + }; 878 + 879 + port@71 { 880 + reg = <0x71>; 881 + 882 + xbar_ope1_out_ep: endpoint { 883 + remote-endpoint = <&ope1_cif_out_ep>; 884 + }; 885 + }; 870 886 }; 871 887 872 888 i2s@2901000 { ··· 1506 1490 }; 1507 1491 }; 1508 1492 1493 + processing-engine@2908000 { 1494 + status = "okay"; 1495 + 1496 + ports { 1497 + #address-cells = <1>; 1498 + #size-cells = <0>; 1499 + 1500 + port@0 { 1501 + reg = <0x0>; 1502 + 1503 + ope1_cif_in_ep: endpoint { 1504 + remote-endpoint = <&xbar_ope1_in_ep>; 1505 + }; 1506 + }; 1507 + 1508 + ope1_out_port: port@1 { 1509 + reg = <0x1>; 1510 + 1511 + ope1_cif_out_ep: endpoint { 1512 + remote-endpoint = <&xbar_ope1_out_ep>; 1513 + }; 1514 + }; 1515 + }; 1516 + }; 1517 + 1509 1518 mvc@290a000 { 1510 1519 status = "okay"; 1511 1520 ··· 2021 1980 compatible = "gpio-keys"; 2022 1981 status = "okay"; 2023 1982 2024 - force-recovery { 1983 + key-force-recovery { 2025 1984 label = "Force Recovery"; 2026 1985 gpios = <&gpio TEGRA234_MAIN_GPIO(G, 0) GPIO_ACTIVE_LOW>; 2027 1986 linux,input-type = <EV_KEY>; 2028 1987 linux,code = <BTN_1>; 2029 1988 }; 2030 1989 2031 - power-key { 1990 + key-power { 2032 1991 label = "Power"; 2033 1992 gpios = <&gpio_aon TEGRA234_AON_GPIO(EE, 4) GPIO_ACTIVE_LOW>; 2034 1993 linux,input-type = <EV_KEY>; ··· 2037 1996 wakeup-source; 2038 1997 }; 2039 1998 2040 - suspend { 1999 + key-suspend { 2041 2000 label = "Suspend"; 2042 2001 gpios = <&gpio TEGRA234_MAIN_GPIO(G, 2) GPIO_ACTIVE_LOW>; 2043 2002 linux,input-type = <EV_KEY>; ··· 2085 2044 <&xbar_asrc_in3_port>, <&xbar_asrc_in4_port>, 2086 2045 <&xbar_asrc_in5_port>, <&xbar_asrc_in6_port>, 2087 2046 <&xbar_asrc_in7_port>, 2047 + <&xbar_ope1_in_port>, 2088 2048 /* HW accelerators */ 2089 2049 <&sfc1_out_port>, <&sfc2_out_port>, 2090 2050 <&sfc3_out_port>, <&sfc4_out_port>, ··· 2104 2062 <&mix_out4_port>, <&mix_out5_port>, 2105 2063 <&asrc_out1_port>, <&asrc_out2_port>, <&asrc_out3_port>, 2106 2064 <&asrc_out4_port>, <&asrc_out5_port>, <&asrc_out6_port>, 2065 + <&ope1_out_port>, 2107 2066 /* BE I/O Ports */ 2108 2067 <&i2s1_port>, <&i2s2_port>, <&i2s4_port>, <&i2s6_port>, 2109 2068 <&dmic3_port>;
+177
arch/arm64/boot/dts/nvidia/tegra234.dtsi
··· 21 21 22 22 ranges = <0x0 0x0 0x0 0x40000000>; 23 23 24 + gpcdma: dma-controller@2600000 { 25 + compatible = "nvidia,tegra234-gpcdma", 26 + "nvidia,tegra194-gpcdma", 27 + "nvidia,tegra186-gpcdma"; 28 + reg = <0x2600000 0x210000>; 29 + resets = <&bpmp TEGRA234_RESET_GPCDMA>; 30 + reset-names = "gpcdma"; 31 + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>, 32 + <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>, 33 + <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>, 34 + <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>, 35 + <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, 36 + <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>, 37 + <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 38 + <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>, 39 + <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 40 + <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 41 + <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 42 + <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, 43 + <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, 44 + <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 45 + <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, 46 + <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, 47 + <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, 48 + <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>, 49 + <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>, 50 + <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, 51 + <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, 52 + <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, 53 + <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 54 + <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, 55 + <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 56 + <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 57 + <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 58 + <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 59 + <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 60 + <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 61 + <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; 62 + #dma-cells = <1>; 63 + iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>; 64 + dma-coherent; 65 + }; 66 + 24 67 aconnect@2900000 { 25 68 compatible = "nvidia,tegra234-aconnect", 26 69 "nvidia,tegra210-aconnect"; ··· 347 304 status = "disabled"; 348 305 }; 349 306 307 + tegra_ope1: processing-engine@2908000 { 308 + compatible = "nvidia,tegra234-ope", 309 + "nvidia,tegra210-ope"; 310 + reg = <0x2908000 0x100>; 311 + #address-cells = <1>; 312 + #size-cells = <1>; 313 + ranges; 314 + sound-name-prefix = "OPE1"; 315 + status = "disabled"; 316 + 317 + equalizer@2908100 { 318 + compatible = "nvidia,tegra234-peq", 319 + "nvidia,tegra210-peq"; 320 + reg = <0x2908100 0x100>; 321 + }; 322 + 323 + dynamic-range-compressor@2908200 { 324 + compatible = "nvidia,tegra234-mbdrc", 325 + "nvidia,tegra210-mbdrc"; 326 + reg = <0x2908200 0x200>; 327 + }; 328 + }; 329 + 350 330 tegra_mvc1: mvc@290a000 { 351 331 compatible = "nvidia,tegra234-mvc", 352 332 "nvidia,tegra210-mvc"; ··· 518 452 reg = <0x00100000 0xf000>, 519 453 <0x0010f000 0x1000>; 520 454 status = "okay"; 455 + }; 456 + 457 + timer@2080000 { 458 + compatible = "nvidia,tegra234-timer"; 459 + reg = <0x02080000 0x00121000>; 460 + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 461 + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 462 + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 463 + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 464 + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 465 + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, 466 + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, 467 + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, 468 + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, 469 + <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, 470 + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, 471 + <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, 472 + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 473 + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 474 + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 475 + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 476 + status = "okay"; 477 + }; 478 + 479 + host1x@13e00000 { 480 + compatible = "nvidia,tegra234-host1x"; 481 + reg = <0x13e00000 0x10000>, 482 + <0x13e10000 0x10000>, 483 + <0x13e40000 0x10000>; 484 + reg-names = "common", "hypervisor", "vm"; 485 + interrupts = <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>, 486 + <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 487 + <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>, 488 + <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, 489 + <GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>, 490 + <GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>, 491 + <GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>, 492 + <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>, 493 + <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>; 494 + interrupt-names = "syncpt0", "syncpt1", "syncpt2", "syncpt3", "syncpt4", 495 + "syncpt5", "syncpt6", "syncpt7", "host1x"; 496 + clocks = <&bpmp TEGRA234_CLK_HOST1X>; 497 + clock-names = "host1x"; 498 + 499 + #address-cells = <1>; 500 + #size-cells = <1>; 501 + 502 + ranges = <0x15000000 0x15000000 0x01000000>; 503 + interconnects = <&mc TEGRA234_MEMORY_CLIENT_HOST1XDMAR &emc>; 504 + interconnect-names = "dma-mem"; 505 + iommus = <&smmu_niso1 TEGRA234_SID_HOST1X>; 506 + 507 + vic@15340000 { 508 + compatible = "nvidia,tegra234-vic"; 509 + reg = <0x15340000 0x00040000>; 510 + interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>; 511 + clocks = <&bpmp TEGRA234_CLK_VIC>; 512 + clock-names = "vic"; 513 + resets = <&bpmp TEGRA234_RESET_VIC>; 514 + reset-names = "vic"; 515 + 516 + power-domains = <&bpmp TEGRA234_POWER_DOMAIN_VIC>; 517 + interconnects = <&mc TEGRA234_MEMORY_CLIENT_VICSRD &emc>, 518 + <&mc TEGRA234_MEMORY_CLIENT_VICSWR &emc>; 519 + interconnect-names = "dma-mem", "write"; 520 + iommus = <&smmu_niso1 TEGRA234_SID_VIC>; 521 + dma-coherent; 522 + }; 521 523 }; 522 524 523 525 gpio: gpio@2200000 { ··· 1067 933 status = "okay"; 1068 934 }; 1069 935 936 + sce-fabric@b600000 { 937 + compatible = "nvidia,tegra234-sce-fabric"; 938 + reg = <0xb600000 0x40000>; 939 + interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 940 + status = "okay"; 941 + }; 942 + 943 + rce-fabric@be00000 { 944 + compatible = "nvidia,tegra234-rce-fabric"; 945 + reg = <0xbe00000 0x40000>; 946 + interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 947 + status = "okay"; 948 + }; 949 + 1070 950 hsp_aon: hsp@c150000 { 1071 951 compatible = "nvidia,tegra234-hsp", "nvidia,tegra194-hsp"; 1072 952 reg = <0x0c150000 0x90000>; ··· 1163 1015 1164 1016 #interrupt-cells = <2>; 1165 1017 interrupt-controller; 1018 + }; 1019 + 1020 + aon-fabric@c600000 { 1021 + compatible = "nvidia,tegra234-aon-fabric"; 1022 + reg = <0xc600000 0x40000>; 1023 + interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; 1024 + status = "okay"; 1025 + }; 1026 + 1027 + bpmp-fabric@d600000 { 1028 + compatible = "nvidia,tegra234-bpmp-fabric"; 1029 + reg = <0xd600000 0x40000>; 1030 + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1031 + status = "okay"; 1032 + }; 1033 + 1034 + dce-fabric@de00000 { 1035 + compatible = "nvidia,tegra234-sce-fabric"; 1036 + reg = <0xde00000 0x40000>; 1037 + interrupts = <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>; 1038 + status = "okay"; 1166 1039 }; 1167 1040 1168 1041 gic: interrupt-controller@f400000 { ··· 1479 1310 nvidia,memory-controller = <&mc>; 1480 1311 status = "okay"; 1481 1312 }; 1313 + 1314 + cbb-fabric@13a00000 { 1315 + compatible = "nvidia,tegra234-cbb-fabric"; 1316 + reg = <0x13a00000 0x400000>; 1317 + interrupts = <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>; 1318 + status = "okay"; 1319 + }; 1482 1320 }; 1483 1321 1484 1322 ccplex@e000000 { ··· 1501 1325 #address-cells = <1>; 1502 1326 #size-cells = <1>; 1503 1327 ranges = <0x0 0x0 0x40000000 0x80000>; 1328 + no-memory-wc; 1504 1329 1505 1330 cpu_bpmp_tx: sram@70000 { 1506 1331 reg = <0x70000 0x1000>;