Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branch 'next/board-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/boards

* 'next/board-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (32 commits)
ARM: EXYNOS: support Exynos4210-bus Devfreq driver on Nuri board
ARM: EXYNOS: Register JPEG on nuri
ARM: EXYNOS: Register JPEG on universal_c210
ARM: S5PV210: Enable JPEG on SMDKV210
ARM: S5PV210: Add JPEG board definition
ARM: EXYNOS: Enable JPEG on Origen
ARM: EXYNOS: Enable JPEG on SMDKV310
ARM: EXYNOS: Add __init attribute to universal_camera_init()
ARM: EXYNOS: Add __init attribute to nuri_camera_init()
ARM: S5PV210: Enable FIMC on SMDKC110
ARM: S5PV210: Enable FIMC on SMDKV210
ARM: S5PV210: Enable MFC on SMDKC110
ARM: S5PV210: Enable MFC on SMDKV210
ARM: EXYNOS: Enable G2D on SMDKV310
ARM: S3C64XX: Supply platform data for SPI on Cragganmore
ARM: S3C64XX: Add some more Cragganmore module IDs to the table
ARM: EXYNOS: Add missing FIMC media device to Origen
ARM: EXYNOS: Add missing FIMC media device to SMDKV310
ARM: S5PV210: Add missing FIMC media device to Aquila
ARM: SAMSUNG: Add support for S5K6AAFX camera on Nuri board
...

+346 -11
+10
arch/arm/mach-exynos/Kconfig
··· 183 183 select S5P_DEV_FIMC1 184 184 select S5P_DEV_FIMC2 185 185 select S5P_DEV_FIMC3 186 + select S5P_DEV_G2D 186 187 select S5P_DEV_I2C_HDMIPHY 188 + select S5P_DEV_JPEG 187 189 select S5P_DEV_MFC 188 190 select S5P_DEV_TV 189 191 select S5P_DEV_USB_EHCI ··· 232 230 select S5P_DEV_FIMC1 233 231 select S5P_DEV_FIMC2 234 232 select S5P_DEV_FIMC3 233 + select S5P_DEV_G2D 235 234 select S5P_DEV_CSIS0 235 + select S5P_DEV_JPEG 236 236 select S5P_DEV_FIMD0 237 237 select S3C_DEV_HSMMC 238 238 select S3C_DEV_HSMMC2 ··· 272 268 select S3C_DEV_I2C1 273 269 select S3C_DEV_I2C3 274 270 select S3C_DEV_I2C5 271 + select S3C_DEV_I2C6 275 272 select S5P_DEV_CSIS0 273 + select S5P_DEV_JPEG 276 274 select S5P_DEV_FIMC0 277 275 select S5P_DEV_FIMC1 278 276 select S5P_DEV_FIMC2 279 277 select S5P_DEV_FIMC3 278 + select S5P_DEV_G2D 280 279 select S5P_DEV_MFC 281 280 select S5P_DEV_USB_EHCI 282 281 select S5P_SETUP_MIPIPHY ··· 290 283 select EXYNOS4_SETUP_I2C1 291 284 select EXYNOS4_SETUP_I2C3 292 285 select EXYNOS4_SETUP_I2C5 286 + select EXYNOS4_SETUP_I2C6 293 287 select EXYNOS4_SETUP_SDHCI 294 288 select EXYNOS4_SETUP_USB_PHY 295 289 select S5P_SETUP_MIPIPHY ··· 311 303 select S5P_DEV_FIMC2 312 304 select S5P_DEV_FIMC3 313 305 select S5P_DEV_FIMD0 306 + select S5P_DEV_G2D 314 307 select S5P_DEV_I2C_HDMIPHY 308 + select S5P_DEV_JPEG 315 309 select S5P_DEV_MFC 316 310 select S5P_DEV_TV 317 311 select S5P_DEV_USB_EHCI
+76 -4
arch/arm/mach-exynos/mach-nuri.c
··· 28 28 29 29 #include <video/platform_lcd.h> 30 30 #include <media/m5mols.h> 31 + #include <media/s5k6aa.h> 31 32 #include <media/s5p_fimc.h> 32 33 #include <media/v4l2-mediabus.h> 33 34 ··· 76 75 FIXED_REG_ID_MAX8903, 77 76 FIXED_REG_ID_CAM_A28V, 78 77 FIXED_REG_ID_CAM_12V, 78 + FIXED_REG_ID_CAM_VT_15V, 79 79 }; 80 80 81 81 static struct s3c2410_uartcfg nuri_uartcfgs[] __initdata = { ··· 401 399 static struct regulator_consumer_supply __initdata max8997_ldo5_[] = { 402 400 REGULATOR_SUPPLY("vhsic", "modemctl"), /* MODEM */ 403 401 }; 402 + static struct regulator_consumer_supply nuri_max8997_ldo6_consumer[] = { 403 + REGULATOR_SUPPLY("vdd_reg", "6-003c"), /* S5K6AA camera */ 404 + }; 404 405 static struct regulator_consumer_supply __initdata max8997_ldo7_[] = { 405 406 REGULATOR_SUPPLY("dig_18", "0-001f"), /* HCD803 */ 406 407 }; ··· 436 431 REGULATOR_SUPPLY("vdd_arm", NULL), /* CPUFREQ */ 437 432 }; 438 433 static struct regulator_consumer_supply __initdata max8997_buck2_[] = { 439 - REGULATOR_SUPPLY("vdd_int", NULL), /* CPUFREQ */ 434 + REGULATOR_SUPPLY("vdd_int", "exynos4210-busfreq.0"), /* CPUFREQ */ 440 435 }; 441 436 static struct regulator_consumer_supply __initdata max8997_buck3_[] = { 442 437 REGULATOR_SUPPLY("vdd", "mali_dev.0"), /* G3D of Exynos 4 */ ··· 551 546 .enabled = 1, 552 547 }, 553 548 }, 549 + .num_consumer_supplies = ARRAY_SIZE(nuri_max8997_ldo6_consumer), 550 + .consumer_supplies = nuri_max8997_ldo6_consumer, 554 551 }; 555 552 556 553 static struct regulator_init_data __initdata max8997_ldo7_data = { ··· 749 742 .constraints = { 750 743 .name = "VINT_1.1V_C210", 751 744 .min_uV = 900000, 752 - .max_uV = 1100000, 745 + .max_uV = 1200000, 753 746 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, 754 747 .always_on = 1, 755 748 .state_mem = { ··· 964 957 .regulators = nuri_max8997_regulators, 965 958 966 959 .buck125_gpios = { EXYNOS4_GPX0(5), EXYNOS4_GPX0(6), EXYNOS4_GPL0(0) }, 967 - .buck2_gpiodvs = true, 968 960 969 961 .buck1_voltage[0] = 1350000, /* 1.35V */ 970 962 .buck1_voltage[1] = 1300000, /* 1.3V */ ··· 1122 1116 } 1123 1117 1124 1118 /* CAMERA */ 1119 + static struct regulator_consumer_supply cam_vt_cam15_supply = 1120 + REGULATOR_SUPPLY("vdd_core", "6-003c"); 1121 + 1122 + static struct regulator_init_data cam_vt_cam15_reg_init_data = { 1123 + .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS }, 1124 + .num_consumer_supplies = 1, 1125 + .consumer_supplies = &cam_vt_cam15_supply, 1126 + }; 1127 + 1128 + static struct fixed_voltage_config cam_vt_cam15_fixed_voltage_cfg = { 1129 + .supply_name = "VT_CAM_1.5V", 1130 + .microvolts = 1500000, 1131 + .gpio = EXYNOS4_GPE2(2), /* VT_CAM_1.5V_EN */ 1132 + .enable_high = 1, 1133 + .init_data = &cam_vt_cam15_reg_init_data, 1134 + }; 1135 + 1136 + static struct platform_device cam_vt_cam15_fixed_rdev = { 1137 + .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_VT_15V, 1138 + .dev = { .platform_data = &cam_vt_cam15_fixed_voltage_cfg }, 1139 + }; 1140 + 1125 1141 static struct regulator_consumer_supply cam_vdda_supply[] = { 1142 + REGULATOR_SUPPLY("vdda", "6-003c"), 1126 1143 REGULATOR_SUPPLY("a_sensor", "0-001f"), 1127 1144 }; 1128 1145 ··· 1202 1173 1203 1174 #define GPIO_CAM_MEGA_RST EXYNOS4_GPY3(7) /* ISP_RESET */ 1204 1175 #define GPIO_CAM_8M_ISP_INT EXYNOS4_GPL2(5) 1176 + #define GPIO_CAM_VT_NSTBY EXYNOS4_GPL2(0) 1177 + #define GPIO_CAM_VT_NRST EXYNOS4_GPL2(1) 1178 + 1179 + static struct s5k6aa_platform_data s5k6aa_pldata = { 1180 + .mclk_frequency = 24000000UL, 1181 + .gpio_reset = { GPIO_CAM_VT_NRST, 0 }, 1182 + .gpio_stby = { GPIO_CAM_VT_NSTBY, 0 }, 1183 + .bus_type = V4L2_MBUS_PARALLEL, 1184 + .horiz_flip = 1, 1185 + }; 1186 + 1187 + static struct i2c_board_info s5k6aa_board_info = { 1188 + I2C_BOARD_INFO("S5K6AA", 0x3c), 1189 + .platform_data = &s5k6aa_pldata, 1190 + }; 1205 1191 1206 1192 static struct m5mols_platform_data m5mols_platdata = { 1207 1193 .gpio_reset = GPIO_CAM_MEGA_RST, ··· 1229 1185 1230 1186 static struct s5p_fimc_isp_info nuri_camera_sensors[] = { 1231 1187 { 1188 + .flags = V4L2_MBUS_PCLK_SAMPLE_RISING | 1189 + V4L2_MBUS_VSYNC_ACTIVE_LOW, 1190 + .bus_type = FIMC_ITU_601, 1191 + .board_info = &s5k6aa_board_info, 1192 + .clk_frequency = 24000000UL, 1193 + .i2c_bus_num = 6, 1194 + }, { 1232 1195 .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING | 1233 1196 V4L2_MBUS_VSYNC_ACTIVE_LOW, 1234 1197 .bus_type = FIMC_MIPI_CSI2, ··· 1251 1200 }; 1252 1201 1253 1202 static struct gpio nuri_camera_gpios[] = { 1203 + { GPIO_CAM_VT_NSTBY, GPIOF_OUT_INIT_LOW, "CAM_VGA_NSTBY" }, 1204 + { GPIO_CAM_VT_NRST, GPIOF_OUT_INIT_LOW, "CAM_VGA_NRST" }, 1254 1205 { GPIO_CAM_8M_ISP_INT, GPIOF_IN, "8M_ISP_INT" }, 1255 1206 { GPIO_CAM_MEGA_RST, GPIOF_OUT_INIT_LOW, "CAM_8M_NRST" }, 1256 1207 }; 1257 1208 1258 - static void nuri_camera_init(void) 1209 + static void __init nuri_camera_init(void) 1259 1210 { 1260 1211 s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata), 1261 1212 &s5p_device_mipi_csis0); ··· 1277 1224 pr_err("%s: Failed to configure 8M_ISP_INT GPIO\n", __func__); 1278 1225 1279 1226 /* Free GPIOs controlled directly by the sensor drivers. */ 1227 + gpio_free(GPIO_CAM_VT_NRST); 1228 + gpio_free(GPIO_CAM_VT_NSTBY); 1280 1229 gpio_free(GPIO_CAM_MEGA_RST); 1281 1230 1282 1231 if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A)) { ··· 1289 1234 s5p_gpio_set_drvstr(EXYNOS4_GPJ1(3), S5P_GPIO_DRVSTR_LV4); 1290 1235 } 1291 1236 1237 + static struct s3c2410_platform_i2c nuri_i2c6_platdata __initdata = { 1238 + .frequency = 400000U, 1239 + .sda_delay = 200, 1240 + .bus_num = 6, 1241 + }; 1242 + 1292 1243 static struct s3c2410_platform_i2c nuri_i2c0_platdata __initdata = { 1293 1244 .frequency = 400000U, 1294 1245 .sda_delay = 200, 1246 + }; 1247 + 1248 + /* DEVFREQ controlling memory/bus */ 1249 + static struct platform_device exynos4_bus_devfreq = { 1250 + .name = "exynos4210-busfreq", 1295 1251 }; 1296 1252 1297 1253 static struct platform_device *nuri_devices[] __initdata = { 1298 1254 /* Samsung Platform Devices */ 1299 1255 &s3c_device_i2c5, /* PMIC should initialize first */ 1300 1256 &s3c_device_i2c0, 1257 + &s3c_device_i2c6, 1301 1258 &emmc_fixed_voltage, 1302 1259 &s5p_device_mipi_csis0, 1303 1260 &s5p_device_fimc0, ··· 1326 1259 &s3c_device_i2c3, 1327 1260 &i2c9_gpio, 1328 1261 &s3c_device_adc, 1262 + &s5p_device_g2d, 1263 + &s5p_device_jpeg, 1329 1264 &s3c_device_rtc, 1330 1265 &s5p_device_mfc, 1331 1266 &s5p_device_mfc_l, ··· 1343 1274 &nuri_backlight_device, 1344 1275 &max8903_fixed_reg_dev, 1345 1276 &nuri_max8903_device, 1277 + &cam_vt_cam15_fixed_rdev, 1346 1278 &cam_vdda_fixed_rdev, 1347 1279 &cam_8m_12v_fixed_rdev, 1280 + &exynos4_bus_devfreq, 1348 1281 }; 1349 1282 1350 1283 static void __init nuri_map_io(void) ··· 1376 1305 i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs)); 1377 1306 i2c9_devs[I2C9_MAX17042].irq = gpio_to_irq(EXYNOS4_GPX2(3)); 1378 1307 i2c_register_board_info(9, i2c9_devs, ARRAY_SIZE(i2c9_devs)); 1308 + s3c_i2c6_set_platdata(&nuri_i2c6_platdata); 1379 1309 1380 1310 s5p_fimd0_set_platdata(&nuri_fb_pdata); 1381 1311
+37
arch/arm/mach-exynos/mach-origen.c
··· 20 20 #include <linux/regulator/machine.h> 21 21 #include <linux/mfd/max8997.h> 22 22 #include <linux/lcd.h> 23 + #include <linux/rfkill-gpio.h> 23 24 24 25 #include <asm/mach/arch.h> 25 26 #include <asm/hardware/gic.h> ··· 236 235 .min_uV = 2800000, 237 236 .max_uV = 2800000, 238 237 .apply_uV = 1, 238 + .always_on = 1, 239 239 .valid_ops_mask = REGULATOR_CHANGE_STATUS, 240 240 .state_mem = { 241 241 .disabled = 1, ··· 280 278 .min_uV = 1800000, 281 279 .max_uV = 1800000, 282 280 .apply_uV = 1, 281 + .always_on = 1, 283 282 .valid_ops_mask = REGULATOR_CHANGE_STATUS, 284 283 .state_mem = { 285 284 .disabled = 1, ··· 296 293 .min_uV = 3300000, 297 294 .max_uV = 3300000, 298 295 .apply_uV = 1, 296 + .always_on = 1, 299 297 .valid_ops_mask = REGULATOR_CHANGE_STATUS, 300 298 .state_mem = { 301 299 .disabled = 1, ··· 606 602 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp, 607 603 }; 608 604 605 + /* Bluetooth rfkill gpio platform data */ 606 + struct rfkill_gpio_platform_data origen_bt_pdata = { 607 + .reset_gpio = EXYNOS4_GPX2(2), 608 + .shutdown_gpio = -1, 609 + .type = RFKILL_TYPE_BLUETOOTH, 610 + .name = "origen-bt", 611 + }; 612 + 613 + /* Bluetooth Platform device */ 614 + static struct platform_device origen_device_bluetooth = { 615 + .name = "rfkill_gpio", 616 + .id = -1, 617 + .dev = { 618 + .platform_data = &origen_bt_pdata, 619 + }, 620 + }; 621 + 609 622 static struct platform_device *origen_devices[] __initdata = { 610 623 &s3c_device_hsmmc2, 611 624 &s3c_device_hsmmc0, ··· 634 613 &s5p_device_fimc1, 635 614 &s5p_device_fimc2, 636 615 &s5p_device_fimc3, 616 + &s5p_device_fimc_md, 637 617 &s5p_device_fimd0, 618 + &s5p_device_g2d, 638 619 &s5p_device_hdmi, 639 620 &s5p_device_i2c_hdmiphy, 621 + &s5p_device_jpeg, 640 622 &s5p_device_mfc, 641 623 &s5p_device_mfc_l, 642 624 &s5p_device_mfc_r, ··· 654 630 &exynos4_device_pd[PD_MFC], 655 631 &origen_device_gpiokeys, 656 632 &origen_lcd_hv070wsa, 633 + &origen_device_bluetooth, 657 634 }; 658 635 659 636 /* LCD Backlight data */ ··· 667 642 .pwm_id = 0, 668 643 .pwm_period_ns = 1000, 669 644 }; 645 + 646 + static void __init origen_bt_setup(void) 647 + { 648 + gpio_request(EXYNOS4_GPA0(0), "GPIO BT_UART"); 649 + /* 4 UART Pins configuration */ 650 + s3c_gpio_cfgrange_nopull(EXYNOS4_GPA0(0), 4, S3C_GPIO_SFN(2)); 651 + /* Setup BT Reset, this gpio will be requesed by rfkill-gpio */ 652 + s3c_gpio_cfgpin(EXYNOS4_GPX2(2), S3C_GPIO_OUTPUT); 653 + s3c_gpio_setpull(EXYNOS4_GPX2(2), S3C_GPIO_PULL_NONE); 654 + } 670 655 671 656 static void s5p_tv_setup(void) 672 657 { ··· 738 703 s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev; 739 704 740 705 samsung_bl_set(&origen_bl_gpio_info, &origen_bl_data); 706 + 707 + origen_bt_setup(); 741 708 } 742 709 743 710 MACHINE_START(ORIGEN, "ORIGEN")
+3
arch/arm/mach-exynos/mach-smdkv310.c
··· 270 270 &s5p_device_fimc1, 271 271 &s5p_device_fimc2, 272 272 &s5p_device_fimc3, 273 + &s5p_device_fimc_md, 274 + &s5p_device_g2d, 275 + &s5p_device_jpeg, 273 276 &exynos4_device_ac97, 274 277 &exynos4_device_i2s0, 275 278 &exynos4_device_ohci,
+75 -5
arch/arm/mach-exynos/mach-universal_c210.c
··· 46 46 #include <media/v4l2-mediabus.h> 47 47 #include <media/s5p_fimc.h> 48 48 #include <media/m5mols.h> 49 + #include <media/s5k6aa.h> 49 50 50 51 #include "common.h" 51 52 ··· 123 122 static struct regulator_consumer_supply lp3974_buck2_consumer = 124 123 REGULATOR_SUPPLY("vddg3d", NULL); 125 124 126 - static struct regulator_consumer_supply lp3974_buck3_consumer = 127 - REGULATOR_SUPPLY("vdet", "s5p-sdo"); 125 + static struct regulator_consumer_supply lp3974_buck3_consumer[] = { 126 + REGULATOR_SUPPLY("vdet", "s5p-sdo"), 127 + REGULATOR_SUPPLY("vdd_reg", "0-003c"), 128 + }; 128 129 129 130 static struct regulator_init_data lp3974_buck1_data = { 130 131 .constraints = { ··· 171 168 .enabled = 1, 172 169 }, 173 170 }, 174 - .num_consumer_supplies = 1, 175 - .consumer_supplies = &lp3974_buck3_consumer, 171 + .num_consumer_supplies = ARRAY_SIZE(lp3974_buck3_consumer), 172 + .consumer_supplies = lp3974_buck3_consumer, 176 173 }; 177 174 178 175 static struct regulator_init_data lp3974_buck4_data = { ··· 305 302 .consumer_supplies = lp3974_ldo8_consumer, 306 303 }; 307 304 305 + static struct regulator_consumer_supply lp3974_ldo9_consumer = 306 + REGULATOR_SUPPLY("vddio", "0-003c"); 307 + 308 308 static struct regulator_init_data lp3974_ldo9_data = { 309 309 .constraints = { 310 310 .name = "VCC_2.8V", ··· 319 313 .enabled = 1, 320 314 }, 321 315 }, 316 + .num_consumer_supplies = 1, 317 + .consumer_supplies = &lp3974_ldo9_consumer, 322 318 }; 323 319 324 320 static struct regulator_init_data lp3974_ldo10_data = { ··· 419 411 }; 420 412 421 413 static struct regulator_consumer_supply lp3974_ldo16_consumer[] = { 414 + REGULATOR_SUPPLY("vdda", "0-003c"), 422 415 REGULATOR_SUPPLY("a_sensor", "0-001f"), 423 416 }; 424 417 ··· 826 817 }, 827 818 .max_bpp = 32, 828 819 .default_bpp = 16, 820 + .virtual_x = 480, 821 + .virtual_y = 2 * 800, 829 822 }; 830 823 831 824 static struct s3c_fb_platdata universal_lcd_pdata __initdata = { ··· 837 826 .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN 838 827 | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, 839 828 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp, 829 + }; 830 + 831 + static struct regulator_consumer_supply cam_vt_dio_supply = 832 + REGULATOR_SUPPLY("vdd_core", "0-003c"); 833 + 834 + static struct regulator_init_data cam_vt_dio_reg_init_data = { 835 + .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS }, 836 + .num_consumer_supplies = 1, 837 + .consumer_supplies = &cam_vt_dio_supply, 838 + }; 839 + 840 + static struct fixed_voltage_config cam_vt_dio_fixed_voltage_cfg = { 841 + .supply_name = "CAM_VT_D_IO", 842 + .microvolts = 2800000, 843 + .gpio = EXYNOS4_GPE2(1), /* CAM_PWR_EN2 */ 844 + .enable_high = 1, 845 + .init_data = &cam_vt_dio_reg_init_data, 846 + }; 847 + 848 + static struct platform_device cam_vt_dio_fixed_reg_dev = { 849 + .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_VT_DIO, 850 + .dev = { .platform_data = &cam_vt_dio_fixed_voltage_cfg }, 840 851 }; 841 852 842 853 static struct regulator_consumer_supply cam_i_core_supply = ··· 916 883 #define GPIO_CAM_LEVEL_EN(n) EXYNOS4_GPE4(n + 3) 917 884 #define GPIO_CAM_8M_ISP_INT EXYNOS4_GPX1(5) /* XEINT_13 */ 918 885 #define GPIO_CAM_MEGA_nRST EXYNOS4_GPE2(5) 886 + #define GPIO_CAM_VGA_NRST EXYNOS4_GPE4(7) 887 + #define GPIO_CAM_VGA_NSTBY EXYNOS4_GPE4(6) 888 + 889 + static int s5k6aa_set_power(int on) 890 + { 891 + gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on); 892 + return 0; 893 + } 894 + 895 + static struct s5k6aa_platform_data s5k6aa_platdata = { 896 + .mclk_frequency = 21600000UL, 897 + .gpio_reset = { GPIO_CAM_VGA_NRST, 0 }, 898 + .gpio_stby = { GPIO_CAM_VGA_NSTBY, 0 }, 899 + .bus_type = V4L2_MBUS_PARALLEL, 900 + .horiz_flip = 1, 901 + .set_power = s5k6aa_set_power, 902 + }; 903 + 904 + static struct i2c_board_info s5k6aa_board_info = { 905 + I2C_BOARD_INFO("S5K6AA", 0x3C), 906 + .platform_data = &s5k6aa_platdata, 907 + }; 919 908 920 909 static int m5mols_set_power(struct device *dev, int on) 921 910 { ··· 962 907 .mux_id = 0, 963 908 .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING | 964 909 V4L2_MBUS_VSYNC_ACTIVE_LOW, 910 + .bus_type = FIMC_ITU_601, 911 + .board_info = &s5k6aa_board_info, 912 + .i2c_bus_num = 0, 913 + .clk_frequency = 24000000UL, 914 + }, { 915 + .mux_id = 0, 916 + .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING | 917 + V4L2_MBUS_VSYNC_ACTIVE_LOW, 965 918 .bus_type = FIMC_MIPI_CSI2, 966 919 .board_info = &m5mols_board_info, 967 920 .i2c_bus_num = 0, ··· 988 925 { GPIO_CAM_LEVEL_EN(2), GPIOF_OUT_INIT_LOW, "CAM_LVL_EN2" }, 989 926 { GPIO_CAM_8M_ISP_INT, GPIOF_IN, "8M_ISP_INT" }, 990 927 { GPIO_CAM_MEGA_nRST, GPIOF_OUT_INIT_LOW, "CAM_8M_NRST" }, 928 + { GPIO_CAM_VGA_NRST, GPIOF_OUT_INIT_LOW, "CAM_VGA_NRST" }, 929 + { GPIO_CAM_VGA_NSTBY, GPIOF_OUT_INIT_LOW, "CAM_VGA_NSTBY" }, 991 930 }; 992 931 993 - static void universal_camera_init(void) 932 + static void __init universal_camera_init(void) 994 933 { 995 934 s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata), 996 935 &s5p_device_mipi_csis0); ··· 1013 948 /* Free GPIOs controlled directly by the sensor drivers. */ 1014 949 gpio_free(GPIO_CAM_MEGA_nRST); 1015 950 gpio_free(GPIO_CAM_8M_ISP_INT); 951 + gpio_free(GPIO_CAM_VGA_NRST); 952 + gpio_free(GPIO_CAM_VGA_NSTBY); 1016 953 1017 954 if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A)) 1018 955 pr_err("Camera port A setup failed\n"); ··· 1027 960 &s5p_device_fimc1, 1028 961 &s5p_device_fimc2, 1029 962 &s5p_device_fimc3, 963 + &s5p_device_g2d, 1030 964 &mmc0_fixed_voltage, 1031 965 &s3c_device_hsmmc0, 1032 966 &s3c_device_hsmmc2, ··· 1047 979 &universal_gpio_keys, 1048 980 &s5p_device_onenand, 1049 981 &s5p_device_fimd0, 982 + &s5p_device_jpeg, 1050 983 &s5p_device_mfc, 1051 984 &s5p_device_mfc_l, 1052 985 &s5p_device_mfc_r, 1053 986 &exynos4_device_pd[PD_MFC], 1054 987 &exynos4_device_pd[PD_LCD0], 1055 988 &exynos4_device_pd[PD_CAM], 989 + &cam_vt_dio_fixed_reg_dev, 1056 990 &cam_i_core_fixed_reg_dev, 1057 991 &cam_s_if_fixed_reg_dev, 1058 992 &s5p_device_fimc_md,
+1
arch/arm/mach-s3c64xx/Kconfig
··· 296 296 select S3C64XX_DEV_SPI0 297 297 select SAMSUNG_GPIO_EXTRA128 298 298 select I2C 299 + select LEDS_GPIO_REGISTER 299 300 help 300 301 Machine support for the Wolfson Cragganmore S3C6410 variant.
+30 -1
arch/arm/mach-s3c64xx/mach-crag6410-module.c
··· 11 11 #include <linux/export.h> 12 12 #include <linux/interrupt.h> 13 13 #include <linux/i2c.h> 14 + #include <linux/spi/spi.h> 14 15 15 16 #include <linux/mfd/wm831x/irq.h> 16 17 #include <linux/mfd/wm831x/gpio.h> ··· 22 21 #include <sound/wm8962.h> 23 22 #include <sound/wm9081.h> 24 23 24 + #include <plat/s3c64xx-spi.h> 25 + 25 26 #include <mach/crag6410.h> 27 + 28 + static struct s3c64xx_spi_csinfo wm0010_spi_csinfo = { 29 + .set_level = gpio_set_value, 30 + .line = S3C64XX_GPC(3), 31 + }; 32 + 33 + static struct spi_board_info wm1253_devs[] = { 34 + [0] = { 35 + .modalias = "wm0010", 36 + .bus_num = 0, 37 + .chip_select = 0, 38 + .mode = SPI_MODE_0, 39 + .controller_data = &wm0010_spi_csinfo, 40 + }, 41 + }; 26 42 27 43 static struct wm5100_pdata wm5100_pdata = { 28 44 .ldo_ena = S3C64XX_GPN(7), ··· 176 158 const char *name; 177 159 const struct i2c_board_info *i2c_devs; 178 160 int num_i2c_devs; 161 + const struct spi_board_info *spi_devs; 162 + int num_spi_devs; 179 163 } gf_mods[] = { 180 164 { .id = 0x01, .name = "1250-EV1 Springbank" }, 181 165 { .id = 0x02, .name = "1251-EV1 Jura" }, 182 166 { .id = 0x03, .name = "1252-EV1 Glenlivet" }, 183 167 { .id = 0x11, .name = "6249-EV2 Glenfarclas", }, 168 + { .id = 0x14, .name = "6271-EV1 Lochnagar" }, 169 + { .id = 0x15, .name = "XXXX-EV1 Bells" }, 184 170 { .id = 0x21, .name = "1275-EV1 Mortlach" }, 185 171 { .id = 0x25, .name = "1274-EV1 Glencadam" }, 186 - { .id = 0x31, .name = "1253-EV1 Tomatin", }, 172 + { .id = 0x31, .name = "1253-EV1 Tomatin", 173 + .spi_devs = wm1253_devs, .num_spi_devs = ARRAY_SIZE(wm1253_devs) }, 174 + { .id = 0x32, .name = "XXXX-EV1 Caol Illa" }, 175 + { .id = 0x33, .name = "XXXX-EV1 Oban" }, 187 176 { .id = 0x39, .name = "1254-EV1 Dallas Dhu", 188 177 .i2c_devs = wm1254_devs, .num_i2c_devs = ARRAY_SIZE(wm1254_devs) }, 189 178 { .id = 0x3a, .name = "1259-EV1 Tobermory", ··· 222 197 if (i < ARRAY_SIZE(gf_mods)) { 223 198 dev_info(&i2c->dev, "%s revision %d\n", 224 199 gf_mods[i].name, rev + 1); 200 + 225 201 for (j = 0; j < gf_mods[i].num_i2c_devs; j++) { 226 202 if (!i2c_new_device(i2c->adapter, 227 203 &(gf_mods[i].i2c_devs[j]))) 228 204 dev_err(&i2c->dev, 229 205 "Failed to register dev: %d\n", ret); 230 206 } 207 + 208 + spi_register_board_info(gf_mods[i].spi_devs, 209 + gf_mods[i].num_spi_devs); 231 210 } else { 232 211 dev_warn(&i2c->dev, "Unknown module ID 0x%x revision %d\n", 233 212 id, rev + 1);
+66 -1
arch/arm/mach-s3c64xx/mach-crag6410.c
··· 19 19 #include <linux/io.h> 20 20 #include <linux/init.h> 21 21 #include <linux/gpio.h> 22 + #include <linux/leds.h> 22 23 #include <linux/delay.h> 24 + #include <linux/mmc/host.h> 23 25 #include <linux/regulator/machine.h> 24 26 #include <linux/regulator/fixed.h> 25 27 #include <linux/pwm_backlight.h> ··· 300 298 }; 301 299 302 300 static struct regulator_consumer_supply wallvdd_consumers[] = { 301 + REGULATOR_SUPPLY("SPKVDD", "1-001a"), 303 302 REGULATOR_SUPPLY("SPKVDD1", "1-001a"), 304 303 REGULATOR_SUPPLY("SPKVDD2", "1-001a"), 305 304 REGULATOR_SUPPLY("SPKVDDL", "1-001a"), ··· 577 574 .frequency = 400000, 578 575 }; 579 576 577 + static struct regulator_consumer_supply pvdd_1v2_consumers[] __initdata = { 578 + REGULATOR_SUPPLY("DCVDD", "spi0.0"), 579 + REGULATOR_SUPPLY("AVDD", "spi0.0"), 580 + }; 581 + 580 582 static struct regulator_init_data pvdd_1v2 __initdata = { 581 583 .constraints = { 582 584 .name = "PVDD_1V2", 583 - .always_on = 1, 585 + .valid_ops_mask = REGULATOR_CHANGE_STATUS, 584 586 }, 587 + 588 + .consumer_supplies = pvdd_1v2_consumers, 589 + .num_consumer_supplies = ARRAY_SIZE(pvdd_1v2_consumers), 585 590 }; 586 591 587 592 static struct regulator_consumer_supply pvdd_1v8_consumers[] __initdata = { ··· 603 592 REGULATOR_SUPPLY("AVDD2", "1-001a"), 604 593 REGULATOR_SUPPLY("DCVDD", "1-001a"), 605 594 REGULATOR_SUPPLY("AVDD", "1-001a"), 595 + REGULATOR_SUPPLY("DBVDD", "spi0.0"), 606 596 }; 607 597 608 598 static struct regulator_init_data pvdd_1v8 __initdata = { ··· 693 681 static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = { 694 682 .max_width = 4, 695 683 .cd_type = S3C_SDHCI_CD_PERMANENT, 684 + .host_caps = MMC_CAP_POWER_OFF_CARD, 696 685 }; 697 686 698 687 static void crag6410_cfg_sdhci0(struct platform_device *dev, int width) ··· 709 696 .max_width = 4, 710 697 .cd_type = S3C_SDHCI_CD_INTERNAL, 711 698 .cfg_gpio = crag6410_cfg_sdhci0, 699 + .host_caps = MMC_CAP_POWER_OFF_CARD, 700 + }; 701 + 702 + static const struct gpio_led gpio_leds[] = { 703 + { 704 + .name = "d13:green:", 705 + .gpio = MMGPIO_GPIO_BASE + 0, 706 + .default_state = LEDS_GPIO_DEFSTATE_ON, 707 + }, 708 + { 709 + .name = "d14:green:", 710 + .gpio = MMGPIO_GPIO_BASE + 1, 711 + .default_state = LEDS_GPIO_DEFSTATE_ON, 712 + }, 713 + { 714 + .name = "d15:green:", 715 + .gpio = MMGPIO_GPIO_BASE + 2, 716 + .default_state = LEDS_GPIO_DEFSTATE_ON, 717 + }, 718 + { 719 + .name = "d16:green:", 720 + .gpio = MMGPIO_GPIO_BASE + 3, 721 + .default_state = LEDS_GPIO_DEFSTATE_ON, 722 + }, 723 + { 724 + .name = "d17:green:", 725 + .gpio = MMGPIO_GPIO_BASE + 4, 726 + .default_state = LEDS_GPIO_DEFSTATE_ON, 727 + }, 728 + { 729 + .name = "d18:green:", 730 + .gpio = MMGPIO_GPIO_BASE + 5, 731 + .default_state = LEDS_GPIO_DEFSTATE_ON, 732 + }, 733 + { 734 + .name = "d19:green:", 735 + .gpio = MMGPIO_GPIO_BASE + 6, 736 + .default_state = LEDS_GPIO_DEFSTATE_ON, 737 + }, 738 + { 739 + .name = "d20:green:", 740 + .gpio = MMGPIO_GPIO_BASE + 7, 741 + .default_state = LEDS_GPIO_DEFSTATE_ON, 742 + }, 743 + }; 744 + 745 + static const struct gpio_led_platform_data gpio_leds_pdata = { 746 + .leds = gpio_leds, 747 + .num_leds = ARRAY_SIZE(gpio_leds), 712 748 }; 713 749 714 750 static void __init crag6410_machine_init(void) ··· 789 727 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); 790 728 791 729 samsung_keypad_set_platdata(&crag6410_keypad_data); 730 + s3c64xx_spi0_set_platdata(&s3c64xx_spi0_pdata, 0, 1); 792 731 793 732 platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices)); 733 + 734 + gpio_led_register_device(-1, &gpio_leds_pdata); 794 735 795 736 regulator_has_full_constraints(); 796 737
+9
arch/arm/mach-s5pv210/Kconfig
··· 118 118 select S3C_DEV_I2C2 119 119 select S3C_DEV_RTC 120 120 select S3C_DEV_WDT 121 + select S5P_DEV_FIMC0 122 + select S5P_DEV_FIMC1 123 + select S5P_DEV_FIMC2 124 + select S5P_DEV_MFC 121 125 select SAMSUNG_DEV_IDE 122 126 select S5PV210_SETUP_I2C1 123 127 select S5PV210_SETUP_I2C2 ··· 146 142 select S3C_DEV_I2C2 147 143 select S3C_DEV_RTC 148 144 select S3C_DEV_WDT 145 + select S5P_DEV_FIMC0 146 + select S5P_DEV_FIMC1 147 + select S5P_DEV_FIMC2 148 + select S5P_DEV_JPEG 149 + select S5P_DEV_MFC 149 150 select SAMSUNG_DEV_ADC 150 151 select SAMSUNG_DEV_BACKLIGHT 151 152 select SAMSUNG_DEV_IDE
+5
arch/arm/mach-s5pv210/clock.c
··· 340 340 .enable = s5pv210_clk_ip0_ctrl, 341 341 .ctrlbit = (1 << 26), 342 342 }, { 343 + .name = "jpeg", 344 + .parent = &clk_hclk_dsys.clk, 345 + .enable = s5pv210_clk_ip0_ctrl, 346 + .ctrlbit = (1 << 28), 347 + }, { 343 348 .name = "mfc", 344 349 .devname = "s5p-mfc", 345 350 .parent = &clk_pclk_psys.clk,
+4
arch/arm/mach-s5pv210/include/mach/map.h
··· 90 90 #define S5PV210_PA_FIMC1 0xFB300000 91 91 #define S5PV210_PA_FIMC2 0xFB400000 92 92 93 + #define S5PV210_PA_JPEG 0xFB600000 94 + 93 95 #define S5PV210_PA_SDO 0xF9000000 94 96 #define S5PV210_PA_VP 0xF9100000 95 97 #define S5PV210_PA_MIXER 0xF9200000 ··· 133 131 #define S5P_PA_SROMC S5PV210_PA_SROMC 134 132 #define S5P_PA_SYSCON S5PV210_PA_SYSCON 135 133 #define S5P_PA_TIMER S5PV210_PA_TIMER 134 + 135 + #define S5P_PA_JPEG S5PV210_PA_JPEG 136 136 137 137 #define SAMSUNG_PA_ADC S5PV210_PA_ADC 138 138 #define SAMSUNG_PA_CFCON S5PV210_PA_CFCON
+1
arch/arm/mach-s5pv210/mach-aquila.c
··· 616 616 &s5p_device_fimc0, 617 617 &s5p_device_fimc1, 618 618 &s5p_device_fimc2, 619 + &s5p_device_fimc_md, 619 620 &s5pv210_device_iis0, 620 621 &wm8994_fixed_voltage0, 621 622 &wm8994_fixed_voltage1,
+14
arch/arm/mach-s5pv210/mach-smdkc110.c
··· 31 31 #include <plat/iic.h> 32 32 #include <plat/pm.h> 33 33 #include <plat/s5p-time.h> 34 + #include <plat/mfc.h> 34 35 35 36 #include "common.h" 36 37 ··· 95 94 &s3c_device_i2c2, 96 95 &s3c_device_rtc, 97 96 &s3c_device_wdt, 97 + &s5p_device_fimc0, 98 + &s5p_device_fimc1, 99 + &s5p_device_fimc2, 100 + &s5p_device_fimc_md, 101 + &s5p_device_mfc, 102 + &s5p_device_mfc_l, 103 + &s5p_device_mfc_r, 98 104 }; 99 105 100 106 static struct i2c_board_info smdkc110_i2c_devs0[] __initdata = { ··· 123 115 s3c24xx_init_clocks(24000000); 124 116 s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs)); 125 117 s5p_set_timer_source(S5P_PWM3, S5P_PWM4); 118 + } 119 + 120 + static void __init smdkc110_reserve(void) 121 + { 122 + s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20); 126 123 } 127 124 128 125 static void __init smdkc110_machine_init(void) ··· 158 145 .init_machine = smdkc110_machine_init, 159 146 .timer = &s5p_timer, 160 147 .restart = s5pv210_restart, 148 + .reserve = &smdkc110_reserve, 161 149 MACHINE_END
+15
arch/arm/mach-s5pv210/mach-smdkv210.c
··· 46 46 #include <plat/s5p-time.h> 47 47 #include <plat/backlight.h> 48 48 #include <plat/regs-fb-v4.h> 49 + #include <plat/mfc.h> 49 50 50 51 #include "common.h" 51 52 ··· 224 223 &s3c_device_rtc, 225 224 &s3c_device_ts, 226 225 &s3c_device_wdt, 226 + &s5p_device_fimc0, 227 + &s5p_device_fimc1, 228 + &s5p_device_fimc2, 229 + &s5p_device_fimc_md, 230 + &s5p_device_jpeg, 231 + &s5p_device_mfc, 232 + &s5p_device_mfc_l, 233 + &s5p_device_mfc_r, 227 234 &s5pv210_device_ac97, 228 235 &s5pv210_device_iis0, 229 236 &s5pv210_device_spdif, ··· 291 282 s5p_set_timer_source(S5P_PWM2, S5P_PWM4); 292 283 } 293 284 285 + static void __init smdkv210_reserve(void) 286 + { 287 + s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20); 288 + } 289 + 294 290 static void __init smdkv210_machine_init(void) 295 291 { 296 292 s3c_pm_init(); ··· 333 319 .init_machine = smdkv210_machine_init, 334 320 .timer = &s5p_timer, 335 321 .restart = s5pv210_restart, 322 + .reserve = &smdkv210_reserve, 336 323 MACHINE_END