[ARM] nommu: fixups for the exception vectors

The high page vector (0xFFFF0000) does not supported in nommu mode.
This patch allows the vectors to be 0x00000000 or the begining of DRAM
in nommu mode.

Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

authored by

Hyok S. Choi and committed by
Russell King
c760fc19 f8c07de6

+31 -5
+8
arch/arm/Kconfig
··· 72 72 config ARCH_MTD_XIP 73 73 bool 74 74 75 + config VECTORS_BASE 76 + hex 77 + default 0xffff0000 if MMU 78 + default DRAM_BASE if REMAP_VECTORS_TO_RAM 79 + default 0x00000000 80 + help 81 + The base address of exception vectors. 82 + 75 83 source "init/Kconfig" 76 84 77 85 menu "System Type"
+17
arch/arm/Kconfig-nommu
··· 25 25 hex 'FLASH Size' if SET_MEM_PARAM 26 26 default 0x00400000 27 27 28 + config REMAP_VECTORS_TO_RAM 29 + bool 'Install vectors to the begining of RAM' if DRAM_BASE 30 + depends on DRAM_BASE 31 + help 32 + The kernel needs to change the hardware exception vectors. 33 + In nommu mode, the hardware exception vectors are normally 34 + placed at address 0x00000000. However, this region may be 35 + occupied by read-only memory depending on H/W design. 36 + 37 + If the region contains read-write memory, say 'n' here. 38 + 39 + If your CPU provides a remap facility which allows the exception 40 + vectors to be mapped to writable memory, say 'n' here. 41 + 42 + Otherwise, say 'y' here. In this case, the kernel will require 43 + external support to redirect the hardware exception vectors to 44 + the writable versions located at DRAM_BASE.
+1 -1
arch/arm/kernel/signal.h
··· 7 7 * it under the terms of the GNU General Public License version 2 as 8 8 * published by the Free Software Foundation. 9 9 */ 10 - #define KERN_SIGRETURN_CODE 0xffff0500 10 + #define KERN_SIGRETURN_CODE (CONFIG_VECTORS_BASE + 0x00000500) 11 11 12 12 extern const unsigned long sigreturn_codes[7];
+5 -4
arch/arm/kernel/traps.c
··· 688 688 689 689 void __init trap_init(void) 690 690 { 691 + unsigned long vectors = CONFIG_VECTORS_BASE; 691 692 extern char __stubs_start[], __stubs_end[]; 692 693 extern char __vectors_start[], __vectors_end[]; 693 694 extern char __kuser_helper_start[], __kuser_helper_end[]; ··· 699 698 * into the vector page, mapped at 0xffff0000, and ensure these 700 699 * are visible to the instruction stream. 701 700 */ 702 - memcpy((void *)0xffff0000, __vectors_start, __vectors_end - __vectors_start); 703 - memcpy((void *)0xffff0200, __stubs_start, __stubs_end - __stubs_start); 704 - memcpy((void *)0xffff1000 - kuser_sz, __kuser_helper_start, kuser_sz); 701 + memcpy((void *)vectors, __vectors_start, __vectors_end - __vectors_start); 702 + memcpy((void *)vectors + 0x200, __stubs_start, __stubs_end - __stubs_start); 703 + memcpy((void *)vectors + 0x1000 - kuser_sz, __kuser_helper_start, kuser_sz); 705 704 706 705 /* 707 706 * Copy signal return handlers into the vector page, and ··· 710 709 memcpy((void *)KERN_SIGRETURN_CODE, sigreturn_codes, 711 710 sizeof(sigreturn_codes)); 712 711 713 - flush_icache_range(0xffff0000, 0xffff0000 + PAGE_SIZE); 712 + flush_icache_range(vectors, vectors + PAGE_SIZE); 714 713 modify_domain(DOMAIN_USER, DOMAIN_CLIENT); 715 714 }