···2055205520562056 IA64_MCA_DEBUG("%s: registered OS INIT handler with SAL\n", __func__);2057205720582058- /*20592059- * Configure the CMCI/P vector and handler. Interrupts for CMC are20602060- * per-processor, so AP CMC interrupts are setup in smp_callin() (smpboot.c).20612061- */20622062- register_percpu_irq(IA64_CMC_VECTOR, &cmci_irqaction);20632063- register_percpu_irq(IA64_CMCP_VECTOR, &cmcp_irqaction);20642064- ia64_mca_cmc_vector_setup(); /* Setup vector on BSP */20652065-20662066- /* Setup the MCA rendezvous interrupt vector */20672067- register_percpu_irq(IA64_MCA_RENDEZ_VECTOR, &mca_rdzv_irqaction);20682068-20692069- /* Setup the MCA wakeup interrupt vector */20702070- register_percpu_irq(IA64_MCA_WAKEUP_VECTOR, &mca_wkup_irqaction);20712071-20722072-#ifdef CONFIG_ACPI20732073- /* Setup the CPEI/P handler */20742074- register_percpu_irq(IA64_CPEP_VECTOR, &mca_cpep_irqaction);20752075-#endif20762076-20772058 /* Initialize the areas set aside by the OS to buffer the20782059 * platform/processor error states for MCA/INIT/CMC20792060 * handling.···20832102{20842103 if (!mca_init)20852104 return 0;21052105+21062106+ /*21072107+ * Configure the CMCI/P vector and handler. Interrupts for CMC are21082108+ * per-processor, so AP CMC interrupts are setup in smp_callin() (smpboot.c).21092109+ */21102110+ register_percpu_irq(IA64_CMC_VECTOR, &cmci_irqaction);21112111+ register_percpu_irq(IA64_CMCP_VECTOR, &cmcp_irqaction);21122112+ ia64_mca_cmc_vector_setup(); /* Setup vector on BSP */21132113+21142114+ /* Setup the MCA rendezvous interrupt vector */21152115+ register_percpu_irq(IA64_MCA_RENDEZ_VECTOR, &mca_rdzv_irqaction);21162116+21172117+ /* Setup the MCA wakeup interrupt vector */21182118+ register_percpu_irq(IA64_MCA_WAKEUP_VECTOR, &mca_wkup_irqaction);21192119+21202120+#ifdef CONFIG_ACPI21212121+ /* Setup the CPEI/P handler */21222122+ register_percpu_irq(IA64_CPEP_VECTOR, &mca_cpep_irqaction);21232123+#endif2086212420872125 register_hotcpu_notifier(&mca_cpu_notifier);20882126