tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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[PATCH] KVM: Rename some msrs

No need to append _MSR to msr names, a prefix should suffice.

Signed-off-by: Nguyen Anh Quynh <aquynh@gmail.com>
Signed-off-by: Avi Kivity <avi@qumranet.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

authored by Nguyen Anh Quynh and committed by Linus Torvalds c68876fd a8d13ea2

+11 -12
unified split
+6 -7
drivers/kvm/vmx.c
··· 26 27 #include "segment_descriptor.h" 28 29 - #define MSR_IA32_FEATURE_CONTROL 0x03a 30 31 MODULE_AUTHOR("Qumranet"); 32 MODULE_LICENSE("GPL"); ··· 518 { 519 u32 vmx_msr_low, vmx_msr_high; 520 521 - rdmsr(MSR_IA32_VMX_BASIC_MSR, vmx_msr_low, vmx_msr_high); 522 vmcs_descriptor.size = vmx_msr_high & 0x1fff; 523 vmcs_descriptor.order = get_order(vmcs_descriptor.size); 524 vmcs_descriptor.revision_id = vmx_msr_low; 525 - }; 526 527 static struct vmcs *alloc_vmcs_cpu(int cpu) 528 { ··· 1038 vmcs_write64(GUEST_IA32_DEBUGCTL, 0); 1039 1040 /* Control */ 1041 - vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS_MSR, 1042 PIN_BASED_VM_EXEC_CONTROL, 1043 PIN_BASED_EXT_INTR_MASK /* 20.6.1 */ 1044 | PIN_BASED_NMI_EXITING /* 20.6.1 */ 1045 ); 1046 - vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS_MSR, 1047 CPU_BASED_VM_EXEC_CONTROL, 1048 CPU_BASED_HLT_EXITING /* 20.6.2 */ 1049 | CPU_BASED_CR8_LOAD_EXITING /* 20.6.2 */ ··· 1126 virt_to_phys(vcpu->guest_msrs + NR_BAD_MSRS)); 1127 vmcs_writel(VM_EXIT_MSR_LOAD_ADDR, 1128 virt_to_phys(vcpu->host_msrs + NR_BAD_MSRS)); 1129 - vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS_MSR, VM_EXIT_CONTROLS, 1130 (HOST_IS_64 << 9)); /* 22.2,1, 20.7.1 */ 1131 vmcs_write32(VM_EXIT_MSR_STORE_COUNT, nr_good_msrs); /* 22.2.2 */ 1132 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, nr_good_msrs); /* 22.2.2 */ ··· 1134 1135 1136 /* 22.2.1, 20.8.1 */ 1137 - vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS_MSR, 1138 VM_ENTRY_CONTROLS, 0); 1139 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0); /* 22.2.1 */ 1140
··· 26 27 #include "segment_descriptor.h" 28 29 30 MODULE_AUTHOR("Qumranet"); 31 MODULE_LICENSE("GPL"); ··· 519 { 520 u32 vmx_msr_low, vmx_msr_high; 521 522 + rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high); 523 vmcs_descriptor.size = vmx_msr_high & 0x1fff; 524 vmcs_descriptor.order = get_order(vmcs_descriptor.size); 525 vmcs_descriptor.revision_id = vmx_msr_low; 526 + } 527 528 static struct vmcs *alloc_vmcs_cpu(int cpu) 529 { ··· 1039 vmcs_write64(GUEST_IA32_DEBUGCTL, 0); 1040 1041 /* Control */ 1042 + vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS, 1043 PIN_BASED_VM_EXEC_CONTROL, 1044 PIN_BASED_EXT_INTR_MASK /* 20.6.1 */ 1045 | PIN_BASED_NMI_EXITING /* 20.6.1 */ 1046 ); 1047 + vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS, 1048 CPU_BASED_VM_EXEC_CONTROL, 1049 CPU_BASED_HLT_EXITING /* 20.6.2 */ 1050 | CPU_BASED_CR8_LOAD_EXITING /* 20.6.2 */ ··· 1127 virt_to_phys(vcpu->guest_msrs + NR_BAD_MSRS)); 1128 vmcs_writel(VM_EXIT_MSR_LOAD_ADDR, 1129 virt_to_phys(vcpu->host_msrs + NR_BAD_MSRS)); 1130 + vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS, VM_EXIT_CONTROLS, 1131 (HOST_IS_64 << 9)); /* 22.2,1, 20.7.1 */ 1132 vmcs_write32(VM_EXIT_MSR_STORE_COUNT, nr_good_msrs); /* 22.2.2 */ 1133 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, nr_good_msrs); /* 22.2.2 */ ··· 1135 1136 1137 /* 22.2.1, 20.8.1 */ 1138 + vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS, 1139 VM_ENTRY_CONTROLS, 0); 1140 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0); /* 22.2.1 */ 1141
+5 -5
drivers/kvm/vmx.h
··· 286 287 #define CR4_VMXE 0x2000 288 289 - #define MSR_IA32_VMX_BASIC_MSR 0x480 290 #define MSR_IA32_FEATURE_CONTROL 0x03a 291 - #define MSR_IA32_VMX_PINBASED_CTLS_MSR 0x481 292 - #define MSR_IA32_VMX_PROCBASED_CTLS_MSR 0x482 293 - #define MSR_IA32_VMX_EXIT_CTLS_MSR 0x483 294 - #define MSR_IA32_VMX_ENTRY_CTLS_MSR 0x484 295 296 #endif
··· 286 287 #define CR4_VMXE 0x2000 288 289 + #define MSR_IA32_VMX_BASIC 0x480 290 #define MSR_IA32_FEATURE_CONTROL 0x03a 291 + #define MSR_IA32_VMX_PINBASED_CTLS 0x481 292 + #define MSR_IA32_VMX_PROCBASED_CTLS 0x482 293 + #define MSR_IA32_VMX_EXIT_CTLS 0x483 294 + #define MSR_IA32_VMX_ENTRY_CTLS 0x484 295 296 #endif