Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

dt-bindings: interrupt-controller: Convert st,spear3xx-shirq to DT schema

Convert the SPEAr3xx Shared interrupt controller binding to schema
format. It's a straight-forward conversion of the typical interrupt
controller.

Link: https://lore.kernel.org/r/20250505144851.1293180-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>

+67 -44
+67
Documentation/devicetree/bindings/interrupt-controller/st,spear300-shirq.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/interrupt-controller/st,spear300-shirq.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: SPEAr3xx Shared IRQ controller 8 + 9 + maintainers: 10 + - Viresh Kumar <vireshk@kernel.org> 11 + - Shiraz Hashim <shiraz.linux.kernel@gmail.com> 12 + 13 + description: | 14 + SPEAr3xx architecture includes shared/multiplexed irqs for certain set of 15 + devices. The multiplexor provides a single interrupt to parent interrupt 16 + controller (VIC) on behalf of a group of devices. 17 + 18 + There can be multiple groups available on SPEAr3xx variants but not exceeding 19 + 4. The number of devices in a group can differ, further they may share same 20 + set of status/mask registers spanning across different bit masks. Also in some 21 + cases the group may not have enable or other registers. This makes software 22 + little complex. 23 + 24 + A single node in the device tree is used to describe the shared interrupt 25 + multiplexer (one node for all groups). A group in the interrupt controller 26 + shares config/control registers with other groups. For example, a 32-bit 27 + interrupt enable/disable config register can accommodate up to 4 interrupt 28 + groups. 29 + 30 + properties: 31 + compatible: 32 + enum: 33 + - st,spear300-shirq 34 + - st,spear310-shirq 35 + - st,spear320-shirq 36 + 37 + reg: 38 + maxItems: 1 39 + 40 + '#interrupt-cells': 41 + const: 1 42 + 43 + interrupt-controller: true 44 + 45 + interrupts: 46 + description: Interrupt specifier array for SHIRQ groups 47 + minItems: 1 48 + maxItems: 4 49 + 50 + required: 51 + - compatible 52 + - reg 53 + - '#interrupt-cells' 54 + - interrupt-controller 55 + - interrupts 56 + 57 + additionalProperties: false 58 + 59 + examples: 60 + - | 61 + interrupt-controller@b3000000 { 62 + compatible = "st,spear320-shirq"; 63 + reg = <0xb3000000 0x1000>; 64 + interrupts = <28 29 30 1>; 65 + #interrupt-cells = <1>; 66 + interrupt-controller; 67 + };
-44
Documentation/devicetree/bindings/interrupt-controller/st,spear3xx-shirq.txt
··· 1 - * SPEAr Shared IRQ layer (shirq) 2 - 3 - SPEAr3xx architecture includes shared/multiplexed irqs for certain set 4 - of devices. The multiplexor provides a single interrupt to parent 5 - interrupt controller (VIC) on behalf of a group of devices. 6 - 7 - There can be multiple groups available on SPEAr3xx variants but not 8 - exceeding 4. The number of devices in a group can differ, further they 9 - may share same set of status/mask registers spanning across different 10 - bit masks. Also in some cases the group may not have enable or other 11 - registers. This makes software little complex. 12 - 13 - A single node in the device tree is used to describe the shared 14 - interrupt multiplexor (one node for all groups). A group in the 15 - interrupt controller shares config/control registers with other groups. 16 - For example, a 32-bit interrupt enable/disable config register can 17 - accommodate up to 4 interrupt groups. 18 - 19 - Required properties: 20 - - compatible: should be, either of 21 - - "st,spear300-shirq" 22 - - "st,spear310-shirq" 23 - - "st,spear320-shirq" 24 - - interrupt-controller: Identifies the node as an interrupt controller. 25 - - #interrupt-cells: should be <1> which basically contains the offset 26 - (starting from 0) of interrupts for all the groups. 27 - - reg: Base address and size of shirq registers. 28 - - interrupts: The list of interrupts generated by the groups which are 29 - then connected to a parent interrupt controller. Each group is 30 - associated with one of the interrupts, hence number of interrupts (to 31 - parent) is equal to number of groups. The format of the interrupt 32 - specifier depends in the interrupt parent controller. 33 - 34 - Example: 35 - 36 - The following is an example from the SPEAr320 SoC dtsi file. 37 - 38 - shirq: interrupt-controller@b3000000 { 39 - compatible = "st,spear320-shirq"; 40 - reg = <0xb3000000 0x1000>; 41 - interrupts = <28 29 30 1>; 42 - #interrupt-cells = <1>; 43 - interrupt-controller; 44 - };