drm/amdgpu/soc15: fix xclk for raven

It's 25 Mhz (refclk / 4). This fixes the interpretation
of the rlc clock counter.

Acked-by: Evan Quan <[e-mail]>
Signed-off-by: Alex Deucher <[e-mail]>
Cc: [e-mail]

drivers/gpu/drm/amd/amdgpu/soc15.c

···
 
 static u32 soc15_get_xclk(struct amdgpu_device *adev)
 {
-	return adev->clock.spll.reference_freq;
+	u32 reference_clock = adev->clock.spll.reference_freq;
+
+	if (adev->asic_type == CHIP_RAVEN)
+		return reference_clock / 4;
+
+	return reference_clock;
 }