Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

dt-bindings: usb: Add ESWIN EIC7700 USB controller

Add Device Tree binding documentation for the ESWIN EIC7700
usb controller module.

Signed-off-by: Senchuan Zhang <zhangsenchuan@eswincomputing.com>
Signed-off-by: Hang Cao <caohang@eswincomputing.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20251112055321.1638-1-caohang@eswincomputing.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Hang Cao and committed by
Greg Kroah-Hartman
c640a423 1b474ee0

+94
+94
Documentation/devicetree/bindings/usb/eswin,eic7700-usb.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/usb/eswin,eic7700-usb.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: ESWIN EIC7700 SoC Usb Controller 8 + 9 + maintainers: 10 + - Wei Yang <yangwei1@eswincomputing.com> 11 + - Senchuan Zhang <zhangsenchuan@eswincomputing.com> 12 + - Hang Cao <caohang@eswincomputing.com> 13 + 14 + description: 15 + The Usb controller on EIC7700 SoC. 16 + 17 + allOf: 18 + - $ref: snps,dwc3-common.yaml# 19 + 20 + properties: 21 + compatible: 22 + const: eswin,eic7700-dwc3 23 + 24 + reg: 25 + maxItems: 1 26 + 27 + interrupts: 28 + maxItems: 1 29 + 30 + interrupt-names: 31 + items: 32 + - const: peripheral 33 + 34 + clocks: 35 + maxItems: 3 36 + 37 + clock-names: 38 + items: 39 + - const: aclk 40 + - const: cfg 41 + - const: usb_en 42 + 43 + resets: 44 + maxItems: 2 45 + 46 + reset-names: 47 + items: 48 + - const: vaux 49 + - const: usb_rst 50 + 51 + eswin,hsp-sp-csr: 52 + description: 53 + HSP CSR is to control and get status of different high-speed peripherals 54 + (such as Ethernet, USB, SATA, etc.) via register, which can tune 55 + board-level's parameters of PHY, etc. 56 + $ref: /schemas/types.yaml#/definitions/phandle-array 57 + items: 58 + - items: 59 + - description: phandle to HSP Register Controller hsp_sp_csr node. 60 + - description: USB bus register offset. 61 + - description: AXI low power register offset. 62 + 63 + required: 64 + - compatible 65 + - reg 66 + - clocks 67 + - clock-names 68 + - interrupts 69 + - interrupt-names 70 + - resets 71 + - reset-names 72 + - eswin,hsp-sp-csr 73 + 74 + unevaluatedProperties: false 75 + 76 + examples: 77 + - | 78 + usb@50480000 { 79 + compatible = "eswin,eic7700-dwc3"; 80 + reg = <0x50480000 0x10000>; 81 + clocks = <&clock 135>, 82 + <&clock 136>, 83 + <&hspcrg 18>; 84 + clock-names = "aclk", "cfg", "usb_en"; 85 + interrupt-parent = <&plic>; 86 + interrupts = <85>; 87 + interrupt-names = "peripheral"; 88 + resets = <&reset 84>, <&hspcrg 2>; 89 + reset-names = "vaux", "usb_rst"; 90 + dr_mode = "peripheral"; 91 + maximum-speed = "high-speed"; 92 + phy_type = "utmi"; 93 + eswin,hsp-sp-csr = <&hsp_sp_csr 0x800 0x818>; 94 + };