tjh.dev / kernel
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MIPS: Cavium: Add support for 8k and 32k page sizes.

Beyond the requirements of the architecture standard Cavium also supports
8k and 32k pages.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Acked-by: David Daney <ddaney@caviumnetworks.com>

Ralf Baechle c52399be 740ebe4a

+44 -4
+12 -4
arch/mips/Kconfig
··· 1411 1411 1412 1412 config PAGE_SIZE_8KB 1413 1413 bool "8kB" 1414 - depends on EXPERIMENTAL && CPU_R8000 1414 + depends on (EXPERIMENTAL && CPU_R8000) || CPU_CAVIUM_OCTEON 1415 1415 help 1416 1416 Using 8kB page size will result in higher performance kernel at 1417 1417 the price of higher memory consumption. This option is available 1418 - only on the R8000 processor. Not that at the time of this writing 1419 - this option is still high experimental; there are also issues with 1420 - compatibility of user applications. 1418 + only on R8000 and cnMIPS processors. Note that you will need a 1419 + suitable Linux distribution to support this. 1421 1420 1422 1421 config PAGE_SIZE_16KB 1423 1422 bool "16kB" ··· 1426 1427 the price of higher memory consumption. This option is available on 1427 1428 all non-R3000 family processors. Note that you will need a suitable 1428 1429 Linux distribution to support this. 1430 + 1431 + config PAGE_SIZE_32KB 1432 + bool "32kB" 1433 + depends on CPU_CAVIUM_OCTEON 1434 + help 1435 + Using 32kB page size will result in higher performance kernel at 1436 + the price of higher memory consumption. This option is available 1437 + only on cnMIPS cores. Note that you will need a suitable Linux 1438 + distribution to support this. 1429 1439 1430 1440 config PAGE_SIZE_64KB 1431 1441 bool "64kB"
+11
arch/mips/include/asm/mipsregs.h
··· 184 184 #else 185 185 186 186 #define PM_4K 0x00000000 187 + #define PM_8K 0x00002000 187 188 #define PM_16K 0x00006000 189 + #define PM_32K 0x0000e000 188 190 #define PM_64K 0x0001e000 191 + #define PM_128K 0x0003e000 189 192 #define PM_256K 0x0007e000 193 + #define PM_512K 0x000fe000 190 194 #define PM_1M 0x001fe000 195 + #define PM_2M 0x003fe000 191 196 #define PM_4M 0x007fe000 197 + #define PM_8M 0x00ffe000 192 198 #define PM_16M 0x01ffe000 199 + #define PM_32M 0x03ffe000 193 200 #define PM_64M 0x07ffe000 194 201 #define PM_256M 0x1fffe000 195 202 #define PM_1G 0x7fffe000 ··· 208 201 */ 209 202 #ifdef CONFIG_PAGE_SIZE_4KB 210 203 #define PM_DEFAULT_MASK PM_4K 204 + #elif defined(CONFIG_PAGE_SIZE_8KB) 205 + #define PM_DEFAULT_MASK PM_8K 211 206 #elif defined(CONFIG_PAGE_SIZE_16KB) 212 207 #define PM_DEFAULT_MASK PM_16K 208 + #elif defined(CONFIG_PAGE_SIZE_32KB) 209 + #define PM_DEFAULT_MASK PM_32K 213 210 #elif defined(CONFIG_PAGE_SIZE_64KB) 214 211 #define PM_DEFAULT_MASK PM_64K 215 212 #else
+3
arch/mips/include/asm/page.h
··· 23 23 #ifdef CONFIG_PAGE_SIZE_16KB 24 24 #define PAGE_SHIFT 14 25 25 #endif 26 + #ifdef CONFIG_PAGE_SIZE_32KB 27 + #define PAGE_SHIFT 15 28 + #endif 26 29 #ifdef CONFIG_PAGE_SIZE_64KB 27 30 #define PAGE_SHIFT 16 28 31 #endif
+6
arch/mips/include/asm/pgtable-64.h
··· 83 83 #define PMD_ORDER 0 84 84 #define PTE_ORDER 0 85 85 #endif 86 + #ifdef CONFIG_PAGE_SIZE_32KB 87 + #define PGD_ORDER 0 88 + #define PUD_ORDER aieeee_attempt_to_allocate_pud 89 + #define PMD_ORDER 0 90 + #define PTE_ORDER 0 91 + #endif 86 92 #ifdef CONFIG_PAGE_SIZE_64KB 87 93 #define PGD_ORDER 0 88 94 #define PUD_ORDER aieeee_attempt_to_allocate_pud
+3
arch/mips/include/asm/thread_info.h
··· 75 75 #ifdef CONFIG_PAGE_SIZE_16KB 76 76 #define THREAD_SIZE_ORDER (0) 77 77 #endif 78 + #ifdef CONFIG_PAGE_SIZE_32KB 79 + #define THREAD_SIZE_ORDER (0) 80 + #endif 78 81 #ifdef CONFIG_PAGE_SIZE_64KB 79 82 #define THREAD_SIZE_ORDER (0) 80 83 #endif
+9
arch/mips/lib/dump_tlb.c
··· 19 19 case PM_16K: return "16kb"; 20 20 case PM_64K: return "64kb"; 21 21 case PM_256K: return "256kb"; 22 + #ifdef CONFIG_CPU_CAVIUM_OCTEON 23 + case PM_8K: return "8kb"; 24 + case PM_32K: return "32kb"; 25 + case PM_128K: return "128kb"; 26 + case PM_512K: return "512kb"; 27 + case PM_2M: return "2Mb"; 28 + case PM_8M: return "8Mb"; 29 + case PM_32M: return "32Mb"; 30 + #endif 22 31 #ifndef CONFIG_CPU_VR41XX 23 32 case PM_1M: return "1Mb"; 24 33 case PM_4M: return "4Mb";