Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branch 'r8169-series-with-further-smaller-improvements'

Heiner Kallweit says:

====================
r8169: series with further smaller improvements

This series includes further smaller improvements.

Then I think the basic cleanup has been done and next step would be
preparing the switch to phylib.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>

+133 -211
+133 -211
drivers/net/ethernet/realtek/r8169.c
··· 88 88 #define InterFrameGap 0x03 /* 3 means InterFrameGap = the shortest one */ 89 89 90 90 #define R8169_REGS_SIZE 256 91 - #define R8169_NAPI_WEIGHT 64 91 + #define R8169_RX_BUF_SIZE (SZ_16K - 1) 92 92 #define NUM_TX_DESC 64 /* Number of Tx descriptor registers */ 93 93 #define NUM_RX_DESC 256U /* Number of Rx descriptor registers */ 94 94 #define R8169_TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc)) ··· 171 171 #define JUMBO_7K (7*1024 - ETH_HLEN - 2) 172 172 #define JUMBO_9K (9*1024 - ETH_HLEN - 2) 173 173 174 - #define _R(NAME,TD,FW,SZ,B) { \ 174 + #define _R(NAME,TD,FW,SZ) { \ 175 175 .name = NAME, \ 176 176 .txd_version = TD, \ 177 177 .fw_name = FW, \ 178 178 .jumbo_max = SZ, \ 179 - .jumbo_tx_csum = B \ 180 179 } 181 180 182 181 static const struct { ··· 183 184 enum rtl_tx_desc_version txd_version; 184 185 const char *fw_name; 185 186 u16 jumbo_max; 186 - bool jumbo_tx_csum; 187 187 } rtl_chip_infos[] = { 188 188 /* PCI devices. */ 189 189 [RTL_GIGA_MAC_VER_01] = 190 - _R("RTL8169", RTL_TD_0, NULL, JUMBO_7K, true), 190 + _R("RTL8169", RTL_TD_0, NULL, JUMBO_7K), 191 191 [RTL_GIGA_MAC_VER_02] = 192 - _R("RTL8169s", RTL_TD_0, NULL, JUMBO_7K, true), 192 + _R("RTL8169s", RTL_TD_0, NULL, JUMBO_7K), 193 193 [RTL_GIGA_MAC_VER_03] = 194 - _R("RTL8110s", RTL_TD_0, NULL, JUMBO_7K, true), 194 + _R("RTL8110s", RTL_TD_0, NULL, JUMBO_7K), 195 195 [RTL_GIGA_MAC_VER_04] = 196 - _R("RTL8169sb/8110sb", RTL_TD_0, NULL, JUMBO_7K, true), 196 + _R("RTL8169sb/8110sb", RTL_TD_0, NULL, JUMBO_7K), 197 197 [RTL_GIGA_MAC_VER_05] = 198 - _R("RTL8169sc/8110sc", RTL_TD_0, NULL, JUMBO_7K, true), 198 + _R("RTL8169sc/8110sc", RTL_TD_0, NULL, JUMBO_7K), 199 199 [RTL_GIGA_MAC_VER_06] = 200 - _R("RTL8169sc/8110sc", RTL_TD_0, NULL, JUMBO_7K, true), 200 + _R("RTL8169sc/8110sc", RTL_TD_0, NULL, JUMBO_7K), 201 201 /* PCI-E devices. */ 202 202 [RTL_GIGA_MAC_VER_07] = 203 - _R("RTL8102e", RTL_TD_1, NULL, JUMBO_1K, true), 203 + _R("RTL8102e", RTL_TD_1, NULL, JUMBO_1K), 204 204 [RTL_GIGA_MAC_VER_08] = 205 - _R("RTL8102e", RTL_TD_1, NULL, JUMBO_1K, true), 205 + _R("RTL8102e", RTL_TD_1, NULL, JUMBO_1K), 206 206 [RTL_GIGA_MAC_VER_09] = 207 - _R("RTL8102e", RTL_TD_1, NULL, JUMBO_1K, true), 207 + _R("RTL8102e", RTL_TD_1, NULL, JUMBO_1K), 208 208 [RTL_GIGA_MAC_VER_10] = 209 - _R("RTL8101e", RTL_TD_0, NULL, JUMBO_1K, true), 209 + _R("RTL8101e", RTL_TD_0, NULL, JUMBO_1K), 210 210 [RTL_GIGA_MAC_VER_11] = 211 - _R("RTL8168b/8111b", RTL_TD_0, NULL, JUMBO_4K, false), 211 + _R("RTL8168b/8111b", RTL_TD_0, NULL, JUMBO_4K), 212 212 [RTL_GIGA_MAC_VER_12] = 213 - _R("RTL8168b/8111b", RTL_TD_0, NULL, JUMBO_4K, false), 213 + _R("RTL8168b/8111b", RTL_TD_0, NULL, JUMBO_4K), 214 214 [RTL_GIGA_MAC_VER_13] = 215 - _R("RTL8101e", RTL_TD_0, NULL, JUMBO_1K, true), 215 + _R("RTL8101e", RTL_TD_0, NULL, JUMBO_1K), 216 216 [RTL_GIGA_MAC_VER_14] = 217 - _R("RTL8100e", RTL_TD_0, NULL, JUMBO_1K, true), 217 + _R("RTL8100e", RTL_TD_0, NULL, JUMBO_1K), 218 218 [RTL_GIGA_MAC_VER_15] = 219 - _R("RTL8100e", RTL_TD_0, NULL, JUMBO_1K, true), 219 + _R("RTL8100e", RTL_TD_0, NULL, JUMBO_1K), 220 220 [RTL_GIGA_MAC_VER_16] = 221 - _R("RTL8101e", RTL_TD_0, NULL, JUMBO_1K, true), 221 + _R("RTL8101e", RTL_TD_0, NULL, JUMBO_1K), 222 222 [RTL_GIGA_MAC_VER_17] = 223 - _R("RTL8168b/8111b", RTL_TD_0, NULL, JUMBO_4K, false), 223 + _R("RTL8168b/8111b", RTL_TD_0, NULL, JUMBO_4K), 224 224 [RTL_GIGA_MAC_VER_18] = 225 - _R("RTL8168cp/8111cp", RTL_TD_1, NULL, JUMBO_6K, false), 225 + _R("RTL8168cp/8111cp", RTL_TD_1, NULL, JUMBO_6K), 226 226 [RTL_GIGA_MAC_VER_19] = 227 - _R("RTL8168c/8111c", RTL_TD_1, NULL, JUMBO_6K, false), 227 + _R("RTL8168c/8111c", RTL_TD_1, NULL, JUMBO_6K), 228 228 [RTL_GIGA_MAC_VER_20] = 229 - _R("RTL8168c/8111c", RTL_TD_1, NULL, JUMBO_6K, false), 229 + _R("RTL8168c/8111c", RTL_TD_1, NULL, JUMBO_6K), 230 230 [RTL_GIGA_MAC_VER_21] = 231 - _R("RTL8168c/8111c", RTL_TD_1, NULL, JUMBO_6K, false), 231 + _R("RTL8168c/8111c", RTL_TD_1, NULL, JUMBO_6K), 232 232 [RTL_GIGA_MAC_VER_22] = 233 - _R("RTL8168c/8111c", RTL_TD_1, NULL, JUMBO_6K, false), 233 + _R("RTL8168c/8111c", RTL_TD_1, NULL, JUMBO_6K), 234 234 [RTL_GIGA_MAC_VER_23] = 235 - _R("RTL8168cp/8111cp", RTL_TD_1, NULL, JUMBO_6K, false), 235 + _R("RTL8168cp/8111cp", RTL_TD_1, NULL, JUMBO_6K), 236 236 [RTL_GIGA_MAC_VER_24] = 237 - _R("RTL8168cp/8111cp", RTL_TD_1, NULL, JUMBO_6K, false), 237 + _R("RTL8168cp/8111cp", RTL_TD_1, NULL, JUMBO_6K), 238 238 [RTL_GIGA_MAC_VER_25] = 239 - _R("RTL8168d/8111d", RTL_TD_1, FIRMWARE_8168D_1, 240 - JUMBO_9K, false), 239 + _R("RTL8168d/8111d", RTL_TD_1, FIRMWARE_8168D_1, JUMBO_9K), 241 240 [RTL_GIGA_MAC_VER_26] = 242 - _R("RTL8168d/8111d", RTL_TD_1, FIRMWARE_8168D_2, 243 - JUMBO_9K, false), 241 + _R("RTL8168d/8111d", RTL_TD_1, FIRMWARE_8168D_2, JUMBO_9K), 244 242 [RTL_GIGA_MAC_VER_27] = 245 - _R("RTL8168dp/8111dp", RTL_TD_1, NULL, JUMBO_9K, false), 243 + _R("RTL8168dp/8111dp", RTL_TD_1, NULL, JUMBO_9K), 246 244 [RTL_GIGA_MAC_VER_28] = 247 - _R("RTL8168dp/8111dp", RTL_TD_1, NULL, JUMBO_9K, false), 245 + _R("RTL8168dp/8111dp", RTL_TD_1, NULL, JUMBO_9K), 248 246 [RTL_GIGA_MAC_VER_29] = 249 - _R("RTL8105e", RTL_TD_1, FIRMWARE_8105E_1, 250 - JUMBO_1K, true), 247 + _R("RTL8105e", RTL_TD_1, FIRMWARE_8105E_1, JUMBO_1K), 251 248 [RTL_GIGA_MAC_VER_30] = 252 - _R("RTL8105e", RTL_TD_1, FIRMWARE_8105E_1, 253 - JUMBO_1K, true), 249 + _R("RTL8105e", RTL_TD_1, FIRMWARE_8105E_1, JUMBO_1K), 254 250 [RTL_GIGA_MAC_VER_31] = 255 - _R("RTL8168dp/8111dp", RTL_TD_1, NULL, JUMBO_9K, false), 251 + _R("RTL8168dp/8111dp", RTL_TD_1, NULL, JUMBO_9K), 256 252 [RTL_GIGA_MAC_VER_32] = 257 - _R("RTL8168e/8111e", RTL_TD_1, FIRMWARE_8168E_1, 258 - JUMBO_9K, false), 253 + _R("RTL8168e/8111e", RTL_TD_1, FIRMWARE_8168E_1, JUMBO_9K), 259 254 [RTL_GIGA_MAC_VER_33] = 260 - _R("RTL8168e/8111e", RTL_TD_1, FIRMWARE_8168E_2, 261 - JUMBO_9K, false), 255 + _R("RTL8168e/8111e", RTL_TD_1, FIRMWARE_8168E_2, JUMBO_9K), 262 256 [RTL_GIGA_MAC_VER_34] = 263 - _R("RTL8168evl/8111evl",RTL_TD_1, FIRMWARE_8168E_3, 264 - JUMBO_9K, false), 257 + _R("RTL8168evl/8111evl",RTL_TD_1, FIRMWARE_8168E_3, JUMBO_9K), 265 258 [RTL_GIGA_MAC_VER_35] = 266 - _R("RTL8168f/8111f", RTL_TD_1, FIRMWARE_8168F_1, 267 - JUMBO_9K, false), 259 + _R("RTL8168f/8111f", RTL_TD_1, FIRMWARE_8168F_1, JUMBO_9K), 268 260 [RTL_GIGA_MAC_VER_36] = 269 - _R("RTL8168f/8111f", RTL_TD_1, FIRMWARE_8168F_2, 270 - JUMBO_9K, false), 261 + _R("RTL8168f/8111f", RTL_TD_1, FIRMWARE_8168F_2, JUMBO_9K), 271 262 [RTL_GIGA_MAC_VER_37] = 272 - _R("RTL8402", RTL_TD_1, FIRMWARE_8402_1, 273 - JUMBO_1K, true), 263 + _R("RTL8402", RTL_TD_1, FIRMWARE_8402_1, JUMBO_1K), 274 264 [RTL_GIGA_MAC_VER_38] = 275 - _R("RTL8411", RTL_TD_1, FIRMWARE_8411_1, 276 - JUMBO_9K, false), 265 + _R("RTL8411", RTL_TD_1, FIRMWARE_8411_1, JUMBO_9K), 277 266 [RTL_GIGA_MAC_VER_39] = 278 - _R("RTL8106e", RTL_TD_1, FIRMWARE_8106E_1, 279 - JUMBO_1K, true), 267 + _R("RTL8106e", RTL_TD_1, FIRMWARE_8106E_1, JUMBO_1K), 280 268 [RTL_GIGA_MAC_VER_40] = 281 - _R("RTL8168g/8111g", RTL_TD_1, FIRMWARE_8168G_2, 282 - JUMBO_9K, false), 269 + _R("RTL8168g/8111g", RTL_TD_1, FIRMWARE_8168G_2, JUMBO_9K), 283 270 [RTL_GIGA_MAC_VER_41] = 284 - _R("RTL8168g/8111g", RTL_TD_1, NULL, JUMBO_9K, false), 271 + _R("RTL8168g/8111g", RTL_TD_1, NULL, JUMBO_9K), 285 272 [RTL_GIGA_MAC_VER_42] = 286 - _R("RTL8168g/8111g", RTL_TD_1, FIRMWARE_8168G_3, 287 - JUMBO_9K, false), 273 + _R("RTL8168g/8111g", RTL_TD_1, FIRMWARE_8168G_3, JUMBO_9K), 288 274 [RTL_GIGA_MAC_VER_43] = 289 - _R("RTL8106e", RTL_TD_1, FIRMWARE_8106E_2, 290 - JUMBO_1K, true), 275 + _R("RTL8106e", RTL_TD_1, FIRMWARE_8106E_2, JUMBO_1K), 291 276 [RTL_GIGA_MAC_VER_44] = 292 - _R("RTL8411", RTL_TD_1, FIRMWARE_8411_2, 293 - JUMBO_9K, false), 277 + _R("RTL8411", RTL_TD_1, FIRMWARE_8411_2, JUMBO_9K), 294 278 [RTL_GIGA_MAC_VER_45] = 295 - _R("RTL8168h/8111h", RTL_TD_1, FIRMWARE_8168H_1, 296 - JUMBO_9K, false), 279 + _R("RTL8168h/8111h", RTL_TD_1, FIRMWARE_8168H_1, JUMBO_9K), 297 280 [RTL_GIGA_MAC_VER_46] = 298 - _R("RTL8168h/8111h", RTL_TD_1, FIRMWARE_8168H_2, 299 - JUMBO_9K, false), 281 + _R("RTL8168h/8111h", RTL_TD_1, FIRMWARE_8168H_2, JUMBO_9K), 300 282 [RTL_GIGA_MAC_VER_47] = 301 - _R("RTL8107e", RTL_TD_1, FIRMWARE_8107E_1, 302 - JUMBO_1K, false), 283 + _R("RTL8107e", RTL_TD_1, FIRMWARE_8107E_1, JUMBO_1K), 303 284 [RTL_GIGA_MAC_VER_48] = 304 - _R("RTL8107e", RTL_TD_1, FIRMWARE_8107E_2, 305 - JUMBO_1K, false), 285 + _R("RTL8107e", RTL_TD_1, FIRMWARE_8107E_2, JUMBO_1K), 306 286 [RTL_GIGA_MAC_VER_49] = 307 - _R("RTL8168ep/8111ep", RTL_TD_1, NULL, 308 - JUMBO_9K, false), 287 + _R("RTL8168ep/8111ep", RTL_TD_1, NULL, JUMBO_9K), 309 288 [RTL_GIGA_MAC_VER_50] = 310 - _R("RTL8168ep/8111ep", RTL_TD_1, NULL, 311 - JUMBO_9K, false), 289 + _R("RTL8168ep/8111ep", RTL_TD_1, NULL, JUMBO_9K), 312 290 [RTL_GIGA_MAC_VER_51] = 313 - _R("RTL8168ep/8111ep", RTL_TD_1, NULL, 314 - JUMBO_9K, false), 291 + _R("RTL8168ep/8111ep", RTL_TD_1, NULL, JUMBO_9K), 315 292 }; 316 293 #undef _R 317 294 ··· 319 344 320 345 MODULE_DEVICE_TABLE(pci, rtl8169_pci_tbl); 321 346 322 - static int rx_buf_sz = 16383; 323 347 static int use_dac = -1; 324 348 static struct { 325 349 u32 msg_enable; ··· 751 777 struct net_device *dev; 752 778 struct napi_struct napi; 753 779 u32 msg_enable; 754 - u16 txd_version; 755 780 u16 mac_version; 756 781 u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */ 757 782 u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */ ··· 793 820 int (*get_link_ksettings)(struct net_device *, 794 821 struct ethtool_link_ksettings *); 795 822 void (*phy_reset_enable)(struct rtl8169_private *tp); 796 - void (*hw_start)(struct net_device *); 823 + void (*hw_start)(struct rtl8169_private *tp); 797 824 unsigned int (*phy_reset_pending)(struct rtl8169_private *tp); 798 825 unsigned int (*link_ok)(struct rtl8169_private *tp); 799 826 int (*do_ioctl)(struct rtl8169_private *tp, struct mii_ioctl_data *data, int cmd); ··· 805 832 struct work_struct work; 806 833 } wk; 807 834 808 - unsigned features; 809 - 810 835 struct mii_if_info mii; 811 836 dma_addr_t counters_phys_addr; 812 837 struct rtl8169_counters *counters; 813 838 struct rtl8169_tc_offsets tc_offset; 814 839 u32 saved_wolopts; 815 - u32 opts1_mask; 816 840 817 841 struct rtl_fw { 818 842 const struct firmware *fw; ··· 1929 1959 features &= ~NETIF_F_ALL_TSO; 1930 1960 1931 1961 if (dev->mtu > JUMBO_1K && 1932 - !rtl_chip_infos[tp->mac_version].jumbo_tx_csum) 1962 + tp->mac_version > RTL_GIGA_MAC_VER_06) 1933 1963 features &= ~NETIF_F_IP_CSUM; 1934 1964 1935 1965 return features; ··· 2124 2154 return RTL_R32(tp, CounterAddrLow) & (CounterReset | CounterDump); 2125 2155 } 2126 2156 2127 - static bool rtl8169_do_counters(struct net_device *dev, u32 counter_cmd) 2157 + static bool rtl8169_do_counters(struct rtl8169_private *tp, u32 counter_cmd) 2128 2158 { 2129 - struct rtl8169_private *tp = netdev_priv(dev); 2130 2159 dma_addr_t paddr = tp->counters_phys_addr; 2131 2160 u32 cmd; 2132 2161 ··· 2138 2169 return rtl_udelay_loop_wait_low(tp, &rtl_counters_cond, 10, 1000); 2139 2170 } 2140 2171 2141 - static bool rtl8169_reset_counters(struct net_device *dev) 2172 + static bool rtl8169_reset_counters(struct rtl8169_private *tp) 2142 2173 { 2143 - struct rtl8169_private *tp = netdev_priv(dev); 2144 - 2145 2174 /* 2146 2175 * Versions prior to RTL_GIGA_MAC_VER_19 don't support resetting the 2147 2176 * tally counters. ··· 2147 2180 if (tp->mac_version < RTL_GIGA_MAC_VER_19) 2148 2181 return true; 2149 2182 2150 - return rtl8169_do_counters(dev, CounterReset); 2183 + return rtl8169_do_counters(tp, CounterReset); 2151 2184 } 2152 2185 2153 - static bool rtl8169_update_counters(struct net_device *dev) 2186 + static bool rtl8169_update_counters(struct rtl8169_private *tp) 2154 2187 { 2155 - struct rtl8169_private *tp = netdev_priv(dev); 2156 - 2157 2188 /* 2158 2189 * Some chips are unable to dump tally counters when the receiver 2159 2190 * is disabled. ··· 2159 2194 if ((RTL_R8(tp, ChipCmd) & CmdRxEnb) == 0) 2160 2195 return true; 2161 2196 2162 - return rtl8169_do_counters(dev, CounterDump); 2197 + return rtl8169_do_counters(tp, CounterDump); 2163 2198 } 2164 2199 2165 - static bool rtl8169_init_counter_offsets(struct net_device *dev) 2200 + static bool rtl8169_init_counter_offsets(struct rtl8169_private *tp) 2166 2201 { 2167 - struct rtl8169_private *tp = netdev_priv(dev); 2168 2202 struct rtl8169_counters *counters = tp->counters; 2169 2203 bool ret = false; 2170 2204 ··· 2186 2222 return true; 2187 2223 2188 2224 /* If both, reset and update fail, propagate to caller. */ 2189 - if (rtl8169_reset_counters(dev)) 2225 + if (rtl8169_reset_counters(tp)) 2190 2226 ret = true; 2191 2227 2192 - if (rtl8169_update_counters(dev)) 2228 + if (rtl8169_update_counters(tp)) 2193 2229 ret = true; 2194 2230 2195 2231 tp->tc_offset.tx_errors = counters->tx_errors; ··· 2212 2248 pm_runtime_get_noresume(d); 2213 2249 2214 2250 if (pm_runtime_active(d)) 2215 - rtl8169_update_counters(dev); 2251 + rtl8169_update_counters(tp); 2216 2252 2217 2253 pm_runtime_put_noidle(d); 2218 2254 ··· 2523 2559 2524 2560 /* 8168E family. */ 2525 2561 { 0x7c800000, 0x2c800000, RTL_GIGA_MAC_VER_34 }, 2526 - { 0x7cf00000, 0x2c200000, RTL_GIGA_MAC_VER_33 }, 2527 2562 { 0x7cf00000, 0x2c100000, RTL_GIGA_MAC_VER_32 }, 2528 2563 { 0x7c800000, 0x2c000000, RTL_GIGA_MAC_VER_33 }, 2529 2564 2530 2565 /* 8168D family. */ 2531 - { 0x7cf00000, 0x28300000, RTL_GIGA_MAC_VER_26 }, 2532 2566 { 0x7cf00000, 0x28100000, RTL_GIGA_MAC_VER_25 }, 2533 2567 { 0x7c800000, 0x28000000, RTL_GIGA_MAC_VER_26 }, 2534 2568 ··· 2536 2574 { 0x7cf00000, 0x28b00000, RTL_GIGA_MAC_VER_31 }, 2537 2575 2538 2576 /* 8168C family. */ 2539 - { 0x7cf00000, 0x3cb00000, RTL_GIGA_MAC_VER_24 }, 2540 2577 { 0x7cf00000, 0x3c900000, RTL_GIGA_MAC_VER_23 }, 2541 2578 { 0x7cf00000, 0x3c800000, RTL_GIGA_MAC_VER_18 }, 2542 2579 { 0x7c800000, 0x3c800000, RTL_GIGA_MAC_VER_24 }, 2543 2580 { 0x7cf00000, 0x3c000000, RTL_GIGA_MAC_VER_19 }, 2544 2581 { 0x7cf00000, 0x3c200000, RTL_GIGA_MAC_VER_20 }, 2545 2582 { 0x7cf00000, 0x3c300000, RTL_GIGA_MAC_VER_21 }, 2546 - { 0x7cf00000, 0x3c400000, RTL_GIGA_MAC_VER_22 }, 2547 2583 { 0x7c800000, 0x3c000000, RTL_GIGA_MAC_VER_22 }, 2548 2584 2549 2585 /* 8168B family. */ 2550 2586 { 0x7cf00000, 0x38000000, RTL_GIGA_MAC_VER_12 }, 2551 - { 0x7cf00000, 0x38500000, RTL_GIGA_MAC_VER_17 }, 2552 2587 { 0x7c800000, 0x38000000, RTL_GIGA_MAC_VER_17 }, 2553 2588 { 0x7c800000, 0x30000000, RTL_GIGA_MAC_VER_11 }, 2554 2589 2555 2590 /* 8101 family. */ 2556 - { 0x7cf00000, 0x44900000, RTL_GIGA_MAC_VER_39 }, 2557 2591 { 0x7c800000, 0x44800000, RTL_GIGA_MAC_VER_39 }, 2558 2592 { 0x7c800000, 0x44000000, RTL_GIGA_MAC_VER_37 }, 2559 - { 0x7cf00000, 0x40b00000, RTL_GIGA_MAC_VER_30 }, 2560 - { 0x7cf00000, 0x40a00000, RTL_GIGA_MAC_VER_30 }, 2561 2593 { 0x7cf00000, 0x40900000, RTL_GIGA_MAC_VER_29 }, 2562 2594 { 0x7c800000, 0x40800000, RTL_GIGA_MAC_VER_30 }, 2563 - { 0x7cf00000, 0x34a00000, RTL_GIGA_MAC_VER_09 }, 2564 - { 0x7cf00000, 0x24a00000, RTL_GIGA_MAC_VER_09 }, 2565 2595 { 0x7cf00000, 0x34900000, RTL_GIGA_MAC_VER_08 }, 2566 2596 { 0x7cf00000, 0x24900000, RTL_GIGA_MAC_VER_08 }, 2567 2597 { 0x7cf00000, 0x34800000, RTL_GIGA_MAC_VER_07 }, ··· 5311 5357 (InterFrameGap << TxInterFrameGapShift)); 5312 5358 } 5313 5359 5314 - static void rtl_hw_start(struct net_device *dev) 5360 + static void rtl_hw_start(struct rtl8169_private *tp) 5315 5361 { 5316 - struct rtl8169_private *tp = netdev_priv(dev); 5317 - 5318 - tp->hw_start(dev); 5319 - 5362 + tp->hw_start(tp); 5320 5363 rtl_irq_enable_all(tp); 5321 5364 } 5322 5365 ··· 5339 5388 return cmd; 5340 5389 } 5341 5390 5342 - static void rtl_set_rx_max_size(struct rtl8169_private *tp, unsigned int rx_buf_sz) 5391 + static void rtl_set_rx_max_size(struct rtl8169_private *tp) 5343 5392 { 5344 5393 /* Low hurts. Let's disable the filtering. */ 5345 - RTL_W16(tp, RxMaxSize, rx_buf_sz + 1); 5394 + RTL_W16(tp, RxMaxSize, R8169_RX_BUF_SIZE + 1); 5346 5395 } 5347 5396 5348 5397 static void rtl8169_set_magic_reg(struct rtl8169_private *tp, unsigned mac_version) ··· 5422 5471 RTL_W32(tp, RxConfig, tmp); 5423 5472 } 5424 5473 5425 - static void rtl_hw_start_8169(struct net_device *dev) 5474 + static void rtl_hw_start_8169(struct rtl8169_private *tp) 5426 5475 { 5427 - struct rtl8169_private *tp = netdev_priv(dev); 5428 - struct pci_dev *pdev = tp->pci_dev; 5429 - 5430 5476 if (tp->mac_version == RTL_GIGA_MAC_VER_05) { 5431 5477 RTL_W16(tp, CPlusCmd, RTL_R16(tp, CPlusCmd) | PCIMulRW); 5432 - pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, 0x08); 5478 + pci_write_config_byte(tp->pci_dev, PCI_CACHE_LINE_SIZE, 0x08); 5433 5479 } 5434 5480 5435 5481 RTL_W8(tp, Cfg9346, Cfg9346_Unlock); ··· 5440 5492 5441 5493 RTL_W8(tp, EarlyTxThres, NoEarlyTx); 5442 5494 5443 - rtl_set_rx_max_size(tp, rx_buf_sz); 5495 + rtl_set_rx_max_size(tp); 5444 5496 5445 5497 if (tp->mac_version == RTL_GIGA_MAC_VER_01 || 5446 5498 tp->mac_version == RTL_GIGA_MAC_VER_02 || ··· 5484 5536 5485 5537 RTL_W32(tp, RxMissed, 0); 5486 5538 5487 - rtl_set_rx_mode(dev); 5539 + rtl_set_rx_mode(tp->dev); 5488 5540 5489 5541 /* no early-rx interrupts */ 5490 5542 RTL_W16(tp, MultiIntr, RTL_R16(tp, MultiIntr) & 0xf000); ··· 6272 6324 r8168_mac_ocp_write(tp, 0xe860, data); 6273 6325 } 6274 6326 6275 - static void rtl_hw_start_8168(struct net_device *dev) 6327 + static void rtl_hw_start_8168(struct rtl8169_private *tp) 6276 6328 { 6277 - struct rtl8169_private *tp = netdev_priv(dev); 6278 - 6279 6329 RTL_W8(tp, Cfg9346, Cfg9346_Unlock); 6280 6330 6281 6331 RTL_W8(tp, MaxTxPacketSize, TxPacketMax); 6282 6332 6283 - rtl_set_rx_max_size(tp, rx_buf_sz); 6333 + rtl_set_rx_max_size(tp); 6284 6334 6285 6335 tp->cp_cmd |= RTL_R16(tp, CPlusCmd) | PktCntrDisable | INTT_1; 6286 6336 ··· 6398 6452 6399 6453 default: 6400 6454 printk(KERN_ERR PFX "%s: unknown chipset (mac_version = %d).\n", 6401 - dev->name, tp->mac_version); 6455 + tp->dev->name, tp->mac_version); 6402 6456 break; 6403 6457 } 6404 6458 ··· 6406 6460 6407 6461 RTL_W8(tp, ChipCmd, CmdTxEnb | CmdRxEnb); 6408 6462 6409 - rtl_set_rx_mode(dev); 6463 + rtl_set_rx_mode(tp->dev); 6410 6464 6411 6465 RTL_W16(tp, MultiIntr, RTL_R16(tp, MultiIntr) & 0xf000); 6412 6466 } ··· 6545 6599 rtl_pcie_state_l2l3_enable(tp, false); 6546 6600 } 6547 6601 6548 - static void rtl_hw_start_8101(struct net_device *dev) 6602 + static void rtl_hw_start_8101(struct rtl8169_private *tp) 6549 6603 { 6550 - struct rtl8169_private *tp = netdev_priv(dev); 6551 - struct pci_dev *pdev = tp->pci_dev; 6552 - 6553 6604 if (tp->mac_version >= RTL_GIGA_MAC_VER_30) 6554 6605 tp->event_slow &= ~RxFIFOOver; 6555 6606 6556 6607 if (tp->mac_version == RTL_GIGA_MAC_VER_13 || 6557 6608 tp->mac_version == RTL_GIGA_MAC_VER_16) 6558 - pcie_capability_set_word(pdev, PCI_EXP_DEVCTL, 6609 + pcie_capability_set_word(tp->pci_dev, PCI_EXP_DEVCTL, 6559 6610 PCI_EXP_DEVCTL_NOSNOOP_EN); 6560 6611 6561 6612 RTL_W8(tp, Cfg9346, Cfg9346_Unlock); 6562 6613 6563 6614 RTL_W8(tp, MaxTxPacketSize, TxPacketMax); 6564 6615 6565 - rtl_set_rx_max_size(tp, rx_buf_sz); 6616 + rtl_set_rx_max_size(tp); 6566 6617 6567 6618 tp->cp_cmd &= ~R810X_CPCMD_QUIRK_MASK; 6568 6619 RTL_W16(tp, CPlusCmd, tp->cp_cmd); ··· 6610 6667 6611 6668 RTL_W8(tp, ChipCmd, CmdTxEnb | CmdRxEnb); 6612 6669 6613 - rtl_set_rx_mode(dev); 6670 + rtl_set_rx_mode(tp->dev); 6614 6671 6615 6672 RTL_R8(tp, IntrMask); 6616 6673 ··· 6641 6698 static void rtl8169_free_rx_databuff(struct rtl8169_private *tp, 6642 6699 void **data_buff, struct RxDesc *desc) 6643 6700 { 6644 - dma_unmap_single(tp_to_dev(tp), le64_to_cpu(desc->addr), rx_buf_sz, 6645 - DMA_FROM_DEVICE); 6701 + dma_unmap_single(tp_to_dev(tp), le64_to_cpu(desc->addr), 6702 + R8169_RX_BUF_SIZE, DMA_FROM_DEVICE); 6646 6703 6647 6704 kfree(*data_buff); 6648 6705 *data_buff = NULL; 6649 6706 rtl8169_make_unusable_by_asic(desc); 6650 6707 } 6651 6708 6652 - static inline void rtl8169_mark_to_asic(struct RxDesc *desc, u32 rx_buf_sz) 6709 + static inline void rtl8169_mark_to_asic(struct RxDesc *desc) 6653 6710 { 6654 6711 u32 eor = le32_to_cpu(desc->opts1) & RingEnd; 6655 6712 6656 6713 /* Force memory writes to complete before releasing descriptor */ 6657 6714 dma_wmb(); 6658 6715 6659 - desc->opts1 = cpu_to_le32(DescOwn | eor | rx_buf_sz); 6660 - } 6661 - 6662 - static inline void rtl8169_map_to_asic(struct RxDesc *desc, dma_addr_t mapping, 6663 - u32 rx_buf_sz) 6664 - { 6665 - desc->addr = cpu_to_le64(mapping); 6666 - rtl8169_mark_to_asic(desc, rx_buf_sz); 6716 + desc->opts1 = cpu_to_le32(DescOwn | eor | R8169_RX_BUF_SIZE); 6667 6717 } 6668 6718 6669 6719 static inline void *rtl8169_align(void *data) ··· 6670 6734 void *data; 6671 6735 dma_addr_t mapping; 6672 6736 struct device *d = tp_to_dev(tp); 6673 - struct net_device *dev = tp->dev; 6674 - int node = dev->dev.parent ? dev_to_node(dev->dev.parent) : -1; 6737 + int node = dev_to_node(d); 6675 6738 6676 - data = kmalloc_node(rx_buf_sz, GFP_KERNEL, node); 6739 + data = kmalloc_node(R8169_RX_BUF_SIZE, GFP_KERNEL, node); 6677 6740 if (!data) 6678 6741 return NULL; 6679 6742 6680 6743 if (rtl8169_align(data) != data) { 6681 6744 kfree(data); 6682 - data = kmalloc_node(rx_buf_sz + 15, GFP_KERNEL, node); 6745 + data = kmalloc_node(R8169_RX_BUF_SIZE + 15, GFP_KERNEL, node); 6683 6746 if (!data) 6684 6747 return NULL; 6685 6748 } 6686 6749 6687 - mapping = dma_map_single(d, rtl8169_align(data), rx_buf_sz, 6750 + mapping = dma_map_single(d, rtl8169_align(data), R8169_RX_BUF_SIZE, 6688 6751 DMA_FROM_DEVICE); 6689 6752 if (unlikely(dma_mapping_error(d, mapping))) { 6690 6753 if (net_ratelimit()) ··· 6691 6756 goto err_out; 6692 6757 } 6693 6758 6694 - rtl8169_map_to_asic(desc, mapping, rx_buf_sz); 6759 + desc->addr = cpu_to_le64(mapping); 6760 + rtl8169_mark_to_asic(desc); 6695 6761 return data; 6696 6762 6697 6763 err_out: ··· 6724 6788 for (i = 0; i < NUM_RX_DESC; i++) { 6725 6789 void *data; 6726 6790 6727 - if (tp->Rx_databuff[i]) 6728 - continue; 6729 - 6730 6791 data = rtl8169_alloc_rx_data(tp, tp->RxDescArray + i); 6731 6792 if (!data) { 6732 6793 rtl8169_make_unusable_by_asic(tp->RxDescArray + i); ··· 6740 6807 return -ENOMEM; 6741 6808 } 6742 6809 6743 - static int rtl8169_init_ring(struct net_device *dev) 6810 + static int rtl8169_init_ring(struct rtl8169_private *tp) 6744 6811 { 6745 - struct rtl8169_private *tp = netdev_priv(dev); 6746 - 6747 6812 rtl8169_init_ring_indexes(tp); 6748 6813 6749 - memset(tp->tx_skb, 0x0, NUM_TX_DESC * sizeof(struct ring_info)); 6750 - memset(tp->Rx_databuff, 0x0, NUM_RX_DESC * sizeof(void *)); 6814 + memset(tp->tx_skb, 0, sizeof(tp->tx_skb)); 6815 + memset(tp->Rx_databuff, 0, sizeof(tp->Rx_databuff)); 6751 6816 6752 6817 return rtl8169_rx_fill(tp); 6753 6818 } ··· 6804 6873 rtl8169_hw_reset(tp); 6805 6874 6806 6875 for (i = 0; i < NUM_RX_DESC; i++) 6807 - rtl8169_mark_to_asic(tp->RxDescArray + i, rx_buf_sz); 6876 + rtl8169_mark_to_asic(tp->RxDescArray + i); 6808 6877 6809 6878 rtl8169_tx_clear(tp); 6810 6879 rtl8169_init_ring_indexes(tp); 6811 6880 6812 6881 napi_enable(&tp->napi); 6813 - rtl_hw_start(dev); 6882 + rtl_hw_start(tp); 6814 6883 netif_wake_queue(dev); 6815 6884 rtl8169_check_link_status(dev, tp); 6816 6885 } ··· 7292 7361 prefetch(data); 7293 7362 skb = napi_alloc_skb(&tp->napi, pkt_size); 7294 7363 if (skb) 7295 - memcpy(skb->data, data, pkt_size); 7364 + skb_copy_to_linear_data(skb, data, pkt_size); 7296 7365 dma_sync_single_for_device(d, addr, pkt_size, DMA_FROM_DEVICE); 7297 7366 7298 7367 return skb; ··· 7310 7379 struct RxDesc *desc = tp->RxDescArray + entry; 7311 7380 u32 status; 7312 7381 7313 - status = le32_to_cpu(desc->opts1) & tp->opts1_mask; 7382 + status = le32_to_cpu(desc->opts1); 7314 7383 if (status & DescOwn) 7315 7384 break; 7316 7385 ··· 7328 7397 dev->stats.rx_length_errors++; 7329 7398 if (status & RxCRC) 7330 7399 dev->stats.rx_crc_errors++; 7331 - if (status & RxFOVF) { 7400 + /* RxFOVF is a reserved bit on later chip versions */ 7401 + if (tp->mac_version == RTL_GIGA_MAC_VER_01 && 7402 + status & RxFOVF) { 7332 7403 rtl_schedule_task(tp, RTL_FLAG_TASK_RESET_PENDING); 7333 7404 dev->stats.rx_fifo_errors++; 7334 - } 7335 - if ((status & (RxRUNT | RxCRC)) && 7336 - !(status & (RxRWT | RxFOVF)) && 7337 - (dev->features & NETIF_F_RXALL)) 7405 + } else if (status & (RxRUNT | RxCRC) && 7406 + !(status & RxRWT) && 7407 + dev->features & NETIF_F_RXALL) { 7338 7408 goto process_pkt; 7409 + } 7339 7410 } else { 7340 7411 struct sk_buff *skb; 7341 7412 dma_addr_t addr; ··· 7386 7453 } 7387 7454 release_descriptor: 7388 7455 desc->opts2 = 0; 7389 - rtl8169_mark_to_asic(desc, rx_buf_sz); 7456 + rtl8169_mark_to_asic(desc); 7390 7457 } 7391 7458 7392 7459 count = cur_rx - tp->cur_rx; ··· 7397 7464 7398 7465 static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance) 7399 7466 { 7400 - struct net_device *dev = dev_instance; 7401 - struct rtl8169_private *tp = netdev_priv(dev); 7467 + struct rtl8169_private *tp = dev_instance; 7402 7468 int handled = 0; 7403 7469 u16 status; 7404 7470 ··· 7408 7476 handled = 1; 7409 7477 7410 7478 rtl_irq_disable(tp); 7411 - napi_schedule(&tp->napi); 7479 + napi_schedule_irqoff(&tp->napi); 7412 7480 } 7413 7481 } 7414 7482 return IRQ_RETVAL(handled); ··· 7559 7627 pm_runtime_get_sync(&pdev->dev); 7560 7628 7561 7629 /* Update counters before going down */ 7562 - rtl8169_update_counters(dev); 7630 + rtl8169_update_counters(tp); 7563 7631 7564 7632 rtl_lock_work(tp); 7565 7633 clear_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags); ··· 7569 7637 7570 7638 cancel_work_sync(&tp->wk.work); 7571 7639 7572 - pci_free_irq(pdev, 0, dev); 7640 + pci_free_irq(pdev, 0, tp); 7573 7641 7574 7642 dma_free_coherent(&pdev->dev, R8169_RX_RING_BYTES, tp->RxDescArray, 7575 7643 tp->RxPhyAddr); ··· 7614 7682 if (!tp->RxDescArray) 7615 7683 goto err_free_tx_0; 7616 7684 7617 - retval = rtl8169_init_ring(dev); 7685 + retval = rtl8169_init_ring(tp); 7618 7686 if (retval < 0) 7619 7687 goto err_free_rx_1; 7620 7688 ··· 7624 7692 7625 7693 rtl_request_firmware(tp); 7626 7694 7627 - retval = pci_request_irq(pdev, 0, rtl8169_interrupt, NULL, dev, 7695 + retval = pci_request_irq(pdev, 0, rtl8169_interrupt, NULL, tp, 7628 7696 dev->name); 7629 7697 if (retval < 0) 7630 7698 goto err_release_fw_2; ··· 7641 7709 7642 7710 rtl_pll_power_up(tp); 7643 7711 7644 - rtl_hw_start(dev); 7712 + rtl_hw_start(tp); 7645 7713 7646 - if (!rtl8169_init_counter_offsets(dev)) 7714 + if (!rtl8169_init_counter_offsets(tp)) 7647 7715 netif_warn(tp, hw, dev, "counter reset/update failed\n"); 7648 7716 7649 7717 netif_start_queue(dev); ··· 7712 7780 * from tally counters. 7713 7781 */ 7714 7782 if (pm_runtime_active(&pdev->dev)) 7715 - rtl8169_update_counters(dev); 7783 + rtl8169_update_counters(tp); 7716 7784 7717 7785 /* 7718 7786 * Subtract values fetched during initalization. ··· 7808 7876 7809 7877 /* Update counters before going runtime suspend */ 7810 7878 rtl8169_rx_missed(dev); 7811 - rtl8169_update_counters(dev); 7879 + rtl8169_update_counters(tp); 7812 7880 7813 7881 return 0; 7814 7882 } ··· 7948 8016 }; 7949 8017 7950 8018 static const struct rtl_cfg_info { 7951 - void (*hw_start)(struct net_device *); 7952 - unsigned int region; 7953 - unsigned int align; 8019 + void (*hw_start)(struct rtl8169_private *tp); 7954 8020 u16 event_slow; 7955 8021 unsigned int has_gmii:1; 7956 8022 const struct rtl_coalesce_info *coalesce_info; ··· 7956 8026 } rtl_cfg_infos [] = { 7957 8027 [RTL_CFG_0] = { 7958 8028 .hw_start = rtl_hw_start_8169, 7959 - .region = 1, 7960 - .align = 0, 7961 8029 .event_slow = SYSErr | LinkChg | RxOverflow | RxFIFOOver, 7962 8030 .has_gmii = 1, 7963 8031 .coalesce_info = rtl_coalesce_info_8169, ··· 7963 8035 }, 7964 8036 [RTL_CFG_1] = { 7965 8037 .hw_start = rtl_hw_start_8168, 7966 - .region = 2, 7967 - .align = 8, 7968 8038 .event_slow = SYSErr | LinkChg | RxOverflow, 7969 8039 .has_gmii = 1, 7970 8040 .coalesce_info = rtl_coalesce_info_8168_8136, ··· 7970 8044 }, 7971 8045 [RTL_CFG_2] = { 7972 8046 .hw_start = rtl_hw_start_8101, 7973 - .region = 2, 7974 - .align = 8, 7975 8047 .event_slow = SYSErr | LinkChg | RxOverflow | RxFIFOOver | 7976 8048 PCSTimeout, 7977 8049 .coalesce_info = rtl_coalesce_info_8168_8136, ··· 8069 8145 static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 8070 8146 { 8071 8147 const struct rtl_cfg_info *cfg = rtl_cfg_infos + ent->driver_data; 8072 - const unsigned int region = cfg->region; 8073 8148 struct rtl8169_private *tp; 8074 8149 struct mii_if_info *mii; 8075 8150 struct net_device *dev; 8076 - int chipset, i; 8151 + int chipset, region, i; 8077 8152 int rc; 8078 8153 8079 8154 if (netif_msg_drv(&debug)) { ··· 8114 8191 if (pcim_set_mwi(pdev) < 0) 8115 8192 netif_info(tp, probe, dev, "Mem-Wr-Inval unavailable\n"); 8116 8193 8117 - /* make sure PCI base addr 1 is MMIO */ 8118 - if (!(pci_resource_flags(pdev, region) & IORESOURCE_MEM)) { 8119 - netif_err(tp, probe, dev, 8120 - "region #%d not an MMIO resource, aborting\n", 8121 - region); 8194 + /* use first MMIO region */ 8195 + region = ffs(pci_select_bars(pdev, IORESOURCE_MEM)) - 1; 8196 + if (region < 0) { 8197 + netif_err(tp, probe, dev, "no MMIO resource found\n"); 8122 8198 return -ENODEV; 8123 8199 } 8124 8200 ··· 8182 8260 rtl8169_print_mac_version(tp); 8183 8261 8184 8262 chipset = tp->mac_version; 8185 - tp->txd_version = rtl_chip_infos[chipset].txd_version; 8186 8263 8187 8264 rc = rtl_alloc_irq(tp); 8188 8265 if (rc < 0) { ··· 8243 8322 dev->ethtool_ops = &rtl8169_ethtool_ops; 8244 8323 dev->watchdog_timeo = RTL8169_TX_TIMEOUT; 8245 8324 8246 - netif_napi_add(dev, &tp->napi, rtl8169_poll, R8169_NAPI_WEIGHT); 8325 + netif_napi_add(dev, &tp->napi, rtl8169_poll, NAPI_POLL_WEIGHT); 8247 8326 8248 8327 /* don't enable SG, IP_CSUM and TSO by default - it might not work 8249 8328 * properly for all devices */ ··· 8266 8345 /* Disallow toggling */ 8267 8346 dev->hw_features &= ~NETIF_F_HW_VLAN_CTAG_RX; 8268 8347 8269 - if (tp->txd_version == RTL_TD_0) 8348 + switch (rtl_chip_infos[chipset].txd_version) { 8349 + case RTL_TD_0: 8270 8350 tp->tso_csum = rtl8169_tso_csum_v1; 8271 - else if (tp->txd_version == RTL_TD_1) { 8351 + break; 8352 + case RTL_TD_1: 8272 8353 tp->tso_csum = rtl8169_tso_csum_v2; 8273 8354 dev->hw_features |= NETIF_F_IPV6_CSUM | NETIF_F_TSO6; 8274 - } else 8355 + break; 8356 + default: 8275 8357 WARN_ON_ONCE(1); 8358 + } 8276 8359 8277 8360 dev->hw_features |= NETIF_F_RXALL; 8278 8361 dev->hw_features |= NETIF_F_RXFCS; ··· 8288 8363 tp->hw_start = cfg->hw_start; 8289 8364 tp->event_slow = cfg->event_slow; 8290 8365 tp->coalesce_info = cfg->coalesce_info; 8291 - 8292 - tp->opts1_mask = (tp->mac_version != RTL_GIGA_MAC_VER_01) ? 8293 - ~(RxBOVF | RxFOVF) : ~0; 8294 8366 8295 8367 timer_setup(&tp->timer, rtl8169_phy_timer, 0); 8296 8368 ··· 8305 8383 if (rc < 0) 8306 8384 return rc; 8307 8385 8308 - netif_info(tp, probe, dev, "%s at 0x%p, %pM, XID %08x IRQ %d\n", 8309 - rtl_chip_infos[chipset].name, tp->mmio_addr, dev->dev_addr, 8310 - (u32)(RTL_R32(tp, TxConfig) & 0x9cf0f8ff), 8386 + netif_info(tp, probe, dev, "%s, %pM, XID %08x, IRQ %d\n", 8387 + rtl_chip_infos[chipset].name, dev->dev_addr, 8388 + (u32)(RTL_R32(tp, TxConfig) & 0xfcf0f8ff), 8311 8389 pci_irq_vector(pdev, 0)); 8312 8390 if (rtl_chip_infos[chipset].jumbo_max != JUMBO_1K) { 8313 8391 netif_info(tp, probe, dev, "jumbo features [frames: %d bytes, " 8314 8392 "tx checksumming: %s]\n", 8315 8393 rtl_chip_infos[chipset].jumbo_max, 8316 - rtl_chip_infos[chipset].jumbo_tx_csum ? "ok" : "ko"); 8394 + tp->mac_version <= RTL_GIGA_MAC_VER_06 ? "ok" : "ko"); 8317 8395 } 8318 8396 8319 8397 if (r8168_check_dash(tp))