Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

dmaengine: qcom_hidma: Wrong domain name in the email address

cudeaurora.org is used in place of codeaurora.org
in the contact field.

Signed-off-by: Amit Kumar <free.amit.kumar@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>

authored by

Amit Kumar and committed by
Vinod Koul
c4c5cd69 adc064cd

+11 -11
+1 -1
Documentation/ABI/testing/sysfs-platform-hidma
··· 2 2 /sys/devices/platform/QCOM8061:*/chid 3 3 Date: Dec 2015 4 4 KernelVersion: 4.4 5 - Contact: "Sinan Kaya <okaya@cudeaurora.org>" 5 + Contact: "Sinan Kaya <okaya@codeaurora.org>" 6 6 Description: 7 7 Contains the ID of the channel within the HIDMA instance. 8 8 It is used to associate a given HIDMA channel with the
+10 -10
Documentation/ABI/testing/sysfs-platform-hidma-mgmt
··· 2 2 /sys/devices/platform/QCOM8060:*/chanops/chan*/priority 3 3 Date: Nov 2015 4 4 KernelVersion: 4.4 5 - Contact: "Sinan Kaya <okaya@cudeaurora.org>" 5 + Contact: "Sinan Kaya <okaya@codeaurora.org>" 6 6 Description: 7 7 Contains either 0 or 1 and indicates if the DMA channel is a 8 8 low priority (0) or high priority (1) channel. ··· 11 11 /sys/devices/platform/QCOM8060:*/chanops/chan*/weight 12 12 Date: Nov 2015 13 13 KernelVersion: 4.4 14 - Contact: "Sinan Kaya <okaya@cudeaurora.org>" 14 + Contact: "Sinan Kaya <okaya@codeaurora.org>" 15 15 Description: 16 16 Contains 0..15 and indicates the weight of the channel among 17 17 equal priority channels during round robin scheduling. ··· 20 20 /sys/devices/platform/QCOM8060:*/chreset_timeout_cycles 21 21 Date: Nov 2015 22 22 KernelVersion: 4.4 23 - Contact: "Sinan Kaya <okaya@cudeaurora.org>" 23 + Contact: "Sinan Kaya <okaya@codeaurora.org>" 24 24 Description: 25 25 Contains the platform specific cycle value to wait after a 26 26 reset command is issued. If the value is chosen too short, ··· 32 32 /sys/devices/platform/QCOM8060:*/dma_channels 33 33 Date: Nov 2015 34 34 KernelVersion: 4.4 35 - Contact: "Sinan Kaya <okaya@cudeaurora.org>" 35 + Contact: "Sinan Kaya <okaya@codeaurora.org>" 36 36 Description: 37 37 Contains the number of dma channels supported by one instance 38 38 of HIDMA hardware. The value may change from chip to chip. ··· 41 41 /sys/devices/platform/QCOM8060:*/hw_version_major 42 42 Date: Nov 2015 43 43 KernelVersion: 4.4 44 - Contact: "Sinan Kaya <okaya@cudeaurora.org>" 44 + Contact: "Sinan Kaya <okaya@codeaurora.org>" 45 45 Description: 46 46 Version number major for the hardware. 47 47 ··· 49 49 /sys/devices/platform/QCOM8060:*/hw_version_minor 50 50 Date: Nov 2015 51 51 KernelVersion: 4.4 52 - Contact: "Sinan Kaya <okaya@cudeaurora.org>" 52 + Contact: "Sinan Kaya <okaya@codeaurora.org>" 53 53 Description: 54 54 Version number minor for the hardware. 55 55 ··· 57 57 /sys/devices/platform/QCOM8060:*/max_rd_xactions 58 58 Date: Nov 2015 59 59 KernelVersion: 4.4 60 - Contact: "Sinan Kaya <okaya@cudeaurora.org>" 60 + Contact: "Sinan Kaya <okaya@codeaurora.org>" 61 61 Description: 62 62 Contains a value between 0 and 31. Maximum number of 63 63 read transactions that can be issued back to back. ··· 69 69 /sys/devices/platform/QCOM8060:*/max_read_request 70 70 Date: Nov 2015 71 71 KernelVersion: 4.4 72 - Contact: "Sinan Kaya <okaya@cudeaurora.org>" 72 + Contact: "Sinan Kaya <okaya@codeaurora.org>" 73 73 Description: 74 74 Size of each read request. The value needs to be a power 75 75 of two and can be between 128 and 1024. ··· 78 78 /sys/devices/platform/QCOM8060:*/max_wr_xactions 79 79 Date: Nov 2015 80 80 KernelVersion: 4.4 81 - Contact: "Sinan Kaya <okaya@cudeaurora.org>" 81 + Contact: "Sinan Kaya <okaya@codeaurora.org>" 82 82 Description: 83 83 Contains a value between 0 and 31. Maximum number of 84 84 write transactions that can be issued back to back. ··· 91 91 /sys/devices/platform/QCOM8060:*/max_write_request 92 92 Date: Nov 2015 93 93 KernelVersion: 4.4 94 - Contact: "Sinan Kaya <okaya@cudeaurora.org>" 94 + Contact: "Sinan Kaya <okaya@codeaurora.org>" 95 95 Description: 96 96 Size of each write request. The value needs to be a power 97 97 of two and can be between 128 and 1024.