···575575 return policy->transition_delay_us;576576577577 latency = policy->cpuinfo.transition_latency / NSEC_PER_USEC;578578- if (latency) {579579- unsigned int max_delay_us = 2 * MSEC_PER_SEC;578578+ if (latency)579579+ /* Give a 50% breathing room between updates */580580+ return latency + (latency >> 1);580581581581- /*582582- * If the platform already has high transition_latency, use it583583- * as-is.584584- */585585- if (latency > max_delay_us)586586- return latency;587587-588588- /*589589- * For platforms that can change the frequency very fast (< 2590590- * us), the above formula gives a decent transition delay. But591591- * for platforms where transition_latency is in milliseconds, it592592- * ends up giving unrealistic values.593593- *594594- * Cap the default transition delay to 2 ms, which seems to be595595- * a reasonable amount of time after which we should reevaluate596596- * the frequency.597597- */598598- return min(latency * LATENCY_MULTIPLIER, max_delay_us);599599- }600600-601601- return LATENCY_MULTIPLIER;582582+ return USEC_PER_MSEC;602583}603584EXPORT_SYMBOL_GPL(cpufreq_policy_transition_delay_us);604585
···238238module_init(maple_cpufreq_init);239239240240241241+MODULE_DESCRIPTION("cpufreq driver for Maple 970FX/970MP boards");241242MODULE_LICENSE("GPL");
+1
drivers/cpufreq/pasemi-cpufreq.c
···269269module_init(pas_cpufreq_init);270270module_exit(pas_cpufreq_exit);271271272272+MODULE_DESCRIPTION("cpufreq driver for PA Semi PWRficient");272273MODULE_LICENSE("GPL");273274MODULE_AUTHOR("Egor Martovetsky <egor@pasemi.com>, Olof Johansson <olof@lixom.net>");
+1
drivers/cpufreq/pmac64-cpufreq.c
···671671module_init(g5_cpufreq_init);672672673673674674+MODULE_DESCRIPTION("cpufreq driver for SMU & 970FX based G5 Macs");674675MODULE_LICENSE("GPL");
+1
drivers/cpufreq/powernv-cpufreq.c
···11601160}11611161module_exit(powernv_cpufreq_exit);1162116211631163+MODULE_DESCRIPTION("cpufreq driver for IBM/OpenPOWER powernv systems");11631164MODULE_LICENSE("GPL");11641165MODULE_AUTHOR("Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>");
+1
drivers/cpufreq/ppc_cbe_cpufreq.c
···168168module_init(cbe_cpufreq_init);169169module_exit(cbe_cpufreq_exit);170170171171+MODULE_DESCRIPTION("cpufreq driver for Cell BE processors");171172MODULE_LICENSE("GPL");172173MODULE_AUTHOR("Christian Krafft <krafft@de.ibm.com>");
-6
include/linux/cpufreq.h
···577577#define CPUFREQ_POLICY_POWERSAVE (1)578578#define CPUFREQ_POLICY_PERFORMANCE (2)579579580580-/*581581- * The polling frequency depends on the capability of the processor. Default582582- * polling frequency is 1000 times the transition latency of the processor.583583- */584584-#define LATENCY_MULTIPLIER (1000)585585-586580struct cpufreq_governor {587581 char name[CPUFREQ_NAME_LEN];588582 int (*init)(struct cpufreq_policy *policy);