Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

edac: fix module initialization on several modules 2nd time

I implemented opstate_init() as a inline function in linux/edac.h.

added calling opstate_init() to:
i82443bxgx_edac.c
i82860_edac.c
i82875p_edac.c
i82975x_edac.c

I wrote a fixed patch of
edac-fix-module-initialization-on-several-modules.patch,
and tested building 2.6.25-rc7 with applying this. It was succeed.
I think the patch is now correct.

Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Hitoshi Mitake <h.mitake@gmail.com>
Signed-off-by: Doug Thompson <dougthompson@xmission.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

authored by

Hitoshi Mitake and committed by
Linus Torvalds
c3c52bce 1a45027d

+79 -41
+7
drivers/edac/amd76x_edac.c
··· 17 17 #include <linux/pci.h> 18 18 #include <linux/pci_ids.h> 19 19 #include <linux/slab.h> 20 + #include <linux/edac.h> 20 21 #include "edac_core.h" 21 22 22 23 #define AMD76X_REVISION " Ver: 2.0.2 " __DATE__ ··· 345 344 346 345 static int __init amd76x_init(void) 347 346 { 347 + /* Ensure that the OPSTATE is set correctly for POLL or NMI */ 348 + opstate_init(); 349 + 348 350 return pci_register_driver(&amd76x_driver); 349 351 } 350 352 ··· 362 358 MODULE_LICENSE("GPL"); 363 359 MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh"); 364 360 MODULE_DESCRIPTION("MC support for AMD 76x memory controllers"); 361 + 362 + module_param(edac_op_state, int, 0444); 363 + MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI");
+5 -10
drivers/edac/e752x_edac.c
··· 1117 1117 debugf0("%s(): mci\n", __func__); 1118 1118 debugf0("Starting Probe1\n"); 1119 1119 1120 - /* make sure error reporting method is sane */ 1121 - switch (edac_op_state) { 1122 - case EDAC_OPSTATE_POLL: 1123 - case EDAC_OPSTATE_NMI: 1124 - break; 1125 - default: 1126 - edac_op_state = EDAC_OPSTATE_POLL; 1127 - break; 1128 - } 1129 - 1130 1120 /* check to see if device 0 function 1 is enabled; if it isn't, we 1131 1121 * assume the BIOS has reserved it for a reason and is expecting 1132 1122 * exclusive access, we take care not to violate that assumption and ··· 1293 1303 int pci_rc; 1294 1304 1295 1305 debugf3("%s()\n", __func__); 1306 + 1307 + /* Ensure that the OPSTATE is set correctly for POLL or NMI */ 1308 + opstate_init(); 1309 + 1296 1310 pci_rc = pci_register_driver(&e752x_driver); 1297 1311 return (pci_rc < 0) ? pci_rc : 0; 1298 1312 } ··· 1317 1323 module_param(force_function_unhide, int, 0444); 1318 1324 MODULE_PARM_DESC(force_function_unhide, "if BIOS sets Dev0:Fun1 up as hidden:" 1319 1325 " 1=force unhide and hope BIOS doesn't fight driver for Dev0:Fun1 access"); 1326 + 1320 1327 module_param(edac_op_state, int, 0444); 1321 1328 MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI"); 1322 1329
+3 -10
drivers/edac/e7xxx_edac.c
··· 414 414 415 415 debugf0("%s(): mci\n", __func__); 416 416 417 - /* make sure error reporting method is sane */ 418 - switch (edac_op_state) { 419 - case EDAC_OPSTATE_POLL: 420 - case EDAC_OPSTATE_NMI: 421 - break; 422 - default: 423 - edac_op_state = EDAC_OPSTATE_POLL; 424 - break; 425 - } 426 - 427 417 pci_read_config_dword(pdev, E7XXX_DRC, &drc); 428 418 429 419 drc_chan = dual_channel_active(drc, dev_idx); ··· 555 565 556 566 static int __init e7xxx_init(void) 557 567 { 568 + /* Ensure that the OPSTATE is set correctly for POLL or NMI */ 569 + opstate_init(); 570 + 558 571 return pci_register_driver(&e7xxx_driver); 559 572 } 560 573
+4 -9
drivers/edac/i3000_edac.c
··· 326 326 return -ENODEV; 327 327 } 328 328 329 - switch (edac_op_state) { 330 - case EDAC_OPSTATE_POLL: 331 - case EDAC_OPSTATE_NMI: 332 - break; 333 - default: 334 - edac_op_state = EDAC_OPSTATE_POLL; 335 - break; 336 - } 337 - 338 329 c0dra[0] = readb(window + I3000_C0DRA + 0); /* ranks 0,1 */ 339 330 c0dra[1] = readb(window + I3000_C0DRA + 1); /* ranks 2,3 */ 340 331 c1dra[0] = readb(window + I3000_C1DRA + 0); /* ranks 0,1 */ ··· 494 503 int pci_rc; 495 504 496 505 debugf3("MC: %s()\n", __func__); 506 + 507 + /* Ensure that the OPSTATE is set correctly for POLL or NMI */ 508 + opstate_init(); 509 + 497 510 pci_rc = pci_register_driver(&i3000_driver); 498 511 if (pci_rc < 0) 499 512 goto fail0;
+4 -10
drivers/edac/i5000_edac.c
··· 1286 1286 if (PCI_FUNC(pdev->devfn) != 0) 1287 1287 return -ENODEV; 1288 1288 1289 - /* make sure error reporting method is sane */ 1290 - switch (edac_op_state) { 1291 - case EDAC_OPSTATE_POLL: 1292 - case EDAC_OPSTATE_NMI: 1293 - break; 1294 - default: 1295 - edac_op_state = EDAC_OPSTATE_POLL; 1296 - break; 1297 - } 1298 - 1299 1289 /* Ask the devices for the number of CSROWS and CHANNELS so 1300 1290 * that we can calculate the memory resources, etc 1301 1291 * ··· 1468 1478 1469 1479 debugf2("MC: " __FILE__ ": %s()\n", __func__); 1470 1480 1481 + /* Ensure that the OPSTATE is set correctly for POLL or NMI */ 1482 + opstate_init(); 1483 + 1471 1484 pci_rc = pci_register_driver(&i5000_driver); 1472 1485 1473 1486 return (pci_rc < 0) ? pci_rc : 0; ··· 1494 1501 ("Linux Networx (http://lnxi.com) Doug Thompson <norsk5@xmission.com>"); 1495 1502 MODULE_DESCRIPTION("MC Driver for Intel I5000 memory controllers - " 1496 1503 I5000_REVISION); 1504 + 1497 1505 module_param(edac_op_state, int, 0444); 1498 1506 MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI");
+7
drivers/edac/i82443bxgx_edac.c
··· 29 29 30 30 #include <linux/slab.h> 31 31 32 + #include <linux/edac.h> 32 33 #include "edac_core.h" 33 34 34 35 #define I82443_REVISION "0.1" ··· 387 386 388 387 static int __init i82443bxgx_edacmc_init(void) 389 388 { 389 + /* Ensure that the OPSTATE is set correctly for POLL or NMI */ 390 + opstate_init(); 391 + 390 392 return pci_register_driver(&i82443bxgx_edacmc_driver); 391 393 } 392 394 ··· 404 400 MODULE_LICENSE("GPL"); 405 401 MODULE_AUTHOR("Tim Small <tim@buttersideup.com> - WPAD"); 406 402 MODULE_DESCRIPTION("EDAC MC support for Intel 82443BX/GX memory controllers"); 403 + 404 + module_param(edac_op_state, int, 0444); 405 + MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI");
+7
drivers/edac/i82860_edac.c
··· 14 14 #include <linux/pci.h> 15 15 #include <linux/pci_ids.h> 16 16 #include <linux/slab.h> 17 + #include <linux/edac.h> 17 18 #include "edac_core.h" 18 19 19 20 #define I82860_REVISION " Ver: 2.0.2 " __DATE__ ··· 295 294 296 295 debugf3("%s()\n", __func__); 297 296 297 + /* Ensure that the OPSTATE is set correctly for POLL or NMI */ 298 + opstate_init(); 299 + 298 300 if ((pci_rc = pci_register_driver(&i82860_driver)) < 0) 299 301 goto fail0; 300 302 ··· 349 345 MODULE_AUTHOR("Red Hat Inc. (http://www.redhat.com) " 350 346 "Ben Woodard <woodard@redhat.com>"); 351 347 MODULE_DESCRIPTION("ECC support for Intel 82860 memory hub controllers"); 348 + 349 + module_param(edac_op_state, int, 0444); 350 + MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI");
+9
drivers/edac/i82875p_edac.c
··· 18 18 #include <linux/pci.h> 19 19 #include <linux/pci_ids.h> 20 20 #include <linux/slab.h> 21 + #include <linux/edac.h> 21 22 #include "edac_core.h" 22 23 23 24 #define I82875P_REVISION " Ver: 2.0.2 " __DATE__ ··· 394 393 struct i82875p_error_info discard; 395 394 396 395 debugf0("%s()\n", __func__); 396 + 397 397 ovrfl_pdev = pci_get_device(PCI_VEND_DEV(INTEL, 82875_6), NULL); 398 398 399 399 if (i82875p_setup_overfl_dev(pdev, &ovrfl_pdev, &ovrfl_window)) ··· 534 532 int pci_rc; 535 533 536 534 debugf3("%s()\n", __func__); 535 + 536 + /* Ensure that the OPSTATE is set correctly for POLL or NMI */ 537 + opstate_init(); 538 + 537 539 pci_rc = pci_register_driver(&i82875p_driver); 538 540 539 541 if (pci_rc < 0) ··· 592 586 MODULE_LICENSE("GPL"); 593 587 MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh"); 594 588 MODULE_DESCRIPTION("MC support for Intel 82875 memory hub controllers"); 589 + 590 + module_param(edac_op_state, int, 0444); 591 + MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI");
+7 -1
drivers/edac/i82975x_edac.c
··· 14 14 #include <linux/pci.h> 15 15 #include <linux/pci_ids.h> 16 16 #include <linux/slab.h> 17 - 17 + #include <linux/edac.h> 18 18 #include "edac_core.h" 19 19 20 20 #define I82975X_REVISION " Ver: 1.0.0 " __DATE__ ··· 611 611 612 612 debugf3("%s()\n", __func__); 613 613 614 + /* Ensure that the OPSTATE is set correctly for POLL or NMI */ 615 + opstate_init(); 616 + 614 617 pci_rc = pci_register_driver(&i82975x_driver); 615 618 if (pci_rc < 0) 616 619 goto fail0; ··· 667 664 MODULE_LICENSE("GPL"); 668 665 MODULE_AUTHOR("Arvind R. <arvind@acarlab.com>"); 669 666 MODULE_DESCRIPTION("MC support for Intel 82975 memory hub controllers"); 667 + 668 + module_param(edac_op_state, int, 0444); 669 + MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI");
+6
drivers/edac/pasemi_edac.c
··· 284 284 285 285 static int __init pasemi_edac_init(void) 286 286 { 287 + /* Ensure that the OPSTATE is set correctly for POLL or NMI */ 288 + opstate_init(); 289 + 287 290 return pci_register_driver(&pasemi_edac_driver); 288 291 } 289 292 ··· 301 298 MODULE_LICENSE("GPL"); 302 299 MODULE_AUTHOR("Egor Martovetsky <egor@pasemi.com>"); 303 300 MODULE_DESCRIPTION("MC support for PA Semi PWRficient memory controller"); 301 + module_param(edac_op_state, int, 0444); 302 + MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI"); 303 +
+7
drivers/edac/r82600_edac.c
··· 20 20 #include <linux/pci.h> 21 21 #include <linux/pci_ids.h> 22 22 #include <linux/slab.h> 23 + #include <linux/edac.h> 23 24 #include "edac_core.h" 24 25 25 26 #define R82600_REVISION " Ver: 2.0.2 " __DATE__ ··· 394 393 395 394 static int __init r82600_init(void) 396 395 { 396 + /* Ensure that the OPSTATE is set correctly for POLL or NMI */ 397 + opstate_init(); 398 + 397 399 return pci_register_driver(&r82600_driver); 398 400 } 399 401 ··· 416 412 module_param(disable_hardware_scrub, bool, 0644); 417 413 MODULE_PARM_DESC(disable_hardware_scrub, 418 414 "If set, disable the chipset's automatic scrub for CEs"); 415 + 416 + module_param(edac_op_state, int, 0444); 417 + MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI");
+13 -1
include/linux/edac.h
··· 3 3 * 4 4 * Author: Dave Jiang <djiang@mvista.com> 5 5 * 6 - * 2006-2007 (c) MontaVista Software, Inc. This file is licensed under 6 + * 2006-2008 (c) MontaVista Software, Inc. This file is licensed under 7 7 * the terms of the GNU General Public License version 2. This program 8 8 * is licensed "as is" without any warranty of any kind, whether express 9 9 * or implied. ··· 25 25 26 26 extern int edac_handler_set(void); 27 27 extern void edac_atomic_assert_error(void); 28 + 29 + static inline void opstate_init(void) 30 + { 31 + switch (edac_op_state) { 32 + case EDAC_OPSTATE_POLL: 33 + case EDAC_OPSTATE_NMI: 34 + break; 35 + default: 36 + edac_op_state = EDAC_OPSTATE_POLL; 37 + } 38 + return; 39 + } 28 40 29 41 #endif