Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

PM / devfreq: sun8i-a33-mbus: Simplify by using more devm functions

Use devm allocators for enabling the bus clock and
clk_rate_exclusive_get(). This simplifies error handling and the remove
callback.

Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Tested-by: Corentin LABBE <clabbe.montjoie@gmail.com>
Link: https://patchwork.kernel.org/project/linux-pm/patch/20250513203908.205060-2-u.kleine-koenig@baylibre.com/
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>

authored by

Uwe Kleine-König and committed by
Chanwoo Choi
c3bc3613 78c5845f

+9 -29
+9 -29
drivers/devfreq/sun8i-a33-mbus.c
··· 360 360 if (IS_ERR(priv->reg_mbus)) 361 361 return PTR_ERR(priv->reg_mbus); 362 362 363 - priv->clk_bus = devm_clk_get(dev, "bus"); 363 + priv->clk_bus = devm_clk_get_enabled(dev, "bus"); 364 364 if (IS_ERR(priv->clk_bus)) 365 365 return dev_err_probe(dev, PTR_ERR(priv->clk_bus), 366 366 "failed to get bus clock\n"); ··· 375 375 return dev_err_probe(dev, PTR_ERR(priv->clk_mbus), 376 376 "failed to get mbus clock\n"); 377 377 378 - ret = clk_prepare_enable(priv->clk_bus); 379 - if (ret) 380 - return dev_err_probe(dev, ret, 381 - "failed to enable bus clock\n"); 382 - 383 378 /* Lock the DRAM clock rate to keep priv->nominal_bw in sync. */ 384 - ret = clk_rate_exclusive_get(priv->clk_dram); 385 - if (ret) { 386 - err = "failed to lock dram clock rate\n"; 387 - goto err_disable_bus; 388 - } 379 + ret = devm_clk_rate_exclusive_get(dev, priv->clk_dram); 380 + if (ret) 381 + return dev_err_probe(dev, ret, "failed to lock dram clock rate\n"); 389 382 390 383 /* Lock the MBUS clock rate to keep MBUS_TMR_PERIOD in sync. */ 391 - ret = clk_rate_exclusive_get(priv->clk_mbus); 392 - if (ret) { 393 - err = "failed to lock mbus clock rate\n"; 394 - goto err_unlock_dram; 395 - } 384 + ret = devm_clk_rate_exclusive_get(dev, priv->clk_mbus); 385 + if (ret) 386 + return dev_err_probe(dev, ret, "failed to lock mbus clock rate\n"); 396 387 397 388 priv->gov_data.upthreshold = 10; 398 389 priv->gov_data.downdifferential = 5; ··· 396 405 priv->profile.max_state = max_state; 397 406 398 407 ret = devm_pm_opp_set_clkname(dev, "dram"); 399 - if (ret) { 400 - err = "failed to add OPP table\n"; 401 - goto err_unlock_mbus; 402 - } 408 + if (ret) 409 + return dev_err_probe(dev, ret, "failed to add OPP table\n"); 403 410 404 411 base_freq = clk_get_rate(clk_get_parent(priv->clk_dram)); 405 412 for (i = 0; i < max_state; ++i) { ··· 437 448 438 449 err_remove_opps: 439 450 dev_pm_opp_remove_all_dynamic(dev); 440 - err_unlock_mbus: 441 - clk_rate_exclusive_put(priv->clk_mbus); 442 - err_unlock_dram: 443 - clk_rate_exclusive_put(priv->clk_dram); 444 - err_disable_bus: 445 - clk_disable_unprepare(priv->clk_bus); 446 451 447 452 return dev_err_probe(dev, ret, err); 448 453 } ··· 455 472 dev_warn(dev, "failed to restore DRAM frequency: %d\n", ret); 456 473 457 474 dev_pm_opp_remove_all_dynamic(dev); 458 - clk_rate_exclusive_put(priv->clk_mbus); 459 - clk_rate_exclusive_put(priv->clk_dram); 460 - clk_disable_unprepare(priv->clk_bus); 461 475 } 462 476 463 477 static const struct sun8i_a33_mbus_variant sun50i_a64_mbus = {