Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'rtc-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux

Pull RTC updates from Alexandre Belloni:
"Core:
- fix module reference count in rtc-proc
- Replace simple_strtoul by kstrtoul

New driver:
- Epson RX8010SJ

Subsystem wide cleanups:
- use %ph for short hex dumps
- constify *_chip_ops structures

Drivers:
- abx80x: Microcrystal rv1805 support, alarm support
- cmos: prevent kernel warning on IRQ flags mismatch
- s5m: various cleanups
- rv8803: rx8900 compatibility, small error path fix
- sunxi: various cleanups
- lpc32xx: remove irq > NR_IRQS check from probe()
- imxdi: fix spelling mistake in warning message
- ds1685: don't try to micromanage sysfs output size
- da9063: avoid writing undefined data to rtc
- gemini: Remove unnecessary platform_set_drvdata()
- efi: add efi_procfs in efi_rtc_ops
- pcf8523: refuse to write dates later than 2099"

* tag 'rtc-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux: (24 commits)
rtc: cmos: prevent kernel warning on IRQ flags mismatch
rtc: rtc-ds2404: constify ds2404_chip_ops structures
rtc: s5m: Make register configuration per S2MPS device to remove exceptions
rtc: s5m: Add separate field for storing auto-cleared mask in register config
rtc: s5m: Cleanup by removing useless 'rtc' prefix from fields
rtc: Replace simple_strtoul by kstrtoul
rtc: abx80x: add alarm support
rtc: abx80x: Add Microcrystal rv1805 support
rtc: v3020: constify v3020_chip_ops structures
rtc: rv8803: Extend compatibility with the rx8900
rtc: rv8803: fix handling return value of i2c_smbus_read_byte_data
rtc: Add Epson RX8010SJ RTC driver
rtc: lpc32xx: remove irq > NR_IRQS check from probe()
rtc: imxdi: fix spelling mistake in warning message
rtc: ds1685: don't try to micromanage sysfs output size
rtc: use %ph for short hex dumps
rtc: da9063: avoid writing undefined data to rtc
rtc: sunxi: use of_device_get_match_data
rtc: sunxi: constify the data_year_param structure
rtc: sunxi: fix signedness issues
...

+896 -132
+10
drivers/rtc/Kconfig
··· 558 558 This driver can also be built as a module. If so the module 559 559 will be called rtc-fm3130. 560 560 561 + config RTC_DRV_RX8010 562 + tristate "Epson RX8010SJ" 563 + depends on I2C 564 + help 565 + If you say yes here you get support for the Epson RX8010SJ RTC 566 + chip. 567 + 568 + This driver can also be built as a module. If so, the module 569 + will be called rtc-rx8010. 570 + 561 571 config RTC_DRV_RX8581 562 572 tristate "Epson RX-8581" 563 573 help
+1
drivers/rtc/Makefile
··· 128 128 obj-$(CONFIG_RTC_DRV_RV3029C2) += rtc-rv3029c2.o 129 129 obj-$(CONFIG_RTC_DRV_RV8803) += rtc-rv8803.o 130 130 obj-$(CONFIG_RTC_DRV_RX4581) += rtc-rx4581.o 131 + obj-$(CONFIG_RTC_DRV_RX8010) += rtc-rx8010.o 131 132 obj-$(CONFIG_RTC_DRV_RX8025) += rtc-rx8025.o 132 133 obj-$(CONFIG_RTC_DRV_RX8581) += rtc-rx8581.o 133 134 obj-$(CONFIG_RTC_DRV_S35390A) += rtc-s35390a.o
+142 -4
drivers/rtc/rtc-abx80x.c
··· 27 27 #define ABX8XX_REG_YR 0x06 28 28 #define ABX8XX_REG_WD 0x07 29 29 30 + #define ABX8XX_REG_AHTH 0x08 31 + #define ABX8XX_REG_ASC 0x09 32 + #define ABX8XX_REG_AMN 0x0a 33 + #define ABX8XX_REG_AHR 0x0b 34 + #define ABX8XX_REG_ADA 0x0c 35 + #define ABX8XX_REG_AMO 0x0d 36 + #define ABX8XX_REG_AWD 0x0e 37 + 38 + #define ABX8XX_REG_STATUS 0x0f 39 + #define ABX8XX_STATUS_AF BIT(2) 40 + 30 41 #define ABX8XX_REG_CTRL1 0x10 31 42 #define ABX8XX_CTRL_WRITE BIT(0) 43 + #define ABX8XX_CTRL_ARST BIT(2) 32 44 #define ABX8XX_CTRL_12_24 BIT(6) 45 + 46 + #define ABX8XX_REG_IRQ 0x12 47 + #define ABX8XX_IRQ_AIE BIT(2) 48 + #define ABX8XX_IRQ_IM_1_4 (0x3 << 5) 49 + 50 + #define ABX8XX_REG_CD_TIMER_CTL 0x18 33 51 34 52 #define ABX8XX_REG_CFG_KEY 0x1f 35 53 #define ABX8XX_CFG_KEY_MISC 0x9d ··· 80 62 [AB1805] = {.pn = 0x1805, .has_tc = true}, 81 63 [ABX80X] = {.pn = 0} 82 64 }; 83 - 84 - static struct i2c_driver abx80x_driver; 85 65 86 66 static int abx80x_enable_trickle_charger(struct i2c_client *client, 87 67 u8 trickle_cfg) ··· 164 148 return 0; 165 149 } 166 150 151 + static irqreturn_t abx80x_handle_irq(int irq, void *dev_id) 152 + { 153 + struct i2c_client *client = dev_id; 154 + struct rtc_device *rtc = i2c_get_clientdata(client); 155 + int status; 156 + 157 + status = i2c_smbus_read_byte_data(client, ABX8XX_REG_STATUS); 158 + if (status < 0) 159 + return IRQ_NONE; 160 + 161 + if (status & ABX8XX_STATUS_AF) 162 + rtc_update_irq(rtc, 1, RTC_AF | RTC_IRQF); 163 + 164 + i2c_smbus_write_byte_data(client, ABX8XX_REG_STATUS, 0); 165 + 166 + return IRQ_HANDLED; 167 + } 168 + 169 + static int abx80x_read_alarm(struct device *dev, struct rtc_wkalrm *t) 170 + { 171 + struct i2c_client *client = to_i2c_client(dev); 172 + unsigned char buf[7]; 173 + 174 + int irq_mask, err; 175 + 176 + if (client->irq <= 0) 177 + return -EINVAL; 178 + 179 + err = i2c_smbus_read_i2c_block_data(client, ABX8XX_REG_ASC, 180 + sizeof(buf), buf); 181 + if (err) 182 + return err; 183 + 184 + irq_mask = i2c_smbus_read_byte_data(client, ABX8XX_REG_IRQ); 185 + if (irq_mask < 0) 186 + return irq_mask; 187 + 188 + t->time.tm_sec = bcd2bin(buf[0] & 0x7F); 189 + t->time.tm_min = bcd2bin(buf[1] & 0x7F); 190 + t->time.tm_hour = bcd2bin(buf[2] & 0x3F); 191 + t->time.tm_mday = bcd2bin(buf[3] & 0x3F); 192 + t->time.tm_mon = bcd2bin(buf[4] & 0x1F) - 1; 193 + t->time.tm_wday = buf[5] & 0x7; 194 + 195 + t->enabled = !!(irq_mask & ABX8XX_IRQ_AIE); 196 + t->pending = (buf[6] & ABX8XX_STATUS_AF) && t->enabled; 197 + 198 + return err; 199 + } 200 + 201 + static int abx80x_set_alarm(struct device *dev, struct rtc_wkalrm *t) 202 + { 203 + struct i2c_client *client = to_i2c_client(dev); 204 + u8 alarm[6]; 205 + int err; 206 + 207 + if (client->irq <= 0) 208 + return -EINVAL; 209 + 210 + alarm[0] = 0x0; 211 + alarm[1] = bin2bcd(t->time.tm_sec); 212 + alarm[2] = bin2bcd(t->time.tm_min); 213 + alarm[3] = bin2bcd(t->time.tm_hour); 214 + alarm[4] = bin2bcd(t->time.tm_mday); 215 + alarm[5] = bin2bcd(t->time.tm_mon + 1); 216 + 217 + err = i2c_smbus_write_i2c_block_data(client, ABX8XX_REG_AHTH, 218 + sizeof(alarm), alarm); 219 + if (err < 0) { 220 + dev_err(&client->dev, "Unable to write alarm registers\n"); 221 + return -EIO; 222 + } 223 + 224 + if (t->enabled) { 225 + err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ, 226 + (ABX8XX_IRQ_IM_1_4 | 227 + ABX8XX_IRQ_AIE)); 228 + if (err) 229 + return err; 230 + } 231 + 232 + return 0; 233 + } 234 + 235 + static int abx80x_alarm_irq_enable(struct device *dev, unsigned int enabled) 236 + { 237 + struct i2c_client *client = to_i2c_client(dev); 238 + int err; 239 + 240 + if (enabled) 241 + err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ, 242 + (ABX8XX_IRQ_IM_1_4 | 243 + ABX8XX_IRQ_AIE)); 244 + else 245 + err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ, 246 + ABX8XX_IRQ_IM_1_4); 247 + return err; 248 + } 249 + 167 250 static const struct rtc_class_ops abx80x_rtc_ops = { 168 251 .read_time = abx80x_rtc_read_time, 169 252 .set_time = abx80x_rtc_set_time, 253 + .read_alarm = abx80x_read_alarm, 254 + .set_alarm = abx80x_set_alarm, 255 + .alarm_irq_enable = abx80x_alarm_irq_enable, 170 256 }; 171 257 172 258 static int abx80x_dt_trickle_cfg(struct device_node *np) ··· 343 225 } 344 226 345 227 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CTRL1, 346 - ((data & ~ABX8XX_CTRL_12_24) | 228 + ((data & ~(ABX8XX_CTRL_12_24 | 229 + ABX8XX_CTRL_ARST)) | 347 230 ABX8XX_CTRL_WRITE)); 348 231 if (err < 0) { 349 232 dev_err(&client->dev, "Unable to write control register\n"); ··· 379 260 abx80x_enable_trickle_charger(client, trickle_cfg); 380 261 } 381 262 382 - rtc = devm_rtc_device_register(&client->dev, abx80x_driver.driver.name, 263 + err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CD_TIMER_CTL, 264 + BIT(2)); 265 + if (err) 266 + return err; 267 + 268 + rtc = devm_rtc_device_register(&client->dev, "abx8xx", 383 269 &abx80x_rtc_ops, THIS_MODULE); 384 270 385 271 if (IS_ERR(rtc)) 386 272 return PTR_ERR(rtc); 387 273 388 274 i2c_set_clientdata(client, rtc); 275 + 276 + if (client->irq > 0) { 277 + dev_info(&client->dev, "IRQ %d supplied\n", client->irq); 278 + err = devm_request_threaded_irq(&client->dev, client->irq, NULL, 279 + abx80x_handle_irq, 280 + IRQF_SHARED | IRQF_ONESHOT, 281 + "abx8xx", 282 + client); 283 + if (err) { 284 + dev_err(&client->dev, "unable to request IRQ, alarms disabled\n"); 285 + client->irq = 0; 286 + } 287 + } 389 288 390 289 return 0; 391 290 } ··· 423 286 { "ab1803", AB1803 }, 424 287 { "ab1804", AB1804 }, 425 288 { "ab1805", AB1805 }, 289 + { "rv1805", AB1805 }, 426 290 { } 427 291 }; 428 292 MODULE_DEVICE_TABLE(i2c, abx80x_id);
+1 -1
drivers/rtc/rtc-cmos.c
··· 725 725 rtc_cmos_int_handler = cmos_interrupt; 726 726 727 727 retval = request_irq(rtc_irq, rtc_cmos_int_handler, 728 - 0, dev_name(&cmos_rtc.rtc->dev), 728 + IRQF_SHARED, dev_name(&cmos_rtc.rtc->dev), 729 729 cmos_rtc.rtc); 730 730 if (retval < 0) { 731 731 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
+6 -17
drivers/rtc/rtc-da9063.c
··· 191 191 { 192 192 const struct da9063_compatible_rtc_regmap *config = rtc->config; 193 193 194 - data[RTC_SEC] &= ~config->rtc_count_sec_mask; 195 - data[RTC_SEC] |= tm->tm_sec & config->rtc_count_sec_mask; 196 - 197 - data[RTC_MIN] &= ~config->rtc_count_min_mask; 198 - data[RTC_MIN] |= tm->tm_min & config->rtc_count_min_mask; 199 - 200 - data[RTC_HOUR] &= ~config->rtc_count_hour_mask; 201 - data[RTC_HOUR] |= tm->tm_hour & config->rtc_count_hour_mask; 202 - 203 - data[RTC_DAY] &= ~config->rtc_count_day_mask; 204 - data[RTC_DAY] |= tm->tm_mday & config->rtc_count_day_mask; 205 - 206 - data[RTC_MONTH] &= ~config->rtc_count_month_mask; 207 - data[RTC_MONTH] |= MONTHS_TO_DA9063(tm->tm_mon) & 194 + data[RTC_SEC] = tm->tm_sec & config->rtc_count_sec_mask; 195 + data[RTC_MIN] = tm->tm_min & config->rtc_count_min_mask; 196 + data[RTC_HOUR] = tm->tm_hour & config->rtc_count_hour_mask; 197 + data[RTC_DAY] = tm->tm_mday & config->rtc_count_day_mask; 198 + data[RTC_MONTH] = MONTHS_TO_DA9063(tm->tm_mon) & 208 199 config->rtc_count_month_mask; 209 - 210 - data[RTC_YEAR] &= ~config->rtc_count_year_mask; 211 - data[RTC_YEAR] |= YEARS_TO_DA9063(tm->tm_year) & 200 + data[RTC_YEAR] = YEARS_TO_DA9063(tm->tm_year) & 212 201 config->rtc_count_year_mask; 213 202 } 214 203
+2 -6
drivers/rtc/rtc-ds1305.c
··· 186 186 if (status < 0) 187 187 return status; 188 188 189 - dev_vdbg(dev, "%s: %02x %02x %02x, %02x %02x %02x %02x\n", 190 - "read", buf[0], buf[1], buf[2], buf[3], 191 - buf[4], buf[5], buf[6]); 189 + dev_vdbg(dev, "%s: %3ph, %4ph\n", "read", &buf[0], &buf[3]); 192 190 193 191 /* Decode the registers */ 194 192 time->tm_sec = bcd2bin(buf[DS1305_SEC]); ··· 230 232 *bp++ = bin2bcd(time->tm_mon + 1); 231 233 *bp++ = bin2bcd(time->tm_year - 100); 232 234 233 - dev_dbg(dev, "%s: %02x %02x %02x, %02x %02x %02x %02x\n", 234 - "write", buf[1], buf[2], buf[3], 235 - buf[4], buf[5], buf[6], buf[7]); 235 + dev_dbg(dev, "%s: %3ph, %4ph\n", "write", &buf[1], &buf[4]); 236 236 237 237 /* use write-then-read since dma from stack is nonportable */ 238 238 return spi_write_then_read(ds1305->spi, buf, sizeof(buf),
+4 -13
drivers/rtc/rtc-ds1307.c
··· 460 460 return -EIO; 461 461 } 462 462 463 - dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n", 464 - "alarm read", 465 - ds1307->regs[0], ds1307->regs[1], 466 - ds1307->regs[2], ds1307->regs[3], 467 - ds1307->regs[4], ds1307->regs[5], 468 - ds1307->regs[6], ds1307->regs[7], 469 - ds1307->regs[8]); 463 + dev_dbg(dev, "%s: %4ph, %3ph, %2ph\n", "alarm read", 464 + &ds1307->regs[0], &ds1307->regs[4], &ds1307->regs[7]); 470 465 471 466 /* 472 467 * report alarm time (ALARM1); assume 24 hour and day-of-month modes, ··· 517 522 control = ds1307->regs[7]; 518 523 status = ds1307->regs[8]; 519 524 520 - dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n", 521 - "alarm set (old status)", 522 - ds1307->regs[0], ds1307->regs[1], 523 - ds1307->regs[2], ds1307->regs[3], 524 - ds1307->regs[4], ds1307->regs[5], 525 - ds1307->regs[6], control, status); 525 + dev_dbg(dev, "%s: %4ph, %3ph, %02x %02x\n", "alarm set (old status)", 526 + &ds1307->regs[0], &ds1307->regs[4], control, status); 526 527 527 528 /* set ALARM1, using 24 hour and day-of-month modes */ 528 529 buf[0] = bin2bcd(t->time.tm_sec);
+9 -13
drivers/rtc/rtc-ds1685.c
··· 853 853 "Periodic Rate\t: %s\n" 854 854 "SQW Freq\t: %s\n" 855 855 #ifdef CONFIG_RTC_DS1685_PROC_REGS 856 - "Serial #\t: %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x\n" 856 + "Serial #\t: %8phC\n" 857 857 "Register Status\t:\n" 858 858 " Ctrl A\t: UIP DV2 DV1 DV0 RS3 RS2 RS1 RS0\n" 859 859 "\t\t: %s\n" ··· 872 872 " Ctrl 4B\t: ABE E32k CS RCE PRS RIE WIE KSE\n" 873 873 "\t\t: %s\n", 874 874 #else 875 - "Serial #\t: %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x\n", 875 + "Serial #\t: %8phC\n", 876 876 #endif 877 877 model, 878 878 ((ctrla & RTC_CTRL_A_DV1) ? "enabled" : "disabled"), ··· 888 888 (!((ctrl4b & RTC_CTRL_4B_E32K)) ? 889 889 ds1685_rtc_sqw_freq[(ctrla & RTC_CTRL_A_RS_MASK)] : "32768Hz"), 890 890 #ifdef CONFIG_RTC_DS1685_PROC_REGS 891 - ssn[0], ssn[1], ssn[2], ssn[3], ssn[4], ssn[5], ssn[6], ssn[7], 891 + ssn, 892 892 ds1685_rtc_print_regs(ctrla, bits[0]), 893 893 ds1685_rtc_print_regs(ctrlb, bits[1]), 894 894 ds1685_rtc_print_regs(ctrlc, bits[2]), ··· 896 896 ds1685_rtc_print_regs(ctrl4a, bits[4]), 897 897 ds1685_rtc_print_regs(ctrl4b, bits[5])); 898 898 #else 899 - ssn[0], ssn[1], ssn[2], ssn[3], ssn[4], ssn[5], ssn[6], ssn[7]); 899 + ssn); 900 900 #endif 901 901 return 0; 902 902 } ··· 1114 1114 1115 1115 ctrld = rtc->read(rtc, RTC_CTRL_D); 1116 1116 1117 - return snprintf(buf, 13, "%s\n", 1117 + return sprintf(buf, "%s\n", 1118 1118 (ctrld & RTC_CTRL_D_VRT) ? "ok" : "not ok or N/A"); 1119 1119 } 1120 1120 static DEVICE_ATTR(battery, S_IRUGO, ds1685_rtc_sysfs_battery_show, NULL); ··· 1137 1137 ctrl4a = rtc->read(rtc, RTC_EXT_CTRL_4A); 1138 1138 ds1685_rtc_switch_to_bank0(rtc); 1139 1139 1140 - return snprintf(buf, 13, "%s\n", 1140 + return sprintf(buf, "%s\n", 1141 1141 (ctrl4a & RTC_CTRL_4A_VRT2) ? "ok" : "not ok or N/A"); 1142 1142 } 1143 1143 static DEVICE_ATTR(auxbatt, S_IRUGO, ds1685_rtc_sysfs_auxbatt_show, NULL); ··· 1160 1160 ds1685_rtc_get_ssn(rtc, ssn); 1161 1161 ds1685_rtc_switch_to_bank0(rtc); 1162 1162 1163 - return snprintf(buf, 24, "%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x\n", 1164 - ssn[0], ssn[1], ssn[2], ssn[3], ssn[4], ssn[5], 1165 - ssn[6], ssn[7]); 1166 - 1167 - return 0; 1163 + return sprintf(buf, "%8phC\n", ssn); 1168 1164 } 1169 1165 static DEVICE_ATTR(serial, S_IRUGO, ds1685_rtc_sysfs_serial_show, NULL); 1170 1166 ··· 1283 1287 tmp = rtc->read(rtc, reg_info->reg) & reg_info->bit; 1284 1288 ds1685_rtc_switch_to_bank0(rtc); 1285 1289 1286 - return snprintf(buf, 2, "%d\n", (tmp ? 1 : 0)); 1290 + return sprintf(buf, "%d\n", (tmp ? 1 : 0)); 1287 1291 } 1288 1292 1289 1293 /** ··· 1619 1623 tmp = ds1685_rtc_bcd2bin(rtc, tmp, bcd_reg_info->mask, 1620 1624 bin_reg_info->mask); 1621 1625 1622 - return snprintf(buf, 4, "%d\n", tmp); 1626 + return sprintf(buf, "%d\n", tmp); 1623 1627 } 1624 1628 1625 1629 /**
+2 -2
drivers/rtc/rtc-ds2404.c
··· 48 48 49 49 struct ds2404 { 50 50 struct ds2404_gpio *gpio; 51 - struct ds2404_chip_ops *ops; 51 + const struct ds2404_chip_ops *ops; 52 52 struct rtc_device *rtc; 53 53 }; 54 54 ··· 95 95 gpio_free(ds2404_gpio[i].gpio); 96 96 } 97 97 98 - static struct ds2404_chip_ops ds2404_gpio_ops = { 98 + static const struct ds2404_chip_ops ds2404_gpio_ops = { 99 99 .map_io = ds2404_gpio_map, 100 100 .unmap_io = ds2404_gpio_unmap, 101 101 };
+62 -4
drivers/rtc/rtc-efi.c
··· 191 191 return status == EFI_SUCCESS ? 0 : -EINVAL; 192 192 } 193 193 194 + static int efi_procfs(struct device *dev, struct seq_file *seq) 195 + { 196 + efi_time_t eft, alm; 197 + efi_time_cap_t cap; 198 + efi_bool_t enabled, pending; 199 + 200 + memset(&eft, 0, sizeof(eft)); 201 + memset(&alm, 0, sizeof(alm)); 202 + memset(&cap, 0, sizeof(cap)); 203 + 204 + efi.get_time(&eft, &cap); 205 + efi.get_wakeup_time(&enabled, &pending, &alm); 206 + 207 + seq_printf(seq, 208 + "Time\t\t: %u:%u:%u.%09u\n" 209 + "Date\t\t: %u-%u-%u\n" 210 + "Daylight\t: %u\n", 211 + eft.hour, eft.minute, eft.second, eft.nanosecond, 212 + eft.year, eft.month, eft.day, 213 + eft.daylight); 214 + 215 + if (eft.timezone == EFI_UNSPECIFIED_TIMEZONE) 216 + seq_puts(seq, "Timezone\t: unspecified\n"); 217 + else 218 + /* XXX fixme: convert to string? */ 219 + seq_printf(seq, "Timezone\t: %u\n", eft.timezone); 220 + 221 + seq_printf(seq, 222 + "Alarm Time\t: %u:%u:%u.%09u\n" 223 + "Alarm Date\t: %u-%u-%u\n" 224 + "Alarm Daylight\t: %u\n" 225 + "Enabled\t\t: %s\n" 226 + "Pending\t\t: %s\n", 227 + alm.hour, alm.minute, alm.second, alm.nanosecond, 228 + alm.year, alm.month, alm.day, 229 + alm.daylight, 230 + enabled == 1 ? "yes" : "no", 231 + pending == 1 ? "yes" : "no"); 232 + 233 + if (eft.timezone == EFI_UNSPECIFIED_TIMEZONE) 234 + seq_puts(seq, "Timezone\t: unspecified\n"); 235 + else 236 + /* XXX fixme: convert to string? */ 237 + seq_printf(seq, "Timezone\t: %u\n", alm.timezone); 238 + 239 + /* 240 + * now prints the capabilities 241 + */ 242 + seq_printf(seq, 243 + "Resolution\t: %u\n" 244 + "Accuracy\t: %u\n" 245 + "SetstoZero\t: %u\n", 246 + cap.resolution, cap.accuracy, cap.sets_to_zero); 247 + 248 + return 0; 249 + } 250 + 194 251 static const struct rtc_class_ops efi_rtc_ops = { 195 - .read_time = efi_read_time, 196 - .set_time = efi_set_time, 197 - .read_alarm = efi_read_alarm, 198 - .set_alarm = efi_set_alarm, 252 + .read_time = efi_read_time, 253 + .set_time = efi_set_time, 254 + .read_alarm = efi_read_alarm, 255 + .set_alarm = efi_set_alarm, 256 + .proc = efi_procfs, 199 257 }; 200 258 201 259 static int __init efi_rtc_probe(struct platform_device *dev)
-1
drivers/rtc/rtc-gemini.c
··· 156 156 struct gemini_rtc *rtc = platform_get_drvdata(pdev); 157 157 158 158 rtc_device_unregister(rtc->rtc_dev); 159 - platform_set_drvdata(pdev, NULL); 160 159 161 160 return 0; 162 161 }
+1 -1
drivers/rtc/rtc-imxdi.c
··· 303 303 sec = readl(imxdi->ioaddr + DTCMR); 304 304 if (sec != 0) 305 305 dev_warn(&imxdi->pdev->dev, 306 - "The security violation has happend at %u seconds\n", 306 + "The security violation has happened at %u seconds\n", 307 307 sec); 308 308 /* 309 309 * the timer cannot be set/modified if
+1 -1
drivers/rtc/rtc-lpc32xx.c
··· 205 205 u32 tmp; 206 206 207 207 rtcirq = platform_get_irq(pdev, 0); 208 - if (rtcirq < 0 || rtcirq >= NR_IRQS) { 208 + if (rtcirq < 0) { 209 209 dev_warn(&pdev->dev, "Can't get interrupt resource\n"); 210 210 rtcirq = -1; 211 211 }
+11
drivers/rtc/rtc-pcf8523.c
··· 219 219 u8 regs[8]; 220 220 int err; 221 221 222 + /* 223 + * The hardware can only store values between 0 and 99 in it's YEAR 224 + * register (with 99 overflowing to 0 on increment). 225 + * After 2100-02-28 we could start interpreting the year to be in the 226 + * interval [2100, 2199], but there is no path to switch in a smooth way 227 + * because the chip handles YEAR=0x00 (and the out-of-spec 228 + * YEAR=0xa0) as a leap year, but 2100 isn't. 229 + */ 230 + if (tm->tm_year < 100 || tm->tm_year >= 200) 231 + return -EINVAL; 232 + 222 233 err = pcf8523_stop_rtc(client); 223 234 if (err < 0) 224 235 return err;
+5 -3
drivers/rtc/rtc-proc.c
··· 112 112 int ret; 113 113 struct rtc_device *rtc = PDE_DATA(inode); 114 114 115 - if (!try_module_get(THIS_MODULE)) 115 + if (!try_module_get(rtc->owner)) 116 116 return -ENODEV; 117 117 118 118 ret = single_open(file, rtc_proc_show, rtc); 119 119 if (ret) 120 - module_put(THIS_MODULE); 120 + module_put(rtc->owner); 121 121 return ret; 122 122 } 123 123 124 124 static int rtc_proc_release(struct inode *inode, struct file *file) 125 125 { 126 126 int res = single_release(inode, file); 127 - module_put(THIS_MODULE); 127 + struct rtc_device *rtc = PDE_DATA(inode); 128 + 129 + module_put(rtc->owner); 128 130 return res; 129 131 } 130 132
+2 -1
drivers/rtc/rtc-rv8803.c
··· 61 61 struct i2c_client *client = dev_id; 62 62 struct rv8803_data *rv8803 = i2c_get_clientdata(client); 63 63 unsigned long events = 0; 64 - u8 flags; 64 + int flags; 65 65 66 66 spin_lock(&rv8803->flags_lock); 67 67 ··· 502 502 503 503 static const struct i2c_device_id rv8803_id[] = { 504 504 { "rv8803", 0 }, 505 + { "rx8900", 0 }, 505 506 { } 506 507 }; 507 508 MODULE_DEVICE_TABLE(i2c, rv8803_id);
+523
drivers/rtc/rtc-rx8010.c
··· 1 + /* 2 + * Driver for the Epson RTC module RX-8010 SJ 3 + * 4 + * Copyright(C) Timesys Corporation 2015 5 + * Copyright(C) General Electric Company 2015 6 + * 7 + * This program is free software; you can redistribute it and/or modify 8 + * it under the terms of the GNU General Public License version 2 as 9 + * published by the Free Software Foundation. 10 + * 11 + */ 12 + 13 + #include <linux/bcd.h> 14 + #include <linux/bitops.h> 15 + #include <linux/i2c.h> 16 + #include <linux/kernel.h> 17 + #include <linux/module.h> 18 + #include <linux/rtc.h> 19 + 20 + #define RX8010_SEC 0x10 21 + #define RX8010_MIN 0x11 22 + #define RX8010_HOUR 0x12 23 + #define RX8010_WDAY 0x13 24 + #define RX8010_MDAY 0x14 25 + #define RX8010_MONTH 0x15 26 + #define RX8010_YEAR 0x16 27 + #define RX8010_YEAR 0x16 28 + #define RX8010_RESV17 0x17 29 + #define RX8010_ALMIN 0x18 30 + #define RX8010_ALHOUR 0x19 31 + #define RX8010_ALWDAY 0x1A 32 + #define RX8010_TCOUNT0 0x1B 33 + #define RX8010_TCOUNT1 0x1C 34 + #define RX8010_EXT 0x1D 35 + #define RX8010_FLAG 0x1E 36 + #define RX8010_CTRL 0x1F 37 + /* 0x20 to 0x2F are user registers */ 38 + #define RX8010_RESV30 0x30 39 + #define RX8010_RESV31 0x32 40 + #define RX8010_IRQ 0x32 41 + 42 + #define RX8010_EXT_WADA BIT(3) 43 + 44 + #define RX8010_FLAG_VLF BIT(1) 45 + #define RX8010_FLAG_AF BIT(3) 46 + #define RX8010_FLAG_TF BIT(4) 47 + #define RX8010_FLAG_UF BIT(5) 48 + 49 + #define RX8010_CTRL_AIE BIT(3) 50 + #define RX8010_CTRL_UIE BIT(5) 51 + #define RX8010_CTRL_STOP BIT(6) 52 + #define RX8010_CTRL_TEST BIT(7) 53 + 54 + #define RX8010_ALARM_AE BIT(7) 55 + 56 + static const struct i2c_device_id rx8010_id[] = { 57 + { "rx8010", 0 }, 58 + { } 59 + }; 60 + MODULE_DEVICE_TABLE(i2c, rx8010_id); 61 + 62 + struct rx8010_data { 63 + struct i2c_client *client; 64 + struct rtc_device *rtc; 65 + u8 ctrlreg; 66 + spinlock_t flags_lock; 67 + }; 68 + 69 + static irqreturn_t rx8010_irq_1_handler(int irq, void *dev_id) 70 + { 71 + struct i2c_client *client = dev_id; 72 + struct rx8010_data *rx8010 = i2c_get_clientdata(client); 73 + int flagreg; 74 + 75 + spin_lock(&rx8010->flags_lock); 76 + 77 + flagreg = i2c_smbus_read_byte_data(client, RX8010_FLAG); 78 + 79 + if (flagreg <= 0) { 80 + spin_unlock(&rx8010->flags_lock); 81 + return IRQ_NONE; 82 + } 83 + 84 + if (flagreg & RX8010_FLAG_VLF) 85 + dev_warn(&client->dev, "Frequency stop detected\n"); 86 + 87 + if (flagreg & RX8010_FLAG_TF) { 88 + flagreg &= ~RX8010_FLAG_TF; 89 + rtc_update_irq(rx8010->rtc, 1, RTC_PF | RTC_IRQF); 90 + } 91 + 92 + if (flagreg & RX8010_FLAG_AF) { 93 + flagreg &= ~RX8010_FLAG_AF; 94 + rtc_update_irq(rx8010->rtc, 1, RTC_AF | RTC_IRQF); 95 + } 96 + 97 + if (flagreg & RX8010_FLAG_UF) { 98 + flagreg &= ~RX8010_FLAG_UF; 99 + rtc_update_irq(rx8010->rtc, 1, RTC_UF | RTC_IRQF); 100 + } 101 + 102 + i2c_smbus_write_byte_data(client, RX8010_FLAG, flagreg); 103 + 104 + spin_unlock(&rx8010->flags_lock); 105 + return IRQ_HANDLED; 106 + } 107 + 108 + static int rx8010_get_time(struct device *dev, struct rtc_time *dt) 109 + { 110 + struct rx8010_data *rx8010 = dev_get_drvdata(dev); 111 + u8 date[7]; 112 + int flagreg; 113 + int err; 114 + 115 + flagreg = i2c_smbus_read_byte_data(rx8010->client, RX8010_FLAG); 116 + if (flagreg < 0) 117 + return flagreg; 118 + 119 + if (flagreg & RX8010_FLAG_VLF) { 120 + dev_warn(dev, "Frequency stop detected\n"); 121 + return -EINVAL; 122 + } 123 + 124 + err = i2c_smbus_read_i2c_block_data(rx8010->client, RX8010_SEC, 125 + 7, date); 126 + if (err != 7) 127 + return err < 0 ? err : -EIO; 128 + 129 + dt->tm_sec = bcd2bin(date[RX8010_SEC - RX8010_SEC] & 0x7f); 130 + dt->tm_min = bcd2bin(date[RX8010_MIN - RX8010_SEC] & 0x7f); 131 + dt->tm_hour = bcd2bin(date[RX8010_HOUR - RX8010_SEC] & 0x3f); 132 + dt->tm_mday = bcd2bin(date[RX8010_MDAY - RX8010_SEC] & 0x3f); 133 + dt->tm_mon = bcd2bin(date[RX8010_MONTH - RX8010_SEC] & 0x1f) - 1; 134 + dt->tm_year = bcd2bin(date[RX8010_YEAR - RX8010_SEC]) + 100; 135 + dt->tm_wday = ffs(date[RX8010_WDAY - RX8010_SEC] & 0x7f); 136 + 137 + return rtc_valid_tm(dt); 138 + } 139 + 140 + static int rx8010_set_time(struct device *dev, struct rtc_time *dt) 141 + { 142 + struct rx8010_data *rx8010 = dev_get_drvdata(dev); 143 + u8 date[7]; 144 + int ctrl, flagreg; 145 + int ret; 146 + unsigned long irqflags; 147 + 148 + if ((dt->tm_year < 100) || (dt->tm_year > 199)) 149 + return -EINVAL; 150 + 151 + /* set STOP bit before changing clock/calendar */ 152 + ctrl = i2c_smbus_read_byte_data(rx8010->client, RX8010_CTRL); 153 + if (ctrl < 0) 154 + return ctrl; 155 + rx8010->ctrlreg = ctrl | RX8010_CTRL_STOP; 156 + ret = i2c_smbus_write_byte_data(rx8010->client, RX8010_CTRL, 157 + rx8010->ctrlreg); 158 + if (ret < 0) 159 + return ret; 160 + 161 + date[RX8010_SEC - RX8010_SEC] = bin2bcd(dt->tm_sec); 162 + date[RX8010_MIN - RX8010_SEC] = bin2bcd(dt->tm_min); 163 + date[RX8010_HOUR - RX8010_SEC] = bin2bcd(dt->tm_hour); 164 + date[RX8010_MDAY - RX8010_SEC] = bin2bcd(dt->tm_mday); 165 + date[RX8010_MONTH - RX8010_SEC] = bin2bcd(dt->tm_mon + 1); 166 + date[RX8010_YEAR - RX8010_SEC] = bin2bcd(dt->tm_year - 100); 167 + date[RX8010_WDAY - RX8010_SEC] = bin2bcd(1 << dt->tm_wday); 168 + 169 + ret = i2c_smbus_write_i2c_block_data(rx8010->client, 170 + RX8010_SEC, 7, date); 171 + if (ret < 0) 172 + return ret; 173 + 174 + /* clear STOP bit after changing clock/calendar */ 175 + ctrl = i2c_smbus_read_byte_data(rx8010->client, RX8010_CTRL); 176 + if (ctrl < 0) 177 + return ctrl; 178 + rx8010->ctrlreg = ctrl & ~RX8010_CTRL_STOP; 179 + ret = i2c_smbus_write_byte_data(rx8010->client, RX8010_CTRL, 180 + rx8010->ctrlreg); 181 + if (ret < 0) 182 + return ret; 183 + 184 + spin_lock_irqsave(&rx8010->flags_lock, irqflags); 185 + 186 + flagreg = i2c_smbus_read_byte_data(rx8010->client, RX8010_FLAG); 187 + if (flagreg < 0) { 188 + spin_unlock_irqrestore(&rx8010->flags_lock, irqflags); 189 + return flagreg; 190 + } 191 + 192 + if (flagreg & RX8010_FLAG_VLF) 193 + ret = i2c_smbus_write_byte_data(rx8010->client, RX8010_FLAG, 194 + flagreg & ~RX8010_FLAG_VLF); 195 + 196 + spin_unlock_irqrestore(&rx8010->flags_lock, irqflags); 197 + 198 + return 0; 199 + } 200 + 201 + static int rx8010_init_client(struct i2c_client *client) 202 + { 203 + struct rx8010_data *rx8010 = i2c_get_clientdata(client); 204 + u8 ctrl[2]; 205 + int need_clear = 0, err = 0; 206 + 207 + /* Initialize reserved registers as specified in datasheet */ 208 + err = i2c_smbus_write_byte_data(client, RX8010_RESV17, 0xD8); 209 + if (err < 0) 210 + return err; 211 + 212 + err = i2c_smbus_write_byte_data(client, RX8010_RESV30, 0x00); 213 + if (err < 0) 214 + return err; 215 + 216 + err = i2c_smbus_write_byte_data(client, RX8010_RESV31, 0x08); 217 + if (err < 0) 218 + return err; 219 + 220 + err = i2c_smbus_write_byte_data(client, RX8010_IRQ, 0x00); 221 + if (err < 0) 222 + return err; 223 + 224 + err = i2c_smbus_read_i2c_block_data(rx8010->client, RX8010_FLAG, 225 + 2, ctrl); 226 + if (err != 2) 227 + return err < 0 ? err : -EIO; 228 + 229 + if (ctrl[0] & RX8010_FLAG_VLF) 230 + dev_warn(&client->dev, "Frequency stop was detected\n"); 231 + 232 + if (ctrl[0] & RX8010_FLAG_AF) { 233 + dev_warn(&client->dev, "Alarm was detected\n"); 234 + need_clear = 1; 235 + } 236 + 237 + if (ctrl[0] & RX8010_FLAG_TF) 238 + need_clear = 1; 239 + 240 + if (ctrl[0] & RX8010_FLAG_UF) 241 + need_clear = 1; 242 + 243 + if (need_clear) { 244 + ctrl[0] &= ~(RX8010_FLAG_AF | RX8010_FLAG_TF | RX8010_FLAG_UF); 245 + err = i2c_smbus_write_byte_data(client, RX8010_FLAG, ctrl[0]); 246 + if (err < 0) 247 + return err; 248 + } 249 + 250 + rx8010->ctrlreg = (ctrl[1] & ~RX8010_CTRL_TEST); 251 + 252 + return err; 253 + } 254 + 255 + static int rx8010_read_alarm(struct device *dev, struct rtc_wkalrm *t) 256 + { 257 + struct rx8010_data *rx8010 = dev_get_drvdata(dev); 258 + struct i2c_client *client = rx8010->client; 259 + u8 alarmvals[3]; 260 + int flagreg; 261 + int err; 262 + 263 + err = i2c_smbus_read_i2c_block_data(client, RX8010_ALMIN, 3, alarmvals); 264 + if (err != 3) 265 + return err < 0 ? err : -EIO; 266 + 267 + flagreg = i2c_smbus_read_byte_data(client, RX8010_FLAG); 268 + if (flagreg < 0) 269 + return flagreg; 270 + 271 + t->time.tm_sec = 0; 272 + t->time.tm_min = bcd2bin(alarmvals[0] & 0x7f); 273 + t->time.tm_hour = bcd2bin(alarmvals[1] & 0x3f); 274 + 275 + if (alarmvals[2] & RX8010_ALARM_AE) 276 + t->time.tm_mday = -1; 277 + else 278 + t->time.tm_mday = bcd2bin(alarmvals[2] & 0x7f); 279 + 280 + t->time.tm_wday = -1; 281 + t->time.tm_mon = -1; 282 + t->time.tm_year = -1; 283 + 284 + t->enabled = !!(rx8010->ctrlreg & RX8010_CTRL_AIE); 285 + t->pending = (flagreg & RX8010_FLAG_AF) && t->enabled; 286 + 287 + return err; 288 + } 289 + 290 + static int rx8010_set_alarm(struct device *dev, struct rtc_wkalrm *t) 291 + { 292 + struct i2c_client *client = to_i2c_client(dev); 293 + struct rx8010_data *rx8010 = dev_get_drvdata(dev); 294 + u8 alarmvals[3]; 295 + int extreg, flagreg; 296 + int err; 297 + unsigned long irqflags; 298 + 299 + spin_lock_irqsave(&rx8010->flags_lock, irqflags); 300 + flagreg = i2c_smbus_read_byte_data(client, RX8010_FLAG); 301 + if (flagreg < 0) { 302 + spin_unlock_irqrestore(&rx8010->flags_lock, irqflags); 303 + return flagreg; 304 + } 305 + 306 + if (rx8010->ctrlreg & (RX8010_CTRL_AIE | RX8010_CTRL_UIE)) { 307 + rx8010->ctrlreg &= ~(RX8010_CTRL_AIE | RX8010_CTRL_UIE); 308 + err = i2c_smbus_write_byte_data(rx8010->client, RX8010_CTRL, 309 + rx8010->ctrlreg); 310 + if (err < 0) { 311 + spin_unlock_irqrestore(&rx8010->flags_lock, irqflags); 312 + return err; 313 + } 314 + } 315 + 316 + flagreg &= ~RX8010_FLAG_AF; 317 + err = i2c_smbus_write_byte_data(rx8010->client, RX8010_FLAG, flagreg); 318 + spin_unlock_irqrestore(&rx8010->flags_lock, irqflags); 319 + if (err < 0) 320 + return err; 321 + 322 + alarmvals[0] = bin2bcd(t->time.tm_min); 323 + alarmvals[1] = bin2bcd(t->time.tm_hour); 324 + alarmvals[2] = bin2bcd(t->time.tm_mday); 325 + 326 + err = i2c_smbus_write_i2c_block_data(rx8010->client, RX8010_ALMIN, 327 + 2, alarmvals); 328 + if (err < 0) 329 + return err; 330 + 331 + extreg = i2c_smbus_read_byte_data(client, RX8010_EXT); 332 + if (extreg < 0) 333 + return extreg; 334 + 335 + extreg |= RX8010_EXT_WADA; 336 + err = i2c_smbus_write_byte_data(rx8010->client, RX8010_EXT, extreg); 337 + if (err < 0) 338 + return err; 339 + 340 + if (alarmvals[2] == 0) 341 + alarmvals[2] |= RX8010_ALARM_AE; 342 + 343 + err = i2c_smbus_write_byte_data(rx8010->client, RX8010_ALWDAY, 344 + alarmvals[2]); 345 + if (err < 0) 346 + return err; 347 + 348 + if (t->enabled) { 349 + if (rx8010->rtc->uie_rtctimer.enabled) 350 + rx8010->ctrlreg |= RX8010_CTRL_UIE; 351 + if (rx8010->rtc->aie_timer.enabled) 352 + rx8010->ctrlreg |= 353 + (RX8010_CTRL_AIE | RX8010_CTRL_UIE); 354 + 355 + err = i2c_smbus_write_byte_data(rx8010->client, RX8010_CTRL, 356 + rx8010->ctrlreg); 357 + if (err < 0) 358 + return err; 359 + } 360 + 361 + return 0; 362 + } 363 + 364 + static int rx8010_alarm_irq_enable(struct device *dev, 365 + unsigned int enabled) 366 + { 367 + struct i2c_client *client = to_i2c_client(dev); 368 + struct rx8010_data *rx8010 = dev_get_drvdata(dev); 369 + int flagreg; 370 + u8 ctrl; 371 + int err; 372 + 373 + ctrl = rx8010->ctrlreg; 374 + 375 + if (enabled) { 376 + if (rx8010->rtc->uie_rtctimer.enabled) 377 + ctrl |= RX8010_CTRL_UIE; 378 + if (rx8010->rtc->aie_timer.enabled) 379 + ctrl |= (RX8010_CTRL_AIE | RX8010_CTRL_UIE); 380 + } else { 381 + if (!rx8010->rtc->uie_rtctimer.enabled) 382 + ctrl &= ~RX8010_CTRL_UIE; 383 + if (!rx8010->rtc->aie_timer.enabled) 384 + ctrl &= ~RX8010_CTRL_AIE; 385 + } 386 + 387 + flagreg = i2c_smbus_read_byte_data(client, RX8010_FLAG); 388 + if (flagreg < 0) 389 + return flagreg; 390 + 391 + flagreg &= ~RX8010_FLAG_AF; 392 + err = i2c_smbus_write_byte_data(rx8010->client, RX8010_FLAG, flagreg); 393 + if (err < 0) 394 + return err; 395 + 396 + if (ctrl != rx8010->ctrlreg) { 397 + rx8010->ctrlreg = ctrl; 398 + err = i2c_smbus_write_byte_data(rx8010->client, RX8010_CTRL, 399 + rx8010->ctrlreg); 400 + if (err < 0) 401 + return err; 402 + } 403 + 404 + return 0; 405 + } 406 + 407 + static int rx8010_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) 408 + { 409 + struct i2c_client *client = to_i2c_client(dev); 410 + struct rx8010_data *rx8010 = dev_get_drvdata(dev); 411 + int ret, tmp; 412 + int flagreg; 413 + unsigned long irqflags; 414 + 415 + switch (cmd) { 416 + case RTC_VL_READ: 417 + flagreg = i2c_smbus_read_byte_data(rx8010->client, RX8010_FLAG); 418 + if (flagreg < 0) 419 + return flagreg; 420 + 421 + tmp = !!(flagreg & RX8010_FLAG_VLF); 422 + if (copy_to_user((void __user *)arg, &tmp, sizeof(int))) 423 + return -EFAULT; 424 + 425 + return 0; 426 + 427 + case RTC_VL_CLR: 428 + spin_lock_irqsave(&rx8010->flags_lock, irqflags); 429 + flagreg = i2c_smbus_read_byte_data(rx8010->client, RX8010_FLAG); 430 + if (flagreg < 0) { 431 + spin_unlock_irqrestore(&rx8010->flags_lock, irqflags); 432 + return flagreg; 433 + } 434 + 435 + flagreg &= ~RX8010_FLAG_VLF; 436 + ret = i2c_smbus_write_byte_data(client, RX8010_FLAG, flagreg); 437 + spin_unlock_irqrestore(&rx8010->flags_lock, irqflags); 438 + if (ret < 0) 439 + return ret; 440 + 441 + return 0; 442 + 443 + default: 444 + return -ENOIOCTLCMD; 445 + } 446 + } 447 + 448 + static struct rtc_class_ops rx8010_rtc_ops = { 449 + .read_time = rx8010_get_time, 450 + .set_time = rx8010_set_time, 451 + .ioctl = rx8010_ioctl, 452 + }; 453 + 454 + static int rx8010_probe(struct i2c_client *client, 455 + const struct i2c_device_id *id) 456 + { 457 + struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); 458 + struct rx8010_data *rx8010; 459 + int err = 0; 460 + 461 + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA 462 + | I2C_FUNC_SMBUS_I2C_BLOCK)) { 463 + dev_err(&adapter->dev, "doesn't support required functionality\n"); 464 + return -EIO; 465 + } 466 + 467 + rx8010 = devm_kzalloc(&client->dev, sizeof(struct rx8010_data), 468 + GFP_KERNEL); 469 + if (!rx8010) 470 + return -ENOMEM; 471 + 472 + rx8010->client = client; 473 + i2c_set_clientdata(client, rx8010); 474 + 475 + spin_lock_init(&rx8010->flags_lock); 476 + 477 + err = rx8010_init_client(client); 478 + if (err) 479 + return err; 480 + 481 + if (client->irq > 0) { 482 + dev_info(&client->dev, "IRQ %d supplied\n", client->irq); 483 + err = devm_request_threaded_irq(&client->dev, client->irq, NULL, 484 + rx8010_irq_1_handler, 485 + IRQF_TRIGGER_LOW | IRQF_ONESHOT, 486 + "rx8010", client); 487 + 488 + if (err) { 489 + dev_err(&client->dev, "unable to request IRQ\n"); 490 + client->irq = 0; 491 + } else { 492 + rx8010_rtc_ops.read_alarm = rx8010_read_alarm; 493 + rx8010_rtc_ops.set_alarm = rx8010_set_alarm; 494 + rx8010_rtc_ops.alarm_irq_enable = rx8010_alarm_irq_enable; 495 + } 496 + } 497 + 498 + rx8010->rtc = devm_rtc_device_register(&client->dev, client->name, 499 + &rx8010_rtc_ops, THIS_MODULE); 500 + 501 + if (IS_ERR(rx8010->rtc)) { 502 + dev_err(&client->dev, "unable to register the class device\n"); 503 + return PTR_ERR(rx8010->rtc); 504 + } 505 + 506 + rx8010->rtc->max_user_freq = 1; 507 + 508 + return err; 509 + } 510 + 511 + static struct i2c_driver rx8010_driver = { 512 + .driver = { 513 + .name = "rtc-rx8010", 514 + }, 515 + .probe = rx8010_probe, 516 + .id_table = rx8010_id, 517 + }; 518 + 519 + module_i2c_driver(rx8010_driver); 520 + 521 + MODULE_AUTHOR("Akshay Bhat <akshay.bhat@timesys.com>"); 522 + MODULE_DESCRIPTION("Epson RX8010SJ RTC driver"); 523 + MODULE_LICENSE("GPL v2");
+92 -50
drivers/rtc/rtc-s5m.c
··· 38 38 */ 39 39 #define UDR_READ_RETRY_CNT 5 40 40 41 - /* Registers used by the driver which are different between chipsets. */ 41 + /* 42 + * Registers used by the driver which are different between chipsets. 43 + * 44 + * Operations like read time and write alarm/time require updating 45 + * specific fields in UDR register. These fields usually are auto-cleared 46 + * (with some exceptions). 47 + * 48 + * Table of operations per device: 49 + * 50 + * Device | Write time | Read time | Write alarm 51 + * ================================================= 52 + * S5M8767 | UDR + TIME | | UDR 53 + * S2MPS11/14 | WUDR | RUDR | WUDR + RUDR 54 + * S2MPS13 | WUDR | RUDR | WUDR + AUDR 55 + * S2MPS15 | WUDR | RUDR | AUDR 56 + */ 42 57 struct s5m_rtc_reg_config { 43 58 /* Number of registers used for setting time/alarm0/alarm1 */ 44 59 unsigned int regs_count; ··· 70 55 * will enable update of time or alarm register. Then it will be 71 56 * auto-cleared after successful update. 72 57 */ 73 - unsigned int rtc_udr_update; 74 - /* Mask for UDR field in 'rtc_udr_update' register */ 75 - unsigned int rtc_udr_mask; 58 + unsigned int udr_update; 59 + /* Auto-cleared mask in UDR field for writing time and alarm */ 60 + unsigned int autoclear_udr_mask; 61 + /* 62 + * Masks in UDR field for time and alarm operations. 63 + * The read time mask can be 0. Rest should not. 64 + */ 65 + unsigned int read_time_udr_mask; 66 + unsigned int write_time_udr_mask; 67 + unsigned int write_alarm_udr_mask; 76 68 }; 77 69 78 70 /* Register map for S5M8763 and S5M8767 */ ··· 89 67 .ctrl = S5M_ALARM1_CONF, 90 68 .alarm0 = S5M_ALARM0_SEC, 91 69 .alarm1 = S5M_ALARM1_SEC, 92 - .rtc_udr_update = S5M_RTC_UDR_CON, 93 - .rtc_udr_mask = S5M_RTC_UDR_MASK, 70 + .udr_update = S5M_RTC_UDR_CON, 71 + .autoclear_udr_mask = S5M_RTC_UDR_MASK, 72 + .read_time_udr_mask = 0, /* Not needed */ 73 + .write_time_udr_mask = S5M_RTC_UDR_MASK | S5M_RTC_TIME_EN_MASK, 74 + .write_alarm_udr_mask = S5M_RTC_UDR_MASK, 94 75 }; 95 76 96 - /* 97 - * Register map for S2MPS14. 98 - * It may be also suitable for S2MPS11 but this was not tested. 99 - */ 100 - static const struct s5m_rtc_reg_config s2mps_rtc_regs = { 77 + /* Register map for S2MPS13 */ 78 + static const struct s5m_rtc_reg_config s2mps13_rtc_regs = { 101 79 .regs_count = 7, 102 80 .time = S2MPS_RTC_SEC, 103 81 .ctrl = S2MPS_RTC_CTRL, 104 82 .alarm0 = S2MPS_ALARM0_SEC, 105 83 .alarm1 = S2MPS_ALARM1_SEC, 106 - .rtc_udr_update = S2MPS_RTC_UDR_CON, 107 - .rtc_udr_mask = S2MPS_RTC_WUDR_MASK, 84 + .udr_update = S2MPS_RTC_UDR_CON, 85 + .autoclear_udr_mask = S2MPS_RTC_WUDR_MASK, 86 + .read_time_udr_mask = S2MPS_RTC_RUDR_MASK, 87 + .write_time_udr_mask = S2MPS_RTC_WUDR_MASK, 88 + .write_alarm_udr_mask = S2MPS_RTC_WUDR_MASK | S2MPS13_RTC_AUDR_MASK, 89 + }; 90 + 91 + /* Register map for S2MPS11/14 */ 92 + static const struct s5m_rtc_reg_config s2mps14_rtc_regs = { 93 + .regs_count = 7, 94 + .time = S2MPS_RTC_SEC, 95 + .ctrl = S2MPS_RTC_CTRL, 96 + .alarm0 = S2MPS_ALARM0_SEC, 97 + .alarm1 = S2MPS_ALARM1_SEC, 98 + .udr_update = S2MPS_RTC_UDR_CON, 99 + .autoclear_udr_mask = S2MPS_RTC_WUDR_MASK, 100 + .read_time_udr_mask = S2MPS_RTC_RUDR_MASK, 101 + .write_time_udr_mask = S2MPS_RTC_WUDR_MASK, 102 + .write_alarm_udr_mask = S2MPS_RTC_WUDR_MASK | S2MPS_RTC_RUDR_MASK, 103 + }; 104 + 105 + /* 106 + * Register map for S2MPS15 - in comparison to S2MPS14 the WUDR and AUDR bits 107 + * are swapped. 108 + */ 109 + static const struct s5m_rtc_reg_config s2mps15_rtc_regs = { 110 + .regs_count = 7, 111 + .time = S2MPS_RTC_SEC, 112 + .ctrl = S2MPS_RTC_CTRL, 113 + .alarm0 = S2MPS_ALARM0_SEC, 114 + .alarm1 = S2MPS_ALARM1_SEC, 115 + .udr_update = S2MPS_RTC_UDR_CON, 116 + .autoclear_udr_mask = S2MPS_RTC_WUDR_MASK, 117 + .read_time_udr_mask = S2MPS_RTC_RUDR_MASK, 118 + .write_time_udr_mask = S2MPS15_RTC_WUDR_MASK, 119 + .write_alarm_udr_mask = S2MPS15_RTC_AUDR_MASK, 108 120 }; 109 121 110 122 struct s5m_rtc_info { ··· 222 166 unsigned int data; 223 167 224 168 do { 225 - ret = regmap_read(info->regmap, info->regs->rtc_udr_update, 226 - &data); 227 - } while (--retry && (data & info->regs->rtc_udr_mask) && !ret); 169 + ret = regmap_read(info->regmap, info->regs->udr_update, &data); 170 + } while (--retry && (data & info->regs->autoclear_udr_mask) && !ret); 228 171 229 172 if (!retry) 230 173 dev_err(info->dev, "waiting for UDR update, reached max number of retries\n"); ··· 269 214 int ret; 270 215 unsigned int data; 271 216 272 - ret = regmap_read(info->regmap, info->regs->rtc_udr_update, &data); 217 + ret = regmap_read(info->regmap, info->regs->udr_update, &data); 273 218 if (ret < 0) { 274 219 dev_err(info->dev, "failed to read update reg(%d)\n", ret); 275 220 return ret; 276 221 } 277 222 278 - switch (info->device_type) { 279 - case S5M8763X: 280 - case S5M8767X: 281 - data |= info->regs->rtc_udr_mask | S5M_RTC_TIME_EN_MASK; 282 - case S2MPS15X: 283 - /* As per UM, for write time register, set WUDR bit to high */ 284 - data |= S2MPS15_RTC_WUDR_MASK; 285 - break; 286 - case S2MPS14X: 287 - case S2MPS13X: 288 - data |= info->regs->rtc_udr_mask; 289 - break; 290 - default: 291 - return -EINVAL; 292 - } 223 + data |= info->regs->write_time_udr_mask; 293 224 294 - 295 - ret = regmap_write(info->regmap, info->regs->rtc_udr_update, data); 225 + ret = regmap_write(info->regmap, info->regs->udr_update, data); 296 226 if (ret < 0) { 297 227 dev_err(info->dev, "failed to write update reg(%d)\n", ret); 298 228 return ret; ··· 293 253 int ret; 294 254 unsigned int data; 295 255 296 - ret = regmap_read(info->regmap, info->regs->rtc_udr_update, &data); 256 + ret = regmap_read(info->regmap, info->regs->udr_update, &data); 297 257 if (ret < 0) { 298 258 dev_err(info->dev, "%s: fail to read update reg(%d)\n", 299 259 __func__, ret); 300 260 return ret; 301 261 } 302 262 303 - data |= info->regs->rtc_udr_mask; 263 + data |= info->regs->write_alarm_udr_mask; 304 264 switch (info->device_type) { 305 265 case S5M8763X: 306 266 case S5M8767X: 307 267 data &= ~S5M_RTC_TIME_EN_MASK; 308 268 break; 309 269 case S2MPS15X: 310 - /* As per UM, for write alarm, set A_UDR(bit[4]) to high 311 - * rtc_udr_mask above sets bit[4] 312 - */ 313 - break; 314 270 case S2MPS14X: 315 - data |= S2MPS_RTC_RUDR_MASK; 316 - break; 317 271 case S2MPS13X: 318 - data |= S2MPS13_RTC_AUDR_MASK; 272 + /* No exceptions needed */ 319 273 break; 320 274 default: 321 275 return -EINVAL; 322 276 } 323 277 324 - ret = regmap_write(info->regmap, info->regs->rtc_udr_update, data); 278 + ret = regmap_write(info->regmap, info->regs->udr_update, data); 325 279 if (ret < 0) { 326 280 dev_err(info->dev, "%s: fail to write update reg(%d)\n", 327 281 __func__, ret); ··· 326 292 327 293 /* On S2MPS13 the AUDR is not auto-cleared */ 328 294 if (info->device_type == S2MPS13X) 329 - regmap_update_bits(info->regmap, info->regs->rtc_udr_update, 295 + regmap_update_bits(info->regmap, info->regs->udr_update, 330 296 S2MPS13_RTC_AUDR_MASK, 0); 331 297 332 298 return ret; ··· 370 336 u8 data[info->regs->regs_count]; 371 337 int ret; 372 338 373 - if (info->device_type == S2MPS15X || info->device_type == S2MPS14X || 374 - info->device_type == S2MPS13X) { 339 + if (info->regs->read_time_udr_mask) { 375 340 ret = regmap_update_bits(info->regmap, 376 - info->regs->rtc_udr_update, 377 - S2MPS_RTC_RUDR_MASK, S2MPS_RTC_RUDR_MASK); 341 + info->regs->udr_update, 342 + info->regs->read_time_udr_mask, 343 + info->regs->read_time_udr_mask); 378 344 if (ret) { 379 345 dev_err(dev, 380 346 "Failed to prepare registers for time reading: %d\n", ··· 741 707 742 708 switch (platform_get_device_id(pdev)->driver_data) { 743 709 case S2MPS15X: 710 + regmap_cfg = &s2mps14_rtc_regmap_config; 711 + info->regs = &s2mps15_rtc_regs; 712 + alarm_irq = S2MPS14_IRQ_RTCA0; 713 + break; 744 714 case S2MPS14X: 715 + regmap_cfg = &s2mps14_rtc_regmap_config; 716 + info->regs = &s2mps14_rtc_regs; 717 + alarm_irq = S2MPS14_IRQ_RTCA0; 718 + break; 745 719 case S2MPS13X: 746 720 regmap_cfg = &s2mps14_rtc_regmap_config; 747 - info->regs = &s2mps_rtc_regs; 721 + info->regs = &s2mps13_rtc_regs; 748 722 alarm_irq = S2MPS14_IRQ_RTCA0; 749 723 break; 750 724 case S5M8763X:
+8 -10
drivers/rtc/rtc-sunxi.c
··· 133 133 unsigned char leap_shift; /* bit shift to get the leap year */ 134 134 }; 135 135 136 - static struct sunxi_rtc_data_year data_year_param[] = { 136 + static const struct sunxi_rtc_data_year data_year_param[] = { 137 137 [0] = { 138 138 .min = 2010, 139 139 .max = 2073, ··· 151 151 struct sunxi_rtc_dev { 152 152 struct rtc_device *rtc; 153 153 struct device *dev; 154 - struct sunxi_rtc_data_year *data_year; 154 + const struct sunxi_rtc_data_year *data_year; 155 155 void __iomem *base; 156 156 int irq; 157 157 }; ··· 175 175 return IRQ_NONE; 176 176 } 177 177 178 - static void sunxi_rtc_setaie(int to, struct sunxi_rtc_dev *chip) 178 + static void sunxi_rtc_setaie(unsigned int to, struct sunxi_rtc_dev *chip) 179 179 { 180 180 u32 alrm_val = 0; 181 181 u32 alrm_irq_val = 0; ··· 343 343 struct sunxi_rtc_dev *chip = dev_get_drvdata(dev); 344 344 u32 date = 0; 345 345 u32 time = 0; 346 - int year; 346 + unsigned int year; 347 347 348 348 /* 349 349 * the input rtc_tm->tm_year is the offset relative to 1900. We use ··· 353 353 354 354 year = rtc_tm->tm_year + 1900; 355 355 if (year < chip->data_year->min || year > chip->data_year->max) { 356 - dev_err(dev, "rtc only supports year in range %d - %d\n", 357 - chip->data_year->min, chip->data_year->max); 356 + dev_err(dev, "rtc only supports year in range %u - %u\n", 357 + chip->data_year->min, chip->data_year->max); 358 358 return -EINVAL; 359 359 } 360 360 ··· 436 436 { 437 437 struct sunxi_rtc_dev *chip; 438 438 struct resource *res; 439 - const struct of_device_id *of_id; 440 439 int ret; 441 440 442 441 chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); ··· 462 463 return ret; 463 464 } 464 465 465 - of_id = of_match_device(sunxi_rtc_dt_ids, &pdev->dev); 466 - if (!of_id) { 466 + chip->data_year = of_device_get_match_data(&pdev->dev); 467 + if (!chip->data_year) { 467 468 dev_err(&pdev->dev, "Unable to setup RTC data\n"); 468 469 return -ENODEV; 469 470 } 470 - chip->data_year = (struct sunxi_rtc_data_year *) of_id->data; 471 471 472 472 /* clear the alarm count value */ 473 473 writel(0, chip->base + SUNXI_ALRM_DHMS);
+9 -2
drivers/rtc/rtc-sysfs.c
··· 91 91 const char *buf, size_t n) 92 92 { 93 93 struct rtc_device *rtc = to_rtc_device(dev); 94 - unsigned long val = simple_strtoul(buf, NULL, 0); 94 + unsigned long val; 95 + int err; 96 + 97 + err = kstrtoul(buf, 0, &val); 98 + if (err) 99 + return err; 95 100 96 101 if (val >= 4096 || val == 0) 97 102 return -EINVAL; ··· 180 175 } else 181 176 adjust = 1; 182 177 } 183 - alarm = simple_strtoul(buf_ptr, NULL, 0); 178 + retval = kstrtoul(buf_ptr, 0, &alarm); 179 + if (retval) 180 + return retval; 184 181 if (adjust) { 185 182 alarm += now; 186 183 }
+3 -3
drivers/rtc/rtc-v3020.c
··· 57 57 /* GPIO access */ 58 58 struct gpio *gpio; 59 59 60 - struct v3020_chip_ops *ops; 60 + const struct v3020_chip_ops *ops; 61 61 62 62 struct rtc_device *rtc; 63 63 }; ··· 95 95 return !!(readl(chip->ioaddress) & (1 << chip->leftshift)); 96 96 } 97 97 98 - static struct v3020_chip_ops v3020_mmio_ops = { 98 + static const struct v3020_chip_ops v3020_mmio_ops = { 99 99 .map_io = v3020_mmio_map, 100 100 .unmap_io = v3020_mmio_unmap, 101 101 .read_bit = v3020_mmio_read_bit, ··· 158 158 return bit; 159 159 } 160 160 161 - static struct v3020_chip_ops v3020_gpio_ops = { 161 + static const struct v3020_chip_ops v3020_gpio_ops = { 162 162 .map_io = v3020_gpio_map, 163 163 .unmap_io = v3020_gpio_unmap, 164 164 .read_bit = v3020_gpio_read_bit,
+2
include/linux/mfd/samsung/rtc.h
··· 105 105 #define S5M_RTC_UDR_MASK (1 << S5M_RTC_UDR_SHIFT) 106 106 #define S2MPS_RTC_WUDR_SHIFT 4 107 107 #define S2MPS_RTC_WUDR_MASK (1 << S2MPS_RTC_WUDR_SHIFT) 108 + #define S2MPS15_RTC_AUDR_SHIFT 4 109 + #define S2MPS15_RTC_AUDR_MASK (1 << S2MPS15_RTC_AUDR_SHIFT) 108 110 #define S2MPS13_RTC_AUDR_SHIFT 1 109 111 #define S2MPS13_RTC_AUDR_MASK (1 << S2MPS13_RTC_AUDR_SHIFT) 110 112 #define S2MPS15_RTC_WUDR_SHIFT 1