Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

media: rockchip: rkcif: add support for rk3568 vicap dvp capture

The RK3568 Video Capture (VICAP) unit features a Digital Video Port
(DVP). Add support for it.

Tested-by: Gerald Loacker <gerald.loacker@wolfvision.net>
Reviewed-by: Gerald Loacker <gerald.loacker@wolfvision.net>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Mehdi Djait <mehdi.djait@linux.intel.com>
Signed-off-by: Michael Riesch <michael.riesch@collabora.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>

authored by

Michael Riesch and committed by
Hans Verkuil
c348d671 75e28594

+278
+276
drivers/media/platform/rockchip/rkcif/rkcif-capture-dvp.c
··· 332 332 }, 333 333 }; 334 334 335 + static const struct rkcif_input_fmt rk3568_dvp_in_fmts[] = { 336 + { 337 + .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, 338 + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | 339 + RKCIF_FORMAT_YUV_INPUT_ORDER_YUYV, 340 + .fmt_type = RKCIF_FMT_TYPE_YUV, 341 + .field = V4L2_FIELD_NONE, 342 + }, 343 + { 344 + .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, 345 + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | 346 + RKCIF_FORMAT_YUV_INPUT_ORDER_YUYV, 347 + .fmt_type = RKCIF_FMT_TYPE_YUV, 348 + .field = V4L2_FIELD_INTERLACED, 349 + }, 350 + { 351 + .mbus_code = MEDIA_BUS_FMT_YVYU8_2X8, 352 + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | 353 + RKCIF_FORMAT_YUV_INPUT_ORDER_YVYU, 354 + .fmt_type = RKCIF_FMT_TYPE_YUV, 355 + .field = V4L2_FIELD_NONE, 356 + }, 357 + { 358 + .mbus_code = MEDIA_BUS_FMT_YVYU8_2X8, 359 + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | 360 + RKCIF_FORMAT_YUV_INPUT_ORDER_YVYU, 361 + .fmt_type = RKCIF_FMT_TYPE_YUV, 362 + .field = V4L2_FIELD_INTERLACED, 363 + }, 364 + { 365 + .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8, 366 + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | 367 + RKCIF_FORMAT_YUV_INPUT_ORDER_UYVY, 368 + .fmt_type = RKCIF_FMT_TYPE_YUV, 369 + .field = V4L2_FIELD_NONE, 370 + }, 371 + { 372 + .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8, 373 + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | 374 + RKCIF_FORMAT_YUV_INPUT_ORDER_UYVY, 375 + .fmt_type = RKCIF_FMT_TYPE_YUV, 376 + .field = V4L2_FIELD_INTERLACED, 377 + }, 378 + { 379 + .mbus_code = MEDIA_BUS_FMT_VYUY8_2X8, 380 + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | 381 + RKCIF_FORMAT_YUV_INPUT_ORDER_VYUY, 382 + .fmt_type = RKCIF_FMT_TYPE_YUV, 383 + .field = V4L2_FIELD_NONE, 384 + }, 385 + { 386 + .mbus_code = MEDIA_BUS_FMT_VYUY8_2X8, 387 + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | 388 + RKCIF_FORMAT_YUV_INPUT_ORDER_VYUY, 389 + .fmt_type = RKCIF_FMT_TYPE_YUV, 390 + .field = V4L2_FIELD_INTERLACED, 391 + }, 392 + { 393 + .mbus_code = MEDIA_BUS_FMT_YUYV8_1X16, 394 + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | 395 + RKCIF_FORMAT_YUV_INPUT_ORDER_YUYV | 396 + RKCIF_FORMAT_INPUT_MODE_BT1120 | 397 + RKCIF_FORMAT_BT1120_TRANSMIT_PROGRESS, 398 + .field = V4L2_FIELD_NONE, 399 + }, 400 + { 401 + .mbus_code = MEDIA_BUS_FMT_YUYV8_1X16, 402 + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | 403 + RKCIF_FORMAT_YUV_INPUT_ORDER_YUYV | 404 + RKCIF_FORMAT_INPUT_MODE_BT1120, 405 + .field = V4L2_FIELD_INTERLACED, 406 + }, 407 + { 408 + .mbus_code = MEDIA_BUS_FMT_YVYU8_1X16, 409 + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | 410 + RKCIF_FORMAT_YUV_INPUT_ORDER_YVYU | 411 + RKCIF_FORMAT_INPUT_MODE_BT1120 | 412 + RKCIF_FORMAT_BT1120_TRANSMIT_PROGRESS, 413 + .field = V4L2_FIELD_NONE, 414 + }, 415 + { 416 + .mbus_code = MEDIA_BUS_FMT_YVYU8_1X16, 417 + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | 418 + RKCIF_FORMAT_YUV_INPUT_ORDER_YVYU | 419 + RKCIF_FORMAT_INPUT_MODE_BT1120, 420 + .field = V4L2_FIELD_INTERLACED, 421 + }, 422 + { 423 + .mbus_code = MEDIA_BUS_FMT_UYVY8_1X16, 424 + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | 425 + RKCIF_FORMAT_YUV_INPUT_ORDER_YUYV | 426 + RKCIF_FORMAT_INPUT_MODE_BT1120 | 427 + RKCIF_FORMAT_BT1120_YC_SWAP | 428 + RKCIF_FORMAT_BT1120_TRANSMIT_PROGRESS, 429 + .field = V4L2_FIELD_NONE, 430 + }, 431 + { 432 + .mbus_code = MEDIA_BUS_FMT_UYVY8_1X16, 433 + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | 434 + RKCIF_FORMAT_YUV_INPUT_ORDER_YUYV | 435 + RKCIF_FORMAT_BT1120_YC_SWAP | 436 + RKCIF_FORMAT_INPUT_MODE_BT1120, 437 + .field = V4L2_FIELD_INTERLACED, 438 + }, 439 + { 440 + .mbus_code = MEDIA_BUS_FMT_VYUY8_1X16, 441 + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | 442 + RKCIF_FORMAT_YUV_INPUT_ORDER_YVYU | 443 + RKCIF_FORMAT_INPUT_MODE_BT1120 | 444 + RKCIF_FORMAT_BT1120_YC_SWAP | 445 + RKCIF_FORMAT_BT1120_TRANSMIT_PROGRESS, 446 + .field = V4L2_FIELD_NONE, 447 + }, 448 + { 449 + .mbus_code = MEDIA_BUS_FMT_VYUY8_1X16, 450 + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | 451 + RKCIF_FORMAT_YUV_INPUT_ORDER_YVYU | 452 + RKCIF_FORMAT_BT1120_YC_SWAP | 453 + RKCIF_FORMAT_INPUT_MODE_BT1120, 454 + .field = V4L2_FIELD_INTERLACED, 455 + }, 456 + { 457 + .mbus_code = MEDIA_BUS_FMT_SBGGR8_1X8, 458 + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | 459 + RKCIF_FORMAT_RAW_DATA_WIDTH_8, 460 + .fmt_type = RKCIF_FMT_TYPE_RAW, 461 + .field = V4L2_FIELD_NONE, 462 + }, 463 + { 464 + .mbus_code = MEDIA_BUS_FMT_SGBRG8_1X8, 465 + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | 466 + RKCIF_FORMAT_RAW_DATA_WIDTH_8, 467 + .fmt_type = RKCIF_FMT_TYPE_RAW, 468 + .field = V4L2_FIELD_NONE, 469 + }, 470 + { 471 + .mbus_code = MEDIA_BUS_FMT_SGRBG8_1X8, 472 + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | 473 + RKCIF_FORMAT_RAW_DATA_WIDTH_8, 474 + .fmt_type = RKCIF_FMT_TYPE_RAW, 475 + .field = V4L2_FIELD_NONE, 476 + }, 477 + { 478 + .mbus_code = MEDIA_BUS_FMT_SRGGB8_1X8, 479 + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | 480 + RKCIF_FORMAT_RAW_DATA_WIDTH_8, 481 + .fmt_type = RKCIF_FMT_TYPE_RAW, 482 + .field = V4L2_FIELD_NONE, 483 + }, 484 + { 485 + .mbus_code = MEDIA_BUS_FMT_SBGGR10_1X10, 486 + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | 487 + RKCIF_FORMAT_RAW_DATA_WIDTH_10, 488 + .fmt_type = RKCIF_FMT_TYPE_RAW, 489 + .field = V4L2_FIELD_NONE, 490 + }, 491 + { 492 + .mbus_code = MEDIA_BUS_FMT_SGBRG10_1X10, 493 + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | 494 + RKCIF_FORMAT_RAW_DATA_WIDTH_10, 495 + .fmt_type = RKCIF_FMT_TYPE_RAW, 496 + .field = V4L2_FIELD_NONE, 497 + }, 498 + { 499 + .mbus_code = MEDIA_BUS_FMT_SGRBG10_1X10, 500 + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | 501 + RKCIF_FORMAT_RAW_DATA_WIDTH_10, 502 + .fmt_type = RKCIF_FMT_TYPE_RAW, 503 + .field = V4L2_FIELD_NONE, 504 + }, 505 + { 506 + .mbus_code = MEDIA_BUS_FMT_SRGGB10_1X10, 507 + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | 508 + RKCIF_FORMAT_RAW_DATA_WIDTH_10, 509 + .fmt_type = RKCIF_FMT_TYPE_RAW, 510 + .field = V4L2_FIELD_NONE, 511 + }, 512 + { 513 + .mbus_code = MEDIA_BUS_FMT_SBGGR12_1X12, 514 + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | 515 + RKCIF_FORMAT_RAW_DATA_WIDTH_12, 516 + .fmt_type = RKCIF_FMT_TYPE_RAW, 517 + .field = V4L2_FIELD_NONE, 518 + }, 519 + { 520 + .mbus_code = MEDIA_BUS_FMT_SGBRG12_1X12, 521 + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | 522 + RKCIF_FORMAT_RAW_DATA_WIDTH_12, 523 + .fmt_type = RKCIF_FMT_TYPE_RAW, 524 + .field = V4L2_FIELD_NONE, 525 + }, 526 + { 527 + .mbus_code = MEDIA_BUS_FMT_SGRBG12_1X12, 528 + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | 529 + RKCIF_FORMAT_RAW_DATA_WIDTH_12, 530 + .fmt_type = RKCIF_FMT_TYPE_RAW, 531 + .field = V4L2_FIELD_NONE, 532 + }, 533 + { 534 + .mbus_code = MEDIA_BUS_FMT_SRGGB12_1X12, 535 + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | 536 + RKCIF_FORMAT_RAW_DATA_WIDTH_12, 537 + .fmt_type = RKCIF_FMT_TYPE_RAW, 538 + .field = V4L2_FIELD_NONE, 539 + }, 540 + { 541 + .mbus_code = MEDIA_BUS_FMT_RGB888_1X24, 542 + .field = V4L2_FIELD_NONE, 543 + }, 544 + { 545 + .mbus_code = MEDIA_BUS_FMT_Y8_1X8, 546 + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | 547 + RKCIF_FORMAT_RAW_DATA_WIDTH_8, 548 + .fmt_type = RKCIF_FMT_TYPE_RAW, 549 + .field = V4L2_FIELD_NONE, 550 + }, 551 + { 552 + .mbus_code = MEDIA_BUS_FMT_Y10_1X10, 553 + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | 554 + RKCIF_FORMAT_RAW_DATA_WIDTH_10, 555 + .fmt_type = RKCIF_FMT_TYPE_RAW, 556 + .field = V4L2_FIELD_NONE, 557 + }, 558 + { 559 + .mbus_code = MEDIA_BUS_FMT_Y12_1X12, 560 + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | 561 + RKCIF_FORMAT_RAW_DATA_WIDTH_12, 562 + .fmt_type = RKCIF_FMT_TYPE_RAW, 563 + .field = V4L2_FIELD_NONE, 564 + }, 565 + }; 566 + 567 + static void rk3568_dvp_grf_setup(struct rkcif_device *rkcif) 568 + { 569 + u32 con1 = RK3568_GRF_WRITE_ENABLE(RK3568_GRF_VI_CON1_CIF_DATAPATH | 570 + RK3568_GRF_VI_CON1_CIF_CLK_DELAYNUM); 571 + 572 + if (!rkcif->grf) 573 + return; 574 + 575 + con1 |= rkcif->interfaces[RKCIF_DVP].dvp.dvp_clk_delay & 576 + RK3568_GRF_VI_CON1_CIF_CLK_DELAYNUM; 577 + 578 + if (rkcif->interfaces[RKCIF_DVP].vep.bus.parallel.flags & 579 + V4L2_MBUS_PCLK_SAMPLE_DUALEDGE) 580 + con1 |= RK3568_GRF_VI_CON1_CIF_DATAPATH; 581 + 582 + regmap_write(rkcif->grf, RK3568_GRF_VI_CON1, con1); 583 + } 584 + 585 + const struct rkcif_dvp_match_data rkcif_rk3568_vicap_dvp_match_data = { 586 + .in_fmts = rk3568_dvp_in_fmts, 587 + .in_fmts_num = ARRAY_SIZE(rk3568_dvp_in_fmts), 588 + .out_fmts = dvp_out_fmts, 589 + .out_fmts_num = ARRAY_SIZE(dvp_out_fmts), 590 + .setup = rk3568_dvp_grf_setup, 591 + .has_scaler = false, 592 + .regs = { 593 + [RKCIF_DVP_CTRL] = 0x00, 594 + [RKCIF_DVP_INTEN] = 0x04, 595 + [RKCIF_DVP_INTSTAT] = 0x08, 596 + [RKCIF_DVP_FOR] = 0x0c, 597 + [RKCIF_DVP_LINE_NUM_ADDR] = 0x2c, 598 + [RKCIF_DVP_FRM0_ADDR_Y] = 0x14, 599 + [RKCIF_DVP_FRM0_ADDR_UV] = 0x18, 600 + [RKCIF_DVP_FRM1_ADDR_Y] = 0x1c, 601 + [RKCIF_DVP_FRM1_ADDR_UV] = 0x20, 602 + [RKCIF_DVP_VIR_LINE_WIDTH] = 0x24, 603 + [RKCIF_DVP_SET_SIZE] = 0x28, 604 + [RKCIF_DVP_CROP] = 0x34, 605 + [RKCIF_DVP_FRAME_STATUS] = 0x3c, 606 + [RKCIF_DVP_LAST_LINE] = 0x44, 607 + [RKCIF_DVP_LAST_PIX] = 0x48, 608 + }, 609 + }; 610 + 335 611 static inline unsigned int rkcif_dvp_get_addr(struct rkcif_device *rkcif, 336 612 unsigned int index) 337 613 {
+1
drivers/media/platform/rockchip/rkcif/rkcif-capture-dvp.h
··· 14 14 #include "rkcif-common.h" 15 15 16 16 extern const struct rkcif_dvp_match_data rkcif_px30_vip_dvp_match_data; 17 + extern const struct rkcif_dvp_match_data rkcif_rk3568_vicap_dvp_match_data; 17 18 18 19 int rkcif_dvp_register(struct rkcif_device *rkcif); 19 20
+1
drivers/media/platform/rockchip/rkcif/rkcif-dev.c
··· 48 48 static const struct rkcif_match_data rk3568_vicap_match_data = { 49 49 .clks = rk3568_vicap_clks, 50 50 .clks_num = ARRAY_SIZE(rk3568_vicap_clks), 51 + .dvp = &rkcif_rk3568_vicap_dvp_match_data, 51 52 }; 52 53 53 54 static const struct of_device_id rkcif_plat_of_match[] = {