Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

[POWERPC] Celleb: basic support

This patch adds base support for Celleb platform.

Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp>
Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>

authored by

Ishizaki Kou and committed by
Paul Mackerras
c347b798 e1079319

+561
+15
arch/powerpc/Kconfig
··· 539 539 This option enables support for the Sony PS3 game console 540 540 and other platforms using the PS3 hypervisor. 541 541 542 + config PPC_CELLEB 543 + bool "Toshiba's Cell Reference Set 'Celleb' Architecture" 544 + depends on PPC_MULTIPLATFORM && PPC64 545 + select PPC_CELL 546 + select PPC_OF_PLATFORM_PCI 547 + select HAS_TXX9_SERIAL 548 + select PPC_UDBG_BEAT 549 + select USB_OHCI_BIG_ENDIAN_MMIO 550 + select USB_EHCI_BIG_ENDIAN_MMIO 551 + 542 552 config PPC_NATIVE 543 553 bool 544 554 depends on PPC_MULTIPLATFORM ··· 560 550 config UDBG_RTAS_CONSOLE 561 551 bool "RTAS based debug console" 562 552 depends on PPC_RTAS 553 + default n 554 + 555 + config PPC_UDBG_BEAT 556 + bool "BEAT based debug console" 557 + depends on PPC_CELLEB 563 558 default n 564 559 565 560 config XICS
+7
arch/powerpc/Kconfig.debug
··· 185 185 Select this to enable early debugging for legacy iSeries. You need 186 186 to hit "Ctrl-x Ctrl-x" to see the messages on the console. 187 187 188 + config PPC_EARLY_DEBUG_BEAT 189 + bool "Beat HV Console" 190 + depends on PPC_CELLEB 191 + select PPC_UDBG_BEAT 192 + help 193 + Select this to enable early debugging for Celleb with Beat. 194 + 188 195 endchoice 189 196 190 197 endmenu
+1
arch/powerpc/boot/Makefile
··· 162 162 image-$(CONFIG_PPC_MAPLE) += zImage.pseries 163 163 image-$(CONFIG_PPC_IBM_CELL_BLADE) += zImage.pseries 164 164 image-$(CONFIG_PPC_PS3) += zImage.ps3 165 + image-$(CONFIG_PPC_CELLEB) += zImage.pseries 165 166 image-$(CONFIG_PPC_CHRP) += zImage.chrp 166 167 image-$(CONFIG_PPC_EFIKA) += zImage.chrp 167 168 image-$(CONFIG_PPC_PMAC) += zImage.pmac
+1
arch/powerpc/platforms/Makefile
··· 19 19 obj-$(CONFIG_PPC_PASEMI) += pasemi/ 20 20 obj-$(CONFIG_PPC_CELL) += cell/ 21 21 obj-$(CONFIG_PPC_PS3) += ps3/ 22 + obj-$(CONFIG_PPC_CELLEB) += celleb/ 22 23 obj-$(CONFIG_EMBEDDED6xx) += embedded6xx/
+9
arch/powerpc/platforms/celleb/Makefile
··· 1 + obj-y += interrupt.o iommu.o setup.o \ 2 + htab.o beat.o pci.o \ 3 + scc_epci.o hvCall.o 4 + 5 + obj-$(CONFIG_SMP) += smp.o 6 + obj-$(CONFIG_PPC_UDBG_BEAT) += udbg_beat.o 7 + obj-$(CONFIG_USB) += scc_uhc.o 8 + obj-$(CONFIG_HAS_TXX9_SERIAL) += scc_sio.o 9 + obj-$(CONFIG_SPU_BASE) += spu_priv1.o
+163
arch/powerpc/platforms/celleb/beat.c
··· 1 + /* 2 + * Simple routines for Celleb/Beat 3 + * 4 + * (C) Copyright 2006-2007 TOSHIBA CORPORATION 5 + * 6 + * This program is free software; you can redistribute it and/or modify 7 + * it under the terms of the GNU General Public License as published by 8 + * the Free Software Foundation; either version 2 of the License, or 9 + * (at your option) any later version. 10 + * 11 + * This program is distributed in the hope that it will be useful, 12 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 + * GNU General Public License for more details. 15 + * 16 + * You should have received a copy of the GNU General Public License along 17 + * with this program; if not, write to the Free Software Foundation, Inc., 18 + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 19 + */ 20 + 21 + #include <linux/module.h> 22 + #include <linux/init.h> 23 + #include <linux/err.h> 24 + #include <linux/rtc.h> 25 + 26 + #include <asm/hvconsole.h> 27 + #include <asm/time.h> 28 + 29 + #include "beat_wrapper.h" 30 + #include "beat.h" 31 + 32 + void beat_restart(char *cmd) 33 + { 34 + beat_shutdown_logical_partition(1); 35 + } 36 + 37 + void beat_power_off(void) 38 + { 39 + beat_shutdown_logical_partition(0); 40 + } 41 + 42 + u64 beat_halt_code = 0x1000000000000000UL; 43 + 44 + void beat_halt(void) 45 + { 46 + beat_shutdown_logical_partition(beat_halt_code); 47 + } 48 + 49 + int beat_set_rtc_time(struct rtc_time *rtc_time) 50 + { 51 + u64 tim; 52 + tim = mktime(rtc_time->tm_year+1900, 53 + rtc_time->tm_mon+1, rtc_time->tm_mday, 54 + rtc_time->tm_hour, rtc_time->tm_min, rtc_time->tm_sec); 55 + if (beat_rtc_write(tim)) 56 + return -1; 57 + return 0; 58 + } 59 + 60 + void beat_get_rtc_time(struct rtc_time *rtc_time) 61 + { 62 + u64 tim; 63 + 64 + if (beat_rtc_read(&tim)) 65 + tim = 0; 66 + to_tm(tim, rtc_time); 67 + rtc_time->tm_year -= 1900; 68 + rtc_time->tm_mon -= 1; 69 + } 70 + 71 + #define BEAT_NVRAM_SIZE 4096 72 + 73 + ssize_t beat_nvram_read(char *buf, size_t count, loff_t *index) 74 + { 75 + unsigned int i; 76 + unsigned long len; 77 + char *p = buf; 78 + 79 + if (*index >= BEAT_NVRAM_SIZE) 80 + return -ENODEV; 81 + i = *index; 82 + if (i + count > BEAT_NVRAM_SIZE) 83 + count = BEAT_NVRAM_SIZE - i; 84 + 85 + for (; count != 0; count -= len) { 86 + len = count; 87 + if (len > BEAT_NVRW_CNT) 88 + len = BEAT_NVRW_CNT; 89 + if (beat_eeprom_read(i, len, p)) { 90 + return -EIO; 91 + } 92 + 93 + p += len; 94 + i += len; 95 + } 96 + *index = i; 97 + return p - buf; 98 + } 99 + 100 + ssize_t beat_nvram_write(char *buf, size_t count, loff_t *index) 101 + { 102 + unsigned int i; 103 + unsigned long len; 104 + char *p = buf; 105 + 106 + if (*index >= BEAT_NVRAM_SIZE) 107 + return -ENODEV; 108 + i = *index; 109 + if (i + count > BEAT_NVRAM_SIZE) 110 + count = BEAT_NVRAM_SIZE - i; 111 + 112 + for (; count != 0; count -= len) { 113 + len = count; 114 + if (len > BEAT_NVRW_CNT) 115 + len = BEAT_NVRW_CNT; 116 + if (beat_eeprom_write(i, len, p)) { 117 + return -EIO; 118 + } 119 + 120 + p += len; 121 + i += len; 122 + } 123 + *index = i; 124 + return p - buf; 125 + } 126 + 127 + ssize_t beat_nvram_get_size(void) 128 + { 129 + return BEAT_NVRAM_SIZE; 130 + } 131 + 132 + int beat_set_xdabr(unsigned long dabr) 133 + { 134 + if (beat_set_dabr(dabr, DABRX_KERNEL | DABRX_USER)) 135 + return -1; 136 + return 0; 137 + } 138 + 139 + int64_t beat_get_term_char(u64 vterm, u64 *len, u64 *t1, u64 *t2) 140 + { 141 + u64 db[2]; 142 + s64 ret; 143 + 144 + ret = beat_get_characters_from_console(vterm, len, (u8*)db); 145 + if (ret == 0) { 146 + *t1 = db[0]; 147 + *t2 = db[1]; 148 + } 149 + return ret; 150 + } 151 + 152 + int64_t beat_put_term_char(u64 vterm, u64 len, u64 t1, u64 t2) 153 + { 154 + u64 db[2]; 155 + 156 + db[0] = t1; 157 + db[1] = t2; 158 + return beat_put_characters_to_console(vterm, len, (u8*)db); 159 + } 160 + 161 + EXPORT_SYMBOL(beat_get_term_char); 162 + EXPORT_SYMBOL(beat_put_term_char); 163 + EXPORT_SYMBOL(beat_halt_code);
+40
arch/powerpc/platforms/celleb/beat.h
··· 1 + /* 2 + * Guest OS Interfaces. 3 + * 4 + * (C) Copyright 2006 TOSHIBA CORPORATION 5 + * 6 + * This program is free software; you can redistribute it and/or modify 7 + * it under the terms of the GNU General Public License as published by 8 + * the Free Software Foundation; either version 2 of the License, or 9 + * (at your option) any later version. 10 + * 11 + * This program is distributed in the hope that it will be useful, 12 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 + * GNU General Public License for more details. 15 + * 16 + * You should have received a copy of the GNU General Public License along 17 + * with this program; if not, write to the Free Software Foundation, Inc., 18 + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 19 + */ 20 + 21 + #ifndef _CELLEB_BEAT_H 22 + #define _CELLEB_BEAT_H 23 + 24 + #define DABRX_KERNEL (1UL<<1) 25 + #define DABRX_USER (1UL<<0) 26 + 27 + int64_t beat_get_term_char(uint64_t,uint64_t*,uint64_t*,uint64_t*); 28 + int64_t beat_put_term_char(uint64_t,uint64_t,uint64_t,uint64_t); 29 + int64_t beat_repository_encode(int, const char *, uint64_t[4]); 30 + void beat_restart(char *); 31 + void beat_power_off(void); 32 + void beat_halt(void); 33 + int beat_set_rtc_time(struct rtc_time *); 34 + void beat_get_rtc_time(struct rtc_time *); 35 + ssize_t beat_nvram_get_size(void); 36 + ssize_t beat_nvram_read(char *, size_t, loff_t *); 37 + ssize_t beat_nvram_write(char *, size_t, loff_t *); 38 + int beat_set_xdabr(unsigned long); 39 + 40 + #endif /* _CELLEB_BEAT_H */
+191
arch/powerpc/platforms/celleb/setup.c
··· 1 + /* 2 + * Celleb setup code 3 + * 4 + * (C) Copyright 2006-2007 TOSHIBA CORPORATION 5 + * 6 + * This code is based on arch/powerpc/platforms/cell/setup.c: 7 + * Copyright (C) 1995 Linus Torvalds 8 + * Adapted from 'alpha' version by Gary Thomas 9 + * Modified by Cort Dougan (cort@cs.nmt.edu) 10 + * Modified by PPC64 Team, IBM Corp 11 + * Modified by Cell Team, IBM Deutschland Entwicklung GmbH 12 + * 13 + * This program is free software; you can redistribute it and/or modify 14 + * it under the terms of the GNU General Public License as published by 15 + * the Free Software Foundation; either version 2 of the License, or 16 + * (at your option) any later version. 17 + * 18 + * This program is distributed in the hope that it will be useful, 19 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 20 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 + * GNU General Public License for more details. 22 + * 23 + * You should have received a copy of the GNU General Public License along 24 + * with this program; if not, write to the Free Software Foundation, Inc., 25 + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 26 + */ 27 + 28 + #undef DEBUG 29 + 30 + #include <linux/cpu.h> 31 + #include <linux/sched.h> 32 + #include <linux/kernel.h> 33 + #include <linux/mm.h> 34 + #include <linux/stddef.h> 35 + #include <linux/unistd.h> 36 + #include <linux/reboot.h> 37 + #include <linux/init.h> 38 + #include <linux/delay.h> 39 + #include <linux/irq.h> 40 + #include <linux/seq_file.h> 41 + #include <linux/root_dev.h> 42 + #include <linux/console.h> 43 + 44 + #include <asm/mmu.h> 45 + #include <asm/processor.h> 46 + #include <asm/io.h> 47 + #include <asm/kexec.h> 48 + #include <asm/prom.h> 49 + #include <asm/machdep.h> 50 + #include <asm/cputable.h> 51 + #include <asm/irq.h> 52 + #include <asm/spu_priv1.h> 53 + #include <asm/firmware.h> 54 + #include <asm/of_platform.h> 55 + 56 + #include "interrupt.h" 57 + #include "beat_wrapper.h" 58 + #include "beat.h" 59 + #include "pci.h" 60 + 61 + static char celleb_machine_type[128] = "Celleb"; 62 + 63 + static void celleb_show_cpuinfo(struct seq_file *m) 64 + { 65 + struct device_node *root; 66 + const char *model = ""; 67 + 68 + root = of_find_node_by_path("/"); 69 + if (root) 70 + model = get_property(root, "model", NULL); 71 + /* using "CHRP" is to trick anaconda into installing FCx into Celleb */ 72 + seq_printf(m, "machine\t\t: %s %s\n", celleb_machine_type, model); 73 + of_node_put(root); 74 + } 75 + 76 + static int celleb_machine_type_hack(char *ptr) 77 + { 78 + strncpy(celleb_machine_type, ptr, sizeof(celleb_machine_type)); 79 + celleb_machine_type[sizeof(celleb_machine_type)-1] = 0; 80 + return 0; 81 + } 82 + 83 + __setup("celleb_machine_type_hack", celleb_machine_type_hack); 84 + 85 + static void celleb_progress(char *s, unsigned short hex) 86 + { 87 + printk("*** %04x : %s\n", hex, s ? s : ""); 88 + } 89 + 90 + static void __init celleb_setup_arch(void) 91 + { 92 + #ifdef CONFIG_SPU_BASE 93 + spu_priv1_ops = &spu_priv1_beat_ops; 94 + spu_management_ops = &spu_management_of_ops; 95 + #endif 96 + 97 + #ifdef CONFIG_SMP 98 + smp_init_celleb(); 99 + #endif 100 + 101 + /* init to some ~sane value until calibrate_delay() runs */ 102 + loops_per_jiffy = 50000000; 103 + 104 + if (ROOT_DEV == 0) { 105 + printk("No ramdisk, default root is /dev/hda2\n"); 106 + ROOT_DEV = Root_HDA2; 107 + } 108 + 109 + #ifdef CONFIG_DUMMY_CONSOLE 110 + conswitchp = &dummy_con; 111 + #endif 112 + } 113 + 114 + static void beat_power_save(void) 115 + { 116 + beat_pause(0); 117 + } 118 + 119 + static int __init celleb_probe(void) 120 + { 121 + unsigned long root = of_get_flat_dt_root(); 122 + 123 + if (!of_flat_dt_is_compatible(root, "Beat")) 124 + return 0; 125 + 126 + powerpc_firmware_features |= FW_FEATURE_CELLEB_POSSIBLE; 127 + hpte_init_beat(); 128 + return 1; 129 + } 130 + 131 + /* 132 + * Cell has no legacy IO; anything calling this function has to 133 + * fail or bad things will happen 134 + */ 135 + static int celleb_check_legacy_ioport(unsigned int baseport) 136 + { 137 + return -ENODEV; 138 + } 139 + 140 + static void celleb_kexec_cpu_down(int crash, int secondary) 141 + { 142 + beatic_deinit_IRQ(); 143 + } 144 + 145 + static struct of_device_id celleb_bus_ids[] = { 146 + { .type = "scc", }, 147 + { .type = "ioif", }, /* old style */ 148 + {}, 149 + }; 150 + 151 + static int __init celleb_publish_devices(void) 152 + { 153 + if (!machine_is(celleb)) 154 + return 0; 155 + 156 + /* Publish OF platform devices for southbridge IOs */ 157 + of_platform_bus_probe(NULL, celleb_bus_ids, NULL); 158 + 159 + return 0; 160 + } 161 + device_initcall(celleb_publish_devices); 162 + 163 + define_machine(celleb) { 164 + .name = "Cell Reference Set", 165 + .probe = celleb_probe, 166 + .setup_arch = celleb_setup_arch, 167 + .show_cpuinfo = celleb_show_cpuinfo, 168 + .restart = beat_restart, 169 + .power_off = beat_power_off, 170 + .halt = beat_halt, 171 + .get_rtc_time = beat_get_rtc_time, 172 + .set_rtc_time = beat_set_rtc_time, 173 + .calibrate_decr = generic_calibrate_decr, 174 + .check_legacy_ioport = celleb_check_legacy_ioport, 175 + .progress = celleb_progress, 176 + .power_save = beat_power_save, 177 + .nvram_size = beat_nvram_get_size, 178 + .nvram_read = beat_nvram_read, 179 + .nvram_write = beat_nvram_write, 180 + .set_dabr = beat_set_xdabr, 181 + .init_IRQ = beatic_init_IRQ, 182 + .get_irq = beatic_get_irq, 183 + .pci_probe_mode = celleb_pci_probe_mode, 184 + .pci_setup_phb = celleb_setup_phb, 185 + #ifdef CONFIG_KEXEC 186 + .kexec_cpu_down = celleb_kexec_cpu_down, 187 + .machine_kexec = default_machine_kexec, 188 + .machine_kexec_prepare = default_machine_kexec_prepare, 189 + .machine_crash_shutdown = default_machine_crash_shutdown, 190 + #endif 191 + };
+124
arch/powerpc/platforms/celleb/smp.c
··· 1 + /* 2 + * SMP support for Celleb platform. (Incomplete) 3 + * 4 + * (C) Copyright 2006 TOSHIBA CORPORATION 5 + * 6 + * This code is based on arch/powerpc/platforms/cell/smp.c: 7 + * Dave Engebretsen, Peter Bergner, and 8 + * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com 9 + * Plus various changes from other IBM teams... 10 + * 11 + * This program is free software; you can redistribute it and/or modify 12 + * it under the terms of the GNU General Public License as published by 13 + * the Free Software Foundation; either version 2 of the License, or 14 + * (at your option) any later version. 15 + * 16 + * This program is distributed in the hope that it will be useful, 17 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 + * GNU General Public License for more details. 20 + * 21 + * You should have received a copy of the GNU General Public License along 22 + * with this program; if not, write to the Free Software Foundation, Inc., 23 + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 24 + */ 25 + 26 + #undef DEBUG 27 + 28 + #include <linux/kernel.h> 29 + #include <linux/smp.h> 30 + #include <linux/interrupt.h> 31 + #include <linux/init.h> 32 + #include <linux/threads.h> 33 + #include <linux/cpu.h> 34 + 35 + #include <asm/irq.h> 36 + #include <asm/smp.h> 37 + #include <asm/machdep.h> 38 + #include <asm/udbg.h> 39 + 40 + #include "interrupt.h" 41 + 42 + #ifdef DEBUG 43 + #define DBG(fmt...) udbg_printf(fmt) 44 + #else 45 + #define DBG(fmt...) 46 + #endif 47 + 48 + /* 49 + * The primary thread of each non-boot processor is recorded here before 50 + * smp init. 51 + */ 52 + /* static cpumask_t of_spin_map; */ 53 + 54 + /** 55 + * smp_startup_cpu() - start the given cpu 56 + * 57 + * At boot time, there is nothing to do for primary threads which were 58 + * started from Open Firmware. For anything else, call RTAS with the 59 + * appropriate start location. 60 + * 61 + * Returns: 62 + * 0 - failure 63 + * 1 - success 64 + */ 65 + static inline int __devinit smp_startup_cpu(unsigned int lcpu) 66 + { 67 + return 0; 68 + } 69 + 70 + static void smp_beatic_message_pass(int target, int msg) 71 + { 72 + unsigned int i; 73 + 74 + if (target < NR_CPUS) { 75 + beatic_cause_IPI(target, msg); 76 + } else { 77 + for_each_online_cpu(i) { 78 + if (target == MSG_ALL_BUT_SELF 79 + && i == smp_processor_id()) 80 + continue; 81 + beatic_cause_IPI(i, msg); 82 + } 83 + } 84 + } 85 + 86 + static int __init smp_beatic_probe(void) 87 + { 88 + return cpus_weight(cpu_possible_map); 89 + } 90 + 91 + static void __devinit smp_beatic_setup_cpu(int cpu) 92 + { 93 + beatic_setup_cpu(cpu); 94 + } 95 + 96 + static void __devinit smp_celleb_kick_cpu(int nr) 97 + { 98 + BUG_ON(nr < 0 || nr >= NR_CPUS); 99 + 100 + if (!smp_startup_cpu(nr)) 101 + return; 102 + } 103 + 104 + static int smp_celleb_cpu_bootable(unsigned int nr) 105 + { 106 + return 1; 107 + } 108 + static struct smp_ops_t bpa_beatic_smp_ops = { 109 + .message_pass = smp_beatic_message_pass, 110 + .probe = smp_beatic_probe, 111 + .kick_cpu = smp_celleb_kick_cpu, 112 + .setup_cpu = smp_beatic_setup_cpu, 113 + .cpu_bootable = smp_celleb_cpu_bootable, 114 + }; 115 + 116 + /* This is called very early */ 117 + void __init smp_init_celleb(void) 118 + { 119 + DBG(" -> smp_init_celleb()\n"); 120 + 121 + smp_ops = &bpa_beatic_smp_ops; 122 + 123 + DBG(" <- smp_init_celleb()\n"); 124 + }
+9
include/asm-powerpc/firmware.h
··· 43 43 #define FW_FEATURE_ISERIES ASM_CONST(0x0000000000200000) 44 44 #define FW_FEATURE_LPAR ASM_CONST(0x0000000000400000) 45 45 #define FW_FEATURE_PS3_LV1 ASM_CONST(0x0000000000800000) 46 + #define FW_FEATURE_BEAT ASM_CONST(0x0000000001000000) 46 47 47 48 #ifndef __ASSEMBLY__ 48 49 ··· 62 61 FW_FEATURE_ISERIES_ALWAYS = FW_FEATURE_ISERIES | FW_FEATURE_LPAR, 63 62 FW_FEATURE_PS3_POSSIBLE = FW_FEATURE_LPAR | FW_FEATURE_PS3_LV1, 64 63 FW_FEATURE_PS3_ALWAYS = FW_FEATURE_LPAR | FW_FEATURE_PS3_LV1, 64 + FW_FEATURE_CELLEB_POSSIBLE = FW_FEATURE_LPAR | FW_FEATURE_BEAT, 65 + FW_FEATURE_CELLEB_ALWAYS = FW_FEATURE_LPAR | FW_FEATURE_BEAT, 65 66 FW_FEATURE_NATIVE_POSSIBLE = 0, 66 67 FW_FEATURE_NATIVE_ALWAYS = 0, 67 68 FW_FEATURE_POSSIBLE = ··· 75 72 #endif 76 73 #ifdef CONFIG_PPC_PS3 77 74 FW_FEATURE_PS3_POSSIBLE | 75 + #endif 76 + #ifdef CONFIG_PPC_CELLEB 77 + FW_FEATURE_CELLEB_POSSIBLE | 78 78 #endif 79 79 #ifdef CONFIG_PPC_NATIVE 80 80 FW_FEATURE_NATIVE_ALWAYS | ··· 92 86 #endif 93 87 #ifdef CONFIG_PPC_PS3 94 88 FW_FEATURE_PS3_ALWAYS & 89 + #endif 90 + #ifdef CONFIG_PPC_CELLEB 91 + FW_FEATURE_CELLEB_ALWAYS & 95 92 #endif 96 93 #ifdef CONFIG_PPC_NATIVE 97 94 FW_FEATURE_NATIVE_ALWAYS &
+1
include/asm-powerpc/smp.h
··· 75 75 void smp_init_iSeries(void); 76 76 void smp_init_pSeries(void); 77 77 void smp_init_cell(void); 78 + void smp_init_celleb(void); 78 79 void smp_setup_cpu_maps(void); 79 80 80 81 extern int __cpu_disable(void);