Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6:
sparc: Set CONFIG_HAVE_ARCH_TRACEHOOK
sparc: Add task_pt_regs().
sparc: Add call to tracehook_signal_handler().
sparc: Create and use TIF_NOTIFY_RESUME.
sparc: Use tracehook routines in syscall_trace().
sparc64: tracehook: CONFIG_HAVE_ARCH_TRACEHOOK
sparc: Add user_stack_pointer().
sparc64: tracehook_signal_handler
sparc64: tracehook: TIF_NOTIFY_RESUME
sparc: Add asm/syscall.h
sparc64: tracehook syscall
sparc: enable headers_export again
sparc, sparc64: use arch/sparc/include

+4682 -4640
+5 -1
Makefile
··· 206 206 endif 207 207 208 208 # Where to locate arch specific headers 209 - hdr-arch := $(SRCARCH) 209 + ifeq ($(ARCH),sparc64) 210 + hdr-arch := sparc 211 + else 212 + hdr-arch := $(SRCARCH) 213 + endif 210 214 211 215 KCONFIG_CONFIG ?= .config 212 216
+1
arch/sparc/Kconfig
··· 68 68 select HAVE_IDE 69 69 select HAVE_OPROFILE 70 70 select HAVE_ARCH_KGDB if !SMP 71 + select HAVE_ARCH_TRACEHOOK 71 72 72 73 # Identify this as a Sparc32 build 73 74 config SPARC32
+45
arch/sparc/include/asm/Kbuild
··· 1 + # User exported sparc header files 2 + include include/asm-generic/Kbuild.asm 3 + 4 + header-y += ipcbuf_32.h 5 + header-y += ipcbuf_64.h 6 + header-y += posix_types_32.h 7 + header-y += posix_types_64.h 8 + header-y += ptrace_32.h 9 + header-y += ptrace_64.h 10 + header-y += sigcontext_32.h 11 + header-y += sigcontext_64.h 12 + header-y += siginfo_32.h 13 + header-y += siginfo_64.h 14 + header-y += signal_32.h 15 + header-y += signal_64.h 16 + header-y += stat_32.h 17 + header-y += stat_64.h 18 + header-y += statfs_32.h 19 + header-y += statfs_64.h 20 + header-y += unistd_32.h 21 + header-y += unistd_64.h 22 + 23 + header-y += apc.h 24 + header-y += asi.h 25 + header-y += bpp.h 26 + header-y += display7seg.h 27 + header-y += envctrl.h 28 + header-y += fbio.h 29 + header-y += jsflash.h 30 + header-y += openprom.h 31 + header-y += openprom_32.h 32 + header-y += openprom_64.h 33 + header-y += openpromio.h 34 + header-y += perfctr.h 35 + header-y += psrcompat.h 36 + header-y += psr.h 37 + header-y += pstate.h 38 + header-y += reg.h 39 + header-y += reg_32.h 40 + header-y += reg_64.h 41 + header-y += traps.h 42 + header-y += uctx.h 43 + header-y += utrap.h 44 + header-y += vfc_ioctls.h 45 + header-y += watchdog.h
+8
arch/sparc/include/asm/atomic.h
··· 1 + #ifndef ___ASM_SPARC_ATOMIC_H 2 + #define ___ASM_SPARC_ATOMIC_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/atomic_64.h> 5 + #else 6 + #include <asm/atomic_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/auxio.h
··· 1 + #ifndef ___ASM_SPARC_AUXIO_H 2 + #define ___ASM_SPARC_AUXIO_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/auxio_64.h> 5 + #else 6 + #include <asm/auxio_32.h> 7 + #endif 8 + #endif
+89
arch/sparc/include/asm/auxio_32.h
··· 1 + /* 2 + * auxio.h: Definitions and code for the Auxiliary I/O register. 3 + * 4 + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) 5 + */ 6 + #ifndef _SPARC_AUXIO_H 7 + #define _SPARC_AUXIO_H 8 + 9 + #include <asm/system.h> 10 + #include <asm/vaddrs.h> 11 + 12 + /* This register is an unsigned char in IO space. It does two things. 13 + * First, it is used to control the front panel LED light on machines 14 + * that have it (good for testing entry points to trap handlers and irq's) 15 + * Secondly, it controls various floppy drive parameters. 16 + */ 17 + #define AUXIO_ORMEIN 0xf0 /* All writes must set these bits. */ 18 + #define AUXIO_ORMEIN4M 0xc0 /* sun4m - All writes must set these bits. */ 19 + #define AUXIO_FLPY_DENS 0x20 /* Floppy density, high if set. Read only. */ 20 + #define AUXIO_FLPY_DCHG 0x10 /* A disk change occurred. Read only. */ 21 + #define AUXIO_EDGE_ON 0x10 /* sun4m - On means Jumper block is in. */ 22 + #define AUXIO_FLPY_DSEL 0x08 /* Drive select/start-motor. Write only. */ 23 + #define AUXIO_LINK_TEST 0x08 /* sun4m - On means TPE Carrier detect. */ 24 + 25 + /* Set the following to one, then zero, after doing a pseudo DMA transfer. */ 26 + #define AUXIO_FLPY_TCNT 0x04 /* Floppy terminal count. Write only. */ 27 + 28 + /* Set the following to zero to eject the floppy. */ 29 + #define AUXIO_FLPY_EJCT 0x02 /* Eject floppy disk. Write only. */ 30 + #define AUXIO_LED 0x01 /* On if set, off if unset. Read/Write */ 31 + 32 + #ifndef __ASSEMBLY__ 33 + 34 + /* 35 + * NOTE: these routines are implementation dependent-- 36 + * understand the hardware you are querying! 37 + */ 38 + extern void set_auxio(unsigned char bits_on, unsigned char bits_off); 39 + extern unsigned char get_auxio(void); /* .../asm/floppy.h */ 40 + 41 + /* 42 + * The following routines are provided for driver-compatibility 43 + * with sparc64 (primarily sunlance.c) 44 + */ 45 + 46 + #define AUXIO_LTE_ON 1 47 + #define AUXIO_LTE_OFF 0 48 + 49 + /* auxio_set_lte - Set Link Test Enable (TPE Link Detect) 50 + * 51 + * on - AUXIO_LTE_ON or AUXIO_LTE_OFF 52 + */ 53 + #define auxio_set_lte(on) \ 54 + do { \ 55 + if(on) { \ 56 + set_auxio(AUXIO_LINK_TEST, 0); \ 57 + } else { \ 58 + set_auxio(0, AUXIO_LINK_TEST); \ 59 + } \ 60 + } while (0) 61 + 62 + #define AUXIO_LED_ON 1 63 + #define AUXIO_LED_OFF 0 64 + 65 + /* auxio_set_led - Set system front panel LED 66 + * 67 + * on - AUXIO_LED_ON or AUXIO_LED_OFF 68 + */ 69 + #define auxio_set_led(on) \ 70 + do { \ 71 + if(on) { \ 72 + set_auxio(AUXIO_LED, 0); \ 73 + } else { \ 74 + set_auxio(0, AUXIO_LED); \ 75 + } \ 76 + } while (0) 77 + 78 + #endif /* !(__ASSEMBLY__) */ 79 + 80 + 81 + /* AUXIO2 (Power Off Control) */ 82 + extern __volatile__ unsigned char * auxio_power_register; 83 + 84 + #define AUXIO_POWER_DETECT_FAILURE 32 85 + #define AUXIO_POWER_CLEAR_FAILURE 2 86 + #define AUXIO_POWER_OFF 1 87 + 88 + 89 + #endif /* !(_SPARC_AUXIO_H) */
+8
arch/sparc/include/asm/bitops.h
··· 1 + #ifndef ___ASM_SPARC_BITOPS_H 2 + #define ___ASM_SPARC_BITOPS_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/bitops_64.h> 5 + #else 6 + #include <asm/bitops_32.h> 7 + #endif 8 + #endif
+208
arch/sparc/include/asm/btfixup.h
··· 1 + /* 2 + * asm/btfixup.h: Macros for boot time linking. 3 + * 4 + * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) 5 + */ 6 + 7 + #ifndef _SPARC_BTFIXUP_H 8 + #define _SPARC_BTFIXUP_H 9 + 10 + #include <linux/init.h> 11 + 12 + #ifndef __ASSEMBLY__ 13 + 14 + #ifdef MODULE 15 + extern unsigned int ___illegal_use_of_BTFIXUP_SIMM13_in_module(void); 16 + extern unsigned int ___illegal_use_of_BTFIXUP_SETHI_in_module(void); 17 + extern unsigned int ___illegal_use_of_BTFIXUP_HALF_in_module(void); 18 + extern unsigned int ___illegal_use_of_BTFIXUP_INT_in_module(void); 19 + 20 + #define BTFIXUP_SIMM13(__name) ___illegal_use_of_BTFIXUP_SIMM13_in_module() 21 + #define BTFIXUP_HALF(__name) ___illegal_use_of_BTFIXUP_HALF_in_module() 22 + #define BTFIXUP_SETHI(__name) ___illegal_use_of_BTFIXUP_SETHI_in_module() 23 + #define BTFIXUP_INT(__name) ___illegal_use_of_BTFIXUP_INT_in_module() 24 + #define BTFIXUP_BLACKBOX(__name) ___illegal_use_of_BTFIXUP_BLACKBOX_in_module 25 + 26 + #else 27 + 28 + #define BTFIXUP_SIMM13(__name) ___sf_##__name() 29 + #define BTFIXUP_HALF(__name) ___af_##__name() 30 + #define BTFIXUP_SETHI(__name) ___hf_##__name() 31 + #define BTFIXUP_INT(__name) ((unsigned int)&___i_##__name) 32 + /* This must be written in assembly and present in a sethi */ 33 + #define BTFIXUP_BLACKBOX(__name) ___b_##__name 34 + #endif /* MODULE */ 35 + 36 + /* Fixup call xx */ 37 + 38 + #define BTFIXUPDEF_CALL(__type, __name, __args...) \ 39 + extern __type ___f_##__name(__args); \ 40 + extern unsigned ___fs_##__name[3]; 41 + #define BTFIXUPDEF_CALL_CONST(__type, __name, __args...) \ 42 + extern __type ___f_##__name(__args) __attribute_const__; \ 43 + extern unsigned ___fs_##__name[3]; 44 + #define BTFIXUP_CALL(__name) ___f_##__name 45 + 46 + #define BTFIXUPDEF_BLACKBOX(__name) \ 47 + extern unsigned ___bs_##__name[2]; 48 + 49 + /* Put bottom 13bits into some register variable */ 50 + 51 + #define BTFIXUPDEF_SIMM13(__name) \ 52 + static inline unsigned int ___sf_##__name(void) __attribute_const__; \ 53 + extern unsigned ___ss_##__name[2]; \ 54 + static inline unsigned int ___sf_##__name(void) { \ 55 + unsigned int ret; \ 56 + __asm__ ("or %%g0, ___s_" #__name ", %0" : "=r"(ret)); \ 57 + return ret; \ 58 + } 59 + #define BTFIXUPDEF_SIMM13_INIT(__name,__val) \ 60 + static inline unsigned int ___sf_##__name(void) __attribute_const__; \ 61 + extern unsigned ___ss_##__name[2]; \ 62 + static inline unsigned int ___sf_##__name(void) { \ 63 + unsigned int ret; \ 64 + __asm__ ("or %%g0, ___s_" #__name "__btset_" #__val ", %0" : "=r"(ret));\ 65 + return ret; \ 66 + } 67 + 68 + /* Put either bottom 13 bits, or upper 22 bits into some register variable 69 + * (depending on the value, this will lead into sethi FIX, reg; or 70 + * mov FIX, reg; ) 71 + */ 72 + 73 + #define BTFIXUPDEF_HALF(__name) \ 74 + static inline unsigned int ___af_##__name(void) __attribute_const__; \ 75 + extern unsigned ___as_##__name[2]; \ 76 + static inline unsigned int ___af_##__name(void) { \ 77 + unsigned int ret; \ 78 + __asm__ ("or %%g0, ___a_" #__name ", %0" : "=r"(ret)); \ 79 + return ret; \ 80 + } 81 + #define BTFIXUPDEF_HALF_INIT(__name,__val) \ 82 + static inline unsigned int ___af_##__name(void) __attribute_const__; \ 83 + extern unsigned ___as_##__name[2]; \ 84 + static inline unsigned int ___af_##__name(void) { \ 85 + unsigned int ret; \ 86 + __asm__ ("or %%g0, ___a_" #__name "__btset_" #__val ", %0" : "=r"(ret));\ 87 + return ret; \ 88 + } 89 + 90 + /* Put upper 22 bits into some register variable */ 91 + 92 + #define BTFIXUPDEF_SETHI(__name) \ 93 + static inline unsigned int ___hf_##__name(void) __attribute_const__; \ 94 + extern unsigned ___hs_##__name[2]; \ 95 + static inline unsigned int ___hf_##__name(void) { \ 96 + unsigned int ret; \ 97 + __asm__ ("sethi %%hi(___h_" #__name "), %0" : "=r"(ret)); \ 98 + return ret; \ 99 + } 100 + #define BTFIXUPDEF_SETHI_INIT(__name,__val) \ 101 + static inline unsigned int ___hf_##__name(void) __attribute_const__; \ 102 + extern unsigned ___hs_##__name[2]; \ 103 + static inline unsigned int ___hf_##__name(void) { \ 104 + unsigned int ret; \ 105 + __asm__ ("sethi %%hi(___h_" #__name "__btset_" #__val "), %0" : \ 106 + "=r"(ret)); \ 107 + return ret; \ 108 + } 109 + 110 + /* Put a full 32bit integer into some register variable */ 111 + 112 + #define BTFIXUPDEF_INT(__name) \ 113 + extern unsigned char ___i_##__name; \ 114 + extern unsigned ___is_##__name[2]; 115 + 116 + #define BTFIXUPCALL_NORM 0x00000000 /* Always call */ 117 + #define BTFIXUPCALL_NOP 0x01000000 /* Possibly optimize to nop */ 118 + #define BTFIXUPCALL_RETINT(i) (0x90102000|((i) & 0x1fff)) /* Possibly optimize to mov i, %o0 */ 119 + #define BTFIXUPCALL_ORINT(i) (0x90122000|((i) & 0x1fff)) /* Possibly optimize to or %o0, i, %o0 */ 120 + #define BTFIXUPCALL_RETO0 0x01000000 /* Return first parameter, actually a nop */ 121 + #define BTFIXUPCALL_ANDNINT(i) (0x902a2000|((i) & 0x1fff)) /* Possibly optimize to andn %o0, i, %o0 */ 122 + #define BTFIXUPCALL_SWAPO0O1 0xd27a0000 /* Possibly optimize to swap [%o0],%o1 */ 123 + #define BTFIXUPCALL_SWAPO0G0 0xc07a0000 /* Possibly optimize to swap [%o0],%g0 */ 124 + #define BTFIXUPCALL_SWAPG1G2 0xc4784000 /* Possibly optimize to swap [%g1],%g2 */ 125 + #define BTFIXUPCALL_STG0O0 0xc0220000 /* Possibly optimize to st %g0,[%o0] */ 126 + #define BTFIXUPCALL_STO1O0 0xd2220000 /* Possibly optimize to st %o1,[%o0] */ 127 + 128 + #define BTFIXUPSET_CALL(__name, __addr, __insn) \ 129 + do { \ 130 + ___fs_##__name[0] |= 1; \ 131 + ___fs_##__name[1] = (unsigned long)__addr; \ 132 + ___fs_##__name[2] = __insn; \ 133 + } while (0) 134 + 135 + #define BTFIXUPSET_BLACKBOX(__name, __func) \ 136 + do { \ 137 + ___bs_##__name[0] |= 1; \ 138 + ___bs_##__name[1] = (unsigned long)__func; \ 139 + } while (0) 140 + 141 + #define BTFIXUPCOPY_CALL(__name, __from) \ 142 + do { \ 143 + ___fs_##__name[0] |= 1; \ 144 + ___fs_##__name[1] = ___fs_##__from[1]; \ 145 + ___fs_##__name[2] = ___fs_##__from[2]; \ 146 + } while (0) 147 + 148 + #define BTFIXUPSET_SIMM13(__name, __val) \ 149 + do { \ 150 + ___ss_##__name[0] |= 1; \ 151 + ___ss_##__name[1] = (unsigned)__val; \ 152 + } while (0) 153 + 154 + #define BTFIXUPCOPY_SIMM13(__name, __from) \ 155 + do { \ 156 + ___ss_##__name[0] |= 1; \ 157 + ___ss_##__name[1] = ___ss_##__from[1]; \ 158 + } while (0) 159 + 160 + #define BTFIXUPSET_HALF(__name, __val) \ 161 + do { \ 162 + ___as_##__name[0] |= 1; \ 163 + ___as_##__name[1] = (unsigned)__val; \ 164 + } while (0) 165 + 166 + #define BTFIXUPCOPY_HALF(__name, __from) \ 167 + do { \ 168 + ___as_##__name[0] |= 1; \ 169 + ___as_##__name[1] = ___as_##__from[1]; \ 170 + } while (0) 171 + 172 + #define BTFIXUPSET_SETHI(__name, __val) \ 173 + do { \ 174 + ___hs_##__name[0] |= 1; \ 175 + ___hs_##__name[1] = (unsigned)__val; \ 176 + } while (0) 177 + 178 + #define BTFIXUPCOPY_SETHI(__name, __from) \ 179 + do { \ 180 + ___hs_##__name[0] |= 1; \ 181 + ___hs_##__name[1] = ___hs_##__from[1]; \ 182 + } while (0) 183 + 184 + #define BTFIXUPSET_INT(__name, __val) \ 185 + do { \ 186 + ___is_##__name[0] |= 1; \ 187 + ___is_##__name[1] = (unsigned)__val; \ 188 + } while (0) 189 + 190 + #define BTFIXUPCOPY_INT(__name, __from) \ 191 + do { \ 192 + ___is_##__name[0] |= 1; \ 193 + ___is_##__name[1] = ___is_##__from[1]; \ 194 + } while (0) 195 + 196 + #define BTFIXUPVAL_CALL(__name) \ 197 + ((unsigned long)___fs_##__name[1]) 198 + 199 + extern void btfixup(void); 200 + 201 + #else /* __ASSEMBLY__ */ 202 + 203 + #define BTFIXUP_SETHI(__name) %hi(___h_ ## __name) 204 + #define BTFIXUP_SETHI_INIT(__name,__val) %hi(___h_ ## __name ## __btset_ ## __val) 205 + 206 + #endif /* __ASSEMBLY__ */ 207 + 208 + #endif /* !(_SPARC_BTFIXUP_H) */
+24
arch/sparc/include/asm/bugs.h
··· 1 + /* include/asm/bugs.h: Sparc probes for various bugs. 2 + * 3 + * Copyright (C) 1996, 2007 David S. Miller (davem@davemloft.net) 4 + */ 5 + 6 + #ifdef CONFIG_SPARC32 7 + #include <asm/cpudata.h> 8 + #endif 9 + 10 + #ifdef CONFIG_SPARC64 11 + #include <asm/sstate.h> 12 + #endif 13 + 14 + extern unsigned long loops_per_jiffy; 15 + 16 + static void __init check_bugs(void) 17 + { 18 + #if defined(CONFIG_SPARC32) && !defined(CONFIG_SMP) 19 + cpu_data(0).udelay_val = loops_per_jiffy; 20 + #endif 21 + #ifdef CONFIG_SPARC64 22 + sstate_running(); 23 + #endif 24 + }
+8
arch/sparc/include/asm/cacheflush.h
··· 1 + #ifndef ___ASM_SPARC_CACHEFLUSH_H 2 + #define ___ASM_SPARC_CACHEFLUSH_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/cacheflush_64.h> 5 + #else 6 + #include <asm/cacheflush_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/checksum.h
··· 1 + #ifndef ___ASM_SPARC_CHECKSUM_H 2 + #define ___ASM_SPARC_CHECKSUM_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/checksum_64.h> 5 + #else 6 + #include <asm/checksum_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/cpudata.h
··· 1 + #ifndef ___ASM_SPARC_CPUDATA_H 2 + #define ___ASM_SPARC_CPUDATA_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/cpudata_64.h> 5 + #else 6 + #include <asm/cpudata_32.h> 7 + #endif 8 + #endif
+27
arch/sparc/include/asm/cpudata_32.h
··· 1 + /* cpudata.h: Per-cpu parameters. 2 + * 3 + * Copyright (C) 2004 Keith M Wesolowski (wesolows@foobazco.org) 4 + * 5 + * Based on include/asm/cpudata.h and Linux 2.4 smp.h 6 + * both (C) David S. Miller. 7 + */ 8 + 9 + #ifndef _SPARC_CPUDATA_H 10 + #define _SPARC_CPUDATA_H 11 + 12 + #include <linux/percpu.h> 13 + 14 + typedef struct { 15 + unsigned long udelay_val; 16 + unsigned long clock_tick; 17 + unsigned int multiplier; 18 + unsigned int counter; 19 + int prom_node; 20 + int mid; 21 + int next; 22 + } cpuinfo_sparc; 23 + 24 + DECLARE_PER_CPU(cpuinfo_sparc, __cpu_data); 25 + #define cpu_data(__cpu) per_cpu(__cpu_data, (__cpu)) 26 + 27 + #endif /* _SPARC_CPUDATA_H */
+34
arch/sparc/include/asm/current.h
··· 1 + /* include/asm/current.h 2 + * 3 + * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation 4 + * Copyright (C) 2002 Pete Zaitcev (zaitcev@yahoo.com) 5 + * Copyright (C) 2007 David S. Miller (davem@davemloft.net) 6 + * 7 + * Derived from "include/asm-s390/current.h" by 8 + * Martin Schwidefsky (schwidefsky@de.ibm.com) 9 + * Derived from "include/asm-i386/current.h" 10 + */ 11 + #ifndef _SPARC_CURRENT_H 12 + #define _SPARC_CURRENT_H 13 + 14 + #include <linux/thread_info.h> 15 + 16 + #ifdef CONFIG_SPARC64 17 + register struct task_struct *current asm("g4"); 18 + #endif 19 + 20 + #ifdef CONFIG_SPARC32 21 + /* We might want to consider using %g4 like sparc64 to shave a few cycles. 22 + * 23 + * Two stage process (inline + #define) for type-checking. 24 + * We also obfuscate get_current() to check if anyone used that by mistake. 25 + */ 26 + struct task_struct; 27 + static inline struct task_struct *__get_current(void) 28 + { 29 + return current_thread_info()->task; 30 + } 31 + #define current __get_current() 32 + #endif 33 + 34 + #endif /* !(_SPARC_CURRENT_H) */
+8
arch/sparc/include/asm/delay.h
··· 1 + #ifndef ___ASM_SPARC_DELAY_H 2 + #define ___ASM_SPARC_DELAY_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/delay_64.h> 5 + #else 6 + #include <asm/delay_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/dma-mapping.h
··· 1 + #ifndef ___ASM_SPARC_DMA_MAPPING_H 2 + #define ___ASM_SPARC_DMA_MAPPING_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/dma-mapping_64.h> 5 + #else 6 + #include <asm/dma-mapping_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/dma.h
··· 1 + #ifndef ___ASM_SPARC_DMA_H 2 + #define ___ASM_SPARC_DMA_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/dma_64.h> 5 + #else 6 + #include <asm/dma_32.h> 7 + #endif 8 + #endif
+288
arch/sparc/include/asm/dma_32.h
··· 1 + /* include/asm/dma.h 2 + * 3 + * Copyright 1995 (C) David S. Miller (davem@davemloft.net) 4 + */ 5 + 6 + #ifndef _ASM_SPARC_DMA_H 7 + #define _ASM_SPARC_DMA_H 8 + 9 + #include <linux/kernel.h> 10 + #include <linux/types.h> 11 + 12 + #include <asm/vac-ops.h> /* for invalidate's, etc. */ 13 + #include <asm/sbus.h> 14 + #include <asm/delay.h> 15 + #include <asm/oplib.h> 16 + #include <asm/system.h> 17 + #include <asm/io.h> 18 + #include <linux/spinlock.h> 19 + 20 + struct page; 21 + extern spinlock_t dma_spin_lock; 22 + 23 + static inline unsigned long claim_dma_lock(void) 24 + { 25 + unsigned long flags; 26 + spin_lock_irqsave(&dma_spin_lock, flags); 27 + return flags; 28 + } 29 + 30 + static inline void release_dma_lock(unsigned long flags) 31 + { 32 + spin_unlock_irqrestore(&dma_spin_lock, flags); 33 + } 34 + 35 + /* These are irrelevant for Sparc DMA, but we leave it in so that 36 + * things can compile. 37 + */ 38 + #define MAX_DMA_CHANNELS 8 39 + #define MAX_DMA_ADDRESS (~0UL) 40 + #define DMA_MODE_READ 1 41 + #define DMA_MODE_WRITE 2 42 + 43 + /* Useful constants */ 44 + #define SIZE_16MB (16*1024*1024) 45 + #define SIZE_64K (64*1024) 46 + 47 + /* SBUS DMA controller reg offsets */ 48 + #define DMA_CSR 0x00UL /* rw DMA control/status register 0x00 */ 49 + #define DMA_ADDR 0x04UL /* rw DMA transfer address register 0x04 */ 50 + #define DMA_COUNT 0x08UL /* rw DMA transfer count register 0x08 */ 51 + #define DMA_TEST 0x0cUL /* rw DMA test/debug register 0x0c */ 52 + 53 + /* DVMA chip revisions */ 54 + enum dvma_rev { 55 + dvmarev0, 56 + dvmaesc1, 57 + dvmarev1, 58 + dvmarev2, 59 + dvmarev3, 60 + dvmarevplus, 61 + dvmahme 62 + }; 63 + 64 + #define DMA_HASCOUNT(rev) ((rev)==dvmaesc1) 65 + 66 + /* Linux DMA information structure, filled during probe. */ 67 + struct sbus_dma { 68 + struct sbus_dma *next; 69 + struct sbus_dev *sdev; 70 + void __iomem *regs; 71 + 72 + /* Status, misc info */ 73 + int node; /* Prom node for this DMA device */ 74 + int running; /* Are we doing DMA now? */ 75 + int allocated; /* Are we "owned" by anyone yet? */ 76 + 77 + /* Transfer information. */ 78 + unsigned long addr; /* Start address of current transfer */ 79 + int nbytes; /* Size of current transfer */ 80 + int realbytes; /* For splitting up large transfers, etc. */ 81 + 82 + /* DMA revision */ 83 + enum dvma_rev revision; 84 + }; 85 + 86 + extern struct sbus_dma *dma_chain; 87 + 88 + /* Broken hardware... */ 89 + #ifdef CONFIG_SUN4 90 + /* Have to sort this out. Does rev0 work fine on sun4[cmd] without isbroken? 91 + * Or is rev0 present only on sun4 boxes? -jj */ 92 + #define DMA_ISBROKEN(dma) ((dma)->revision == dvmarev0 || (dma)->revision == dvmarev1) 93 + #else 94 + #define DMA_ISBROKEN(dma) ((dma)->revision == dvmarev1) 95 + #endif 96 + #define DMA_ISESC1(dma) ((dma)->revision == dvmaesc1) 97 + 98 + /* Main routines in dma.c */ 99 + extern void dvma_init(struct sbus_bus *); 100 + 101 + /* Fields in the cond_reg register */ 102 + /* First, the version identification bits */ 103 + #define DMA_DEVICE_ID 0xf0000000 /* Device identification bits */ 104 + #define DMA_VERS0 0x00000000 /* Sunray DMA version */ 105 + #define DMA_ESCV1 0x40000000 /* DMA ESC Version 1 */ 106 + #define DMA_VERS1 0x80000000 /* DMA rev 1 */ 107 + #define DMA_VERS2 0xa0000000 /* DMA rev 2 */ 108 + #define DMA_VERHME 0xb0000000 /* DMA hme gate array */ 109 + #define DMA_VERSPLUS 0x90000000 /* DMA rev 1 PLUS */ 110 + 111 + #define DMA_HNDL_INTR 0x00000001 /* An IRQ needs to be handled */ 112 + #define DMA_HNDL_ERROR 0x00000002 /* We need to take an error */ 113 + #define DMA_FIFO_ISDRAIN 0x0000000c /* The DMA FIFO is draining */ 114 + #define DMA_INT_ENAB 0x00000010 /* Turn on interrupts */ 115 + #define DMA_FIFO_INV 0x00000020 /* Invalidate the FIFO */ 116 + #define DMA_ACC_SZ_ERR 0x00000040 /* The access size was bad */ 117 + #define DMA_FIFO_STDRAIN 0x00000040 /* DMA_VERS1 Drain the FIFO */ 118 + #define DMA_RST_SCSI 0x00000080 /* Reset the SCSI controller */ 119 + #define DMA_RST_ENET DMA_RST_SCSI /* Reset the ENET controller */ 120 + #define DMA_RST_BPP DMA_RST_SCSI /* Reset the BPP controller */ 121 + #define DMA_ST_WRITE 0x00000100 /* write from device to memory */ 122 + #define DMA_ENABLE 0x00000200 /* Fire up DMA, handle requests */ 123 + #define DMA_PEND_READ 0x00000400 /* DMA_VERS1/0/PLUS Pending Read */ 124 + #define DMA_ESC_BURST 0x00000800 /* 1=16byte 0=32byte */ 125 + #define DMA_READ_AHEAD 0x00001800 /* DMA read ahead partial longword */ 126 + #define DMA_DSBL_RD_DRN 0x00001000 /* No EC drain on slave reads */ 127 + #define DMA_BCNT_ENAB 0x00002000 /* If on, use the byte counter */ 128 + #define DMA_TERM_CNTR 0x00004000 /* Terminal counter */ 129 + #define DMA_SCSI_SBUS64 0x00008000 /* HME: Enable 64-bit SBUS mode. */ 130 + #define DMA_CSR_DISAB 0x00010000 /* No FIFO drains during csr */ 131 + #define DMA_SCSI_DISAB 0x00020000 /* No FIFO drains during reg */ 132 + #define DMA_DSBL_WR_INV 0x00020000 /* No EC inval. on slave writes */ 133 + #define DMA_ADD_ENABLE 0x00040000 /* Special ESC DVMA optimization */ 134 + #define DMA_E_BURSTS 0x000c0000 /* ENET: SBUS r/w burst mask */ 135 + #define DMA_E_BURST32 0x00040000 /* ENET: SBUS 32 byte r/w burst */ 136 + #define DMA_E_BURST16 0x00000000 /* ENET: SBUS 16 byte r/w burst */ 137 + #define DMA_BRST_SZ 0x000c0000 /* SCSI: SBUS r/w burst size */ 138 + #define DMA_BRST64 0x00080000 /* SCSI: 64byte bursts (HME on UltraSparc only) */ 139 + #define DMA_BRST32 0x00040000 /* SCSI/BPP: 32byte bursts */ 140 + #define DMA_BRST16 0x00000000 /* SCSI/BPP: 16byte bursts */ 141 + #define DMA_BRST0 0x00080000 /* SCSI: no bursts (non-HME gate arrays) */ 142 + #define DMA_ADDR_DISAB 0x00100000 /* No FIFO drains during addr */ 143 + #define DMA_2CLKS 0x00200000 /* Each transfer = 2 clock ticks */ 144 + #define DMA_3CLKS 0x00400000 /* Each transfer = 3 clock ticks */ 145 + #define DMA_EN_ENETAUI DMA_3CLKS /* Put lance into AUI-cable mode */ 146 + #define DMA_CNTR_DISAB 0x00800000 /* No IRQ when DMA_TERM_CNTR set */ 147 + #define DMA_AUTO_NADDR 0x01000000 /* Use "auto nxt addr" feature */ 148 + #define DMA_SCSI_ON 0x02000000 /* Enable SCSI dma */ 149 + #define DMA_BPP_ON DMA_SCSI_ON /* Enable BPP dma */ 150 + #define DMA_PARITY_OFF 0x02000000 /* HME: disable parity checking */ 151 + #define DMA_LOADED_ADDR 0x04000000 /* Address has been loaded */ 152 + #define DMA_LOADED_NADDR 0x08000000 /* Next address has been loaded */ 153 + #define DMA_RESET_FAS366 0x08000000 /* HME: Assert RESET to FAS366 */ 154 + 155 + /* Values describing the burst-size property from the PROM */ 156 + #define DMA_BURST1 0x01 157 + #define DMA_BURST2 0x02 158 + #define DMA_BURST4 0x04 159 + #define DMA_BURST8 0x08 160 + #define DMA_BURST16 0x10 161 + #define DMA_BURST32 0x20 162 + #define DMA_BURST64 0x40 163 + #define DMA_BURSTBITS 0x7f 164 + 165 + /* Determine highest possible final transfer address given a base */ 166 + #define DMA_MAXEND(addr) (0x01000000UL-(((unsigned long)(addr))&0x00ffffffUL)) 167 + 168 + /* Yes, I hack a lot of elisp in my spare time... */ 169 + #define DMA_ERROR_P(regs) ((((regs)->cond_reg) & DMA_HNDL_ERROR)) 170 + #define DMA_IRQ_P(regs) ((((regs)->cond_reg) & (DMA_HNDL_INTR | DMA_HNDL_ERROR))) 171 + #define DMA_WRITE_P(regs) ((((regs)->cond_reg) & DMA_ST_WRITE)) 172 + #define DMA_OFF(regs) ((((regs)->cond_reg) &= (~DMA_ENABLE))) 173 + #define DMA_INTSOFF(regs) ((((regs)->cond_reg) &= (~DMA_INT_ENAB))) 174 + #define DMA_INTSON(regs) ((((regs)->cond_reg) |= (DMA_INT_ENAB))) 175 + #define DMA_PUNTFIFO(regs) ((((regs)->cond_reg) |= DMA_FIFO_INV)) 176 + #define DMA_SETSTART(regs, addr) ((((regs)->st_addr) = (char *) addr)) 177 + #define DMA_BEGINDMA_W(regs) \ 178 + ((((regs)->cond_reg |= (DMA_ST_WRITE|DMA_ENABLE|DMA_INT_ENAB)))) 179 + #define DMA_BEGINDMA_R(regs) \ 180 + ((((regs)->cond_reg |= ((DMA_ENABLE|DMA_INT_ENAB)&(~DMA_ST_WRITE))))) 181 + 182 + /* For certain DMA chips, we need to disable ints upon irq entry 183 + * and turn them back on when we are done. So in any ESP interrupt 184 + * handler you *must* call DMA_IRQ_ENTRY upon entry and DMA_IRQ_EXIT 185 + * when leaving the handler. You have been warned... 186 + */ 187 + #define DMA_IRQ_ENTRY(dma, dregs) do { \ 188 + if(DMA_ISBROKEN(dma)) DMA_INTSOFF(dregs); \ 189 + } while (0) 190 + 191 + #define DMA_IRQ_EXIT(dma, dregs) do { \ 192 + if(DMA_ISBROKEN(dma)) DMA_INTSON(dregs); \ 193 + } while(0) 194 + 195 + #if 0 /* P3 this stuff is inline in ledma.c:init_restart_ledma() */ 196 + /* Pause until counter runs out or BIT isn't set in the DMA condition 197 + * register. 198 + */ 199 + static inline void sparc_dma_pause(struct sparc_dma_registers *regs, 200 + unsigned long bit) 201 + { 202 + int ctr = 50000; /* Let's find some bugs ;) */ 203 + 204 + /* Busy wait until the bit is not set any more */ 205 + while((regs->cond_reg&bit) && (ctr>0)) { 206 + ctr--; 207 + __delay(5); 208 + } 209 + 210 + /* Check for bogus outcome. */ 211 + if(!ctr) 212 + panic("DMA timeout"); 213 + } 214 + 215 + /* Reset the friggin' thing... */ 216 + #define DMA_RESET(dma) do { \ 217 + struct sparc_dma_registers *regs = dma->regs; \ 218 + /* Let the current FIFO drain itself */ \ 219 + sparc_dma_pause(regs, (DMA_FIFO_ISDRAIN)); \ 220 + /* Reset the logic */ \ 221 + regs->cond_reg |= (DMA_RST_SCSI); /* assert */ \ 222 + __delay(400); /* let the bits set ;) */ \ 223 + regs->cond_reg &= ~(DMA_RST_SCSI); /* de-assert */ \ 224 + sparc_dma_enable_interrupts(regs); /* Re-enable interrupts */ \ 225 + /* Enable FAST transfers if available */ \ 226 + if(dma->revision>dvmarev1) regs->cond_reg |= DMA_3CLKS; \ 227 + dma->running = 0; \ 228 + } while(0) 229 + #endif 230 + 231 + #define for_each_dvma(dma) \ 232 + for((dma) = dma_chain; (dma); (dma) = (dma)->next) 233 + 234 + extern int get_dma_list(char *); 235 + extern int request_dma(unsigned int, __const__ char *); 236 + extern void free_dma(unsigned int); 237 + 238 + /* From PCI */ 239 + 240 + #ifdef CONFIG_PCI 241 + extern int isa_dma_bridge_buggy; 242 + #else 243 + #define isa_dma_bridge_buggy (0) 244 + #endif 245 + 246 + /* Routines for data transfer buffers. */ 247 + BTFIXUPDEF_CALL(char *, mmu_lockarea, char *, unsigned long) 248 + BTFIXUPDEF_CALL(void, mmu_unlockarea, char *, unsigned long) 249 + 250 + #define mmu_lockarea(vaddr,len) BTFIXUP_CALL(mmu_lockarea)(vaddr,len) 251 + #define mmu_unlockarea(vaddr,len) BTFIXUP_CALL(mmu_unlockarea)(vaddr,len) 252 + 253 + /* These are implementations for sbus_map_sg/sbus_unmap_sg... collapse later */ 254 + BTFIXUPDEF_CALL(__u32, mmu_get_scsi_one, char *, unsigned long, struct sbus_bus *sbus) 255 + BTFIXUPDEF_CALL(void, mmu_get_scsi_sgl, struct scatterlist *, int, struct sbus_bus *sbus) 256 + BTFIXUPDEF_CALL(void, mmu_release_scsi_one, __u32, unsigned long, struct sbus_bus *sbus) 257 + BTFIXUPDEF_CALL(void, mmu_release_scsi_sgl, struct scatterlist *, int, struct sbus_bus *sbus) 258 + 259 + #define mmu_get_scsi_one(vaddr,len,sbus) BTFIXUP_CALL(mmu_get_scsi_one)(vaddr,len,sbus) 260 + #define mmu_get_scsi_sgl(sg,sz,sbus) BTFIXUP_CALL(mmu_get_scsi_sgl)(sg,sz,sbus) 261 + #define mmu_release_scsi_one(vaddr,len,sbus) BTFIXUP_CALL(mmu_release_scsi_one)(vaddr,len,sbus) 262 + #define mmu_release_scsi_sgl(sg,sz,sbus) BTFIXUP_CALL(mmu_release_scsi_sgl)(sg,sz,sbus) 263 + 264 + /* 265 + * mmu_map/unmap are provided by iommu/iounit; Invalid to call on IIep. 266 + * 267 + * The mmu_map_dma_area establishes two mappings in one go. 268 + * These mappings point to pages normally mapped at 'va' (linear address). 269 + * First mapping is for CPU visible address at 'a', uncached. 270 + * This is an alias, but it works because it is an uncached mapping. 271 + * Second mapping is for device visible address, or "bus" address. 272 + * The bus address is returned at '*pba'. 273 + * 274 + * These functions seem distinct, but are hard to split. On sun4c, 275 + * at least for now, 'a' is equal to bus address, and retured in *pba. 276 + * On sun4m, page attributes depend on the CPU type, so we have to 277 + * know if we are mapping RAM or I/O, so it has to be an additional argument 278 + * to a separate mapping function for CPU visible mappings. 279 + */ 280 + BTFIXUPDEF_CALL(int, mmu_map_dma_area, dma_addr_t *, unsigned long, unsigned long, int len) 281 + BTFIXUPDEF_CALL(struct page *, mmu_translate_dvma, unsigned long busa) 282 + BTFIXUPDEF_CALL(void, mmu_unmap_dma_area, unsigned long busa, int len) 283 + 284 + #define mmu_map_dma_area(pba,va,a,len) BTFIXUP_CALL(mmu_map_dma_area)(pba,va,a,len) 285 + #define mmu_unmap_dma_area(ba,len) BTFIXUP_CALL(mmu_unmap_dma_area)(ba,len) 286 + #define mmu_translate_dvma(ba) BTFIXUP_CALL(mmu_translate_dvma)(ba) 287 + 288 + #endif /* !(_ASM_SPARC_DMA_H) */
+205
arch/sparc/include/asm/dma_64.h
··· 1 + /* 2 + * include/asm/dma.h 3 + * 4 + * Copyright 1996 (C) David S. Miller (davem@caip.rutgers.edu) 5 + */ 6 + 7 + #ifndef _ASM_SPARC64_DMA_H 8 + #define _ASM_SPARC64_DMA_H 9 + 10 + #include <linux/kernel.h> 11 + #include <linux/types.h> 12 + #include <linux/spinlock.h> 13 + 14 + #include <asm/sbus.h> 15 + #include <asm/delay.h> 16 + #include <asm/oplib.h> 17 + 18 + /* These are irrelevant for Sparc DMA, but we leave it in so that 19 + * things can compile. 20 + */ 21 + #define MAX_DMA_CHANNELS 8 22 + #define DMA_MODE_READ 1 23 + #define DMA_MODE_WRITE 2 24 + #define MAX_DMA_ADDRESS (~0UL) 25 + 26 + /* Useful constants */ 27 + #define SIZE_16MB (16*1024*1024) 28 + #define SIZE_64K (64*1024) 29 + 30 + /* SBUS DMA controller reg offsets */ 31 + #define DMA_CSR 0x00UL /* rw DMA control/status register 0x00 */ 32 + #define DMA_ADDR 0x04UL /* rw DMA transfer address register 0x04 */ 33 + #define DMA_COUNT 0x08UL /* rw DMA transfer count register 0x08 */ 34 + #define DMA_TEST 0x0cUL /* rw DMA test/debug register 0x0c */ 35 + 36 + /* DVMA chip revisions */ 37 + enum dvma_rev { 38 + dvmarev0, 39 + dvmaesc1, 40 + dvmarev1, 41 + dvmarev2, 42 + dvmarev3, 43 + dvmarevplus, 44 + dvmahme 45 + }; 46 + 47 + #define DMA_HASCOUNT(rev) ((rev)==dvmaesc1) 48 + 49 + /* Linux DMA information structure, filled during probe. */ 50 + struct sbus_dma { 51 + struct sbus_dma *next; 52 + struct sbus_dev *sdev; 53 + void __iomem *regs; 54 + 55 + /* Status, misc info */ 56 + int node; /* Prom node for this DMA device */ 57 + int running; /* Are we doing DMA now? */ 58 + int allocated; /* Are we "owned" by anyone yet? */ 59 + 60 + /* Transfer information. */ 61 + u32 addr; /* Start address of current transfer */ 62 + int nbytes; /* Size of current transfer */ 63 + int realbytes; /* For splitting up large transfers, etc. */ 64 + 65 + /* DMA revision */ 66 + enum dvma_rev revision; 67 + }; 68 + 69 + extern struct sbus_dma *dma_chain; 70 + 71 + /* Broken hardware... */ 72 + #define DMA_ISBROKEN(dma) ((dma)->revision == dvmarev1) 73 + #define DMA_ISESC1(dma) ((dma)->revision == dvmaesc1) 74 + 75 + /* Main routines in dma.c */ 76 + extern void dvma_init(struct sbus_bus *); 77 + 78 + /* Fields in the cond_reg register */ 79 + /* First, the version identification bits */ 80 + #define DMA_DEVICE_ID 0xf0000000 /* Device identification bits */ 81 + #define DMA_VERS0 0x00000000 /* Sunray DMA version */ 82 + #define DMA_ESCV1 0x40000000 /* DMA ESC Version 1 */ 83 + #define DMA_VERS1 0x80000000 /* DMA rev 1 */ 84 + #define DMA_VERS2 0xa0000000 /* DMA rev 2 */ 85 + #define DMA_VERHME 0xb0000000 /* DMA hme gate array */ 86 + #define DMA_VERSPLUS 0x90000000 /* DMA rev 1 PLUS */ 87 + 88 + #define DMA_HNDL_INTR 0x00000001 /* An IRQ needs to be handled */ 89 + #define DMA_HNDL_ERROR 0x00000002 /* We need to take an error */ 90 + #define DMA_FIFO_ISDRAIN 0x0000000c /* The DMA FIFO is draining */ 91 + #define DMA_INT_ENAB 0x00000010 /* Turn on interrupts */ 92 + #define DMA_FIFO_INV 0x00000020 /* Invalidate the FIFO */ 93 + #define DMA_ACC_SZ_ERR 0x00000040 /* The access size was bad */ 94 + #define DMA_FIFO_STDRAIN 0x00000040 /* DMA_VERS1 Drain the FIFO */ 95 + #define DMA_RST_SCSI 0x00000080 /* Reset the SCSI controller */ 96 + #define DMA_RST_ENET DMA_RST_SCSI /* Reset the ENET controller */ 97 + #define DMA_ST_WRITE 0x00000100 /* write from device to memory */ 98 + #define DMA_ENABLE 0x00000200 /* Fire up DMA, handle requests */ 99 + #define DMA_PEND_READ 0x00000400 /* DMA_VERS1/0/PLUS Pending Read */ 100 + #define DMA_ESC_BURST 0x00000800 /* 1=16byte 0=32byte */ 101 + #define DMA_READ_AHEAD 0x00001800 /* DMA read ahead partial longword */ 102 + #define DMA_DSBL_RD_DRN 0x00001000 /* No EC drain on slave reads */ 103 + #define DMA_BCNT_ENAB 0x00002000 /* If on, use the byte counter */ 104 + #define DMA_TERM_CNTR 0x00004000 /* Terminal counter */ 105 + #define DMA_SCSI_SBUS64 0x00008000 /* HME: Enable 64-bit SBUS mode. */ 106 + #define DMA_CSR_DISAB 0x00010000 /* No FIFO drains during csr */ 107 + #define DMA_SCSI_DISAB 0x00020000 /* No FIFO drains during reg */ 108 + #define DMA_DSBL_WR_INV 0x00020000 /* No EC inval. on slave writes */ 109 + #define DMA_ADD_ENABLE 0x00040000 /* Special ESC DVMA optimization */ 110 + #define DMA_E_BURSTS 0x000c0000 /* ENET: SBUS r/w burst mask */ 111 + #define DMA_E_BURST32 0x00040000 /* ENET: SBUS 32 byte r/w burst */ 112 + #define DMA_E_BURST16 0x00000000 /* ENET: SBUS 16 byte r/w burst */ 113 + #define DMA_BRST_SZ 0x000c0000 /* SCSI: SBUS r/w burst size */ 114 + #define DMA_BRST64 0x000c0000 /* SCSI: 64byte bursts (HME on UltraSparc only) */ 115 + #define DMA_BRST32 0x00040000 /* SCSI: 32byte bursts */ 116 + #define DMA_BRST16 0x00000000 /* SCSI: 16byte bursts */ 117 + #define DMA_BRST0 0x00080000 /* SCSI: no bursts (non-HME gate arrays) */ 118 + #define DMA_ADDR_DISAB 0x00100000 /* No FIFO drains during addr */ 119 + #define DMA_2CLKS 0x00200000 /* Each transfer = 2 clock ticks */ 120 + #define DMA_3CLKS 0x00400000 /* Each transfer = 3 clock ticks */ 121 + #define DMA_EN_ENETAUI DMA_3CLKS /* Put lance into AUI-cable mode */ 122 + #define DMA_CNTR_DISAB 0x00800000 /* No IRQ when DMA_TERM_CNTR set */ 123 + #define DMA_AUTO_NADDR 0x01000000 /* Use "auto nxt addr" feature */ 124 + #define DMA_SCSI_ON 0x02000000 /* Enable SCSI dma */ 125 + #define DMA_PARITY_OFF 0x02000000 /* HME: disable parity checking */ 126 + #define DMA_LOADED_ADDR 0x04000000 /* Address has been loaded */ 127 + #define DMA_LOADED_NADDR 0x08000000 /* Next address has been loaded */ 128 + #define DMA_RESET_FAS366 0x08000000 /* HME: Assert RESET to FAS366 */ 129 + 130 + /* Values describing the burst-size property from the PROM */ 131 + #define DMA_BURST1 0x01 132 + #define DMA_BURST2 0x02 133 + #define DMA_BURST4 0x04 134 + #define DMA_BURST8 0x08 135 + #define DMA_BURST16 0x10 136 + #define DMA_BURST32 0x20 137 + #define DMA_BURST64 0x40 138 + #define DMA_BURSTBITS 0x7f 139 + 140 + /* Determine highest possible final transfer address given a base */ 141 + #define DMA_MAXEND(addr) (0x01000000UL-(((unsigned long)(addr))&0x00ffffffUL)) 142 + 143 + /* Yes, I hack a lot of elisp in my spare time... */ 144 + #define DMA_ERROR_P(regs) ((sbus_readl((regs) + DMA_CSR) & DMA_HNDL_ERROR)) 145 + #define DMA_IRQ_P(regs) ((sbus_readl((regs) + DMA_CSR)) & (DMA_HNDL_INTR | DMA_HNDL_ERROR)) 146 + #define DMA_WRITE_P(regs) ((sbus_readl((regs) + DMA_CSR) & DMA_ST_WRITE)) 147 + #define DMA_OFF(__regs) \ 148 + do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ 149 + tmp &= ~DMA_ENABLE; \ 150 + sbus_writel(tmp, (__regs) + DMA_CSR); \ 151 + } while(0) 152 + #define DMA_INTSOFF(__regs) \ 153 + do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ 154 + tmp &= ~DMA_INT_ENAB; \ 155 + sbus_writel(tmp, (__regs) + DMA_CSR); \ 156 + } while(0) 157 + #define DMA_INTSON(__regs) \ 158 + do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ 159 + tmp |= DMA_INT_ENAB; \ 160 + sbus_writel(tmp, (__regs) + DMA_CSR); \ 161 + } while(0) 162 + #define DMA_PUNTFIFO(__regs) \ 163 + do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ 164 + tmp |= DMA_FIFO_INV; \ 165 + sbus_writel(tmp, (__regs) + DMA_CSR); \ 166 + } while(0) 167 + #define DMA_SETSTART(__regs, __addr) \ 168 + sbus_writel((u32)(__addr), (__regs) + DMA_ADDR); 169 + #define DMA_BEGINDMA_W(__regs) \ 170 + do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ 171 + tmp |= (DMA_ST_WRITE|DMA_ENABLE|DMA_INT_ENAB); \ 172 + sbus_writel(tmp, (__regs) + DMA_CSR); \ 173 + } while(0) 174 + #define DMA_BEGINDMA_R(__regs) \ 175 + do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ 176 + tmp |= (DMA_ENABLE|DMA_INT_ENAB); \ 177 + tmp &= ~DMA_ST_WRITE; \ 178 + sbus_writel(tmp, (__regs) + DMA_CSR); \ 179 + } while(0) 180 + 181 + /* For certain DMA chips, we need to disable ints upon irq entry 182 + * and turn them back on when we are done. So in any ESP interrupt 183 + * handler you *must* call DMA_IRQ_ENTRY upon entry and DMA_IRQ_EXIT 184 + * when leaving the handler. You have been warned... 185 + */ 186 + #define DMA_IRQ_ENTRY(dma, dregs) do { \ 187 + if(DMA_ISBROKEN(dma)) DMA_INTSOFF(dregs); \ 188 + } while (0) 189 + 190 + #define DMA_IRQ_EXIT(dma, dregs) do { \ 191 + if(DMA_ISBROKEN(dma)) DMA_INTSON(dregs); \ 192 + } while(0) 193 + 194 + #define for_each_dvma(dma) \ 195 + for((dma) = dma_chain; (dma); (dma) = (dma)->next) 196 + 197 + /* From PCI */ 198 + 199 + #ifdef CONFIG_PCI 200 + extern int isa_dma_bridge_buggy; 201 + #else 202 + #define isa_dma_bridge_buggy (0) 203 + #endif 204 + 205 + #endif /* !(_ASM_SPARC64_DMA_H) */
+8
arch/sparc/include/asm/ebus.h
··· 1 + #ifndef ___ASM_SPARC_EBUS_H 2 + #define ___ASM_SPARC_EBUS_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/ebus_64.h> 5 + #else 6 + #include <asm/ebus_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/elf.h
··· 1 + #ifndef ___ASM_SPARC_ELF_H 2 + #define ___ASM_SPARC_ELF_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/elf_64.h> 5 + #else 6 + #include <asm/elf_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/floppy.h
··· 1 + #ifndef ___ASM_SPARC_FLOPPY_H 2 + #define ___ASM_SPARC_FLOPPY_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/floppy_64.h> 5 + #else 6 + #include <asm/floppy_32.h> 7 + #endif 8 + #endif
+388
arch/sparc/include/asm/floppy_32.h
··· 1 + /* asm/floppy.h: Sparc specific parts of the Floppy driver. 2 + * 3 + * Copyright (C) 1995 David S. Miller (davem@davemloft.net) 4 + */ 5 + 6 + #ifndef __ASM_SPARC_FLOPPY_H 7 + #define __ASM_SPARC_FLOPPY_H 8 + 9 + #include <asm/page.h> 10 + #include <asm/pgtable.h> 11 + #include <asm/system.h> 12 + #include <asm/idprom.h> 13 + #include <asm/machines.h> 14 + #include <asm/oplib.h> 15 + #include <asm/auxio.h> 16 + #include <asm/irq.h> 17 + 18 + /* We don't need no stinkin' I/O port allocation crap. */ 19 + #undef release_region 20 + #undef request_region 21 + #define release_region(X, Y) do { } while(0) 22 + #define request_region(X, Y, Z) (1) 23 + 24 + /* References: 25 + * 1) Netbsd Sun floppy driver. 26 + * 2) NCR 82077 controller manual 27 + * 3) Intel 82077 controller manual 28 + */ 29 + struct sun_flpy_controller { 30 + volatile unsigned char status_82072; /* Main Status reg. */ 31 + #define dcr_82072 status_82072 /* Digital Control reg. */ 32 + #define status1_82077 status_82072 /* Auxiliary Status reg. 1 */ 33 + 34 + volatile unsigned char data_82072; /* Data fifo. */ 35 + #define status2_82077 data_82072 /* Auxiliary Status reg. 2 */ 36 + 37 + volatile unsigned char dor_82077; /* Digital Output reg. */ 38 + volatile unsigned char tapectl_82077; /* What the? Tape control reg? */ 39 + 40 + volatile unsigned char status_82077; /* Main Status Register. */ 41 + #define drs_82077 status_82077 /* Digital Rate Select reg. */ 42 + 43 + volatile unsigned char data_82077; /* Data fifo. */ 44 + volatile unsigned char ___unused; 45 + volatile unsigned char dir_82077; /* Digital Input reg. */ 46 + #define dcr_82077 dir_82077 /* Config Control reg. */ 47 + }; 48 + 49 + /* You'll only ever find one controller on a SparcStation anyways. */ 50 + static struct sun_flpy_controller *sun_fdc = NULL; 51 + extern volatile unsigned char *fdc_status; 52 + 53 + struct sun_floppy_ops { 54 + unsigned char (*fd_inb)(int port); 55 + void (*fd_outb)(unsigned char value, int port); 56 + }; 57 + 58 + static struct sun_floppy_ops sun_fdops; 59 + 60 + #define fd_inb(port) sun_fdops.fd_inb(port) 61 + #define fd_outb(value,port) sun_fdops.fd_outb(value,port) 62 + #define fd_enable_dma() sun_fd_enable_dma() 63 + #define fd_disable_dma() sun_fd_disable_dma() 64 + #define fd_request_dma() (0) /* nothing... */ 65 + #define fd_free_dma() /* nothing... */ 66 + #define fd_clear_dma_ff() /* nothing... */ 67 + #define fd_set_dma_mode(mode) sun_fd_set_dma_mode(mode) 68 + #define fd_set_dma_addr(addr) sun_fd_set_dma_addr(addr) 69 + #define fd_set_dma_count(count) sun_fd_set_dma_count(count) 70 + #define fd_enable_irq() /* nothing... */ 71 + #define fd_disable_irq() /* nothing... */ 72 + #define fd_cacheflush(addr, size) /* nothing... */ 73 + #define fd_request_irq() sun_fd_request_irq() 74 + #define fd_free_irq() /* nothing... */ 75 + #if 0 /* P3: added by Alain, these cause a MMU corruption. 19960524 XXX */ 76 + #define fd_dma_mem_alloc(size) ((unsigned long) vmalloc(size)) 77 + #define fd_dma_mem_free(addr,size) (vfree((void *)(addr))) 78 + #endif 79 + 80 + /* XXX This isn't really correct. XXX */ 81 + #define get_dma_residue(x) (0) 82 + 83 + #define FLOPPY0_TYPE 4 84 + #define FLOPPY1_TYPE 0 85 + 86 + /* Super paranoid... */ 87 + #undef HAVE_DISABLE_HLT 88 + 89 + /* Here is where we catch the floppy driver trying to initialize, 90 + * therefore this is where we call the PROM device tree probing 91 + * routine etc. on the Sparc. 92 + */ 93 + #define FDC1 sun_floppy_init() 94 + 95 + #define N_FDC 1 96 + #define N_DRIVE 8 97 + 98 + /* No 64k boundary crossing problems on the Sparc. */ 99 + #define CROSS_64KB(a,s) (0) 100 + 101 + /* Routines unique to each controller type on a Sun. */ 102 + static void sun_set_dor(unsigned char value, int fdc_82077) 103 + { 104 + if (sparc_cpu_model == sun4c) { 105 + unsigned int bits = 0; 106 + if (value & 0x10) 107 + bits |= AUXIO_FLPY_DSEL; 108 + if ((value & 0x80) == 0) 109 + bits |= AUXIO_FLPY_EJCT; 110 + set_auxio(bits, (~bits) & (AUXIO_FLPY_DSEL|AUXIO_FLPY_EJCT)); 111 + } 112 + if (fdc_82077) { 113 + sun_fdc->dor_82077 = value; 114 + } 115 + } 116 + 117 + static unsigned char sun_read_dir(void) 118 + { 119 + if (sparc_cpu_model == sun4c) 120 + return (get_auxio() & AUXIO_FLPY_DCHG) ? 0x80 : 0; 121 + else 122 + return sun_fdc->dir_82077; 123 + } 124 + 125 + static unsigned char sun_82072_fd_inb(int port) 126 + { 127 + udelay(5); 128 + switch(port & 7) { 129 + default: 130 + printk("floppy: Asked to read unknown port %d\n", port); 131 + panic("floppy: Port bolixed."); 132 + case 4: /* FD_STATUS */ 133 + return sun_fdc->status_82072 & ~STATUS_DMA; 134 + case 5: /* FD_DATA */ 135 + return sun_fdc->data_82072; 136 + case 7: /* FD_DIR */ 137 + return sun_read_dir(); 138 + }; 139 + panic("sun_82072_fd_inb: How did I get here?"); 140 + } 141 + 142 + static void sun_82072_fd_outb(unsigned char value, int port) 143 + { 144 + udelay(5); 145 + switch(port & 7) { 146 + default: 147 + printk("floppy: Asked to write to unknown port %d\n", port); 148 + panic("floppy: Port bolixed."); 149 + case 2: /* FD_DOR */ 150 + sun_set_dor(value, 0); 151 + break; 152 + case 5: /* FD_DATA */ 153 + sun_fdc->data_82072 = value; 154 + break; 155 + case 7: /* FD_DCR */ 156 + sun_fdc->dcr_82072 = value; 157 + break; 158 + case 4: /* FD_STATUS */ 159 + sun_fdc->status_82072 = value; 160 + break; 161 + }; 162 + return; 163 + } 164 + 165 + static unsigned char sun_82077_fd_inb(int port) 166 + { 167 + udelay(5); 168 + switch(port & 7) { 169 + default: 170 + printk("floppy: Asked to read unknown port %d\n", port); 171 + panic("floppy: Port bolixed."); 172 + case 0: /* FD_STATUS_0 */ 173 + return sun_fdc->status1_82077; 174 + case 1: /* FD_STATUS_1 */ 175 + return sun_fdc->status2_82077; 176 + case 2: /* FD_DOR */ 177 + return sun_fdc->dor_82077; 178 + case 3: /* FD_TDR */ 179 + return sun_fdc->tapectl_82077; 180 + case 4: /* FD_STATUS */ 181 + return sun_fdc->status_82077 & ~STATUS_DMA; 182 + case 5: /* FD_DATA */ 183 + return sun_fdc->data_82077; 184 + case 7: /* FD_DIR */ 185 + return sun_read_dir(); 186 + }; 187 + panic("sun_82077_fd_inb: How did I get here?"); 188 + } 189 + 190 + static void sun_82077_fd_outb(unsigned char value, int port) 191 + { 192 + udelay(5); 193 + switch(port & 7) { 194 + default: 195 + printk("floppy: Asked to write to unknown port %d\n", port); 196 + panic("floppy: Port bolixed."); 197 + case 2: /* FD_DOR */ 198 + sun_set_dor(value, 1); 199 + break; 200 + case 5: /* FD_DATA */ 201 + sun_fdc->data_82077 = value; 202 + break; 203 + case 7: /* FD_DCR */ 204 + sun_fdc->dcr_82077 = value; 205 + break; 206 + case 4: /* FD_STATUS */ 207 + sun_fdc->status_82077 = value; 208 + break; 209 + case 3: /* FD_TDR */ 210 + sun_fdc->tapectl_82077 = value; 211 + break; 212 + }; 213 + return; 214 + } 215 + 216 + /* For pseudo-dma (Sun floppy drives have no real DMA available to 217 + * them so we must eat the data fifo bytes directly ourselves) we have 218 + * three state variables. doing_pdma tells our inline low-level 219 + * assembly floppy interrupt entry point whether it should sit and eat 220 + * bytes from the fifo or just transfer control up to the higher level 221 + * floppy interrupt c-code. I tried very hard but I could not get the 222 + * pseudo-dma to work in c-code without getting many overruns and 223 + * underruns. If non-zero, doing_pdma encodes the direction of 224 + * the transfer for debugging. 1=read 2=write 225 + */ 226 + extern char *pdma_vaddr; 227 + extern unsigned long pdma_size; 228 + extern volatile int doing_pdma; 229 + 230 + /* This is software state */ 231 + extern char *pdma_base; 232 + extern unsigned long pdma_areasize; 233 + 234 + /* Common routines to all controller types on the Sparc. */ 235 + static inline void virtual_dma_init(void) 236 + { 237 + /* nothing... */ 238 + } 239 + 240 + static inline void sun_fd_disable_dma(void) 241 + { 242 + doing_pdma = 0; 243 + if (pdma_base) { 244 + mmu_unlockarea(pdma_base, pdma_areasize); 245 + pdma_base = NULL; 246 + } 247 + } 248 + 249 + static inline void sun_fd_set_dma_mode(int mode) 250 + { 251 + switch(mode) { 252 + case DMA_MODE_READ: 253 + doing_pdma = 1; 254 + break; 255 + case DMA_MODE_WRITE: 256 + doing_pdma = 2; 257 + break; 258 + default: 259 + printk("Unknown dma mode %d\n", mode); 260 + panic("floppy: Giving up..."); 261 + } 262 + } 263 + 264 + static inline void sun_fd_set_dma_addr(char *buffer) 265 + { 266 + pdma_vaddr = buffer; 267 + } 268 + 269 + static inline void sun_fd_set_dma_count(int length) 270 + { 271 + pdma_size = length; 272 + } 273 + 274 + static inline void sun_fd_enable_dma(void) 275 + { 276 + pdma_vaddr = mmu_lockarea(pdma_vaddr, pdma_size); 277 + pdma_base = pdma_vaddr; 278 + pdma_areasize = pdma_size; 279 + } 280 + 281 + /* Our low-level entry point in arch/sparc/kernel/entry.S */ 282 + extern int sparc_floppy_request_irq(int irq, unsigned long flags, 283 + irq_handler_t irq_handler); 284 + 285 + static int sun_fd_request_irq(void) 286 + { 287 + static int once = 0; 288 + int error; 289 + 290 + if(!once) { 291 + once = 1; 292 + error = sparc_floppy_request_irq(FLOPPY_IRQ, 293 + IRQF_DISABLED, 294 + floppy_interrupt); 295 + return ((error == 0) ? 0 : -1); 296 + } else return 0; 297 + } 298 + 299 + static struct linux_prom_registers fd_regs[2]; 300 + 301 + static int sun_floppy_init(void) 302 + { 303 + char state[128]; 304 + int tnode, fd_node, num_regs; 305 + struct resource r; 306 + 307 + use_virtual_dma = 1; 308 + 309 + FLOPPY_IRQ = 11; 310 + /* Forget it if we aren't on a machine that could possibly 311 + * ever have a floppy drive. 312 + */ 313 + if((sparc_cpu_model != sun4c && sparc_cpu_model != sun4m) || 314 + ((idprom->id_machtype == (SM_SUN4C | SM_4C_SLC)) || 315 + (idprom->id_machtype == (SM_SUN4C | SM_4C_ELC)))) { 316 + /* We certainly don't have a floppy controller. */ 317 + goto no_sun_fdc; 318 + } 319 + /* Well, try to find one. */ 320 + tnode = prom_getchild(prom_root_node); 321 + fd_node = prom_searchsiblings(tnode, "obio"); 322 + if(fd_node != 0) { 323 + tnode = prom_getchild(fd_node); 324 + fd_node = prom_searchsiblings(tnode, "SUNW,fdtwo"); 325 + } else { 326 + fd_node = prom_searchsiblings(tnode, "fd"); 327 + } 328 + if(fd_node == 0) { 329 + goto no_sun_fdc; 330 + } 331 + 332 + /* The sun4m lets us know if the controller is actually usable. */ 333 + if(sparc_cpu_model == sun4m && 334 + prom_getproperty(fd_node, "status", state, sizeof(state)) != -1) { 335 + if(!strcmp(state, "disabled")) { 336 + goto no_sun_fdc; 337 + } 338 + } 339 + num_regs = prom_getproperty(fd_node, "reg", (char *) fd_regs, sizeof(fd_regs)); 340 + num_regs = (num_regs / sizeof(fd_regs[0])); 341 + prom_apply_obio_ranges(fd_regs, num_regs); 342 + memset(&r, 0, sizeof(r)); 343 + r.flags = fd_regs[0].which_io; 344 + r.start = fd_regs[0].phys_addr; 345 + sun_fdc = (struct sun_flpy_controller *) 346 + sbus_ioremap(&r, 0, fd_regs[0].reg_size, "floppy"); 347 + 348 + /* Last minute sanity check... */ 349 + if(sun_fdc->status_82072 == 0xff) { 350 + sun_fdc = NULL; 351 + goto no_sun_fdc; 352 + } 353 + 354 + sun_fdops.fd_inb = sun_82077_fd_inb; 355 + sun_fdops.fd_outb = sun_82077_fd_outb; 356 + fdc_status = &sun_fdc->status_82077; 357 + 358 + if (sun_fdc->dor_82077 == 0x80) { 359 + sun_fdc->dor_82077 = 0x02; 360 + if (sun_fdc->dor_82077 == 0x80) { 361 + sun_fdops.fd_inb = sun_82072_fd_inb; 362 + sun_fdops.fd_outb = sun_82072_fd_outb; 363 + fdc_status = &sun_fdc->status_82072; 364 + } 365 + } 366 + 367 + /* Success... */ 368 + allowed_drive_mask = 0x01; 369 + return (int) sun_fdc; 370 + 371 + no_sun_fdc: 372 + return -1; 373 + } 374 + 375 + static int sparc_eject(void) 376 + { 377 + set_dor(0x00, 0xff, 0x90); 378 + udelay(500); 379 + set_dor(0x00, 0x6f, 0x00); 380 + udelay(500); 381 + return 0; 382 + } 383 + 384 + #define fd_eject(drive) sparc_eject() 385 + 386 + #define EXTRA_FLOPPY_PARAMS 387 + 388 + #endif /* !(__ASM_SPARC_FLOPPY_H) */
+8
arch/sparc/include/asm/futex.h
··· 1 + #ifndef ___ASM_SPARC_FUTEX_H 2 + #define ___ASM_SPARC_FUTEX_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/futex_64.h> 5 + #else 6 + #include <asm/futex_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/hardirq.h
··· 1 + #ifndef ___ASM_SPARC_HARDIRQ_H 2 + #define ___ASM_SPARC_HARDIRQ_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/hardirq_64.h> 5 + #else 6 + #include <asm/hardirq_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/head.h
··· 1 + #ifndef ___ASM_SPARC_HEAD_H 2 + #define ___ASM_SPARC_HEAD_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/head_64.h> 5 + #else 6 + #include <asm/head_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/io.h
··· 1 + #ifndef ___ASM_SPARC_IO_H 2 + #define ___ASM_SPARC_IO_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/io_64.h> 5 + #else 6 + #include <asm/io_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/iommu.h
··· 1 + #ifndef ___ASM_SPARC_IOMMU_H 2 + #define ___ASM_SPARC_IOMMU_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/iommu_64.h> 5 + #else 6 + #include <asm/iommu_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/ipcbuf.h
··· 1 + #ifndef ___ASM_SPARC_IPCBUF_H 2 + #define ___ASM_SPARC_IPCBUF_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/ipcbuf_64.h> 5 + #else 6 + #include <asm/ipcbuf_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/irq.h
··· 1 + #ifndef ___ASM_SPARC_IRQ_H 2 + #define ___ASM_SPARC_IRQ_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/irq_64.h> 5 + #else 6 + #include <asm/irq_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/irqflags.h
··· 1 + #ifndef ___ASM_SPARC_IRQFLAGS_H 2 + #define ___ASM_SPARC_IRQFLAGS_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/irqflags_64.h> 5 + #else 6 + #include <asm/irqflags_32.h> 7 + #endif 8 + #endif
+39
arch/sparc/include/asm/irqflags_32.h
··· 1 + /* 2 + * include/asm/irqflags.h 3 + * 4 + * IRQ flags handling 5 + * 6 + * This file gets included from lowlevel asm headers too, to provide 7 + * wrapped versions of the local_irq_*() APIs, based on the 8 + * raw_local_irq_*() functions from the lowlevel headers. 9 + */ 10 + #ifndef _ASM_IRQFLAGS_H 11 + #define _ASM_IRQFLAGS_H 12 + 13 + #ifndef __ASSEMBLY__ 14 + 15 + extern void raw_local_irq_restore(unsigned long); 16 + extern unsigned long __raw_local_irq_save(void); 17 + extern void raw_local_irq_enable(void); 18 + 19 + static inline unsigned long getipl(void) 20 + { 21 + unsigned long retval; 22 + 23 + __asm__ __volatile__("rd %%psr, %0" : "=r" (retval)); 24 + return retval; 25 + } 26 + 27 + #define raw_local_save_flags(flags) ((flags) = getipl()) 28 + #define raw_local_irq_save(flags) ((flags) = __raw_local_irq_save()) 29 + #define raw_local_irq_disable() ((void) __raw_local_irq_save()) 30 + #define raw_irqs_disabled() ((getipl() & PSR_PIL) != 0) 31 + 32 + static inline int raw_irqs_disabled_flags(unsigned long flags) 33 + { 34 + return ((flags & PSR_PIL) != 0); 35 + } 36 + 37 + #endif /* (__ASSEMBLY__) */ 38 + 39 + #endif /* !(_ASM_IRQFLAGS_H) */
+89
arch/sparc/include/asm/irqflags_64.h
··· 1 + /* 2 + * include/asm/irqflags.h 3 + * 4 + * IRQ flags handling 5 + * 6 + * This file gets included from lowlevel asm headers too, to provide 7 + * wrapped versions of the local_irq_*() APIs, based on the 8 + * raw_local_irq_*() functions from the lowlevel headers. 9 + */ 10 + #ifndef _ASM_IRQFLAGS_H 11 + #define _ASM_IRQFLAGS_H 12 + 13 + #ifndef __ASSEMBLY__ 14 + 15 + static inline unsigned long __raw_local_save_flags(void) 16 + { 17 + unsigned long flags; 18 + 19 + __asm__ __volatile__( 20 + "rdpr %%pil, %0" 21 + : "=r" (flags) 22 + ); 23 + 24 + return flags; 25 + } 26 + 27 + #define raw_local_save_flags(flags) \ 28 + do { (flags) = __raw_local_save_flags(); } while (0) 29 + 30 + static inline void raw_local_irq_restore(unsigned long flags) 31 + { 32 + __asm__ __volatile__( 33 + "wrpr %0, %%pil" 34 + : /* no output */ 35 + : "r" (flags) 36 + : "memory" 37 + ); 38 + } 39 + 40 + static inline void raw_local_irq_disable(void) 41 + { 42 + __asm__ __volatile__( 43 + "wrpr 15, %%pil" 44 + : /* no outputs */ 45 + : /* no inputs */ 46 + : "memory" 47 + ); 48 + } 49 + 50 + static inline void raw_local_irq_enable(void) 51 + { 52 + __asm__ __volatile__( 53 + "wrpr 0, %%pil" 54 + : /* no outputs */ 55 + : /* no inputs */ 56 + : "memory" 57 + ); 58 + } 59 + 60 + static inline int raw_irqs_disabled_flags(unsigned long flags) 61 + { 62 + return (flags > 0); 63 + } 64 + 65 + static inline int raw_irqs_disabled(void) 66 + { 67 + unsigned long flags = __raw_local_save_flags(); 68 + 69 + return raw_irqs_disabled_flags(flags); 70 + } 71 + 72 + /* 73 + * For spinlocks, etc: 74 + */ 75 + static inline unsigned long __raw_local_irq_save(void) 76 + { 77 + unsigned long flags = __raw_local_save_flags(); 78 + 79 + raw_local_irq_disable(); 80 + 81 + return flags; 82 + } 83 + 84 + #define raw_local_irq_save(flags) \ 85 + do { (flags) = __raw_local_irq_save(); } while (0) 86 + 87 + #endif /* (__ASSEMBLY__) */ 88 + 89 + #endif /* !(_ASM_IRQFLAGS_H) */
+8
arch/sparc/include/asm/kdebug.h
··· 1 + #ifndef ___ASM_SPARC_KDEBUG_H 2 + #define ___ASM_SPARC_KDEBUG_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/kdebug_64.h> 5 + #else 6 + #include <asm/kdebug_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/mc146818rtc.h
··· 1 + #ifndef ___ASM_SPARC_MC146818RTC_H 2 + #define ___ASM_SPARC_MC146818RTC_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/mc146818rtc_64.h> 5 + #else 6 + #include <asm/mc146818rtc_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/mmu.h
··· 1 + #ifndef ___ASM_SPARC_MMU_H 2 + #define ___ASM_SPARC_MMU_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/mmu_64.h> 5 + #else 6 + #include <asm/mmu_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/mmu_context.h
··· 1 + #ifndef ___ASM_SPARC_MMU_CONTEXT_H 2 + #define ___ASM_SPARC_MMU_CONTEXT_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/mmu_context_64.h> 5 + #else 6 + #include <asm/mmu_context_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/module.h
··· 1 + #ifndef ___ASM_SPARC_MODULE_H 2 + #define ___ASM_SPARC_MODULE_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/module_64.h> 5 + #else 6 + #include <asm/module_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/mostek.h
··· 1 + #ifndef ___ASM_SPARC_MOSTEK_H 2 + #define ___ASM_SPARC_MOSTEK_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/mostek_64.h> 5 + #else 6 + #include <asm/mostek_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/of_platform.h
··· 1 + #ifndef ___ASM_SPARC_OF_PLATFORM_H 2 + #define ___ASM_SPARC_OF_PLATFORM_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/of_platform_64.h> 5 + #else 6 + #include <asm/of_platform_32.h> 7 + #endif 8 + #endif
+24
arch/sparc/include/asm/of_platform_32.h
··· 1 + #ifndef _ASM_SPARC_OF_PLATFORM_H 2 + #define _ASM_SPARC_OF_PLATFORM_H 3 + /* 4 + * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corp. 5 + * <benh@kernel.crashing.org> 6 + * Modified for Sparc by merging parts of asm/of_device.h 7 + * by Stephen Rothwell 8 + * 9 + * This program is free software; you can redistribute it and/or 10 + * modify it under the terms of the GNU General Public License 11 + * as published by the Free Software Foundation; either version 12 + * 2 of the License, or (at your option) any later version. 13 + * 14 + */ 15 + 16 + /* This is just here during the transition */ 17 + #include <linux/of_platform.h> 18 + 19 + extern struct bus_type ebus_bus_type; 20 + extern struct bus_type sbus_bus_type; 21 + 22 + #define of_bus_type of_platform_bus_type /* for compatibility */ 23 + 24 + #endif /* _ASM_SPARC_OF_PLATFORM_H */
+25
arch/sparc/include/asm/of_platform_64.h
··· 1 + #ifndef _ASM_SPARC64_OF_PLATFORM_H 2 + #define _ASM_SPARC64_OF_PLATFORM_H 3 + /* 4 + * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corp. 5 + * <benh@kernel.crashing.org> 6 + * Modified for Sparc by merging parts of asm/of_device.h 7 + * by Stephen Rothwell 8 + * 9 + * This program is free software; you can redistribute it and/or 10 + * modify it under the terms of the GNU General Public License 11 + * as published by the Free Software Foundation; either version 12 + * 2 of the License, or (at your option) any later version. 13 + * 14 + */ 15 + 16 + /* This is just here during the transition */ 17 + #include <linux/of_platform.h> 18 + 19 + extern struct bus_type isa_bus_type; 20 + extern struct bus_type ebus_bus_type; 21 + extern struct bus_type sbus_bus_type; 22 + 23 + #define of_bus_type of_platform_bus_type /* for compatibility */ 24 + 25 + #endif /* _ASM_SPARC64_OF_PLATFORM_H */
+8
arch/sparc/include/asm/openprom.h
··· 1 + #ifndef ___ASM_SPARC_OPENPROM_H 2 + #define ___ASM_SPARC_OPENPROM_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/openprom_64.h> 5 + #else 6 + #include <asm/openprom_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/oplib.h
··· 1 + #ifndef ___ASM_SPARC_OPLIB_H 2 + #define ___ASM_SPARC_OPLIB_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/oplib_64.h> 5 + #else 6 + #include <asm/oplib_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/page.h
··· 1 + #ifndef ___ASM_SPARC_PAGE_H 2 + #define ___ASM_SPARC_PAGE_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/page_64.h> 5 + #else 6 + #include <asm/page_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/pci.h
··· 1 + #ifndef ___ASM_SPARC_PCI_H 2 + #define ___ASM_SPARC_PCI_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/pci_64.h> 5 + #else 6 + #include <asm/pci_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/percpu.h
··· 1 + #ifndef ___ASM_SPARC_PERCPU_H 2 + #define ___ASM_SPARC_PERCPU_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/percpu_64.h> 5 + #else 6 + #include <asm/percpu_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/pgalloc.h
··· 1 + #ifndef ___ASM_SPARC_PGALLOC_H 2 + #define ___ASM_SPARC_PGALLOC_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/pgalloc_64.h> 5 + #else 6 + #include <asm/pgalloc_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/pgtable.h
··· 1 + #ifndef ___ASM_SPARC_PGTABLE_H 2 + #define ___ASM_SPARC_PGTABLE_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/pgtable_64.h> 5 + #else 6 + #include <asm/pgtable_32.h> 7 + #endif 8 + #endif
+480
arch/sparc/include/asm/pgtable_32.h
··· 1 + #ifndef _SPARC_PGTABLE_H 2 + #define _SPARC_PGTABLE_H 3 + 4 + /* asm/pgtable.h: Defines and functions used to work 5 + * with Sparc page tables. 6 + * 7 + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) 8 + * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) 9 + */ 10 + 11 + #ifndef __ASSEMBLY__ 12 + #include <asm-generic/4level-fixup.h> 13 + 14 + #include <linux/spinlock.h> 15 + #include <linux/swap.h> 16 + #include <asm/types.h> 17 + #ifdef CONFIG_SUN4 18 + #include <asm/pgtsun4.h> 19 + #else 20 + #include <asm/pgtsun4c.h> 21 + #endif 22 + #include <asm/pgtsrmmu.h> 23 + #include <asm/vac-ops.h> 24 + #include <asm/oplib.h> 25 + #include <asm/btfixup.h> 26 + #include <asm/system.h> 27 + 28 + 29 + struct vm_area_struct; 30 + struct page; 31 + 32 + extern void load_mmu(void); 33 + extern unsigned long calc_highpages(void); 34 + 35 + BTFIXUPDEF_SIMM13(pgdir_shift) 36 + BTFIXUPDEF_SETHI(pgdir_size) 37 + BTFIXUPDEF_SETHI(pgdir_mask) 38 + 39 + BTFIXUPDEF_SIMM13(ptrs_per_pmd) 40 + BTFIXUPDEF_SIMM13(ptrs_per_pgd) 41 + BTFIXUPDEF_SIMM13(user_ptrs_per_pgd) 42 + 43 + #define pte_ERROR(e) __builtin_trap() 44 + #define pmd_ERROR(e) __builtin_trap() 45 + #define pgd_ERROR(e) __builtin_trap() 46 + 47 + BTFIXUPDEF_INT(page_none) 48 + BTFIXUPDEF_INT(page_copy) 49 + BTFIXUPDEF_INT(page_readonly) 50 + BTFIXUPDEF_INT(page_kernel) 51 + 52 + #define PMD_SHIFT SUN4C_PMD_SHIFT 53 + #define PMD_SIZE (1UL << PMD_SHIFT) 54 + #define PMD_MASK (~(PMD_SIZE-1)) 55 + #define PMD_ALIGN(__addr) (((__addr) + ~PMD_MASK) & PMD_MASK) 56 + #define PGDIR_SHIFT BTFIXUP_SIMM13(pgdir_shift) 57 + #define PGDIR_SIZE BTFIXUP_SETHI(pgdir_size) 58 + #define PGDIR_MASK BTFIXUP_SETHI(pgdir_mask) 59 + #define PTRS_PER_PTE 1024 60 + #define PTRS_PER_PMD BTFIXUP_SIMM13(ptrs_per_pmd) 61 + #define PTRS_PER_PGD BTFIXUP_SIMM13(ptrs_per_pgd) 62 + #define USER_PTRS_PER_PGD BTFIXUP_SIMM13(user_ptrs_per_pgd) 63 + #define FIRST_USER_ADDRESS 0 64 + #define PTE_SIZE (PTRS_PER_PTE*4) 65 + 66 + #define PAGE_NONE __pgprot(BTFIXUP_INT(page_none)) 67 + extern pgprot_t PAGE_SHARED; 68 + #define PAGE_COPY __pgprot(BTFIXUP_INT(page_copy)) 69 + #define PAGE_READONLY __pgprot(BTFIXUP_INT(page_readonly)) 70 + 71 + extern unsigned long page_kernel; 72 + 73 + #ifdef MODULE 74 + #define PAGE_KERNEL page_kernel 75 + #else 76 + #define PAGE_KERNEL __pgprot(BTFIXUP_INT(page_kernel)) 77 + #endif 78 + 79 + /* Top-level page directory */ 80 + extern pgd_t swapper_pg_dir[1024]; 81 + 82 + extern void paging_init(void); 83 + 84 + /* Page table for 0-4MB for everybody, on the Sparc this 85 + * holds the same as on the i386. 86 + */ 87 + extern pte_t pg0[1024]; 88 + extern pte_t pg1[1024]; 89 + extern pte_t pg2[1024]; 90 + extern pte_t pg3[1024]; 91 + 92 + extern unsigned long ptr_in_current_pgd; 93 + 94 + /* Here is a trick, since mmap.c need the initializer elements for 95 + * protection_map[] to be constant at compile time, I set the following 96 + * to all zeros. I set it to the real values after I link in the 97 + * appropriate MMU page table routines at boot time. 98 + */ 99 + #define __P000 __pgprot(0) 100 + #define __P001 __pgprot(0) 101 + #define __P010 __pgprot(0) 102 + #define __P011 __pgprot(0) 103 + #define __P100 __pgprot(0) 104 + #define __P101 __pgprot(0) 105 + #define __P110 __pgprot(0) 106 + #define __P111 __pgprot(0) 107 + 108 + #define __S000 __pgprot(0) 109 + #define __S001 __pgprot(0) 110 + #define __S010 __pgprot(0) 111 + #define __S011 __pgprot(0) 112 + #define __S100 __pgprot(0) 113 + #define __S101 __pgprot(0) 114 + #define __S110 __pgprot(0) 115 + #define __S111 __pgprot(0) 116 + 117 + extern int num_contexts; 118 + 119 + /* First physical page can be anywhere, the following is needed so that 120 + * va-->pa and vice versa conversions work properly without performance 121 + * hit for all __pa()/__va() operations. 122 + */ 123 + extern unsigned long phys_base; 124 + extern unsigned long pfn_base; 125 + 126 + /* 127 + * BAD_PAGETABLE is used when we need a bogus page-table, while 128 + * BAD_PAGE is used for a bogus page. 129 + * 130 + * ZERO_PAGE is a global shared page that is always zero: used 131 + * for zero-mapped memory areas etc.. 132 + */ 133 + extern pte_t * __bad_pagetable(void); 134 + extern pte_t __bad_page(void); 135 + extern unsigned long empty_zero_page; 136 + 137 + #define BAD_PAGETABLE __bad_pagetable() 138 + #define BAD_PAGE __bad_page() 139 + #define ZERO_PAGE(vaddr) (virt_to_page(&empty_zero_page)) 140 + 141 + /* 142 + */ 143 + BTFIXUPDEF_CALL_CONST(struct page *, pmd_page, pmd_t) 144 + BTFIXUPDEF_CALL_CONST(unsigned long, pgd_page_vaddr, pgd_t) 145 + 146 + #define pmd_page(pmd) BTFIXUP_CALL(pmd_page)(pmd) 147 + #define pgd_page_vaddr(pgd) BTFIXUP_CALL(pgd_page_vaddr)(pgd) 148 + 149 + BTFIXUPDEF_SETHI(none_mask) 150 + BTFIXUPDEF_CALL_CONST(int, pte_present, pte_t) 151 + BTFIXUPDEF_CALL(void, pte_clear, pte_t *) 152 + 153 + static inline int pte_none(pte_t pte) 154 + { 155 + return !(pte_val(pte) & ~BTFIXUP_SETHI(none_mask)); 156 + } 157 + 158 + #define pte_present(pte) BTFIXUP_CALL(pte_present)(pte) 159 + #define pte_clear(mm,addr,pte) BTFIXUP_CALL(pte_clear)(pte) 160 + 161 + BTFIXUPDEF_CALL_CONST(int, pmd_bad, pmd_t) 162 + BTFIXUPDEF_CALL_CONST(int, pmd_present, pmd_t) 163 + BTFIXUPDEF_CALL(void, pmd_clear, pmd_t *) 164 + 165 + static inline int pmd_none(pmd_t pmd) 166 + { 167 + return !(pmd_val(pmd) & ~BTFIXUP_SETHI(none_mask)); 168 + } 169 + 170 + #define pmd_bad(pmd) BTFIXUP_CALL(pmd_bad)(pmd) 171 + #define pmd_present(pmd) BTFIXUP_CALL(pmd_present)(pmd) 172 + #define pmd_clear(pmd) BTFIXUP_CALL(pmd_clear)(pmd) 173 + 174 + BTFIXUPDEF_CALL_CONST(int, pgd_none, pgd_t) 175 + BTFIXUPDEF_CALL_CONST(int, pgd_bad, pgd_t) 176 + BTFIXUPDEF_CALL_CONST(int, pgd_present, pgd_t) 177 + BTFIXUPDEF_CALL(void, pgd_clear, pgd_t *) 178 + 179 + #define pgd_none(pgd) BTFIXUP_CALL(pgd_none)(pgd) 180 + #define pgd_bad(pgd) BTFIXUP_CALL(pgd_bad)(pgd) 181 + #define pgd_present(pgd) BTFIXUP_CALL(pgd_present)(pgd) 182 + #define pgd_clear(pgd) BTFIXUP_CALL(pgd_clear)(pgd) 183 + 184 + /* 185 + * The following only work if pte_present() is true. 186 + * Undefined behaviour if not.. 187 + */ 188 + BTFIXUPDEF_HALF(pte_writei) 189 + BTFIXUPDEF_HALF(pte_dirtyi) 190 + BTFIXUPDEF_HALF(pte_youngi) 191 + 192 + static int pte_write(pte_t pte) __attribute_const__; 193 + static inline int pte_write(pte_t pte) 194 + { 195 + return pte_val(pte) & BTFIXUP_HALF(pte_writei); 196 + } 197 + 198 + static int pte_dirty(pte_t pte) __attribute_const__; 199 + static inline int pte_dirty(pte_t pte) 200 + { 201 + return pte_val(pte) & BTFIXUP_HALF(pte_dirtyi); 202 + } 203 + 204 + static int pte_young(pte_t pte) __attribute_const__; 205 + static inline int pte_young(pte_t pte) 206 + { 207 + return pte_val(pte) & BTFIXUP_HALF(pte_youngi); 208 + } 209 + 210 + /* 211 + * The following only work if pte_present() is not true. 212 + */ 213 + BTFIXUPDEF_HALF(pte_filei) 214 + 215 + static int pte_file(pte_t pte) __attribute_const__; 216 + static inline int pte_file(pte_t pte) 217 + { 218 + return pte_val(pte) & BTFIXUP_HALF(pte_filei); 219 + } 220 + 221 + static inline int pte_special(pte_t pte) 222 + { 223 + return 0; 224 + } 225 + 226 + /* 227 + */ 228 + BTFIXUPDEF_HALF(pte_wrprotecti) 229 + BTFIXUPDEF_HALF(pte_mkcleani) 230 + BTFIXUPDEF_HALF(pte_mkoldi) 231 + 232 + static pte_t pte_wrprotect(pte_t pte) __attribute_const__; 233 + static inline pte_t pte_wrprotect(pte_t pte) 234 + { 235 + return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_wrprotecti)); 236 + } 237 + 238 + static pte_t pte_mkclean(pte_t pte) __attribute_const__; 239 + static inline pte_t pte_mkclean(pte_t pte) 240 + { 241 + return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_mkcleani)); 242 + } 243 + 244 + static pte_t pte_mkold(pte_t pte) __attribute_const__; 245 + static inline pte_t pte_mkold(pte_t pte) 246 + { 247 + return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_mkoldi)); 248 + } 249 + 250 + BTFIXUPDEF_CALL_CONST(pte_t, pte_mkwrite, pte_t) 251 + BTFIXUPDEF_CALL_CONST(pte_t, pte_mkdirty, pte_t) 252 + BTFIXUPDEF_CALL_CONST(pte_t, pte_mkyoung, pte_t) 253 + 254 + #define pte_mkwrite(pte) BTFIXUP_CALL(pte_mkwrite)(pte) 255 + #define pte_mkdirty(pte) BTFIXUP_CALL(pte_mkdirty)(pte) 256 + #define pte_mkyoung(pte) BTFIXUP_CALL(pte_mkyoung)(pte) 257 + 258 + #define pte_mkspecial(pte) (pte) 259 + 260 + #define pfn_pte(pfn, prot) mk_pte(pfn_to_page(pfn), prot) 261 + 262 + BTFIXUPDEF_CALL(unsigned long, pte_pfn, pte_t) 263 + #define pte_pfn(pte) BTFIXUP_CALL(pte_pfn)(pte) 264 + #define pte_page(pte) pfn_to_page(pte_pfn(pte)) 265 + 266 + /* 267 + * Conversion functions: convert a page and protection to a page entry, 268 + * and a page entry and page directory to the page they refer to. 269 + */ 270 + BTFIXUPDEF_CALL_CONST(pte_t, mk_pte, struct page *, pgprot_t) 271 + 272 + BTFIXUPDEF_CALL_CONST(pte_t, mk_pte_phys, unsigned long, pgprot_t) 273 + BTFIXUPDEF_CALL_CONST(pte_t, mk_pte_io, unsigned long, pgprot_t, int) 274 + BTFIXUPDEF_CALL_CONST(pgprot_t, pgprot_noncached, pgprot_t) 275 + 276 + #define mk_pte(page,pgprot) BTFIXUP_CALL(mk_pte)(page,pgprot) 277 + #define mk_pte_phys(page,pgprot) BTFIXUP_CALL(mk_pte_phys)(page,pgprot) 278 + #define mk_pte_io(page,pgprot,space) BTFIXUP_CALL(mk_pte_io)(page,pgprot,space) 279 + 280 + #define pgprot_noncached(pgprot) BTFIXUP_CALL(pgprot_noncached)(pgprot) 281 + 282 + BTFIXUPDEF_INT(pte_modify_mask) 283 + 284 + static pte_t pte_modify(pte_t pte, pgprot_t newprot) __attribute_const__; 285 + static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 286 + { 287 + return __pte((pte_val(pte) & BTFIXUP_INT(pte_modify_mask)) | 288 + pgprot_val(newprot)); 289 + } 290 + 291 + #define pgd_index(address) ((address) >> PGDIR_SHIFT) 292 + 293 + /* to find an entry in a page-table-directory */ 294 + #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) 295 + 296 + /* to find an entry in a kernel page-table-directory */ 297 + #define pgd_offset_k(address) pgd_offset(&init_mm, address) 298 + 299 + /* Find an entry in the second-level page table.. */ 300 + BTFIXUPDEF_CALL(pmd_t *, pmd_offset, pgd_t *, unsigned long) 301 + #define pmd_offset(dir,addr) BTFIXUP_CALL(pmd_offset)(dir,addr) 302 + 303 + /* Find an entry in the third-level page table.. */ 304 + BTFIXUPDEF_CALL(pte_t *, pte_offset_kernel, pmd_t *, unsigned long) 305 + #define pte_offset_kernel(dir,addr) BTFIXUP_CALL(pte_offset_kernel)(dir,addr) 306 + 307 + /* 308 + * This shortcut works on sun4m (and sun4d) because the nocache area is static, 309 + * and sun4c is guaranteed to have no highmem anyway. 310 + */ 311 + #define pte_offset_map(d, a) pte_offset_kernel(d,a) 312 + #define pte_offset_map_nested(d, a) pte_offset_kernel(d,a) 313 + 314 + #define pte_unmap(pte) do{}while(0) 315 + #define pte_unmap_nested(pte) do{}while(0) 316 + 317 + /* Certain architectures need to do special things when pte's 318 + * within a page table are directly modified. Thus, the following 319 + * hook is made available. 320 + */ 321 + 322 + BTFIXUPDEF_CALL(void, set_pte, pte_t *, pte_t) 323 + 324 + #define set_pte(ptep,pteval) BTFIXUP_CALL(set_pte)(ptep,pteval) 325 + #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) 326 + 327 + struct seq_file; 328 + BTFIXUPDEF_CALL(void, mmu_info, struct seq_file *) 329 + 330 + #define mmu_info(p) BTFIXUP_CALL(mmu_info)(p) 331 + 332 + /* Fault handler stuff... */ 333 + #define FAULT_CODE_PROT 0x1 334 + #define FAULT_CODE_WRITE 0x2 335 + #define FAULT_CODE_USER 0x4 336 + 337 + BTFIXUPDEF_CALL(void, update_mmu_cache, struct vm_area_struct *, unsigned long, pte_t) 338 + 339 + #define update_mmu_cache(vma,addr,pte) BTFIXUP_CALL(update_mmu_cache)(vma,addr,pte) 340 + 341 + BTFIXUPDEF_CALL(void, sparc_mapiorange, unsigned int, unsigned long, 342 + unsigned long, unsigned int) 343 + BTFIXUPDEF_CALL(void, sparc_unmapiorange, unsigned long, unsigned int) 344 + #define sparc_mapiorange(bus,pa,va,len) BTFIXUP_CALL(sparc_mapiorange)(bus,pa,va,len) 345 + #define sparc_unmapiorange(va,len) BTFIXUP_CALL(sparc_unmapiorange)(va,len) 346 + 347 + extern int invalid_segment; 348 + 349 + /* Encode and de-code a swap entry */ 350 + BTFIXUPDEF_CALL(unsigned long, __swp_type, swp_entry_t) 351 + BTFIXUPDEF_CALL(unsigned long, __swp_offset, swp_entry_t) 352 + BTFIXUPDEF_CALL(swp_entry_t, __swp_entry, unsigned long, unsigned long) 353 + 354 + #define __swp_type(__x) BTFIXUP_CALL(__swp_type)(__x) 355 + #define __swp_offset(__x) BTFIXUP_CALL(__swp_offset)(__x) 356 + #define __swp_entry(__type,__off) BTFIXUP_CALL(__swp_entry)(__type,__off) 357 + 358 + #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) 359 + #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) 360 + 361 + /* file-offset-in-pte helpers */ 362 + BTFIXUPDEF_CALL(unsigned long, pte_to_pgoff, pte_t pte); 363 + BTFIXUPDEF_CALL(pte_t, pgoff_to_pte, unsigned long pgoff); 364 + 365 + #define pte_to_pgoff(pte) BTFIXUP_CALL(pte_to_pgoff)(pte) 366 + #define pgoff_to_pte(off) BTFIXUP_CALL(pgoff_to_pte)(off) 367 + 368 + /* 369 + * This is made a constant because mm/fremap.c required a constant. 370 + * Note that layout of these bits is different between sun4c.c and srmmu.c. 371 + */ 372 + #define PTE_FILE_MAX_BITS 24 373 + 374 + /* 375 + */ 376 + struct ctx_list { 377 + struct ctx_list *next; 378 + struct ctx_list *prev; 379 + unsigned int ctx_number; 380 + struct mm_struct *ctx_mm; 381 + }; 382 + 383 + extern struct ctx_list *ctx_list_pool; /* Dynamically allocated */ 384 + extern struct ctx_list ctx_free; /* Head of free list */ 385 + extern struct ctx_list ctx_used; /* Head of used contexts list */ 386 + 387 + #define NO_CONTEXT -1 388 + 389 + static inline void remove_from_ctx_list(struct ctx_list *entry) 390 + { 391 + entry->next->prev = entry->prev; 392 + entry->prev->next = entry->next; 393 + } 394 + 395 + static inline void add_to_ctx_list(struct ctx_list *head, struct ctx_list *entry) 396 + { 397 + entry->next = head; 398 + (entry->prev = head->prev)->next = entry; 399 + head->prev = entry; 400 + } 401 + #define add_to_free_ctxlist(entry) add_to_ctx_list(&ctx_free, entry) 402 + #define add_to_used_ctxlist(entry) add_to_ctx_list(&ctx_used, entry) 403 + 404 + static inline unsigned long 405 + __get_phys (unsigned long addr) 406 + { 407 + switch (sparc_cpu_model){ 408 + case sun4: 409 + case sun4c: 410 + return sun4c_get_pte (addr) << PAGE_SHIFT; 411 + case sun4m: 412 + case sun4d: 413 + return ((srmmu_get_pte (addr) & 0xffffff00) << 4); 414 + default: 415 + return 0; 416 + } 417 + } 418 + 419 + static inline int 420 + __get_iospace (unsigned long addr) 421 + { 422 + switch (sparc_cpu_model){ 423 + case sun4: 424 + case sun4c: 425 + return -1; /* Don't check iospace on sun4c */ 426 + case sun4m: 427 + case sun4d: 428 + return (srmmu_get_pte (addr) >> 28); 429 + default: 430 + return -1; 431 + } 432 + } 433 + 434 + extern unsigned long *sparc_valid_addr_bitmap; 435 + 436 + /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ 437 + #define kern_addr_valid(addr) \ 438 + (test_bit(__pa((unsigned long)(addr))>>20, sparc_valid_addr_bitmap)) 439 + 440 + extern int io_remap_pfn_range(struct vm_area_struct *vma, 441 + unsigned long from, unsigned long pfn, 442 + unsigned long size, pgprot_t prot); 443 + 444 + /* 445 + * For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in 446 + * its high 4 bits. These macros/functions put it there or get it from there. 447 + */ 448 + #define MK_IOSPACE_PFN(space, pfn) (pfn | (space << (BITS_PER_LONG - 4))) 449 + #define GET_IOSPACE(pfn) (pfn >> (BITS_PER_LONG - 4)) 450 + #define GET_PFN(pfn) (pfn & 0x0fffffffUL) 451 + 452 + #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 453 + #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ 454 + ({ \ 455 + int __changed = !pte_same(*(__ptep), __entry); \ 456 + if (__changed) { \ 457 + set_pte_at((__vma)->vm_mm, (__address), __ptep, __entry); \ 458 + flush_tlb_page(__vma, __address); \ 459 + } \ 460 + (sparc_cpu_model == sun4c) || __changed; \ 461 + }) 462 + 463 + #include <asm-generic/pgtable.h> 464 + 465 + #endif /* !(__ASSEMBLY__) */ 466 + 467 + #define VMALLOC_START 0xfe600000 468 + /* XXX Alter this when I get around to fixing sun4c - Anton */ 469 + #define VMALLOC_END 0xffc00000 470 + 471 + 472 + /* We provide our own get_unmapped_area to cope with VA holes for userland */ 473 + #define HAVE_ARCH_UNMAPPED_AREA 474 + 475 + /* 476 + * No page table caches to initialise 477 + */ 478 + #define pgtable_cache_init() do { } while (0) 479 + 480 + #endif /* !(_SPARC_PGTABLE_H) */
+8
arch/sparc/include/asm/posix_types.h
··· 1 + #ifndef ___ASM_SPARC_POSIX_TYPES_H 2 + #define ___ASM_SPARC_POSIX_TYPES_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/posix_types_64.h> 5 + #else 6 + #include <asm/posix_types_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/processor.h
··· 1 + #ifndef ___ASM_SPARC_PROCESSOR_H 2 + #define ___ASM_SPARC_PROCESSOR_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/processor_64.h> 5 + #else 6 + #include <asm/processor_32.h> 7 + #endif 8 + #endif
+129
arch/sparc/include/asm/processor_32.h
··· 1 + /* include/asm/processor.h 2 + * 3 + * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu) 4 + */ 5 + 6 + #ifndef __ASM_SPARC_PROCESSOR_H 7 + #define __ASM_SPARC_PROCESSOR_H 8 + 9 + /* 10 + * Sparc32 implementation of macro that returns current 11 + * instruction pointer ("program counter"). 12 + */ 13 + #define current_text_addr() ({ void *pc; __asm__("sethi %%hi(1f), %0; or %0, %%lo(1f), %0;\n1:" : "=r" (pc)); pc; }) 14 + 15 + #include <asm/psr.h> 16 + #include <asm/ptrace.h> 17 + #include <asm/head.h> 18 + #include <asm/signal.h> 19 + #include <asm/btfixup.h> 20 + #include <asm/page.h> 21 + 22 + /* 23 + * The sparc has no problems with write protection 24 + */ 25 + #define wp_works_ok 1 26 + #define wp_works_ok__is_a_macro /* for versions in ksyms.c */ 27 + 28 + /* Whee, this is STACK_TOP + PAGE_SIZE and the lowest kernel address too... 29 + * That one page is used to protect kernel from intruders, so that 30 + * we can make our access_ok test faster 31 + */ 32 + #define TASK_SIZE PAGE_OFFSET 33 + #ifdef __KERNEL__ 34 + #define STACK_TOP (PAGE_OFFSET - PAGE_SIZE) 35 + #define STACK_TOP_MAX STACK_TOP 36 + #endif /* __KERNEL__ */ 37 + 38 + struct task_struct; 39 + 40 + #ifdef __KERNEL__ 41 + struct fpq { 42 + unsigned long *insn_addr; 43 + unsigned long insn; 44 + }; 45 + #endif 46 + 47 + typedef struct { 48 + int seg; 49 + } mm_segment_t; 50 + 51 + /* The Sparc processor specific thread struct. */ 52 + struct thread_struct { 53 + struct pt_regs *kregs; 54 + unsigned int _pad1; 55 + 56 + /* Special child fork kpsr/kwim values. */ 57 + unsigned long fork_kpsr __attribute__ ((aligned (8))); 58 + unsigned long fork_kwim; 59 + 60 + /* Floating point regs */ 61 + unsigned long float_regs[32] __attribute__ ((aligned (8))); 62 + unsigned long fsr; 63 + unsigned long fpqdepth; 64 + struct fpq fpqueue[16]; 65 + unsigned long flags; 66 + mm_segment_t current_ds; 67 + }; 68 + 69 + #define SPARC_FLAG_KTHREAD 0x1 /* task is a kernel thread */ 70 + #define SPARC_FLAG_UNALIGNED 0x2 /* is allowed to do unaligned accesses */ 71 + 72 + #define INIT_THREAD { \ 73 + .flags = SPARC_FLAG_KTHREAD, \ 74 + .current_ds = KERNEL_DS, \ 75 + } 76 + 77 + /* Return saved PC of a blocked thread. */ 78 + extern unsigned long thread_saved_pc(struct task_struct *t); 79 + 80 + /* Do necessary setup to start up a newly executed thread. */ 81 + static inline void start_thread(struct pt_regs * regs, unsigned long pc, 82 + unsigned long sp) 83 + { 84 + register unsigned long zero asm("g1"); 85 + 86 + regs->psr = (regs->psr & (PSR_CWP)) | PSR_S; 87 + regs->pc = ((pc & (~3)) - 4); 88 + regs->npc = regs->pc + 4; 89 + regs->y = 0; 90 + zero = 0; 91 + __asm__ __volatile__("std\t%%g0, [%0 + %3 + 0x00]\n\t" 92 + "std\t%%g0, [%0 + %3 + 0x08]\n\t" 93 + "std\t%%g0, [%0 + %3 + 0x10]\n\t" 94 + "std\t%%g0, [%0 + %3 + 0x18]\n\t" 95 + "std\t%%g0, [%0 + %3 + 0x20]\n\t" 96 + "std\t%%g0, [%0 + %3 + 0x28]\n\t" 97 + "std\t%%g0, [%0 + %3 + 0x30]\n\t" 98 + "st\t%1, [%0 + %3 + 0x38]\n\t" 99 + "st\t%%g0, [%0 + %3 + 0x3c]" 100 + : /* no outputs */ 101 + : "r" (regs), 102 + "r" (sp - sizeof(struct reg_window)), 103 + "r" (zero), 104 + "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0])) 105 + : "memory"); 106 + } 107 + 108 + /* Free all resources held by a thread. */ 109 + #define release_thread(tsk) do { } while(0) 110 + extern pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); 111 + 112 + /* Prepare to copy thread state - unlazy all lazy status */ 113 + #define prepare_to_copy(tsk) do { } while (0) 114 + 115 + extern unsigned long get_wchan(struct task_struct *); 116 + 117 + #define task_pt_regs(tsk) ((tsk)->thread.kregs) 118 + #define KSTK_EIP(tsk) ((tsk)->thread.kregs->pc) 119 + #define KSTK_ESP(tsk) ((tsk)->thread.kregs->u_regs[UREG_FP]) 120 + 121 + #ifdef __KERNEL__ 122 + 123 + extern struct task_struct *last_task_used_math; 124 + 125 + #define cpu_relax() barrier() 126 + 127 + #endif 128 + 129 + #endif /* __ASM_SPARC_PROCESSOR_H */
+237
arch/sparc/include/asm/processor_64.h
··· 1 + /* 2 + * include/asm/processor.h 3 + * 4 + * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) 5 + */ 6 + 7 + #ifndef __ASM_SPARC64_PROCESSOR_H 8 + #define __ASM_SPARC64_PROCESSOR_H 9 + 10 + /* 11 + * Sparc64 implementation of macro that returns current 12 + * instruction pointer ("program counter"). 13 + */ 14 + #define current_text_addr() ({ void *pc; __asm__("rd %%pc, %0" : "=r" (pc)); pc; }) 15 + 16 + #include <asm/asi.h> 17 + #include <asm/pstate.h> 18 + #include <asm/ptrace.h> 19 + #include <asm/page.h> 20 + 21 + /* The sparc has no problems with write protection */ 22 + #define wp_works_ok 1 23 + #define wp_works_ok__is_a_macro /* for versions in ksyms.c */ 24 + 25 + /* 26 + * User lives in his very own context, and cannot reference us. Note 27 + * that TASK_SIZE is a misnomer, it really gives maximum user virtual 28 + * address that the kernel will allocate out. 29 + * 30 + * XXX No longer using virtual page tables, kill this upper limit... 31 + */ 32 + #define VA_BITS 44 33 + #ifndef __ASSEMBLY__ 34 + #define VPTE_SIZE (1UL << (VA_BITS - PAGE_SHIFT + 3)) 35 + #else 36 + #define VPTE_SIZE (1 << (VA_BITS - PAGE_SHIFT + 3)) 37 + #endif 38 + 39 + #define TASK_SIZE ((unsigned long)-VPTE_SIZE) 40 + #define TASK_SIZE_OF(tsk) \ 41 + (test_tsk_thread_flag(tsk,TIF_32BIT) ? \ 42 + (1UL << 32UL) : TASK_SIZE) 43 + #ifdef __KERNEL__ 44 + 45 + #define STACK_TOP32 ((1UL << 32UL) - PAGE_SIZE) 46 + #define STACK_TOP64 (0x0000080000000000UL - (1UL << 32UL)) 47 + 48 + #define STACK_TOP (test_thread_flag(TIF_32BIT) ? \ 49 + STACK_TOP32 : STACK_TOP64) 50 + 51 + #define STACK_TOP_MAX STACK_TOP64 52 + 53 + #endif 54 + 55 + #ifndef __ASSEMBLY__ 56 + 57 + typedef struct { 58 + unsigned char seg; 59 + } mm_segment_t; 60 + 61 + /* The Sparc processor specific thread struct. */ 62 + /* XXX This should die, everything can go into thread_info now. */ 63 + struct thread_struct { 64 + #ifdef CONFIG_DEBUG_SPINLOCK 65 + /* How many spinlocks held by this thread. 66 + * Used with spin lock debugging to catch tasks 67 + * sleeping illegally with locks held. 68 + */ 69 + int smp_lock_count; 70 + unsigned int smp_lock_pc; 71 + #else 72 + int dummy; /* f'in gcc bug... */ 73 + #endif 74 + }; 75 + 76 + #endif /* !(__ASSEMBLY__) */ 77 + 78 + #ifndef CONFIG_DEBUG_SPINLOCK 79 + #define INIT_THREAD { \ 80 + 0, \ 81 + } 82 + #else /* CONFIG_DEBUG_SPINLOCK */ 83 + #define INIT_THREAD { \ 84 + /* smp_lock_count, smp_lock_pc, */ \ 85 + 0, 0, \ 86 + } 87 + #endif /* !(CONFIG_DEBUG_SPINLOCK) */ 88 + 89 + #ifndef __ASSEMBLY__ 90 + 91 + #include <linux/types.h> 92 + 93 + /* Return saved PC of a blocked thread. */ 94 + struct task_struct; 95 + extern unsigned long thread_saved_pc(struct task_struct *); 96 + 97 + /* On Uniprocessor, even in RMO processes see TSO semantics */ 98 + #ifdef CONFIG_SMP 99 + #define TSTATE_INITIAL_MM TSTATE_TSO 100 + #else 101 + #define TSTATE_INITIAL_MM TSTATE_RMO 102 + #endif 103 + 104 + /* Do necessary setup to start up a newly executed thread. */ 105 + #define start_thread(regs, pc, sp) \ 106 + do { \ 107 + unsigned long __asi = ASI_PNF; \ 108 + regs->tstate = (regs->tstate & (TSTATE_CWP)) | (TSTATE_INITIAL_MM|TSTATE_IE) | (__asi << 24UL); \ 109 + regs->tpc = ((pc & (~3)) - 4); \ 110 + regs->tnpc = regs->tpc + 4; \ 111 + regs->y = 0; \ 112 + set_thread_wstate(1 << 3); \ 113 + if (current_thread_info()->utraps) { \ 114 + if (*(current_thread_info()->utraps) < 2) \ 115 + kfree(current_thread_info()->utraps); \ 116 + else \ 117 + (*(current_thread_info()->utraps))--; \ 118 + current_thread_info()->utraps = NULL; \ 119 + } \ 120 + __asm__ __volatile__( \ 121 + "stx %%g0, [%0 + %2 + 0x00]\n\t" \ 122 + "stx %%g0, [%0 + %2 + 0x08]\n\t" \ 123 + "stx %%g0, [%0 + %2 + 0x10]\n\t" \ 124 + "stx %%g0, [%0 + %2 + 0x18]\n\t" \ 125 + "stx %%g0, [%0 + %2 + 0x20]\n\t" \ 126 + "stx %%g0, [%0 + %2 + 0x28]\n\t" \ 127 + "stx %%g0, [%0 + %2 + 0x30]\n\t" \ 128 + "stx %%g0, [%0 + %2 + 0x38]\n\t" \ 129 + "stx %%g0, [%0 + %2 + 0x40]\n\t" \ 130 + "stx %%g0, [%0 + %2 + 0x48]\n\t" \ 131 + "stx %%g0, [%0 + %2 + 0x50]\n\t" \ 132 + "stx %%g0, [%0 + %2 + 0x58]\n\t" \ 133 + "stx %%g0, [%0 + %2 + 0x60]\n\t" \ 134 + "stx %%g0, [%0 + %2 + 0x68]\n\t" \ 135 + "stx %1, [%0 + %2 + 0x70]\n\t" \ 136 + "stx %%g0, [%0 + %2 + 0x78]\n\t" \ 137 + "wrpr %%g0, (1 << 3), %%wstate\n\t" \ 138 + : \ 139 + : "r" (regs), "r" (sp - sizeof(struct reg_window) - STACK_BIAS), \ 140 + "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \ 141 + } while (0) 142 + 143 + #define start_thread32(regs, pc, sp) \ 144 + do { \ 145 + unsigned long __asi = ASI_PNF; \ 146 + pc &= 0x00000000ffffffffUL; \ 147 + sp &= 0x00000000ffffffffUL; \ 148 + regs->tstate = (regs->tstate & (TSTATE_CWP))|(TSTATE_INITIAL_MM|TSTATE_IE|TSTATE_AM) | (__asi << 24UL); \ 149 + regs->tpc = ((pc & (~3)) - 4); \ 150 + regs->tnpc = regs->tpc + 4; \ 151 + regs->y = 0; \ 152 + set_thread_wstate(2 << 3); \ 153 + if (current_thread_info()->utraps) { \ 154 + if (*(current_thread_info()->utraps) < 2) \ 155 + kfree(current_thread_info()->utraps); \ 156 + else \ 157 + (*(current_thread_info()->utraps))--; \ 158 + current_thread_info()->utraps = NULL; \ 159 + } \ 160 + __asm__ __volatile__( \ 161 + "stx %%g0, [%0 + %2 + 0x00]\n\t" \ 162 + "stx %%g0, [%0 + %2 + 0x08]\n\t" \ 163 + "stx %%g0, [%0 + %2 + 0x10]\n\t" \ 164 + "stx %%g0, [%0 + %2 + 0x18]\n\t" \ 165 + "stx %%g0, [%0 + %2 + 0x20]\n\t" \ 166 + "stx %%g0, [%0 + %2 + 0x28]\n\t" \ 167 + "stx %%g0, [%0 + %2 + 0x30]\n\t" \ 168 + "stx %%g0, [%0 + %2 + 0x38]\n\t" \ 169 + "stx %%g0, [%0 + %2 + 0x40]\n\t" \ 170 + "stx %%g0, [%0 + %2 + 0x48]\n\t" \ 171 + "stx %%g0, [%0 + %2 + 0x50]\n\t" \ 172 + "stx %%g0, [%0 + %2 + 0x58]\n\t" \ 173 + "stx %%g0, [%0 + %2 + 0x60]\n\t" \ 174 + "stx %%g0, [%0 + %2 + 0x68]\n\t" \ 175 + "stx %1, [%0 + %2 + 0x70]\n\t" \ 176 + "stx %%g0, [%0 + %2 + 0x78]\n\t" \ 177 + "wrpr %%g0, (2 << 3), %%wstate\n\t" \ 178 + : \ 179 + : "r" (regs), "r" (sp - sizeof(struct reg_window32)), \ 180 + "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \ 181 + } while (0) 182 + 183 + /* Free all resources held by a thread. */ 184 + #define release_thread(tsk) do { } while (0) 185 + 186 + /* Prepare to copy thread state - unlazy all lazy status */ 187 + #define prepare_to_copy(tsk) do { } while (0) 188 + 189 + extern pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); 190 + 191 + extern unsigned long get_wchan(struct task_struct *task); 192 + 193 + #define task_pt_regs(tsk) (task_thread_info(tsk)->kregs) 194 + #define KSTK_EIP(tsk) (task_pt_regs(tsk)->tpc) 195 + #define KSTK_ESP(tsk) (task_pt_regs(tsk)->u_regs[UREG_FP]) 196 + 197 + #define cpu_relax() barrier() 198 + 199 + /* Prefetch support. This is tuned for UltraSPARC-III and later. 200 + * UltraSPARC-I will treat these as nops, and UltraSPARC-II has 201 + * a shallower prefetch queue than later chips. 202 + */ 203 + #define ARCH_HAS_PREFETCH 204 + #define ARCH_HAS_PREFETCHW 205 + #define ARCH_HAS_SPINLOCK_PREFETCH 206 + 207 + static inline void prefetch(const void *x) 208 + { 209 + /* We do not use the read prefetch mnemonic because that 210 + * prefetches into the prefetch-cache which only is accessible 211 + * by floating point operations in UltraSPARC-III and later. 212 + * By contrast, "#one_write" prefetches into the L2 cache 213 + * in shared state. 214 + */ 215 + __asm__ __volatile__("prefetch [%0], #one_write" 216 + : /* no outputs */ 217 + : "r" (x)); 218 + } 219 + 220 + static inline void prefetchw(const void *x) 221 + { 222 + /* The most optimal prefetch to use for writes is 223 + * "#n_writes". This brings the cacheline into the 224 + * L2 cache in "owned" state. 225 + */ 226 + __asm__ __volatile__("prefetch [%0], #n_writes" 227 + : /* no outputs */ 228 + : "r" (x)); 229 + } 230 + 231 + #define spin_lock_prefetch(x) prefetchw(x) 232 + 233 + #define HAVE_ARCH_PICK_MMAP_LAYOUT 234 + 235 + #endif /* !(__ASSEMBLY__) */ 236 + 237 + #endif /* !(__ASM_SPARC64_PROCESSOR_H) */
+8
arch/sparc/include/asm/ptrace.h
··· 1 + #ifndef ___ASM_SPARC_PTRACE_H 2 + #define ___ASM_SPARC_PTRACE_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/ptrace_64.h> 5 + #else 6 + #include <asm/ptrace_32.h> 7 + #endif 8 + #endif
+176
arch/sparc/include/asm/ptrace_32.h
··· 1 + #ifndef _SPARC_PTRACE_H 2 + #define _SPARC_PTRACE_H 3 + 4 + #include <asm/psr.h> 5 + 6 + /* This struct defines the way the registers are stored on the 7 + * stack during a system call and basically all traps. 8 + */ 9 + 10 + #ifndef __ASSEMBLY__ 11 + 12 + #include <linux/types.h> 13 + 14 + struct pt_regs { 15 + unsigned long psr; 16 + unsigned long pc; 17 + unsigned long npc; 18 + unsigned long y; 19 + unsigned long u_regs[16]; /* globals and ins */ 20 + }; 21 + 22 + #define UREG_G0 0 23 + #define UREG_G1 1 24 + #define UREG_G2 2 25 + #define UREG_G3 3 26 + #define UREG_G4 4 27 + #define UREG_G5 5 28 + #define UREG_G6 6 29 + #define UREG_G7 7 30 + #define UREG_I0 8 31 + #define UREG_I1 9 32 + #define UREG_I2 10 33 + #define UREG_I3 11 34 + #define UREG_I4 12 35 + #define UREG_I5 13 36 + #define UREG_I6 14 37 + #define UREG_I7 15 38 + #define UREG_WIM UREG_G0 39 + #define UREG_FADDR UREG_G0 40 + #define UREG_FP UREG_I6 41 + #define UREG_RETPC UREG_I7 42 + 43 + static inline bool pt_regs_is_syscall(struct pt_regs *regs) 44 + { 45 + return (regs->psr & PSR_SYSCALL); 46 + } 47 + 48 + static inline bool pt_regs_clear_syscall(struct pt_regs *regs) 49 + { 50 + return (regs->psr &= ~PSR_SYSCALL); 51 + } 52 + 53 + /* A register window */ 54 + struct reg_window { 55 + unsigned long locals[8]; 56 + unsigned long ins[8]; 57 + }; 58 + 59 + /* A Sparc stack frame */ 60 + struct sparc_stackf { 61 + unsigned long locals[8]; 62 + unsigned long ins[6]; 63 + struct sparc_stackf *fp; 64 + unsigned long callers_pc; 65 + char *structptr; 66 + unsigned long xargs[6]; 67 + unsigned long xxargs[1]; 68 + }; 69 + 70 + #define TRACEREG_SZ sizeof(struct pt_regs) 71 + #define STACKFRAME_SZ sizeof(struct sparc_stackf) 72 + 73 + #ifdef __KERNEL__ 74 + 75 + #define user_mode(regs) (!((regs)->psr & PSR_PS)) 76 + #define instruction_pointer(regs) ((regs)->pc) 77 + #define user_stack_pointer(regs) ((regs)->u_regs[UREG_FP]) 78 + unsigned long profile_pc(struct pt_regs *); 79 + extern void show_regs(struct pt_regs *); 80 + #endif 81 + 82 + #else /* __ASSEMBLY__ */ 83 + /* For assembly code. */ 84 + #define TRACEREG_SZ 0x50 85 + #define STACKFRAME_SZ 0x60 86 + #endif 87 + 88 + /* 89 + * The asm-offsets.h is a generated file, so we cannot include it. 90 + * It may be OK for glibc headers, but it's utterly pointless for C code. 91 + * The assembly code using those offsets has to include it explicitly. 92 + */ 93 + /* #include <asm/asm-offsets.h> */ 94 + 95 + /* These are for pt_regs. */ 96 + #define PT_PSR 0x0 97 + #define PT_PC 0x4 98 + #define PT_NPC 0x8 99 + #define PT_Y 0xc 100 + #define PT_G0 0x10 101 + #define PT_WIM PT_G0 102 + #define PT_G1 0x14 103 + #define PT_G2 0x18 104 + #define PT_G3 0x1c 105 + #define PT_G4 0x20 106 + #define PT_G5 0x24 107 + #define PT_G6 0x28 108 + #define PT_G7 0x2c 109 + #define PT_I0 0x30 110 + #define PT_I1 0x34 111 + #define PT_I2 0x38 112 + #define PT_I3 0x3c 113 + #define PT_I4 0x40 114 + #define PT_I5 0x44 115 + #define PT_I6 0x48 116 + #define PT_FP PT_I6 117 + #define PT_I7 0x4c 118 + 119 + /* Reg_window offsets */ 120 + #define RW_L0 0x00 121 + #define RW_L1 0x04 122 + #define RW_L2 0x08 123 + #define RW_L3 0x0c 124 + #define RW_L4 0x10 125 + #define RW_L5 0x14 126 + #define RW_L6 0x18 127 + #define RW_L7 0x1c 128 + #define RW_I0 0x20 129 + #define RW_I1 0x24 130 + #define RW_I2 0x28 131 + #define RW_I3 0x2c 132 + #define RW_I4 0x30 133 + #define RW_I5 0x34 134 + #define RW_I6 0x38 135 + #define RW_I7 0x3c 136 + 137 + /* Stack_frame offsets */ 138 + #define SF_L0 0x00 139 + #define SF_L1 0x04 140 + #define SF_L2 0x08 141 + #define SF_L3 0x0c 142 + #define SF_L4 0x10 143 + #define SF_L5 0x14 144 + #define SF_L6 0x18 145 + #define SF_L7 0x1c 146 + #define SF_I0 0x20 147 + #define SF_I1 0x24 148 + #define SF_I2 0x28 149 + #define SF_I3 0x2c 150 + #define SF_I4 0x30 151 + #define SF_I5 0x34 152 + #define SF_FP 0x38 153 + #define SF_PC 0x3c 154 + #define SF_RETP 0x40 155 + #define SF_XARG0 0x44 156 + #define SF_XARG1 0x48 157 + #define SF_XARG2 0x4c 158 + #define SF_XARG3 0x50 159 + #define SF_XARG4 0x54 160 + #define SF_XARG5 0x58 161 + #define SF_XXARG 0x5c 162 + 163 + /* Stuff for the ptrace system call */ 164 + #define PTRACE_SPARC_DETACH 11 165 + #define PTRACE_GETREGS 12 166 + #define PTRACE_SETREGS 13 167 + #define PTRACE_GETFPREGS 14 168 + #define PTRACE_SETFPREGS 15 169 + #define PTRACE_READDATA 16 170 + #define PTRACE_WRITEDATA 17 171 + #define PTRACE_READTEXT 18 172 + #define PTRACE_WRITETEXT 19 173 + #define PTRACE_GETFPAREGS 20 174 + #define PTRACE_SETFPAREGS 21 175 + 176 + #endif /* !(_SPARC_PTRACE_H) */
+347
arch/sparc/include/asm/ptrace_64.h
··· 1 + #ifndef _SPARC64_PTRACE_H 2 + #define _SPARC64_PTRACE_H 3 + 4 + #include <asm/pstate.h> 5 + 6 + /* This struct defines the way the registers are stored on the 7 + * stack during a system call and basically all traps. 8 + */ 9 + 10 + /* This magic value must have the low 9 bits clear, 11 + * as that is where we encode the %tt value, see below. 12 + */ 13 + #define PT_REGS_MAGIC 0x57ac6c00 14 + 15 + #ifndef __ASSEMBLY__ 16 + 17 + #include <linux/types.h> 18 + 19 + struct pt_regs { 20 + unsigned long u_regs[16]; /* globals and ins */ 21 + unsigned long tstate; 22 + unsigned long tpc; 23 + unsigned long tnpc; 24 + unsigned int y; 25 + 26 + /* We encode a magic number, PT_REGS_MAGIC, along 27 + * with the %tt (trap type) register value at trap 28 + * entry time. The magic number allows us to identify 29 + * accurately a trap stack frame in the stack 30 + * unwinder, and the %tt value allows us to test 31 + * things like "in a system call" etc. for an arbitray 32 + * process. 33 + * 34 + * The PT_REGS_MAGIC is choosen such that it can be 35 + * loaded completely using just a sethi instruction. 36 + */ 37 + unsigned int magic; 38 + }; 39 + 40 + static inline int pt_regs_trap_type(struct pt_regs *regs) 41 + { 42 + return regs->magic & 0x1ff; 43 + } 44 + 45 + static inline bool pt_regs_is_syscall(struct pt_regs *regs) 46 + { 47 + return (regs->tstate & TSTATE_SYSCALL); 48 + } 49 + 50 + static inline bool pt_regs_clear_syscall(struct pt_regs *regs) 51 + { 52 + return (regs->tstate &= ~TSTATE_SYSCALL); 53 + } 54 + 55 + struct pt_regs32 { 56 + unsigned int psr; 57 + unsigned int pc; 58 + unsigned int npc; 59 + unsigned int y; 60 + unsigned int u_regs[16]; /* globals and ins */ 61 + }; 62 + 63 + #define UREG_G0 0 64 + #define UREG_G1 1 65 + #define UREG_G2 2 66 + #define UREG_G3 3 67 + #define UREG_G4 4 68 + #define UREG_G5 5 69 + #define UREG_G6 6 70 + #define UREG_G7 7 71 + #define UREG_I0 8 72 + #define UREG_I1 9 73 + #define UREG_I2 10 74 + #define UREG_I3 11 75 + #define UREG_I4 12 76 + #define UREG_I5 13 77 + #define UREG_I6 14 78 + #define UREG_I7 15 79 + #define UREG_FP UREG_I6 80 + #define UREG_RETPC UREG_I7 81 + 82 + /* A V9 register window */ 83 + struct reg_window { 84 + unsigned long locals[8]; 85 + unsigned long ins[8]; 86 + }; 87 + 88 + /* A 32-bit register window. */ 89 + struct reg_window32 { 90 + unsigned int locals[8]; 91 + unsigned int ins[8]; 92 + }; 93 + 94 + /* A V9 Sparc stack frame */ 95 + struct sparc_stackf { 96 + unsigned long locals[8]; 97 + unsigned long ins[6]; 98 + struct sparc_stackf *fp; 99 + unsigned long callers_pc; 100 + char *structptr; 101 + unsigned long xargs[6]; 102 + unsigned long xxargs[1]; 103 + }; 104 + 105 + /* A 32-bit Sparc stack frame */ 106 + struct sparc_stackf32 { 107 + unsigned int locals[8]; 108 + unsigned int ins[6]; 109 + unsigned int fp; 110 + unsigned int callers_pc; 111 + unsigned int structptr; 112 + unsigned int xargs[6]; 113 + unsigned int xxargs[1]; 114 + }; 115 + 116 + struct sparc_trapf { 117 + unsigned long locals[8]; 118 + unsigned long ins[8]; 119 + unsigned long _unused; 120 + struct pt_regs *regs; 121 + }; 122 + 123 + #define TRACEREG_SZ sizeof(struct pt_regs) 124 + #define STACKFRAME_SZ sizeof(struct sparc_stackf) 125 + 126 + #define TRACEREG32_SZ sizeof(struct pt_regs32) 127 + #define STACKFRAME32_SZ sizeof(struct sparc_stackf32) 128 + 129 + #ifdef __KERNEL__ 130 + 131 + struct global_reg_snapshot { 132 + unsigned long tstate; 133 + unsigned long tpc; 134 + unsigned long tnpc; 135 + unsigned long o7; 136 + unsigned long i7; 137 + struct thread_info *thread; 138 + unsigned long pad1; 139 + unsigned long pad2; 140 + }; 141 + 142 + #define __ARCH_WANT_COMPAT_SYS_PTRACE 143 + 144 + #define force_successful_syscall_return() \ 145 + do { current_thread_info()->syscall_noerror = 1; \ 146 + } while (0) 147 + #define user_mode(regs) (!((regs)->tstate & TSTATE_PRIV)) 148 + #define instruction_pointer(regs) ((regs)->tpc) 149 + #define user_stack_pointer(regs) ((regs)->u_regs[UREG_FP]) 150 + #define regs_return_value(regs) ((regs)->u_regs[UREG_I0]) 151 + #ifdef CONFIG_SMP 152 + extern unsigned long profile_pc(struct pt_regs *); 153 + #else 154 + #define profile_pc(regs) instruction_pointer(regs) 155 + #endif 156 + extern void show_regs(struct pt_regs *); 157 + extern void __show_regs(struct pt_regs *); 158 + #endif 159 + 160 + #else /* __ASSEMBLY__ */ 161 + /* For assembly code. */ 162 + #define TRACEREG_SZ 0xa0 163 + #define STACKFRAME_SZ 0xc0 164 + 165 + #define TRACEREG32_SZ 0x50 166 + #define STACKFRAME32_SZ 0x60 167 + #endif 168 + 169 + #ifdef __KERNEL__ 170 + #define STACK_BIAS 2047 171 + #endif 172 + 173 + /* These are for pt_regs. */ 174 + #define PT_V9_G0 0x00 175 + #define PT_V9_G1 0x08 176 + #define PT_V9_G2 0x10 177 + #define PT_V9_G3 0x18 178 + #define PT_V9_G4 0x20 179 + #define PT_V9_G5 0x28 180 + #define PT_V9_G6 0x30 181 + #define PT_V9_G7 0x38 182 + #define PT_V9_I0 0x40 183 + #define PT_V9_I1 0x48 184 + #define PT_V9_I2 0x50 185 + #define PT_V9_I3 0x58 186 + #define PT_V9_I4 0x60 187 + #define PT_V9_I5 0x68 188 + #define PT_V9_I6 0x70 189 + #define PT_V9_FP PT_V9_I6 190 + #define PT_V9_I7 0x78 191 + #define PT_V9_TSTATE 0x80 192 + #define PT_V9_TPC 0x88 193 + #define PT_V9_TNPC 0x90 194 + #define PT_V9_Y 0x98 195 + #define PT_V9_MAGIC 0x9c 196 + #define PT_TSTATE PT_V9_TSTATE 197 + #define PT_TPC PT_V9_TPC 198 + #define PT_TNPC PT_V9_TNPC 199 + 200 + /* These for pt_regs32. */ 201 + #define PT_PSR 0x0 202 + #define PT_PC 0x4 203 + #define PT_NPC 0x8 204 + #define PT_Y 0xc 205 + #define PT_G0 0x10 206 + #define PT_WIM PT_G0 207 + #define PT_G1 0x14 208 + #define PT_G2 0x18 209 + #define PT_G3 0x1c 210 + #define PT_G4 0x20 211 + #define PT_G5 0x24 212 + #define PT_G6 0x28 213 + #define PT_G7 0x2c 214 + #define PT_I0 0x30 215 + #define PT_I1 0x34 216 + #define PT_I2 0x38 217 + #define PT_I3 0x3c 218 + #define PT_I4 0x40 219 + #define PT_I5 0x44 220 + #define PT_I6 0x48 221 + #define PT_FP PT_I6 222 + #define PT_I7 0x4c 223 + 224 + /* Reg_window offsets */ 225 + #define RW_V9_L0 0x00 226 + #define RW_V9_L1 0x08 227 + #define RW_V9_L2 0x10 228 + #define RW_V9_L3 0x18 229 + #define RW_V9_L4 0x20 230 + #define RW_V9_L5 0x28 231 + #define RW_V9_L6 0x30 232 + #define RW_V9_L7 0x38 233 + #define RW_V9_I0 0x40 234 + #define RW_V9_I1 0x48 235 + #define RW_V9_I2 0x50 236 + #define RW_V9_I3 0x58 237 + #define RW_V9_I4 0x60 238 + #define RW_V9_I5 0x68 239 + #define RW_V9_I6 0x70 240 + #define RW_V9_I7 0x78 241 + 242 + #define RW_L0 0x00 243 + #define RW_L1 0x04 244 + #define RW_L2 0x08 245 + #define RW_L3 0x0c 246 + #define RW_L4 0x10 247 + #define RW_L5 0x14 248 + #define RW_L6 0x18 249 + #define RW_L7 0x1c 250 + #define RW_I0 0x20 251 + #define RW_I1 0x24 252 + #define RW_I2 0x28 253 + #define RW_I3 0x2c 254 + #define RW_I4 0x30 255 + #define RW_I5 0x34 256 + #define RW_I6 0x38 257 + #define RW_I7 0x3c 258 + 259 + /* Stack_frame offsets */ 260 + #define SF_V9_L0 0x00 261 + #define SF_V9_L1 0x08 262 + #define SF_V9_L2 0x10 263 + #define SF_V9_L3 0x18 264 + #define SF_V9_L4 0x20 265 + #define SF_V9_L5 0x28 266 + #define SF_V9_L6 0x30 267 + #define SF_V9_L7 0x38 268 + #define SF_V9_I0 0x40 269 + #define SF_V9_I1 0x48 270 + #define SF_V9_I2 0x50 271 + #define SF_V9_I3 0x58 272 + #define SF_V9_I4 0x60 273 + #define SF_V9_I5 0x68 274 + #define SF_V9_FP 0x70 275 + #define SF_V9_PC 0x78 276 + #define SF_V9_RETP 0x80 277 + #define SF_V9_XARG0 0x88 278 + #define SF_V9_XARG1 0x90 279 + #define SF_V9_XARG2 0x98 280 + #define SF_V9_XARG3 0xa0 281 + #define SF_V9_XARG4 0xa8 282 + #define SF_V9_XARG5 0xb0 283 + #define SF_V9_XXARG 0xb8 284 + 285 + #define SF_L0 0x00 286 + #define SF_L1 0x04 287 + #define SF_L2 0x08 288 + #define SF_L3 0x0c 289 + #define SF_L4 0x10 290 + #define SF_L5 0x14 291 + #define SF_L6 0x18 292 + #define SF_L7 0x1c 293 + #define SF_I0 0x20 294 + #define SF_I1 0x24 295 + #define SF_I2 0x28 296 + #define SF_I3 0x2c 297 + #define SF_I4 0x30 298 + #define SF_I5 0x34 299 + #define SF_FP 0x38 300 + #define SF_PC 0x3c 301 + #define SF_RETP 0x40 302 + #define SF_XARG0 0x44 303 + #define SF_XARG1 0x48 304 + #define SF_XARG2 0x4c 305 + #define SF_XARG3 0x50 306 + #define SF_XARG4 0x54 307 + #define SF_XARG5 0x58 308 + #define SF_XXARG 0x5c 309 + 310 + #ifdef __KERNEL__ 311 + 312 + /* global_reg_snapshot offsets */ 313 + #define GR_SNAP_TSTATE 0x00 314 + #define GR_SNAP_TPC 0x08 315 + #define GR_SNAP_TNPC 0x10 316 + #define GR_SNAP_O7 0x18 317 + #define GR_SNAP_I7 0x20 318 + #define GR_SNAP_THREAD 0x28 319 + #define GR_SNAP_PAD1 0x30 320 + #define GR_SNAP_PAD2 0x38 321 + 322 + #endif /* __KERNEL__ */ 323 + 324 + /* Stuff for the ptrace system call */ 325 + #define PTRACE_SPARC_DETACH 11 326 + #define PTRACE_GETREGS 12 327 + #define PTRACE_SETREGS 13 328 + #define PTRACE_GETFPREGS 14 329 + #define PTRACE_SETFPREGS 15 330 + #define PTRACE_READDATA 16 331 + #define PTRACE_WRITEDATA 17 332 + #define PTRACE_READTEXT 18 333 + #define PTRACE_WRITETEXT 19 334 + #define PTRACE_GETFPAREGS 20 335 + #define PTRACE_SETFPAREGS 21 336 + 337 + /* There are for debugging 64-bit processes, either from a 32 or 64 bit 338 + * parent. Thus their complements are for debugging 32-bit processes only. 339 + */ 340 + 341 + #define PTRACE_GETREGS64 22 342 + #define PTRACE_SETREGS64 23 343 + /* PTRACE_SYSCALL is 24 */ 344 + #define PTRACE_GETFPREGS64 25 345 + #define PTRACE_SETFPREGS64 26 346 + 347 + #endif /* !(_SPARC64_PTRACE_H) */
+8
arch/sparc/include/asm/reg.h
··· 1 + #ifndef ___ASM_SPARC_REG_H 2 + #define ___ASM_SPARC_REG_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/reg_64.h> 5 + #else 6 + #include <asm/reg_32.h> 7 + #endif 8 + #endif
+79
arch/sparc/include/asm/reg_32.h
··· 1 + /* 2 + * linux/include/asm/reg.h 3 + * Layout of the registers as expected by gdb on the Sparc 4 + * we should replace the user.h definitions with those in 5 + * this file, we don't even use the other 6 + * -miguel 7 + * 8 + * The names of the structures, constants and aliases in this file 9 + * have the same names as the sunos ones, some programs rely on these 10 + * names (gdb for example). 11 + * 12 + */ 13 + 14 + #ifndef __SPARC_REG_H 15 + #define __SPARC_REG_H 16 + 17 + struct regs { 18 + int r_psr; 19 + #define r_ps r_psr 20 + int r_pc; 21 + int r_npc; 22 + int r_y; 23 + int r_g1; 24 + int r_g2; 25 + int r_g3; 26 + int r_g4; 27 + int r_g5; 28 + int r_g6; 29 + int r_g7; 30 + int r_o0; 31 + int r_o1; 32 + int r_o2; 33 + int r_o3; 34 + int r_o4; 35 + int r_o5; 36 + int r_o6; 37 + int r_o7; 38 + }; 39 + 40 + struct fpq { 41 + unsigned long *addr; 42 + unsigned long instr; 43 + }; 44 + 45 + struct fq { 46 + union { 47 + double whole; 48 + struct fpq fpq; 49 + } FQu; 50 + }; 51 + 52 + #define FPU_REGS_TYPE unsigned int 53 + #define FPU_FSR_TYPE unsigned 54 + 55 + struct fp_status { 56 + union { 57 + FPU_REGS_TYPE Fpu_regs[32]; 58 + double Fpu_dregs[16]; 59 + } fpu_fr; 60 + FPU_FSR_TYPE Fpu_fsr; 61 + unsigned Fpu_flags; 62 + unsigned Fpu_extra; 63 + unsigned Fpu_qcnt; 64 + struct fq Fpu_q[16]; 65 + }; 66 + 67 + #define fpu_regs f_fpstatus.fpu_fr.Fpu_regs 68 + #define fpu_dregs f_fpstatus.fpu_fr.Fpu_dregs 69 + #define fpu_fsr f_fpstatus.Fpu_fsr 70 + #define fpu_flags f_fpstatus.Fpu_flags 71 + #define fpu_extra f_fpstatus.Fpu_extra 72 + #define fpu_q f_fpstatus.Fpu_q 73 + #define fpu_qcnt f_fpstatus.Fpu_qcnt 74 + 75 + struct fpu { 76 + struct fp_status f_fpstatus; 77 + }; 78 + 79 + #endif /* __SPARC_REG_H */
+56
arch/sparc/include/asm/reg_64.h
··· 1 + /* 2 + * linux/asm/reg.h 3 + * Layout of the registers as expected by gdb on the Sparc 4 + * we should replace the user.h definitions with those in 5 + * this file, we don't even use the other 6 + * -miguel 7 + * 8 + * The names of the structures, constants and aliases in this file 9 + * have the same names as the sunos ones, some programs rely on these 10 + * names (gdb for example). 11 + * 12 + */ 13 + 14 + #ifndef __SPARC64_REG_H 15 + #define __SPARC64_REG_H 16 + 17 + struct regs { 18 + unsigned long r_g1; 19 + unsigned long r_g2; 20 + unsigned long r_g3; 21 + unsigned long r_g4; 22 + unsigned long r_g5; 23 + unsigned long r_g6; 24 + unsigned long r_g7; 25 + unsigned long r_o0; 26 + unsigned long r_o1; 27 + unsigned long r_o2; 28 + unsigned long r_o3; 29 + unsigned long r_o4; 30 + unsigned long r_o5; 31 + unsigned long r_o6; 32 + unsigned long r_o7; 33 + unsigned long __pad; 34 + unsigned long r_tstate; 35 + unsigned long r_tpc; 36 + unsigned long r_tnpc; 37 + unsigned int r_y; 38 + unsigned int r_fprs; 39 + }; 40 + 41 + #define FPU_REGS_TYPE unsigned int 42 + #define FPU_FSR_TYPE unsigned long 43 + 44 + struct fp_status { 45 + unsigned long fpu_fr[32]; 46 + unsigned long Fpu_fsr; 47 + }; 48 + 49 + struct fpu { 50 + struct fp_status f_fpstatus; 51 + }; 52 + 53 + #define fpu_regs f_fpstatus.fpu_fr 54 + #define fpu_fsr f_fpstatus.Fpu_fsr 55 + 56 + #endif /* __SPARC64_REG_H */
+8
arch/sparc/include/asm/sbus.h
··· 1 + #ifndef ___ASM_SPARC_SBUS_H 2 + #define ___ASM_SPARC_SBUS_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/sbus_64.h> 5 + #else 6 + #include <asm/sbus_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/scatterlist.h
··· 1 + #ifndef ___ASM_SPARC_SCATTERLIST_H 2 + #define ___ASM_SPARC_SCATTERLIST_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/scatterlist_64.h> 5 + #else 6 + #include <asm/scatterlist_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/sections.h
··· 1 + #ifndef ___ASM_SPARC_SECTIONS_H 2 + #define ___ASM_SPARC_SECTIONS_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/sections_64.h> 5 + #else 6 + #include <asm/sections_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/sfp-machine.h
··· 1 + #ifndef ___ASM_SPARC_SFP_MACHINE_H 2 + #define ___ASM_SPARC_SFP_MACHINE_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/sfp-machine_64.h> 5 + #else 6 + #include <asm/sfp-machine_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/shmparam.h
··· 1 + #ifndef ___ASM_SPARC_SHMPARAM_H 2 + #define ___ASM_SPARC_SHMPARAM_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/shmparam_64.h> 5 + #else 6 + #include <asm/shmparam_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/sigcontext.h
··· 1 + #ifndef ___ASM_SPARC_SIGCONTEXT_H 2 + #define ___ASM_SPARC_SIGCONTEXT_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/sigcontext_64.h> 5 + #else 6 + #include <asm/sigcontext_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/siginfo.h
··· 1 + #ifndef ___ASM_SPARC_SIGINFO_H 2 + #define ___ASM_SPARC_SIGINFO_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/siginfo_64.h> 5 + #else 6 + #include <asm/siginfo_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/signal.h
··· 1 + #ifndef ___ASM_SPARC_SIGNAL_H 2 + #define ___ASM_SPARC_SIGNAL_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/signal_64.h> 5 + #else 6 + #include <asm/signal_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/smp.h
··· 1 + #ifndef ___ASM_SPARC_SMP_H 2 + #define ___ASM_SPARC_SMP_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/smp_64.h> 5 + #else 6 + #include <asm/smp_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/spinlock.h
··· 1 + #ifndef ___ASM_SPARC_SPINLOCK_H 2 + #define ___ASM_SPARC_SPINLOCK_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/spinlock_64.h> 5 + #else 6 + #include <asm/spinlock_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/stat.h
··· 1 + #ifndef ___ASM_SPARC_STAT_H 2 + #define ___ASM_SPARC_STAT_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/stat_64.h> 5 + #else 6 + #include <asm/stat_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/statfs.h
··· 1 + #ifndef ___ASM_SPARC_STATFS_H 2 + #define ___ASM_SPARC_STATFS_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/statfs_64.h> 5 + #else 6 + #include <asm/statfs_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/string.h
··· 1 + #ifndef ___ASM_SPARC_STRING_H 2 + #define ___ASM_SPARC_STRING_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/string_64.h> 5 + #else 6 + #include <asm/string_32.h> 7 + #endif 8 + #endif
+80
arch/sparc/include/asm/sunbpp.h
··· 1 + /* 2 + * include/asm/sunbpp.h 3 + */ 4 + 5 + #ifndef _ASM_SPARC_SUNBPP_H 6 + #define _ASM_SPARC_SUNBPP_H 7 + 8 + struct bpp_regs { 9 + /* DMA registers */ 10 + __volatile__ __u32 p_csr; /* DMA Control/Status Register */ 11 + __volatile__ __u32 p_addr; /* Address Register */ 12 + __volatile__ __u32 p_bcnt; /* Byte Count Register */ 13 + __volatile__ __u32 p_tst_csr; /* Test Control/Status (DMA2 only) */ 14 + /* Parallel Port registers */ 15 + __volatile__ __u16 p_hcr; /* Hardware Configuration Register */ 16 + __volatile__ __u16 p_ocr; /* Operation Configuration Register */ 17 + __volatile__ __u8 p_dr; /* Parallel Data Register */ 18 + __volatile__ __u8 p_tcr; /* Transfer Control Register */ 19 + __volatile__ __u8 p_or; /* Output Register */ 20 + __volatile__ __u8 p_ir; /* Input Register */ 21 + __volatile__ __u16 p_icr; /* Interrupt Control Register */ 22 + }; 23 + 24 + /* P_HCR. Time is in increments of SBus clock. */ 25 + #define P_HCR_TEST 0x8000 /* Allows buried counters to be read */ 26 + #define P_HCR_DSW 0x7f00 /* Data strobe width (in ticks) */ 27 + #define P_HCR_DDS 0x007f /* Data setup before strobe (in ticks) */ 28 + 29 + /* P_OCR. */ 30 + #define P_OCR_MEM_CLR 0x8000 31 + #define P_OCR_DATA_SRC 0x4000 /* ) */ 32 + #define P_OCR_DS_DSEL 0x2000 /* ) Bidirectional */ 33 + #define P_OCR_BUSY_DSEL 0x1000 /* ) selects */ 34 + #define P_OCR_ACK_DSEL 0x0800 /* ) */ 35 + #define P_OCR_EN_DIAG 0x0400 36 + #define P_OCR_BUSY_OP 0x0200 /* Busy operation */ 37 + #define P_OCR_ACK_OP 0x0100 /* Ack operation */ 38 + #define P_OCR_SRST 0x0080 /* Reset state machines. Not selfcleaning. */ 39 + #define P_OCR_IDLE 0x0008 /* PP data transfer state machine is idle */ 40 + #define P_OCR_V_ILCK 0x0002 /* Versatec faded. Zebra only. */ 41 + #define P_OCR_EN_VER 0x0001 /* Enable Versatec (0 - enable). Zebra only. */ 42 + 43 + /* P_TCR */ 44 + #define P_TCR_DIR 0x08 45 + #define P_TCR_BUSY 0x04 46 + #define P_TCR_ACK 0x02 47 + #define P_TCR_DS 0x01 /* Strobe */ 48 + 49 + /* P_OR */ 50 + #define P_OR_V3 0x20 /* ) */ 51 + #define P_OR_V2 0x10 /* ) on Zebra only */ 52 + #define P_OR_V1 0x08 /* ) */ 53 + #define P_OR_INIT 0x04 54 + #define P_OR_AFXN 0x02 /* Auto Feed */ 55 + #define P_OR_SLCT_IN 0x01 56 + 57 + /* P_IR */ 58 + #define P_IR_PE 0x04 59 + #define P_IR_SLCT 0x02 60 + #define P_IR_ERR 0x01 61 + 62 + /* P_ICR */ 63 + #define P_DS_IRQ 0x8000 /* RW1 */ 64 + #define P_ACK_IRQ 0x4000 /* RW1 */ 65 + #define P_BUSY_IRQ 0x2000 /* RW1 */ 66 + #define P_PE_IRQ 0x1000 /* RW1 */ 67 + #define P_SLCT_IRQ 0x0800 /* RW1 */ 68 + #define P_ERR_IRQ 0x0400 /* RW1 */ 69 + #define P_DS_IRQ_EN 0x0200 /* RW Always on rising edge */ 70 + #define P_ACK_IRQ_EN 0x0100 /* RW Always on rising edge */ 71 + #define P_BUSY_IRP 0x0080 /* RW 1= rising edge */ 72 + #define P_BUSY_IRQ_EN 0x0040 /* RW */ 73 + #define P_PE_IRP 0x0020 /* RW 1= rising edge */ 74 + #define P_PE_IRQ_EN 0x0010 /* RW */ 75 + #define P_SLCT_IRP 0x0008 /* RW 1= rising edge */ 76 + #define P_SLCT_IRQ_EN 0x0004 /* RW */ 77 + #define P_ERR_IRP 0x0002 /* RW1 1= rising edge */ 78 + #define P_ERR_IRQ_EN 0x0001 /* RW */ 79 + 80 + #endif /* !(_ASM_SPARC_SUNBPP_H) */
+120
arch/sparc/include/asm/syscall.h
··· 1 + #ifndef __ASM_SPARC_SYSCALL_H 2 + #define __ASM_SPARC_SYSCALL_H 3 + 4 + #include <linux/kernel.h> 5 + #include <linux/sched.h> 6 + #include <asm/ptrace.h> 7 + 8 + /* The system call number is given by the user in %g1 */ 9 + static inline long syscall_get_nr(struct task_struct *task, 10 + struct pt_regs *regs) 11 + { 12 + int syscall_p = pt_regs_is_syscall(regs); 13 + 14 + return (syscall_p ? regs->u_regs[UREG_G1] : -1L); 15 + } 16 + 17 + static inline void syscall_rollback(struct task_struct *task, 18 + struct pt_regs *regs) 19 + { 20 + /* XXX This needs some thought. On Sparc we don't 21 + * XXX save away the original %o0 value somewhere. 22 + * XXX Instead we hold it in register %l5 at the top 23 + * XXX level trap frame and pass this down to the signal 24 + * XXX dispatch code which is the only place that value 25 + * XXX ever was needed. 26 + */ 27 + } 28 + 29 + #ifdef CONFIG_SPARC32 30 + static inline bool syscall_has_error(struct pt_regs *regs) 31 + { 32 + return (regs->psr & PSR_C) ? true : false; 33 + } 34 + static inline void syscall_set_error(struct pt_regs *regs) 35 + { 36 + regs->psr |= PSR_C; 37 + } 38 + static inline void syscall_clear_error(struct pt_regs *regs) 39 + { 40 + regs->psr &= ~PSR_C; 41 + } 42 + #else 43 + static inline bool syscall_has_error(struct pt_regs *regs) 44 + { 45 + return (regs->tstate & (TSTATE_XCARRY | TSTATE_ICARRY)) ? true : false; 46 + } 47 + static inline void syscall_set_error(struct pt_regs *regs) 48 + { 49 + regs->tstate |= (TSTATE_XCARRY | TSTATE_ICARRY); 50 + } 51 + static inline void syscall_clear_error(struct pt_regs *regs) 52 + { 53 + regs->tstate &= ~(TSTATE_XCARRY | TSTATE_ICARRY); 54 + } 55 + #endif 56 + 57 + static inline long syscall_get_error(struct task_struct *task, 58 + struct pt_regs *regs) 59 + { 60 + long val = regs->u_regs[UREG_I0]; 61 + 62 + return (syscall_has_error(regs) ? -val : 0); 63 + } 64 + 65 + static inline long syscall_get_return_value(struct task_struct *task, 66 + struct pt_regs *regs) 67 + { 68 + long val = regs->u_regs[UREG_I0]; 69 + 70 + return val; 71 + } 72 + 73 + static inline void syscall_set_return_value(struct task_struct *task, 74 + struct pt_regs *regs, 75 + int error, long val) 76 + { 77 + if (error) { 78 + syscall_set_error(regs); 79 + regs->u_regs[UREG_I0] = -error; 80 + } else { 81 + syscall_clear_error(regs); 82 + regs->u_regs[UREG_I0] = val; 83 + } 84 + } 85 + 86 + static inline void syscall_get_arguments(struct task_struct *task, 87 + struct pt_regs *regs, 88 + unsigned int i, unsigned int n, 89 + unsigned long *args) 90 + { 91 + int zero_extend = 0; 92 + unsigned int j; 93 + 94 + #ifdef CONFIG_SPARC64 95 + if (test_tsk_thread_flag(task, TIF_32BIT)) 96 + zero_extend = 1; 97 + #endif 98 + 99 + for (j = 0; j < n; j++) { 100 + unsigned long val = regs->u_regs[UREG_I0 + i + j]; 101 + 102 + if (zero_extend) 103 + args[j] = (u32) val; 104 + else 105 + args[j] = val; 106 + } 107 + } 108 + 109 + static inline void syscall_set_arguments(struct task_struct *task, 110 + struct pt_regs *regs, 111 + unsigned int i, unsigned int n, 112 + const unsigned long *args) 113 + { 114 + unsigned int j; 115 + 116 + for (j = 0; j < n; j++) 117 + regs->u_regs[UREG_I0 + i + j] = args[j]; 118 + } 119 + 120 + #endif /* __ASM_SPARC_SYSCALL_H */
+8
arch/sparc/include/asm/system.h
··· 1 + #ifndef ___ASM_SPARC_SYSTEM_H 2 + #define ___ASM_SPARC_SYSTEM_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/system_64.h> 5 + #else 6 + #include <asm/system_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/thread_info.h
··· 1 + #ifndef ___ASM_SPARC_THREAD_INFO_H 2 + #define ___ASM_SPARC_THREAD_INFO_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/thread_info_64.h> 5 + #else 6 + #include <asm/thread_info_32.h> 7 + #endif 8 + #endif
+158
arch/sparc/include/asm/thread_info_32.h
··· 1 + /* 2 + * thread_info.h: sparc low-level thread information 3 + * adapted from the ppc version by Pete Zaitcev, which was 4 + * adapted from the i386 version by Paul Mackerras 5 + * 6 + * Copyright (C) 2002 David Howells (dhowells@redhat.com) 7 + * Copyright (c) 2002 Pete Zaitcev (zaitcev@yahoo.com) 8 + * - Incorporating suggestions made by Linus Torvalds and Dave Miller 9 + */ 10 + 11 + #ifndef _ASM_THREAD_INFO_H 12 + #define _ASM_THREAD_INFO_H 13 + 14 + #ifdef __KERNEL__ 15 + 16 + #ifndef __ASSEMBLY__ 17 + 18 + #include <asm/btfixup.h> 19 + #include <asm/ptrace.h> 20 + #include <asm/page.h> 21 + 22 + /* 23 + * Low level task data. 24 + * 25 + * If you change this, change the TI_* offsets below to match. 26 + */ 27 + #define NSWINS 8 28 + struct thread_info { 29 + unsigned long uwinmask; 30 + struct task_struct *task; /* main task structure */ 31 + struct exec_domain *exec_domain; /* execution domain */ 32 + unsigned long flags; /* low level flags */ 33 + int cpu; /* cpu we're on */ 34 + int preempt_count; /* 0 => preemptable, 35 + <0 => BUG */ 36 + int softirq_count; 37 + int hardirq_count; 38 + 39 + /* Context switch saved kernel state. */ 40 + unsigned long ksp; /* ... ksp __attribute__ ((aligned (8))); */ 41 + unsigned long kpc; 42 + unsigned long kpsr; 43 + unsigned long kwim; 44 + 45 + /* A place to store user windows and stack pointers 46 + * when the stack needs inspection. 47 + */ 48 + struct reg_window reg_window[NSWINS]; /* align for ldd! */ 49 + unsigned long rwbuf_stkptrs[NSWINS]; 50 + unsigned long w_saved; 51 + 52 + struct restart_block restart_block; 53 + }; 54 + 55 + /* 56 + * macros/functions for gaining access to the thread information structure 57 + * 58 + * preempt_count needs to be 1 initially, until the scheduler is functional. 59 + */ 60 + #define INIT_THREAD_INFO(tsk) \ 61 + { \ 62 + .uwinmask = 0, \ 63 + .task = &tsk, \ 64 + .exec_domain = &default_exec_domain, \ 65 + .flags = 0, \ 66 + .cpu = 0, \ 67 + .preempt_count = 1, \ 68 + .restart_block = { \ 69 + .fn = do_no_restart_syscall, \ 70 + }, \ 71 + } 72 + 73 + #define init_thread_info (init_thread_union.thread_info) 74 + #define init_stack (init_thread_union.stack) 75 + 76 + /* how to get the thread information struct from C */ 77 + register struct thread_info *current_thread_info_reg asm("g6"); 78 + #define current_thread_info() (current_thread_info_reg) 79 + 80 + /* 81 + * thread information allocation 82 + */ 83 + #if PAGE_SHIFT == 13 84 + #define THREAD_INFO_ORDER 0 85 + #else /* PAGE_SHIFT */ 86 + #define THREAD_INFO_ORDER 1 87 + #endif 88 + 89 + #define __HAVE_ARCH_THREAD_INFO_ALLOCATOR 90 + 91 + BTFIXUPDEF_CALL(struct thread_info *, alloc_thread_info, void) 92 + #define alloc_thread_info(tsk) BTFIXUP_CALL(alloc_thread_info)() 93 + 94 + BTFIXUPDEF_CALL(void, free_thread_info, struct thread_info *) 95 + #define free_thread_info(ti) BTFIXUP_CALL(free_thread_info)(ti) 96 + 97 + #endif /* __ASSEMBLY__ */ 98 + 99 + /* 100 + * Size of kernel stack for each process. 101 + * Observe the order of get_free_pages() in alloc_thread_info(). 102 + * The sun4 has 8K stack too, because it's short on memory, and 16K is a waste. 103 + */ 104 + #define THREAD_SIZE 8192 105 + 106 + /* 107 + * Offsets in thread_info structure, used in assembly code 108 + * The "#define REGWIN_SZ 0x40" was abolished, so no multiplications. 109 + */ 110 + #define TI_UWINMASK 0x00 /* uwinmask */ 111 + #define TI_TASK 0x04 112 + #define TI_EXECDOMAIN 0x08 /* exec_domain */ 113 + #define TI_FLAGS 0x0c 114 + #define TI_CPU 0x10 115 + #define TI_PREEMPT 0x14 /* preempt_count */ 116 + #define TI_SOFTIRQ 0x18 /* softirq_count */ 117 + #define TI_HARDIRQ 0x1c /* hardirq_count */ 118 + #define TI_KSP 0x20 /* ksp */ 119 + #define TI_KPC 0x24 /* kpc (ldd'ed with kpc) */ 120 + #define TI_KPSR 0x28 /* kpsr */ 121 + #define TI_KWIM 0x2c /* kwim (ldd'ed with kpsr) */ 122 + #define TI_REG_WINDOW 0x30 123 + #define TI_RWIN_SPTRS 0x230 124 + #define TI_W_SAVED 0x250 125 + /* #define TI_RESTART_BLOCK 0x25n */ /* Nobody cares */ 126 + 127 + #define PREEMPT_ACTIVE 0x4000000 128 + 129 + /* 130 + * thread information flag bit numbers 131 + */ 132 + #define TIF_SYSCALL_TRACE 0 /* syscall trace active */ 133 + #define TIF_NOTIFY_RESUME 1 /* callback before returning to user */ 134 + #define TIF_SIGPENDING 2 /* signal pending */ 135 + #define TIF_NEED_RESCHED 3 /* rescheduling necessary */ 136 + #define TIF_RESTORE_SIGMASK 4 /* restore signal mask in do_signal() */ 137 + #define TIF_USEDFPU 8 /* FPU was used by this task 138 + * this quantum (SMP) */ 139 + #define TIF_POLLING_NRFLAG 9 /* true if poll_idle() is polling 140 + * TIF_NEED_RESCHED */ 141 + #define TIF_MEMDIE 10 142 + 143 + /* as above, but as bit values */ 144 + #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) 145 + #define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) 146 + #define _TIF_SIGPENDING (1<<TIF_SIGPENDING) 147 + #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) 148 + #define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) 149 + #define _TIF_USEDFPU (1<<TIF_USEDFPU) 150 + #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) 151 + 152 + #define _TIF_DO_NOTIFY_RESUME_MASK (_TIF_NOTIFY_RESUME | \ 153 + _TIF_SIGPENDING | \ 154 + _TIF_RESTORE_SIGMASK) 155 + 156 + #endif /* __KERNEL__ */ 157 + 158 + #endif /* _ASM_THREAD_INFO_H */
+281
arch/sparc/include/asm/thread_info_64.h
··· 1 + /* thread_info.h: sparc64 low-level thread information 2 + * 3 + * Copyright (C) 2002 David S. Miller (davem@redhat.com) 4 + */ 5 + 6 + #ifndef _ASM_THREAD_INFO_H 7 + #define _ASM_THREAD_INFO_H 8 + 9 + #ifdef __KERNEL__ 10 + 11 + #define NSWINS 7 12 + 13 + #define TI_FLAG_BYTE_FAULT_CODE 0 14 + #define TI_FLAG_FAULT_CODE_SHIFT 56 15 + #define TI_FLAG_BYTE_WSTATE 1 16 + #define TI_FLAG_WSTATE_SHIFT 48 17 + #define TI_FLAG_BYTE_CWP 2 18 + #define TI_FLAG_CWP_SHIFT 40 19 + #define TI_FLAG_BYTE_CURRENT_DS 3 20 + #define TI_FLAG_CURRENT_DS_SHIFT 32 21 + #define TI_FLAG_BYTE_FPDEPTH 4 22 + #define TI_FLAG_FPDEPTH_SHIFT 24 23 + #define TI_FLAG_BYTE_WSAVED 5 24 + #define TI_FLAG_WSAVED_SHIFT 16 25 + 26 + #include <asm/page.h> 27 + 28 + #ifndef __ASSEMBLY__ 29 + 30 + #include <asm/ptrace.h> 31 + #include <asm/types.h> 32 + 33 + struct task_struct; 34 + struct exec_domain; 35 + 36 + struct thread_info { 37 + /* D$ line 1 */ 38 + struct task_struct *task; 39 + unsigned long flags; 40 + __u8 fpsaved[7]; 41 + __u8 status; 42 + unsigned long ksp; 43 + 44 + /* D$ line 2 */ 45 + unsigned long fault_address; 46 + struct pt_regs *kregs; 47 + struct exec_domain *exec_domain; 48 + int preempt_count; /* 0 => preemptable, <0 => BUG */ 49 + __u8 new_child; 50 + __u8 syscall_noerror; 51 + __u16 cpu; 52 + 53 + unsigned long *utraps; 54 + 55 + struct reg_window reg_window[NSWINS]; 56 + unsigned long rwbuf_stkptrs[NSWINS]; 57 + 58 + unsigned long gsr[7]; 59 + unsigned long xfsr[7]; 60 + 61 + __u64 __user *user_cntd0; 62 + __u64 __user *user_cntd1; 63 + __u64 kernel_cntd0, kernel_cntd1; 64 + __u64 pcr_reg; 65 + 66 + struct restart_block restart_block; 67 + 68 + struct pt_regs *kern_una_regs; 69 + unsigned int kern_una_insn; 70 + 71 + unsigned long fpregs[0] __attribute__ ((aligned(64))); 72 + }; 73 + 74 + #endif /* !(__ASSEMBLY__) */ 75 + 76 + /* offsets into the thread_info struct for assembly code access */ 77 + #define TI_TASK 0x00000000 78 + #define TI_FLAGS 0x00000008 79 + #define TI_FAULT_CODE (TI_FLAGS + TI_FLAG_BYTE_FAULT_CODE) 80 + #define TI_WSTATE (TI_FLAGS + TI_FLAG_BYTE_WSTATE) 81 + #define TI_CWP (TI_FLAGS + TI_FLAG_BYTE_CWP) 82 + #define TI_CURRENT_DS (TI_FLAGS + TI_FLAG_BYTE_CURRENT_DS) 83 + #define TI_FPDEPTH (TI_FLAGS + TI_FLAG_BYTE_FPDEPTH) 84 + #define TI_WSAVED (TI_FLAGS + TI_FLAG_BYTE_WSAVED) 85 + #define TI_FPSAVED 0x00000010 86 + #define TI_KSP 0x00000018 87 + #define TI_FAULT_ADDR 0x00000020 88 + #define TI_KREGS 0x00000028 89 + #define TI_EXEC_DOMAIN 0x00000030 90 + #define TI_PRE_COUNT 0x00000038 91 + #define TI_NEW_CHILD 0x0000003c 92 + #define TI_SYS_NOERROR 0x0000003d 93 + #define TI_CPU 0x0000003e 94 + #define TI_UTRAPS 0x00000040 95 + #define TI_REG_WINDOW 0x00000048 96 + #define TI_RWIN_SPTRS 0x000003c8 97 + #define TI_GSR 0x00000400 98 + #define TI_XFSR 0x00000438 99 + #define TI_USER_CNTD0 0x00000470 100 + #define TI_USER_CNTD1 0x00000478 101 + #define TI_KERN_CNTD0 0x00000480 102 + #define TI_KERN_CNTD1 0x00000488 103 + #define TI_PCR 0x00000490 104 + #define TI_RESTART_BLOCK 0x00000498 105 + #define TI_KUNA_REGS 0x000004c0 106 + #define TI_KUNA_INSN 0x000004c8 107 + #define TI_FPREGS 0x00000500 108 + 109 + /* We embed this in the uppermost byte of thread_info->flags */ 110 + #define FAULT_CODE_WRITE 0x01 /* Write access, implies D-TLB */ 111 + #define FAULT_CODE_DTLB 0x02 /* Miss happened in D-TLB */ 112 + #define FAULT_CODE_ITLB 0x04 /* Miss happened in I-TLB */ 113 + #define FAULT_CODE_WINFIXUP 0x08 /* Miss happened during spill/fill */ 114 + #define FAULT_CODE_BLKCOMMIT 0x10 /* Use blk-commit ASI in copy_page */ 115 + 116 + #if PAGE_SHIFT == 13 117 + #define THREAD_SIZE (2*PAGE_SIZE) 118 + #define THREAD_SHIFT (PAGE_SHIFT + 1) 119 + #else /* PAGE_SHIFT == 13 */ 120 + #define THREAD_SIZE PAGE_SIZE 121 + #define THREAD_SHIFT PAGE_SHIFT 122 + #endif /* PAGE_SHIFT == 13 */ 123 + 124 + #define PREEMPT_ACTIVE 0x4000000 125 + 126 + /* 127 + * macros/functions for gaining access to the thread information structure 128 + * 129 + * preempt_count needs to be 1 initially, until the scheduler is functional. 130 + */ 131 + #ifndef __ASSEMBLY__ 132 + 133 + #define INIT_THREAD_INFO(tsk) \ 134 + { \ 135 + .task = &tsk, \ 136 + .flags = ((unsigned long)ASI_P) << TI_FLAG_CURRENT_DS_SHIFT, \ 137 + .exec_domain = &default_exec_domain, \ 138 + .preempt_count = 1, \ 139 + .restart_block = { \ 140 + .fn = do_no_restart_syscall, \ 141 + }, \ 142 + } 143 + 144 + #define init_thread_info (init_thread_union.thread_info) 145 + #define init_stack (init_thread_union.stack) 146 + 147 + /* how to get the thread information struct from C */ 148 + register struct thread_info *current_thread_info_reg asm("g6"); 149 + #define current_thread_info() (current_thread_info_reg) 150 + 151 + /* thread information allocation */ 152 + #if PAGE_SHIFT == 13 153 + #define __THREAD_INFO_ORDER 1 154 + #else /* PAGE_SHIFT == 13 */ 155 + #define __THREAD_INFO_ORDER 0 156 + #endif /* PAGE_SHIFT == 13 */ 157 + 158 + #define __HAVE_ARCH_THREAD_INFO_ALLOCATOR 159 + 160 + #ifdef CONFIG_DEBUG_STACK_USAGE 161 + #define alloc_thread_info(tsk) \ 162 + ({ \ 163 + struct thread_info *ret; \ 164 + \ 165 + ret = (struct thread_info *) \ 166 + __get_free_pages(GFP_KERNEL, __THREAD_INFO_ORDER); \ 167 + if (ret) \ 168 + memset(ret, 0, PAGE_SIZE<<__THREAD_INFO_ORDER); \ 169 + ret; \ 170 + }) 171 + #else 172 + #define alloc_thread_info(tsk) \ 173 + ((struct thread_info *)__get_free_pages(GFP_KERNEL, __THREAD_INFO_ORDER)) 174 + #endif 175 + 176 + #define free_thread_info(ti) \ 177 + free_pages((unsigned long)(ti),__THREAD_INFO_ORDER) 178 + 179 + #define __thread_flag_byte_ptr(ti) \ 180 + ((unsigned char *)(&((ti)->flags))) 181 + #define __cur_thread_flag_byte_ptr __thread_flag_byte_ptr(current_thread_info()) 182 + 183 + #define get_thread_fault_code() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FAULT_CODE]) 184 + #define set_thread_fault_code(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FAULT_CODE] = (val)) 185 + #define get_thread_wstate() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSTATE]) 186 + #define set_thread_wstate(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSTATE] = (val)) 187 + #define get_thread_cwp() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CWP]) 188 + #define set_thread_cwp(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CWP] = (val)) 189 + #define get_thread_current_ds() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CURRENT_DS]) 190 + #define set_thread_current_ds(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CURRENT_DS] = (val)) 191 + #define get_thread_fpdepth() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FPDEPTH]) 192 + #define set_thread_fpdepth(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FPDEPTH] = (val)) 193 + #define get_thread_wsaved() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSAVED]) 194 + #define set_thread_wsaved(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSAVED] = (val)) 195 + 196 + #endif /* !(__ASSEMBLY__) */ 197 + 198 + /* 199 + * Thread information flags, only 16 bits are available as we encode 200 + * other values into the upper 6 bytes. 201 + * 202 + * On trap return we need to test several values: 203 + * 204 + * user: need_resched, notify_resume, sigpending, wsaved, perfctr 205 + * kernel: fpdepth 206 + * 207 + * So to check for work in the kernel case we simply load the fpdepth 208 + * byte out of the flags and test it. For the user case we encode the 209 + * lower 3 bytes of flags as follows: 210 + * ---------------------------------------- 211 + * | wsaved | flags byte 1 | flags byte 2 | 212 + * ---------------------------------------- 213 + * This optimizes the user test into: 214 + * ldx [%g6 + TI_FLAGS], REG1 215 + * sethi %hi(_TIF_USER_WORK_MASK), REG2 216 + * or REG2, %lo(_TIF_USER_WORK_MASK), REG2 217 + * andcc REG1, REG2, %g0 218 + * be,pt no_work_to_do 219 + * nop 220 + */ 221 + #define TIF_SYSCALL_TRACE 0 /* syscall trace active */ 222 + #define TIF_NOTIFY_RESUME 1 /* callback before returning to user */ 223 + #define TIF_SIGPENDING 2 /* signal pending */ 224 + #define TIF_NEED_RESCHED 3 /* rescheduling necessary */ 225 + #define TIF_PERFCTR 4 /* performance counters active */ 226 + #define TIF_UNALIGNED 5 /* allowed to do unaligned accesses */ 227 + /* flag bit 6 is available */ 228 + #define TIF_32BIT 7 /* 32-bit binary */ 229 + /* flag bit 8 is available */ 230 + #define TIF_SECCOMP 9 /* secure computing */ 231 + #define TIF_SYSCALL_AUDIT 10 /* syscall auditing active */ 232 + /* flag bit 11 is available */ 233 + /* NOTE: Thread flags >= 12 should be ones we have no interest 234 + * in using in assembly, else we can't use the mask as 235 + * an immediate value in instructions such as andcc. 236 + */ 237 + #define TIF_ABI_PENDING 12 238 + #define TIF_MEMDIE 13 239 + #define TIF_POLLING_NRFLAG 14 240 + 241 + #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) 242 + #define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) 243 + #define _TIF_SIGPENDING (1<<TIF_SIGPENDING) 244 + #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) 245 + #define _TIF_PERFCTR (1<<TIF_PERFCTR) 246 + #define _TIF_UNALIGNED (1<<TIF_UNALIGNED) 247 + #define _TIF_32BIT (1<<TIF_32BIT) 248 + #define _TIF_SECCOMP (1<<TIF_SECCOMP) 249 + #define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT) 250 + #define _TIF_ABI_PENDING (1<<TIF_ABI_PENDING) 251 + #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) 252 + 253 + #define _TIF_USER_WORK_MASK ((0xff << TI_FLAG_WSAVED_SHIFT) | \ 254 + _TIF_DO_NOTIFY_RESUME_MASK | \ 255 + _TIF_NEED_RESCHED | _TIF_PERFCTR) 256 + #define _TIF_DO_NOTIFY_RESUME_MASK (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING) 257 + 258 + /* 259 + * Thread-synchronous status. 260 + * 261 + * This is different from the flags in that nobody else 262 + * ever touches our thread-synchronous status, so we don't 263 + * have to worry about atomic accesses. 264 + * 265 + * Note that there are only 8 bits available. 266 + */ 267 + #define TS_RESTORE_SIGMASK 0x0001 /* restore signal mask in do_signal() */ 268 + 269 + #ifndef __ASSEMBLY__ 270 + #define HAVE_SET_RESTORE_SIGMASK 1 271 + static inline void set_restore_sigmask(void) 272 + { 273 + struct thread_info *ti = current_thread_info(); 274 + ti->status |= TS_RESTORE_SIGMASK; 275 + set_bit(TIF_SIGPENDING, &ti->flags); 276 + } 277 + #endif /* !__ASSEMBLY__ */ 278 + 279 + #endif /* __KERNEL__ */ 280 + 281 + #endif /* _ASM_THREAD_INFO_H */
+8
arch/sparc/include/asm/timer.h
··· 1 + #ifndef ___ASM_SPARC_TIMER_H 2 + #define ___ASM_SPARC_TIMER_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/timer_64.h> 5 + #else 6 + #include <asm/timer_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/timex.h
··· 1 + #ifndef ___ASM_SPARC_TIMEX_H 2 + #define ___ASM_SPARC_TIMEX_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/timex_64.h> 5 + #else 6 + #include <asm/timex_32.h> 7 + #endif 8 + #endif
+15
arch/sparc/include/asm/timex_32.h
··· 1 + /* 2 + * linux/include/asm/timex.h 3 + * 4 + * sparc architecture timex specifications 5 + */ 6 + #ifndef _ASMsparc_TIMEX_H 7 + #define _ASMsparc_TIMEX_H 8 + 9 + #define CLOCK_TICK_RATE 1193180 /* Underlying HZ */ 10 + 11 + /* XXX Maybe do something better at some point... -DaveM */ 12 + typedef unsigned long cycles_t; 13 + #define get_cycles() (0) 14 + 15 + #endif
+19
arch/sparc/include/asm/timex_64.h
··· 1 + /* 2 + * linux/include/asm/timex.h 3 + * 4 + * sparc64 architecture timex specifications 5 + */ 6 + #ifndef _ASMsparc64_TIMEX_H 7 + #define _ASMsparc64_TIMEX_H 8 + 9 + #include <asm/timer.h> 10 + 11 + #define CLOCK_TICK_RATE 1193180 /* Underlying HZ */ 12 + 13 + /* Getting on the cycle counter on sparc64. */ 14 + typedef unsigned long cycles_t; 15 + #define get_cycles() tick_ops->get_tick() 16 + 17 + #define ARCH_HAS_READ_CURRENT_TIMER 18 + 19 + #endif
+8
arch/sparc/include/asm/tlb.h
··· 1 + #ifndef ___ASM_SPARC_TLB_H 2 + #define ___ASM_SPARC_TLB_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/tlb_64.h> 5 + #else 6 + #include <asm/tlb_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/tlbflush.h
··· 1 + #ifndef ___ASM_SPARC_TLBFLUSH_H 2 + #define ___ASM_SPARC_TLBFLUSH_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/tlbflush_64.h> 5 + #else 6 + #include <asm/tlbflush_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/topology.h
··· 1 + #ifndef ___ASM_SPARC_TOPOLOGY_H 2 + #define ___ASM_SPARC_TOPOLOGY_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/topology_64.h> 5 + #else 6 + #include <asm/topology_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/uaccess.h
··· 1 + #ifndef ___ASM_SPARC_UACCESS_H 2 + #define ___ASM_SPARC_UACCESS_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/uaccess_64.h> 5 + #else 6 + #include <asm/uaccess_32.h> 7 + #endif 8 + #endif
+8
arch/sparc/include/asm/unistd.h
··· 1 + #ifndef ___ASM_SPARC_UNISTD_H 2 + #define ___ASM_SPARC_UNISTD_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/unistd_64.h> 5 + #else 6 + #include <asm/unistd_32.h> 7 + #endif 8 + #endif
+51
arch/sparc/include/asm/utrap.h
··· 1 + /* 2 + * include/asm/utrap.h 3 + * 4 + * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) 5 + */ 6 + 7 + #ifndef __ASM_SPARC64_UTRAP_H 8 + #define __ASM_SPARC64_UTRAP_H 9 + 10 + #define UT_INSTRUCTION_EXCEPTION 1 11 + #define UT_INSTRUCTION_ERROR 2 12 + #define UT_INSTRUCTION_PROTECTION 3 13 + #define UT_ILLTRAP_INSTRUCTION 4 14 + #define UT_ILLEGAL_INSTRUCTION 5 15 + #define UT_PRIVILEGED_OPCODE 6 16 + #define UT_FP_DISABLED 7 17 + #define UT_FP_EXCEPTION_IEEE_754 8 18 + #define UT_FP_EXCEPTION_OTHER 9 19 + #define UT_TAG_OVERVIEW 10 20 + #define UT_DIVISION_BY_ZERO 11 21 + #define UT_DATA_EXCEPTION 12 22 + #define UT_DATA_ERROR 13 23 + #define UT_DATA_PROTECTION 14 24 + #define UT_MEM_ADDRESS_NOT_ALIGNED 15 25 + #define UT_PRIVILEGED_ACTION 16 26 + #define UT_ASYNC_DATA_ERROR 17 27 + #define UT_TRAP_INSTRUCTION_16 18 28 + #define UT_TRAP_INSTRUCTION_17 19 29 + #define UT_TRAP_INSTRUCTION_18 20 30 + #define UT_TRAP_INSTRUCTION_19 21 31 + #define UT_TRAP_INSTRUCTION_20 22 32 + #define UT_TRAP_INSTRUCTION_21 23 33 + #define UT_TRAP_INSTRUCTION_22 24 34 + #define UT_TRAP_INSTRUCTION_23 25 35 + #define UT_TRAP_INSTRUCTION_24 26 36 + #define UT_TRAP_INSTRUCTION_25 27 37 + #define UT_TRAP_INSTRUCTION_26 28 38 + #define UT_TRAP_INSTRUCTION_27 29 39 + #define UT_TRAP_INSTRUCTION_28 30 40 + #define UT_TRAP_INSTRUCTION_29 31 41 + #define UT_TRAP_INSTRUCTION_30 32 42 + #define UT_TRAP_INSTRUCTION_31 33 43 + 44 + #define UTH_NOCHANGE (-1) 45 + 46 + #ifndef __ASSEMBLY__ 47 + typedef int utrap_entry_t; 48 + typedef void *utrap_handler_t; 49 + #endif /* __ASSEMBLY__ */ 50 + 51 + #endif /* !(__ASM_SPARC64_PROCESSOR_H) */
+64
arch/sparc/include/asm/vaddrs.h
··· 1 + #ifndef _SPARC_VADDRS_H 2 + #define _SPARC_VADDRS_H 3 + 4 + #include <asm/head.h> 5 + 6 + /* 7 + * asm/vaddrs.h: Here we define the virtual addresses at 8 + * which important things will be mapped. 9 + * 10 + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) 11 + * Copyright (C) 2000 Anton Blanchard (anton@samba.org) 12 + */ 13 + 14 + #define SRMMU_MAXMEM 0x0c000000 15 + 16 + #define SRMMU_NOCACHE_VADDR (KERNBASE + SRMMU_MAXMEM) 17 + /* = 0x0fc000000 */ 18 + /* XXX Empiricals - this needs to go away - KMW */ 19 + #define SRMMU_MIN_NOCACHE_PAGES (550) 20 + #define SRMMU_MAX_NOCACHE_PAGES (1280) 21 + 22 + /* The following constant is used in mm/srmmu.c::srmmu_nocache_calcsize() 23 + * to determine the amount of memory that will be reserved as nocache: 24 + * 25 + * 256 pages will be taken as nocache per each 26 + * SRMMU_NOCACHE_ALCRATIO MB of system memory. 27 + * 28 + * limits enforced: nocache minimum = 256 pages 29 + * nocache maximum = 1280 pages 30 + */ 31 + #define SRMMU_NOCACHE_ALCRATIO 64 /* 256 pages per 64MB of system RAM */ 32 + 33 + #define SUN4M_IOBASE_VADDR 0xfd000000 /* Base for mapping pages */ 34 + #define IOBASE_VADDR 0xfe000000 35 + #define IOBASE_END 0xfe600000 36 + 37 + /* 38 + * On the sun4/4c we need a place 39 + * to reliably map locked down kernel data. This includes the 40 + * task_struct and kernel stack pages of each process plus the 41 + * scsi buffers during dvma IO transfers, also the floppy buffers 42 + * during pseudo dma which runs with traps off (no faults allowed). 43 + * Some quick calculations yield: 44 + * NR_TASKS <512> * (3 * PAGE_SIZE) == 0x600000 45 + * Subtract this from 0xc00000 and you get 0x927C0 of vm left 46 + * over to map SCSI dvma + floppy pseudo-dma buffers. So be 47 + * careful if you change NR_TASKS or else there won't be enough 48 + * room for it all. 49 + */ 50 + #define SUN4C_LOCK_VADDR 0xff000000 51 + #define SUN4C_LOCK_END 0xffc00000 52 + 53 + #define KADB_DEBUGGER_BEGVM 0xffc00000 /* Where kern debugger is in virt-mem */ 54 + #define KADB_DEBUGGER_ENDVM 0xffd00000 55 + #define DEBUG_FIRSTVADDR KADB_DEBUGGER_BEGVM 56 + #define DEBUG_LASTVADDR KADB_DEBUGGER_ENDVM 57 + 58 + #define LINUX_OPPROM_BEGVM 0xffd00000 59 + #define LINUX_OPPROM_ENDVM 0xfff00000 60 + 61 + #define DVMA_VADDR 0xfff00000 /* Base area of the DVMA on suns */ 62 + #define DVMA_END 0xfffc0000 63 + 64 + #endif /* !(_SPARC_VADDRS_H) */
+8
arch/sparc/include/asm/xor.h
··· 1 + #ifndef ___ASM_SPARC_XOR_H 2 + #define ___ASM_SPARC_XOR_H 3 + #if defined(__sparc__) && defined(__arch64__) 4 + #include <asm/xor_64.h> 5 + #else 6 + #include <asm/xor_32.h> 7 + #endif 8 + #endif
+269
arch/sparc/include/asm/xor_32.h
··· 1 + /* 2 + * include/asm/xor.h 3 + * 4 + * Optimized RAID-5 checksumming functions for 32-bit Sparc. 5 + * 6 + * This program is free software; you can redistribute it and/or modify 7 + * it under the terms of the GNU General Public License as published by 8 + * the Free Software Foundation; either version 2, or (at your option) 9 + * any later version. 10 + * 11 + * You should have received a copy of the GNU General Public License 12 + * (for example /usr/src/linux/COPYING); if not, write to the Free 13 + * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 14 + */ 15 + 16 + /* 17 + * High speed xor_block operation for RAID4/5 utilizing the 18 + * ldd/std SPARC instructions. 19 + * 20 + * Copyright (C) 1999 Jakub Jelinek (jj@ultra.linux.cz) 21 + */ 22 + 23 + static void 24 + sparc_2(unsigned long bytes, unsigned long *p1, unsigned long *p2) 25 + { 26 + int lines = bytes / (sizeof (long)) / 8; 27 + 28 + do { 29 + __asm__ __volatile__( 30 + "ldd [%0 + 0x00], %%g2\n\t" 31 + "ldd [%0 + 0x08], %%g4\n\t" 32 + "ldd [%0 + 0x10], %%o0\n\t" 33 + "ldd [%0 + 0x18], %%o2\n\t" 34 + "ldd [%1 + 0x00], %%o4\n\t" 35 + "ldd [%1 + 0x08], %%l0\n\t" 36 + "ldd [%1 + 0x10], %%l2\n\t" 37 + "ldd [%1 + 0x18], %%l4\n\t" 38 + "xor %%g2, %%o4, %%g2\n\t" 39 + "xor %%g3, %%o5, %%g3\n\t" 40 + "xor %%g4, %%l0, %%g4\n\t" 41 + "xor %%g5, %%l1, %%g5\n\t" 42 + "xor %%o0, %%l2, %%o0\n\t" 43 + "xor %%o1, %%l3, %%o1\n\t" 44 + "xor %%o2, %%l4, %%o2\n\t" 45 + "xor %%o3, %%l5, %%o3\n\t" 46 + "std %%g2, [%0 + 0x00]\n\t" 47 + "std %%g4, [%0 + 0x08]\n\t" 48 + "std %%o0, [%0 + 0x10]\n\t" 49 + "std %%o2, [%0 + 0x18]\n" 50 + : 51 + : "r" (p1), "r" (p2) 52 + : "g2", "g3", "g4", "g5", 53 + "o0", "o1", "o2", "o3", "o4", "o5", 54 + "l0", "l1", "l2", "l3", "l4", "l5"); 55 + p1 += 8; 56 + p2 += 8; 57 + } while (--lines > 0); 58 + } 59 + 60 + static void 61 + sparc_3(unsigned long bytes, unsigned long *p1, unsigned long *p2, 62 + unsigned long *p3) 63 + { 64 + int lines = bytes / (sizeof (long)) / 8; 65 + 66 + do { 67 + __asm__ __volatile__( 68 + "ldd [%0 + 0x00], %%g2\n\t" 69 + "ldd [%0 + 0x08], %%g4\n\t" 70 + "ldd [%0 + 0x10], %%o0\n\t" 71 + "ldd [%0 + 0x18], %%o2\n\t" 72 + "ldd [%1 + 0x00], %%o4\n\t" 73 + "ldd [%1 + 0x08], %%l0\n\t" 74 + "ldd [%1 + 0x10], %%l2\n\t" 75 + "ldd [%1 + 0x18], %%l4\n\t" 76 + "xor %%g2, %%o4, %%g2\n\t" 77 + "xor %%g3, %%o5, %%g3\n\t" 78 + "ldd [%2 + 0x00], %%o4\n\t" 79 + "xor %%g4, %%l0, %%g4\n\t" 80 + "xor %%g5, %%l1, %%g5\n\t" 81 + "ldd [%2 + 0x08], %%l0\n\t" 82 + "xor %%o0, %%l2, %%o0\n\t" 83 + "xor %%o1, %%l3, %%o1\n\t" 84 + "ldd [%2 + 0x10], %%l2\n\t" 85 + "xor %%o2, %%l4, %%o2\n\t" 86 + "xor %%o3, %%l5, %%o3\n\t" 87 + "ldd [%2 + 0x18], %%l4\n\t" 88 + "xor %%g2, %%o4, %%g2\n\t" 89 + "xor %%g3, %%o5, %%g3\n\t" 90 + "xor %%g4, %%l0, %%g4\n\t" 91 + "xor %%g5, %%l1, %%g5\n\t" 92 + "xor %%o0, %%l2, %%o0\n\t" 93 + "xor %%o1, %%l3, %%o1\n\t" 94 + "xor %%o2, %%l4, %%o2\n\t" 95 + "xor %%o3, %%l5, %%o3\n\t" 96 + "std %%g2, [%0 + 0x00]\n\t" 97 + "std %%g4, [%0 + 0x08]\n\t" 98 + "std %%o0, [%0 + 0x10]\n\t" 99 + "std %%o2, [%0 + 0x18]\n" 100 + : 101 + : "r" (p1), "r" (p2), "r" (p3) 102 + : "g2", "g3", "g4", "g5", 103 + "o0", "o1", "o2", "o3", "o4", "o5", 104 + "l0", "l1", "l2", "l3", "l4", "l5"); 105 + p1 += 8; 106 + p2 += 8; 107 + p3 += 8; 108 + } while (--lines > 0); 109 + } 110 + 111 + static void 112 + sparc_4(unsigned long bytes, unsigned long *p1, unsigned long *p2, 113 + unsigned long *p3, unsigned long *p4) 114 + { 115 + int lines = bytes / (sizeof (long)) / 8; 116 + 117 + do { 118 + __asm__ __volatile__( 119 + "ldd [%0 + 0x00], %%g2\n\t" 120 + "ldd [%0 + 0x08], %%g4\n\t" 121 + "ldd [%0 + 0x10], %%o0\n\t" 122 + "ldd [%0 + 0x18], %%o2\n\t" 123 + "ldd [%1 + 0x00], %%o4\n\t" 124 + "ldd [%1 + 0x08], %%l0\n\t" 125 + "ldd [%1 + 0x10], %%l2\n\t" 126 + "ldd [%1 + 0x18], %%l4\n\t" 127 + "xor %%g2, %%o4, %%g2\n\t" 128 + "xor %%g3, %%o5, %%g3\n\t" 129 + "ldd [%2 + 0x00], %%o4\n\t" 130 + "xor %%g4, %%l0, %%g4\n\t" 131 + "xor %%g5, %%l1, %%g5\n\t" 132 + "ldd [%2 + 0x08], %%l0\n\t" 133 + "xor %%o0, %%l2, %%o0\n\t" 134 + "xor %%o1, %%l3, %%o1\n\t" 135 + "ldd [%2 + 0x10], %%l2\n\t" 136 + "xor %%o2, %%l4, %%o2\n\t" 137 + "xor %%o3, %%l5, %%o3\n\t" 138 + "ldd [%2 + 0x18], %%l4\n\t" 139 + "xor %%g2, %%o4, %%g2\n\t" 140 + "xor %%g3, %%o5, %%g3\n\t" 141 + "ldd [%3 + 0x00], %%o4\n\t" 142 + "xor %%g4, %%l0, %%g4\n\t" 143 + "xor %%g5, %%l1, %%g5\n\t" 144 + "ldd [%3 + 0x08], %%l0\n\t" 145 + "xor %%o0, %%l2, %%o0\n\t" 146 + "xor %%o1, %%l3, %%o1\n\t" 147 + "ldd [%3 + 0x10], %%l2\n\t" 148 + "xor %%o2, %%l4, %%o2\n\t" 149 + "xor %%o3, %%l5, %%o3\n\t" 150 + "ldd [%3 + 0x18], %%l4\n\t" 151 + "xor %%g2, %%o4, %%g2\n\t" 152 + "xor %%g3, %%o5, %%g3\n\t" 153 + "xor %%g4, %%l0, %%g4\n\t" 154 + "xor %%g5, %%l1, %%g5\n\t" 155 + "xor %%o0, %%l2, %%o0\n\t" 156 + "xor %%o1, %%l3, %%o1\n\t" 157 + "xor %%o2, %%l4, %%o2\n\t" 158 + "xor %%o3, %%l5, %%o3\n\t" 159 + "std %%g2, [%0 + 0x00]\n\t" 160 + "std %%g4, [%0 + 0x08]\n\t" 161 + "std %%o0, [%0 + 0x10]\n\t" 162 + "std %%o2, [%0 + 0x18]\n" 163 + : 164 + : "r" (p1), "r" (p2), "r" (p3), "r" (p4) 165 + : "g2", "g3", "g4", "g5", 166 + "o0", "o1", "o2", "o3", "o4", "o5", 167 + "l0", "l1", "l2", "l3", "l4", "l5"); 168 + p1 += 8; 169 + p2 += 8; 170 + p3 += 8; 171 + p4 += 8; 172 + } while (--lines > 0); 173 + } 174 + 175 + static void 176 + sparc_5(unsigned long bytes, unsigned long *p1, unsigned long *p2, 177 + unsigned long *p3, unsigned long *p4, unsigned long *p5) 178 + { 179 + int lines = bytes / (sizeof (long)) / 8; 180 + 181 + do { 182 + __asm__ __volatile__( 183 + "ldd [%0 + 0x00], %%g2\n\t" 184 + "ldd [%0 + 0x08], %%g4\n\t" 185 + "ldd [%0 + 0x10], %%o0\n\t" 186 + "ldd [%0 + 0x18], %%o2\n\t" 187 + "ldd [%1 + 0x00], %%o4\n\t" 188 + "ldd [%1 + 0x08], %%l0\n\t" 189 + "ldd [%1 + 0x10], %%l2\n\t" 190 + "ldd [%1 + 0x18], %%l4\n\t" 191 + "xor %%g2, %%o4, %%g2\n\t" 192 + "xor %%g3, %%o5, %%g3\n\t" 193 + "ldd [%2 + 0x00], %%o4\n\t" 194 + "xor %%g4, %%l0, %%g4\n\t" 195 + "xor %%g5, %%l1, %%g5\n\t" 196 + "ldd [%2 + 0x08], %%l0\n\t" 197 + "xor %%o0, %%l2, %%o0\n\t" 198 + "xor %%o1, %%l3, %%o1\n\t" 199 + "ldd [%2 + 0x10], %%l2\n\t" 200 + "xor %%o2, %%l4, %%o2\n\t" 201 + "xor %%o3, %%l5, %%o3\n\t" 202 + "ldd [%2 + 0x18], %%l4\n\t" 203 + "xor %%g2, %%o4, %%g2\n\t" 204 + "xor %%g3, %%o5, %%g3\n\t" 205 + "ldd [%3 + 0x00], %%o4\n\t" 206 + "xor %%g4, %%l0, %%g4\n\t" 207 + "xor %%g5, %%l1, %%g5\n\t" 208 + "ldd [%3 + 0x08], %%l0\n\t" 209 + "xor %%o0, %%l2, %%o0\n\t" 210 + "xor %%o1, %%l3, %%o1\n\t" 211 + "ldd [%3 + 0x10], %%l2\n\t" 212 + "xor %%o2, %%l4, %%o2\n\t" 213 + "xor %%o3, %%l5, %%o3\n\t" 214 + "ldd [%3 + 0x18], %%l4\n\t" 215 + "xor %%g2, %%o4, %%g2\n\t" 216 + "xor %%g3, %%o5, %%g3\n\t" 217 + "ldd [%4 + 0x00], %%o4\n\t" 218 + "xor %%g4, %%l0, %%g4\n\t" 219 + "xor %%g5, %%l1, %%g5\n\t" 220 + "ldd [%4 + 0x08], %%l0\n\t" 221 + "xor %%o0, %%l2, %%o0\n\t" 222 + "xor %%o1, %%l3, %%o1\n\t" 223 + "ldd [%4 + 0x10], %%l2\n\t" 224 + "xor %%o2, %%l4, %%o2\n\t" 225 + "xor %%o3, %%l5, %%o3\n\t" 226 + "ldd [%4 + 0x18], %%l4\n\t" 227 + "xor %%g2, %%o4, %%g2\n\t" 228 + "xor %%g3, %%o5, %%g3\n\t" 229 + "xor %%g4, %%l0, %%g4\n\t" 230 + "xor %%g5, %%l1, %%g5\n\t" 231 + "xor %%o0, %%l2, %%o0\n\t" 232 + "xor %%o1, %%l3, %%o1\n\t" 233 + "xor %%o2, %%l4, %%o2\n\t" 234 + "xor %%o3, %%l5, %%o3\n\t" 235 + "std %%g2, [%0 + 0x00]\n\t" 236 + "std %%g4, [%0 + 0x08]\n\t" 237 + "std %%o0, [%0 + 0x10]\n\t" 238 + "std %%o2, [%0 + 0x18]\n" 239 + : 240 + : "r" (p1), "r" (p2), "r" (p3), "r" (p4), "r" (p5) 241 + : "g2", "g3", "g4", "g5", 242 + "o0", "o1", "o2", "o3", "o4", "o5", 243 + "l0", "l1", "l2", "l3", "l4", "l5"); 244 + p1 += 8; 245 + p2 += 8; 246 + p3 += 8; 247 + p4 += 8; 248 + p5 += 8; 249 + } while (--lines > 0); 250 + } 251 + 252 + static struct xor_block_template xor_block_SPARC = { 253 + .name = "SPARC", 254 + .do_2 = sparc_2, 255 + .do_3 = sparc_3, 256 + .do_4 = sparc_4, 257 + .do_5 = sparc_5, 258 + }; 259 + 260 + /* For grins, also test the generic routines. */ 261 + #include <asm-generic/xor.h> 262 + 263 + #undef XOR_TRY_TEMPLATES 264 + #define XOR_TRY_TEMPLATES \ 265 + do { \ 266 + xor_speed(&xor_block_8regs); \ 267 + xor_speed(&xor_block_32regs); \ 268 + xor_speed(&xor_block_SPARC); \ 269 + } while (0)
+70
arch/sparc/include/asm/xor_64.h
··· 1 + /* 2 + * include/asm/xor.h 3 + * 4 + * High speed xor_block operation for RAID4/5 utilizing the 5 + * UltraSparc Visual Instruction Set and Niagara block-init 6 + * twin-load instructions. 7 + * 8 + * Copyright (C) 1997, 1999 Jakub Jelinek (jj@ultra.linux.cz) 9 + * Copyright (C) 2006 David S. Miller <davem@davemloft.net> 10 + * 11 + * This program is free software; you can redistribute it and/or modify 12 + * it under the terms of the GNU General Public License as published by 13 + * the Free Software Foundation; either version 2, or (at your option) 14 + * any later version. 15 + * 16 + * You should have received a copy of the GNU General Public License 17 + * (for example /usr/src/linux/COPYING); if not, write to the Free 18 + * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 19 + */ 20 + 21 + #include <asm/spitfire.h> 22 + 23 + extern void xor_vis_2(unsigned long, unsigned long *, unsigned long *); 24 + extern void xor_vis_3(unsigned long, unsigned long *, unsigned long *, 25 + unsigned long *); 26 + extern void xor_vis_4(unsigned long, unsigned long *, unsigned long *, 27 + unsigned long *, unsigned long *); 28 + extern void xor_vis_5(unsigned long, unsigned long *, unsigned long *, 29 + unsigned long *, unsigned long *, unsigned long *); 30 + 31 + /* XXX Ugh, write cheetah versions... -DaveM */ 32 + 33 + static struct xor_block_template xor_block_VIS = { 34 + .name = "VIS", 35 + .do_2 = xor_vis_2, 36 + .do_3 = xor_vis_3, 37 + .do_4 = xor_vis_4, 38 + .do_5 = xor_vis_5, 39 + }; 40 + 41 + extern void xor_niagara_2(unsigned long, unsigned long *, unsigned long *); 42 + extern void xor_niagara_3(unsigned long, unsigned long *, unsigned long *, 43 + unsigned long *); 44 + extern void xor_niagara_4(unsigned long, unsigned long *, unsigned long *, 45 + unsigned long *, unsigned long *); 46 + extern void xor_niagara_5(unsigned long, unsigned long *, unsigned long *, 47 + unsigned long *, unsigned long *, unsigned long *); 48 + 49 + static struct xor_block_template xor_block_niagara = { 50 + .name = "Niagara", 51 + .do_2 = xor_niagara_2, 52 + .do_3 = xor_niagara_3, 53 + .do_4 = xor_niagara_4, 54 + .do_5 = xor_niagara_5, 55 + }; 56 + 57 + #undef XOR_TRY_TEMPLATES 58 + #define XOR_TRY_TEMPLATES \ 59 + do { \ 60 + xor_speed(&xor_block_VIS); \ 61 + xor_speed(&xor_block_niagara); \ 62 + } while (0) 63 + 64 + /* For VIS for everything except Niagara. */ 65 + #define XOR_SELECT_TEMPLATE(FASTEST) \ 66 + ((tlb_type == hypervisor && \ 67 + (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 || \ 68 + sun4v_chip_type == SUN4V_CHIP_NIAGARA2)) ? \ 69 + &xor_block_niagara : \ 70 + &xor_block_VIS)
+10 -2
arch/sparc/kernel/entry.S
··· 1196 1196 be 1f 1197 1197 nop 1198 1198 1199 + add %sp, STACKFRAME_SZ, %o0 1199 1200 call syscall_trace 1200 - nop 1201 + mov 1, %o1 1201 1202 1202 1203 1: 1203 1204 /* We are returning to a signal handler. */ ··· 1288 1287 mov %i3, %o3 1289 1288 1290 1289 linux_syscall_trace: 1290 + add %sp, STACKFRAME_SZ, %o0 1291 1291 call syscall_trace 1292 - nop 1292 + mov 0, %o1 1293 + cmp %o0, 0 1294 + bne 3f 1295 + mov -ENOSYS, %o0 1293 1296 mov %i0, %o0 1294 1297 mov %i1, %o1 1295 1298 mov %i2, %o2 ··· 1342 1337 call %l7 1343 1338 mov %i5, %o5 1344 1339 1340 + 3: 1345 1341 st %o0, [%sp + STACKFRAME_SZ + PT_I0] 1346 1342 1347 1343 ret_sys_call: ··· 1380 1374 st %l2, [%sp + STACKFRAME_SZ + PT_NPC] 1381 1375 1382 1376 linux_syscall_trace2: 1377 + add %sp, STACKFRAME_SZ, %o0 1378 + mov 1, %o1 1383 1379 call syscall_trace 1384 1380 add %l1, 0x4, %l2 /* npc = npc+4 */ 1385 1381 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
+11 -15
arch/sparc/kernel/ptrace.c
··· 21 21 #include <linux/signal.h> 22 22 #include <linux/regset.h> 23 23 #include <linux/elf.h> 24 + #include <linux/tracehook.h> 24 25 25 26 #include <asm/pgtable.h> 26 27 #include <asm/system.h> ··· 451 450 return ret; 452 451 } 453 452 454 - asmlinkage void syscall_trace(void) 453 + asmlinkage int syscall_trace(struct pt_regs *regs, int syscall_exit_p) 455 454 { 456 - if (!test_thread_flag(TIF_SYSCALL_TRACE)) 457 - return; 458 - if (!(current->ptrace & PT_PTRACED)) 459 - return; 460 - ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) 461 - ? 0x80 : 0)); 462 - /* 463 - * this isn't the same as continuing with a signal, but it will do 464 - * for normal use. strace only continues with a signal if the 465 - * stopping signal is not SIGTRAP. -brl 466 - */ 467 - if (current->exit_code) { 468 - send_sig (current->exit_code, current, 1); 469 - current->exit_code = 0; 455 + int ret = 0; 456 + 457 + if (test_thread_flag(TIF_SYSCALL_TRACE)) { 458 + if (syscall_exit_p) 459 + tracehook_report_syscall_exit(regs, 0); 460 + else 461 + ret = tracehook_report_syscall_entry(regs); 470 462 } 463 + 464 + return ret; 471 465 }
+3 -2
arch/sparc/kernel/rtrap.S
··· 69 69 70 70 ld [%curptr + TI_FLAGS], %g2 71 71 signal_p: 72 - andcc %g2, (_TIF_SIGPENDING|_TIF_RESTORE_SIGMASK), %g0 72 + andcc %g2, _TIF_DO_NOTIFY_RESUME_MASK, %g0 73 73 bz,a ret_trap_continue 74 74 ld [%sp + STACKFRAME_SZ + PT_PSR], %t_psr 75 75 76 + mov %g2, %o2 76 77 mov %l5, %o1 77 - call do_signal 78 + call do_notify_resume 78 79 add %sp, STACKFRAME_SZ, %o0 ! pt_regs ptr 79 80 80 81 /* Fall through. */
+15 -1
arch/sparc/kernel/signal.c
··· 18 18 #include <linux/smp.h> 19 19 #include <linux/binfmts.h> /* do_coredum */ 20 20 #include <linux/bitops.h> 21 + #include <linux/tracehook.h> 21 22 22 23 #include <asm/uaccess.h> 23 24 #include <asm/ptrace.h> ··· 514 513 * want to handle. Thus you cannot kill init even with a SIGKILL even by 515 514 * mistake. 516 515 */ 517 - asmlinkage void do_signal(struct pt_regs * regs, unsigned long orig_i0) 516 + static void do_signal(struct pt_regs *regs, unsigned long orig_i0) 518 517 { 519 518 struct k_sigaction ka; 520 519 int restart_syscall; ··· 553 552 */ 554 553 if (test_thread_flag(TIF_RESTORE_SIGMASK)) 555 554 clear_thread_flag(TIF_RESTORE_SIGMASK); 555 + 556 + tracehook_signal_handler(signr, &info, &ka, regs, 0); 556 557 return; 557 558 } 558 559 if (restart_syscall && ··· 579 576 if (test_thread_flag(TIF_RESTORE_SIGMASK)) { 580 577 clear_thread_flag(TIF_RESTORE_SIGMASK); 581 578 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL); 579 + } 580 + } 581 + 582 + void do_notify_resume(struct pt_regs *regs, unsigned long orig_i0, 583 + unsigned long thread_info_flags) 584 + { 585 + if (thread_info_flags & (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK)) 586 + do_signal(regs, orig_i0); 587 + if (thread_info_flags & _TIF_NOTIFY_RESUME) { 588 + clear_thread_flag(TIF_NOTIFY_RESUME); 589 + tracehook_notify_resume(regs); 582 590 } 583 591 } 584 592
+1
arch/sparc64/Kconfig
··· 17 17 select HAVE_LMB 18 18 select HAVE_ARCH_KGDB 19 19 select USE_GENERIC_SMP_HELPERS if SMP 20 + select HAVE_ARCH_TRACEHOOK 20 21 21 22 config GENERIC_TIME 22 23 bool
+1 -1
arch/sparc64/kernel/compat_audit.c
··· 1 - #include <asm-sparc/unistd.h> 1 + #include <asm/unistd_32.h> 2 2 3 3 unsigned sparc32_dir_class[] = { 4 4 #include <asm-generic/audit_dir_write.h>
+1 -2
arch/sparc64/kernel/entry.h
··· 22 22 unsigned long orig_i0, 23 23 unsigned long thread_info_flags); 24 24 25 - extern asmlinkage void syscall_trace(struct pt_regs *regs, 26 - int syscall_exit_p); 25 + extern asmlinkage int syscall_trace(struct pt_regs *regs, int syscall_exit_p); 27 26 28 27 extern void bad_trap_tl1(struct pt_regs *regs, long lvl); 29 28
+12 -20
arch/sparc64/kernel/ptrace.c
··· 23 23 #include <linux/audit.h> 24 24 #include <linux/signal.h> 25 25 #include <linux/regset.h> 26 + #include <linux/tracehook.h> 26 27 #include <linux/compat.h> 27 28 #include <linux/elf.h> 28 29 ··· 1050 1049 return ret; 1051 1050 } 1052 1051 1053 - asmlinkage void syscall_trace(struct pt_regs *regs, int syscall_exit_p) 1052 + asmlinkage int syscall_trace(struct pt_regs *regs, int syscall_exit_p) 1054 1053 { 1054 + int ret = 0; 1055 + 1055 1056 /* do the secure computing check first */ 1056 1057 secure_computing(regs->u_regs[UREG_G1]); 1057 1058 ··· 1067 1064 audit_syscall_exit(result, regs->u_regs[UREG_I0]); 1068 1065 } 1069 1066 1070 - if (!(current->ptrace & PT_PTRACED)) 1071 - goto out; 1072 - 1073 - if (!test_thread_flag(TIF_SYSCALL_TRACE)) 1074 - goto out; 1075 - 1076 - ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) 1077 - ? 0x80 : 0)); 1078 - 1079 - /* 1080 - * this isn't the same as continuing with a signal, but it will do 1081 - * for normal use. strace only continues with a signal if the 1082 - * stopping signal is not SIGTRAP. -brl 1083 - */ 1084 - if (current->exit_code) { 1085 - send_sig(current->exit_code, current, 1); 1086 - current->exit_code = 0; 1067 + if (test_thread_flag(TIF_SYSCALL_TRACE)) { 1068 + if (syscall_exit_p) 1069 + tracehook_report_syscall_exit(regs, 0); 1070 + else 1071 + ret = tracehook_report_syscall_entry(regs); 1087 1072 } 1088 1073 1089 - out: 1090 - if (unlikely(current->audit_context) && !syscall_exit_p) 1074 + if (unlikely(current->audit_context) && !syscall_exit_p && !ret) 1091 1075 audit_syscall_entry((test_thread_flag(TIF_32BIT) ? 1092 1076 AUDIT_ARCH_SPARC : 1093 1077 AUDIT_ARCH_SPARC64), ··· 1083 1093 regs->u_regs[UREG_I1], 1084 1094 regs->u_regs[UREG_I2], 1085 1095 regs->u_regs[UREG_I3]); 1096 + 1097 + return ret; 1086 1098 }
+3 -3
arch/sparc64/kernel/rtrap.S
··· 46 46 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate 47 47 ldx [%g6 + TI_FLAGS], %l0 48 48 49 - 1: andcc %l0, _TIF_SIGPENDING, %g0 49 + 1: andcc %l0, _TIF_DO_NOTIFY_RESUME_MASK, %g0 50 50 be,pt %xcc, __handle_user_windows_continue 51 51 nop 52 52 mov %l5, %o1 ··· 86 86 wrpr %g0, RTRAP_PSTATE, %pstate 87 87 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate 88 88 ldx [%g6 + TI_FLAGS], %l0 89 - 1: andcc %l0, _TIF_SIGPENDING, %g0 89 + 1: andcc %l0, _TIF_DO_NOTIFY_RESUME_MASK, %g0 90 90 91 91 be,pt %xcc, __handle_perfctrs_continue 92 92 sethi %hi(TSTATE_PEF), %o0 ··· 195 195 andcc %l1, %o0, %g0 196 196 andcc %l0, _TIF_NEED_RESCHED, %g0 197 197 bne,pn %xcc, __handle_preemption 198 - andcc %l0, _TIF_SIGPENDING, %g0 198 + andcc %l0, _TIF_DO_NOTIFY_RESUME_MASK, %g0 199 199 bne,pn %xcc, __handle_signal 200 200 __handle_signal_continue: 201 201 ldub [%g6 + TI_WSAVED], %o2
+8
arch/sparc64/kernel/signal.c
··· 17 17 #include <linux/errno.h> 18 18 #include <linux/wait.h> 19 19 #include <linux/ptrace.h> 20 + #include <linux/tracehook.h> 20 21 #include <linux/unistd.h> 21 22 #include <linux/mm.h> 22 23 #include <linux/tty.h> 23 24 #include <linux/binfmts.h> 24 25 #include <linux/bitops.h> 26 + #include <linux/tracehook.h> 25 27 26 28 #include <asm/uaccess.h> 27 29 #include <asm/ptrace.h> ··· 576 574 * clear the TS_RESTORE_SIGMASK flag. 577 575 */ 578 576 current_thread_info()->status &= ~TS_RESTORE_SIGMASK; 577 + 578 + tracehook_signal_handler(signr, &info, &ka, regs, 0); 579 579 return; 580 580 } 581 581 if (restart_syscall && ··· 609 605 { 610 606 if (thread_info_flags & _TIF_SIGPENDING) 611 607 do_signal(regs, orig_i0); 608 + if (thread_info_flags & _TIF_NOTIFY_RESUME) { 609 + clear_thread_flag(TIF_NOTIFY_RESUME); 610 + tracehook_notify_resume(regs); 611 + } 612 612 }
+3
arch/sparc64/kernel/signal32.c
··· 19 19 #include <linux/binfmts.h> 20 20 #include <linux/compat.h> 21 21 #include <linux/bitops.h> 22 + #include <linux/tracehook.h> 22 23 23 24 #include <asm/uaccess.h> 24 25 #include <asm/ptrace.h> ··· 795 794 * clear the TS_RESTORE_SIGMASK flag. 796 795 */ 797 796 current_thread_info()->status &= ~TS_RESTORE_SIGMASK; 797 + 798 + tracehook_signal_handler(signr, &info, &ka, regs, 0); 798 799 return; 799 800 } 800 801 if (restart_syscall &&
+4
arch/sparc64/kernel/syscalls.S
··· 162 162 add %sp, PTREGS_OFF, %o0 163 163 call syscall_trace 164 164 clr %o1 165 + brnz,pn %o0, 3f 166 + mov -ENOSYS, %o0 165 167 srl %i0, 0, %o0 166 168 srl %i4, 0, %o4 167 169 srl %i1, 0, %o1 ··· 175 173 add %sp, PTREGS_OFF, %o0 176 174 call syscall_trace 177 175 clr %o1 176 + brnz,pn %o0, 3f 177 + mov -ENOSYS, %o0 178 178 mov %i0, %o0 179 179 mov %i1, %o1 180 180 mov %i2, %o2
-1
include/asm-sparc/Kbuild
··· 1 - # dummy file to avoid breaking make headers_install
include/asm-sparc/agp.h arch/sparc/include/asm/agp.h
include/asm-sparc/apb.h arch/sparc/include/asm/apb.h
include/asm-sparc/apc.h arch/sparc/include/asm/apc.h
include/asm-sparc/asi.h arch/sparc/include/asm/asi.h
include/asm-sparc/asmmacro.h arch/sparc/include/asm/asmmacro.h
-8
include/asm-sparc/atomic.h
··· 1 - #ifndef ___ASM_SPARC_ATOMIC_H 2 - #define ___ASM_SPARC_ATOMIC_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/atomic_64.h> 5 - #else 6 - #include <asm-sparc/atomic_32.h> 7 - #endif 8 - #endif
include/asm-sparc/atomic_32.h arch/sparc/include/asm/atomic_32.h
include/asm-sparc/atomic_64.h arch/sparc/include/asm/atomic_64.h
-8
include/asm-sparc/auxio.h
··· 1 - #ifndef ___ASM_SPARC_AUXIO_H 2 - #define ___ASM_SPARC_AUXIO_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/auxio_64.h> 5 - #else 6 - #include <asm-sparc/auxio_32.h> 7 - #endif 8 - #endif
-89
include/asm-sparc/auxio_32.h
··· 1 - /* 2 - * auxio.h: Definitions and code for the Auxiliary I/O register. 3 - * 4 - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) 5 - */ 6 - #ifndef _SPARC_AUXIO_H 7 - #define _SPARC_AUXIO_H 8 - 9 - #include <asm/system.h> 10 - #include <asm/vaddrs.h> 11 - 12 - /* This register is an unsigned char in IO space. It does two things. 13 - * First, it is used to control the front panel LED light on machines 14 - * that have it (good for testing entry points to trap handlers and irq's) 15 - * Secondly, it controls various floppy drive parameters. 16 - */ 17 - #define AUXIO_ORMEIN 0xf0 /* All writes must set these bits. */ 18 - #define AUXIO_ORMEIN4M 0xc0 /* sun4m - All writes must set these bits. */ 19 - #define AUXIO_FLPY_DENS 0x20 /* Floppy density, high if set. Read only. */ 20 - #define AUXIO_FLPY_DCHG 0x10 /* A disk change occurred. Read only. */ 21 - #define AUXIO_EDGE_ON 0x10 /* sun4m - On means Jumper block is in. */ 22 - #define AUXIO_FLPY_DSEL 0x08 /* Drive select/start-motor. Write only. */ 23 - #define AUXIO_LINK_TEST 0x08 /* sun4m - On means TPE Carrier detect. */ 24 - 25 - /* Set the following to one, then zero, after doing a pseudo DMA transfer. */ 26 - #define AUXIO_FLPY_TCNT 0x04 /* Floppy terminal count. Write only. */ 27 - 28 - /* Set the following to zero to eject the floppy. */ 29 - #define AUXIO_FLPY_EJCT 0x02 /* Eject floppy disk. Write only. */ 30 - #define AUXIO_LED 0x01 /* On if set, off if unset. Read/Write */ 31 - 32 - #ifndef __ASSEMBLY__ 33 - 34 - /* 35 - * NOTE: these routines are implementation dependent-- 36 - * understand the hardware you are querying! 37 - */ 38 - extern void set_auxio(unsigned char bits_on, unsigned char bits_off); 39 - extern unsigned char get_auxio(void); /* .../asm-sparc/floppy.h */ 40 - 41 - /* 42 - * The following routines are provided for driver-compatibility 43 - * with sparc64 (primarily sunlance.c) 44 - */ 45 - 46 - #define AUXIO_LTE_ON 1 47 - #define AUXIO_LTE_OFF 0 48 - 49 - /* auxio_set_lte - Set Link Test Enable (TPE Link Detect) 50 - * 51 - * on - AUXIO_LTE_ON or AUXIO_LTE_OFF 52 - */ 53 - #define auxio_set_lte(on) \ 54 - do { \ 55 - if(on) { \ 56 - set_auxio(AUXIO_LINK_TEST, 0); \ 57 - } else { \ 58 - set_auxio(0, AUXIO_LINK_TEST); \ 59 - } \ 60 - } while (0) 61 - 62 - #define AUXIO_LED_ON 1 63 - #define AUXIO_LED_OFF 0 64 - 65 - /* auxio_set_led - Set system front panel LED 66 - * 67 - * on - AUXIO_LED_ON or AUXIO_LED_OFF 68 - */ 69 - #define auxio_set_led(on) \ 70 - do { \ 71 - if(on) { \ 72 - set_auxio(AUXIO_LED, 0); \ 73 - } else { \ 74 - set_auxio(0, AUXIO_LED); \ 75 - } \ 76 - } while (0) 77 - 78 - #endif /* !(__ASSEMBLY__) */ 79 - 80 - 81 - /* AUXIO2 (Power Off Control) */ 82 - extern __volatile__ unsigned char * auxio_power_register; 83 - 84 - #define AUXIO_POWER_DETECT_FAILURE 32 85 - #define AUXIO_POWER_CLEAR_FAILURE 2 86 - #define AUXIO_POWER_OFF 1 87 - 88 - 89 - #endif /* !(_SPARC_AUXIO_H) */
include/asm-sparc/auxio_64.h arch/sparc/include/asm/auxio_64.h
include/asm-sparc/auxvec.h arch/sparc/include/asm/auxvec.h
include/asm-sparc/backoff.h arch/sparc/include/asm/backoff.h
include/asm-sparc/bbc.h arch/sparc/include/asm/bbc.h
include/asm-sparc/bitext.h arch/sparc/include/asm/bitext.h
-8
include/asm-sparc/bitops.h
··· 1 - #ifndef ___ASM_SPARC_BITOPS_H 2 - #define ___ASM_SPARC_BITOPS_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/bitops_64.h> 5 - #else 6 - #include <asm-sparc/bitops_32.h> 7 - #endif 8 - #endif
include/asm-sparc/bitops_32.h arch/sparc/include/asm/bitops_32.h
include/asm-sparc/bitops_64.h arch/sparc/include/asm/bitops_64.h
include/asm-sparc/bpp.h arch/sparc/include/asm/bpp.h
-208
include/asm-sparc/btfixup.h
··· 1 - /* 2 - * asm-sparc/btfixup.h: Macros for boot time linking. 3 - * 4 - * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) 5 - */ 6 - 7 - #ifndef _SPARC_BTFIXUP_H 8 - #define _SPARC_BTFIXUP_H 9 - 10 - #include <linux/init.h> 11 - 12 - #ifndef __ASSEMBLY__ 13 - 14 - #ifdef MODULE 15 - extern unsigned int ___illegal_use_of_BTFIXUP_SIMM13_in_module(void); 16 - extern unsigned int ___illegal_use_of_BTFIXUP_SETHI_in_module(void); 17 - extern unsigned int ___illegal_use_of_BTFIXUP_HALF_in_module(void); 18 - extern unsigned int ___illegal_use_of_BTFIXUP_INT_in_module(void); 19 - 20 - #define BTFIXUP_SIMM13(__name) ___illegal_use_of_BTFIXUP_SIMM13_in_module() 21 - #define BTFIXUP_HALF(__name) ___illegal_use_of_BTFIXUP_HALF_in_module() 22 - #define BTFIXUP_SETHI(__name) ___illegal_use_of_BTFIXUP_SETHI_in_module() 23 - #define BTFIXUP_INT(__name) ___illegal_use_of_BTFIXUP_INT_in_module() 24 - #define BTFIXUP_BLACKBOX(__name) ___illegal_use_of_BTFIXUP_BLACKBOX_in_module 25 - 26 - #else 27 - 28 - #define BTFIXUP_SIMM13(__name) ___sf_##__name() 29 - #define BTFIXUP_HALF(__name) ___af_##__name() 30 - #define BTFIXUP_SETHI(__name) ___hf_##__name() 31 - #define BTFIXUP_INT(__name) ((unsigned int)&___i_##__name) 32 - /* This must be written in assembly and present in a sethi */ 33 - #define BTFIXUP_BLACKBOX(__name) ___b_##__name 34 - #endif /* MODULE */ 35 - 36 - /* Fixup call xx */ 37 - 38 - #define BTFIXUPDEF_CALL(__type, __name, __args...) \ 39 - extern __type ___f_##__name(__args); \ 40 - extern unsigned ___fs_##__name[3]; 41 - #define BTFIXUPDEF_CALL_CONST(__type, __name, __args...) \ 42 - extern __type ___f_##__name(__args) __attribute_const__; \ 43 - extern unsigned ___fs_##__name[3]; 44 - #define BTFIXUP_CALL(__name) ___f_##__name 45 - 46 - #define BTFIXUPDEF_BLACKBOX(__name) \ 47 - extern unsigned ___bs_##__name[2]; 48 - 49 - /* Put bottom 13bits into some register variable */ 50 - 51 - #define BTFIXUPDEF_SIMM13(__name) \ 52 - static inline unsigned int ___sf_##__name(void) __attribute_const__; \ 53 - extern unsigned ___ss_##__name[2]; \ 54 - static inline unsigned int ___sf_##__name(void) { \ 55 - unsigned int ret; \ 56 - __asm__ ("or %%g0, ___s_" #__name ", %0" : "=r"(ret)); \ 57 - return ret; \ 58 - } 59 - #define BTFIXUPDEF_SIMM13_INIT(__name,__val) \ 60 - static inline unsigned int ___sf_##__name(void) __attribute_const__; \ 61 - extern unsigned ___ss_##__name[2]; \ 62 - static inline unsigned int ___sf_##__name(void) { \ 63 - unsigned int ret; \ 64 - __asm__ ("or %%g0, ___s_" #__name "__btset_" #__val ", %0" : "=r"(ret));\ 65 - return ret; \ 66 - } 67 - 68 - /* Put either bottom 13 bits, or upper 22 bits into some register variable 69 - * (depending on the value, this will lead into sethi FIX, reg; or 70 - * mov FIX, reg; ) 71 - */ 72 - 73 - #define BTFIXUPDEF_HALF(__name) \ 74 - static inline unsigned int ___af_##__name(void) __attribute_const__; \ 75 - extern unsigned ___as_##__name[2]; \ 76 - static inline unsigned int ___af_##__name(void) { \ 77 - unsigned int ret; \ 78 - __asm__ ("or %%g0, ___a_" #__name ", %0" : "=r"(ret)); \ 79 - return ret; \ 80 - } 81 - #define BTFIXUPDEF_HALF_INIT(__name,__val) \ 82 - static inline unsigned int ___af_##__name(void) __attribute_const__; \ 83 - extern unsigned ___as_##__name[2]; \ 84 - static inline unsigned int ___af_##__name(void) { \ 85 - unsigned int ret; \ 86 - __asm__ ("or %%g0, ___a_" #__name "__btset_" #__val ", %0" : "=r"(ret));\ 87 - return ret; \ 88 - } 89 - 90 - /* Put upper 22 bits into some register variable */ 91 - 92 - #define BTFIXUPDEF_SETHI(__name) \ 93 - static inline unsigned int ___hf_##__name(void) __attribute_const__; \ 94 - extern unsigned ___hs_##__name[2]; \ 95 - static inline unsigned int ___hf_##__name(void) { \ 96 - unsigned int ret; \ 97 - __asm__ ("sethi %%hi(___h_" #__name "), %0" : "=r"(ret)); \ 98 - return ret; \ 99 - } 100 - #define BTFIXUPDEF_SETHI_INIT(__name,__val) \ 101 - static inline unsigned int ___hf_##__name(void) __attribute_const__; \ 102 - extern unsigned ___hs_##__name[2]; \ 103 - static inline unsigned int ___hf_##__name(void) { \ 104 - unsigned int ret; \ 105 - __asm__ ("sethi %%hi(___h_" #__name "__btset_" #__val "), %0" : \ 106 - "=r"(ret)); \ 107 - return ret; \ 108 - } 109 - 110 - /* Put a full 32bit integer into some register variable */ 111 - 112 - #define BTFIXUPDEF_INT(__name) \ 113 - extern unsigned char ___i_##__name; \ 114 - extern unsigned ___is_##__name[2]; 115 - 116 - #define BTFIXUPCALL_NORM 0x00000000 /* Always call */ 117 - #define BTFIXUPCALL_NOP 0x01000000 /* Possibly optimize to nop */ 118 - #define BTFIXUPCALL_RETINT(i) (0x90102000|((i) & 0x1fff)) /* Possibly optimize to mov i, %o0 */ 119 - #define BTFIXUPCALL_ORINT(i) (0x90122000|((i) & 0x1fff)) /* Possibly optimize to or %o0, i, %o0 */ 120 - #define BTFIXUPCALL_RETO0 0x01000000 /* Return first parameter, actually a nop */ 121 - #define BTFIXUPCALL_ANDNINT(i) (0x902a2000|((i) & 0x1fff)) /* Possibly optimize to andn %o0, i, %o0 */ 122 - #define BTFIXUPCALL_SWAPO0O1 0xd27a0000 /* Possibly optimize to swap [%o0],%o1 */ 123 - #define BTFIXUPCALL_SWAPO0G0 0xc07a0000 /* Possibly optimize to swap [%o0],%g0 */ 124 - #define BTFIXUPCALL_SWAPG1G2 0xc4784000 /* Possibly optimize to swap [%g1],%g2 */ 125 - #define BTFIXUPCALL_STG0O0 0xc0220000 /* Possibly optimize to st %g0,[%o0] */ 126 - #define BTFIXUPCALL_STO1O0 0xd2220000 /* Possibly optimize to st %o1,[%o0] */ 127 - 128 - #define BTFIXUPSET_CALL(__name, __addr, __insn) \ 129 - do { \ 130 - ___fs_##__name[0] |= 1; \ 131 - ___fs_##__name[1] = (unsigned long)__addr; \ 132 - ___fs_##__name[2] = __insn; \ 133 - } while (0) 134 - 135 - #define BTFIXUPSET_BLACKBOX(__name, __func) \ 136 - do { \ 137 - ___bs_##__name[0] |= 1; \ 138 - ___bs_##__name[1] = (unsigned long)__func; \ 139 - } while (0) 140 - 141 - #define BTFIXUPCOPY_CALL(__name, __from) \ 142 - do { \ 143 - ___fs_##__name[0] |= 1; \ 144 - ___fs_##__name[1] = ___fs_##__from[1]; \ 145 - ___fs_##__name[2] = ___fs_##__from[2]; \ 146 - } while (0) 147 - 148 - #define BTFIXUPSET_SIMM13(__name, __val) \ 149 - do { \ 150 - ___ss_##__name[0] |= 1; \ 151 - ___ss_##__name[1] = (unsigned)__val; \ 152 - } while (0) 153 - 154 - #define BTFIXUPCOPY_SIMM13(__name, __from) \ 155 - do { \ 156 - ___ss_##__name[0] |= 1; \ 157 - ___ss_##__name[1] = ___ss_##__from[1]; \ 158 - } while (0) 159 - 160 - #define BTFIXUPSET_HALF(__name, __val) \ 161 - do { \ 162 - ___as_##__name[0] |= 1; \ 163 - ___as_##__name[1] = (unsigned)__val; \ 164 - } while (0) 165 - 166 - #define BTFIXUPCOPY_HALF(__name, __from) \ 167 - do { \ 168 - ___as_##__name[0] |= 1; \ 169 - ___as_##__name[1] = ___as_##__from[1]; \ 170 - } while (0) 171 - 172 - #define BTFIXUPSET_SETHI(__name, __val) \ 173 - do { \ 174 - ___hs_##__name[0] |= 1; \ 175 - ___hs_##__name[1] = (unsigned)__val; \ 176 - } while (0) 177 - 178 - #define BTFIXUPCOPY_SETHI(__name, __from) \ 179 - do { \ 180 - ___hs_##__name[0] |= 1; \ 181 - ___hs_##__name[1] = ___hs_##__from[1]; \ 182 - } while (0) 183 - 184 - #define BTFIXUPSET_INT(__name, __val) \ 185 - do { \ 186 - ___is_##__name[0] |= 1; \ 187 - ___is_##__name[1] = (unsigned)__val; \ 188 - } while (0) 189 - 190 - #define BTFIXUPCOPY_INT(__name, __from) \ 191 - do { \ 192 - ___is_##__name[0] |= 1; \ 193 - ___is_##__name[1] = ___is_##__from[1]; \ 194 - } while (0) 195 - 196 - #define BTFIXUPVAL_CALL(__name) \ 197 - ((unsigned long)___fs_##__name[1]) 198 - 199 - extern void btfixup(void); 200 - 201 - #else /* __ASSEMBLY__ */ 202 - 203 - #define BTFIXUP_SETHI(__name) %hi(___h_ ## __name) 204 - #define BTFIXUP_SETHI_INIT(__name,__val) %hi(___h_ ## __name ## __btset_ ## __val) 205 - 206 - #endif /* __ASSEMBLY__ */ 207 - 208 - #endif /* !(_SPARC_BTFIXUP_H) */
include/asm-sparc/bug.h arch/sparc/include/asm/bug.h
-24
include/asm-sparc/bugs.h
··· 1 - /* include/asm-sparc/bugs.h: Sparc probes for various bugs. 2 - * 3 - * Copyright (C) 1996, 2007 David S. Miller (davem@davemloft.net) 4 - */ 5 - 6 - #ifdef CONFIG_SPARC32 7 - #include <asm/cpudata.h> 8 - #endif 9 - 10 - #ifdef CONFIG_SPARC64 11 - #include <asm/sstate.h> 12 - #endif 13 - 14 - extern unsigned long loops_per_jiffy; 15 - 16 - static void __init check_bugs(void) 17 - { 18 - #if defined(CONFIG_SPARC32) && !defined(CONFIG_SMP) 19 - cpu_data(0).udelay_val = loops_per_jiffy; 20 - #endif 21 - #ifdef CONFIG_SPARC64 22 - sstate_running(); 23 - #endif 24 - }
include/asm-sparc/byteorder.h arch/sparc/include/asm/byteorder.h
include/asm-sparc/cache.h arch/sparc/include/asm/cache.h
-8
include/asm-sparc/cacheflush.h
··· 1 - #ifndef ___ASM_SPARC_CACHEFLUSH_H 2 - #define ___ASM_SPARC_CACHEFLUSH_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/cacheflush_64.h> 5 - #else 6 - #include <asm-sparc/cacheflush_32.h> 7 - #endif 8 - #endif
include/asm-sparc/cacheflush_32.h arch/sparc/include/asm/cacheflush_32.h
include/asm-sparc/cacheflush_64.h arch/sparc/include/asm/cacheflush_64.h
include/asm-sparc/chafsr.h arch/sparc/include/asm/chafsr.h
-8
include/asm-sparc/checksum.h
··· 1 - #ifndef ___ASM_SPARC_CHECKSUM_H 2 - #define ___ASM_SPARC_CHECKSUM_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/checksum_64.h> 5 - #else 6 - #include <asm-sparc/checksum_32.h> 7 - #endif 8 - #endif
include/asm-sparc/checksum_32.h arch/sparc/include/asm/checksum_32.h
include/asm-sparc/checksum_64.h arch/sparc/include/asm/checksum_64.h
include/asm-sparc/chmctrl.h arch/sparc/include/asm/chmctrl.h
include/asm-sparc/clock.h arch/sparc/include/asm/clock.h
include/asm-sparc/cmt.h arch/sparc/include/asm/cmt.h
include/asm-sparc/compat.h arch/sparc/include/asm/compat.h
include/asm-sparc/compat_signal.h arch/sparc/include/asm/compat_signal.h
include/asm-sparc/contregs.h arch/sparc/include/asm/contregs.h
-8
include/asm-sparc/cpudata.h
··· 1 - #ifndef ___ASM_SPARC_CPUDATA_H 2 - #define ___ASM_SPARC_CPUDATA_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/cpudata_64.h> 5 - #else 6 - #include <asm-sparc/cpudata_32.h> 7 - #endif 8 - #endif
-27
include/asm-sparc/cpudata_32.h
··· 1 - /* cpudata.h: Per-cpu parameters. 2 - * 3 - * Copyright (C) 2004 Keith M Wesolowski (wesolows@foobazco.org) 4 - * 5 - * Based on include/asm-sparc64/cpudata.h and Linux 2.4 smp.h 6 - * both (C) David S. Miller. 7 - */ 8 - 9 - #ifndef _SPARC_CPUDATA_H 10 - #define _SPARC_CPUDATA_H 11 - 12 - #include <linux/percpu.h> 13 - 14 - typedef struct { 15 - unsigned long udelay_val; 16 - unsigned long clock_tick; 17 - unsigned int multiplier; 18 - unsigned int counter; 19 - int prom_node; 20 - int mid; 21 - int next; 22 - } cpuinfo_sparc; 23 - 24 - DECLARE_PER_CPU(cpuinfo_sparc, __cpu_data); 25 - #define cpu_data(__cpu) per_cpu(__cpu_data, (__cpu)) 26 - 27 - #endif /* _SPARC_CPUDATA_H */
include/asm-sparc/cpudata_64.h arch/sparc/include/asm/cpudata_64.h
include/asm-sparc/cputime.h arch/sparc/include/asm/cputime.h
-34
include/asm-sparc/current.h
··· 1 - /* include/asm-sparc/current.h 2 - * 3 - * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation 4 - * Copyright (C) 2002 Pete Zaitcev (zaitcev@yahoo.com) 5 - * Copyright (C) 2007 David S. Miller (davem@davemloft.net) 6 - * 7 - * Derived from "include/asm-s390/current.h" by 8 - * Martin Schwidefsky (schwidefsky@de.ibm.com) 9 - * Derived from "include/asm-i386/current.h" 10 - */ 11 - #ifndef _SPARC_CURRENT_H 12 - #define _SPARC_CURRENT_H 13 - 14 - #include <linux/thread_info.h> 15 - 16 - #ifdef CONFIG_SPARC64 17 - register struct task_struct *current asm("g4"); 18 - #endif 19 - 20 - #ifdef CONFIG_SPARC32 21 - /* We might want to consider using %g4 like sparc64 to shave a few cycles. 22 - * 23 - * Two stage process (inline + #define) for type-checking. 24 - * We also obfuscate get_current() to check if anyone used that by mistake. 25 - */ 26 - struct task_struct; 27 - static inline struct task_struct *__get_current(void) 28 - { 29 - return current_thread_info()->task; 30 - } 31 - #define current __get_current() 32 - #endif 33 - 34 - #endif /* !(_SPARC_CURRENT_H) */
include/asm-sparc/cypress.h arch/sparc/include/asm/cypress.h
include/asm-sparc/dcr.h arch/sparc/include/asm/dcr.h
include/asm-sparc/dcu.h arch/sparc/include/asm/dcu.h
-8
include/asm-sparc/delay.h
··· 1 - #ifndef ___ASM_SPARC_DELAY_H 2 - #define ___ASM_SPARC_DELAY_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/delay_64.h> 5 - #else 6 - #include <asm-sparc/delay_32.h> 7 - #endif 8 - #endif
include/asm-sparc/delay_32.h arch/sparc/include/asm/delay_32.h
include/asm-sparc/delay_64.h arch/sparc/include/asm/delay_64.h
include/asm-sparc/device.h arch/sparc/include/asm/device.h
include/asm-sparc/display7seg.h arch/sparc/include/asm/display7seg.h
include/asm-sparc/div64.h arch/sparc/include/asm/div64.h
-8
include/asm-sparc/dma-mapping.h
··· 1 - #ifndef ___ASM_SPARC_DMA_MAPPING_H 2 - #define ___ASM_SPARC_DMA_MAPPING_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/dma-mapping_64.h> 5 - #else 6 - #include <asm-sparc/dma-mapping_32.h> 7 - #endif 8 - #endif
include/asm-sparc/dma-mapping_32.h arch/sparc/include/asm/dma-mapping_32.h
include/asm-sparc/dma-mapping_64.h arch/sparc/include/asm/dma-mapping_64.h
-8
include/asm-sparc/dma.h
··· 1 - #ifndef ___ASM_SPARC_DMA_H 2 - #define ___ASM_SPARC_DMA_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/dma_64.h> 5 - #else 6 - #include <asm-sparc/dma_32.h> 7 - #endif 8 - #endif
-288
include/asm-sparc/dma_32.h
··· 1 - /* include/asm-sparc/dma.h 2 - * 3 - * Copyright 1995 (C) David S. Miller (davem@davemloft.net) 4 - */ 5 - 6 - #ifndef _ASM_SPARC_DMA_H 7 - #define _ASM_SPARC_DMA_H 8 - 9 - #include <linux/kernel.h> 10 - #include <linux/types.h> 11 - 12 - #include <asm/vac-ops.h> /* for invalidate's, etc. */ 13 - #include <asm/sbus.h> 14 - #include <asm/delay.h> 15 - #include <asm/oplib.h> 16 - #include <asm/system.h> 17 - #include <asm/io.h> 18 - #include <linux/spinlock.h> 19 - 20 - struct page; 21 - extern spinlock_t dma_spin_lock; 22 - 23 - static inline unsigned long claim_dma_lock(void) 24 - { 25 - unsigned long flags; 26 - spin_lock_irqsave(&dma_spin_lock, flags); 27 - return flags; 28 - } 29 - 30 - static inline void release_dma_lock(unsigned long flags) 31 - { 32 - spin_unlock_irqrestore(&dma_spin_lock, flags); 33 - } 34 - 35 - /* These are irrelevant for Sparc DMA, but we leave it in so that 36 - * things can compile. 37 - */ 38 - #define MAX_DMA_CHANNELS 8 39 - #define MAX_DMA_ADDRESS (~0UL) 40 - #define DMA_MODE_READ 1 41 - #define DMA_MODE_WRITE 2 42 - 43 - /* Useful constants */ 44 - #define SIZE_16MB (16*1024*1024) 45 - #define SIZE_64K (64*1024) 46 - 47 - /* SBUS DMA controller reg offsets */ 48 - #define DMA_CSR 0x00UL /* rw DMA control/status register 0x00 */ 49 - #define DMA_ADDR 0x04UL /* rw DMA transfer address register 0x04 */ 50 - #define DMA_COUNT 0x08UL /* rw DMA transfer count register 0x08 */ 51 - #define DMA_TEST 0x0cUL /* rw DMA test/debug register 0x0c */ 52 - 53 - /* DVMA chip revisions */ 54 - enum dvma_rev { 55 - dvmarev0, 56 - dvmaesc1, 57 - dvmarev1, 58 - dvmarev2, 59 - dvmarev3, 60 - dvmarevplus, 61 - dvmahme 62 - }; 63 - 64 - #define DMA_HASCOUNT(rev) ((rev)==dvmaesc1) 65 - 66 - /* Linux DMA information structure, filled during probe. */ 67 - struct sbus_dma { 68 - struct sbus_dma *next; 69 - struct sbus_dev *sdev; 70 - void __iomem *regs; 71 - 72 - /* Status, misc info */ 73 - int node; /* Prom node for this DMA device */ 74 - int running; /* Are we doing DMA now? */ 75 - int allocated; /* Are we "owned" by anyone yet? */ 76 - 77 - /* Transfer information. */ 78 - unsigned long addr; /* Start address of current transfer */ 79 - int nbytes; /* Size of current transfer */ 80 - int realbytes; /* For splitting up large transfers, etc. */ 81 - 82 - /* DMA revision */ 83 - enum dvma_rev revision; 84 - }; 85 - 86 - extern struct sbus_dma *dma_chain; 87 - 88 - /* Broken hardware... */ 89 - #ifdef CONFIG_SUN4 90 - /* Have to sort this out. Does rev0 work fine on sun4[cmd] without isbroken? 91 - * Or is rev0 present only on sun4 boxes? -jj */ 92 - #define DMA_ISBROKEN(dma) ((dma)->revision == dvmarev0 || (dma)->revision == dvmarev1) 93 - #else 94 - #define DMA_ISBROKEN(dma) ((dma)->revision == dvmarev1) 95 - #endif 96 - #define DMA_ISESC1(dma) ((dma)->revision == dvmaesc1) 97 - 98 - /* Main routines in dma.c */ 99 - extern void dvma_init(struct sbus_bus *); 100 - 101 - /* Fields in the cond_reg register */ 102 - /* First, the version identification bits */ 103 - #define DMA_DEVICE_ID 0xf0000000 /* Device identification bits */ 104 - #define DMA_VERS0 0x00000000 /* Sunray DMA version */ 105 - #define DMA_ESCV1 0x40000000 /* DMA ESC Version 1 */ 106 - #define DMA_VERS1 0x80000000 /* DMA rev 1 */ 107 - #define DMA_VERS2 0xa0000000 /* DMA rev 2 */ 108 - #define DMA_VERHME 0xb0000000 /* DMA hme gate array */ 109 - #define DMA_VERSPLUS 0x90000000 /* DMA rev 1 PLUS */ 110 - 111 - #define DMA_HNDL_INTR 0x00000001 /* An IRQ needs to be handled */ 112 - #define DMA_HNDL_ERROR 0x00000002 /* We need to take an error */ 113 - #define DMA_FIFO_ISDRAIN 0x0000000c /* The DMA FIFO is draining */ 114 - #define DMA_INT_ENAB 0x00000010 /* Turn on interrupts */ 115 - #define DMA_FIFO_INV 0x00000020 /* Invalidate the FIFO */ 116 - #define DMA_ACC_SZ_ERR 0x00000040 /* The access size was bad */ 117 - #define DMA_FIFO_STDRAIN 0x00000040 /* DMA_VERS1 Drain the FIFO */ 118 - #define DMA_RST_SCSI 0x00000080 /* Reset the SCSI controller */ 119 - #define DMA_RST_ENET DMA_RST_SCSI /* Reset the ENET controller */ 120 - #define DMA_RST_BPP DMA_RST_SCSI /* Reset the BPP controller */ 121 - #define DMA_ST_WRITE 0x00000100 /* write from device to memory */ 122 - #define DMA_ENABLE 0x00000200 /* Fire up DMA, handle requests */ 123 - #define DMA_PEND_READ 0x00000400 /* DMA_VERS1/0/PLUS Pending Read */ 124 - #define DMA_ESC_BURST 0x00000800 /* 1=16byte 0=32byte */ 125 - #define DMA_READ_AHEAD 0x00001800 /* DMA read ahead partial longword */ 126 - #define DMA_DSBL_RD_DRN 0x00001000 /* No EC drain on slave reads */ 127 - #define DMA_BCNT_ENAB 0x00002000 /* If on, use the byte counter */ 128 - #define DMA_TERM_CNTR 0x00004000 /* Terminal counter */ 129 - #define DMA_SCSI_SBUS64 0x00008000 /* HME: Enable 64-bit SBUS mode. */ 130 - #define DMA_CSR_DISAB 0x00010000 /* No FIFO drains during csr */ 131 - #define DMA_SCSI_DISAB 0x00020000 /* No FIFO drains during reg */ 132 - #define DMA_DSBL_WR_INV 0x00020000 /* No EC inval. on slave writes */ 133 - #define DMA_ADD_ENABLE 0x00040000 /* Special ESC DVMA optimization */ 134 - #define DMA_E_BURSTS 0x000c0000 /* ENET: SBUS r/w burst mask */ 135 - #define DMA_E_BURST32 0x00040000 /* ENET: SBUS 32 byte r/w burst */ 136 - #define DMA_E_BURST16 0x00000000 /* ENET: SBUS 16 byte r/w burst */ 137 - #define DMA_BRST_SZ 0x000c0000 /* SCSI: SBUS r/w burst size */ 138 - #define DMA_BRST64 0x00080000 /* SCSI: 64byte bursts (HME on UltraSparc only) */ 139 - #define DMA_BRST32 0x00040000 /* SCSI/BPP: 32byte bursts */ 140 - #define DMA_BRST16 0x00000000 /* SCSI/BPP: 16byte bursts */ 141 - #define DMA_BRST0 0x00080000 /* SCSI: no bursts (non-HME gate arrays) */ 142 - #define DMA_ADDR_DISAB 0x00100000 /* No FIFO drains during addr */ 143 - #define DMA_2CLKS 0x00200000 /* Each transfer = 2 clock ticks */ 144 - #define DMA_3CLKS 0x00400000 /* Each transfer = 3 clock ticks */ 145 - #define DMA_EN_ENETAUI DMA_3CLKS /* Put lance into AUI-cable mode */ 146 - #define DMA_CNTR_DISAB 0x00800000 /* No IRQ when DMA_TERM_CNTR set */ 147 - #define DMA_AUTO_NADDR 0x01000000 /* Use "auto nxt addr" feature */ 148 - #define DMA_SCSI_ON 0x02000000 /* Enable SCSI dma */ 149 - #define DMA_BPP_ON DMA_SCSI_ON /* Enable BPP dma */ 150 - #define DMA_PARITY_OFF 0x02000000 /* HME: disable parity checking */ 151 - #define DMA_LOADED_ADDR 0x04000000 /* Address has been loaded */ 152 - #define DMA_LOADED_NADDR 0x08000000 /* Next address has been loaded */ 153 - #define DMA_RESET_FAS366 0x08000000 /* HME: Assert RESET to FAS366 */ 154 - 155 - /* Values describing the burst-size property from the PROM */ 156 - #define DMA_BURST1 0x01 157 - #define DMA_BURST2 0x02 158 - #define DMA_BURST4 0x04 159 - #define DMA_BURST8 0x08 160 - #define DMA_BURST16 0x10 161 - #define DMA_BURST32 0x20 162 - #define DMA_BURST64 0x40 163 - #define DMA_BURSTBITS 0x7f 164 - 165 - /* Determine highest possible final transfer address given a base */ 166 - #define DMA_MAXEND(addr) (0x01000000UL-(((unsigned long)(addr))&0x00ffffffUL)) 167 - 168 - /* Yes, I hack a lot of elisp in my spare time... */ 169 - #define DMA_ERROR_P(regs) ((((regs)->cond_reg) & DMA_HNDL_ERROR)) 170 - #define DMA_IRQ_P(regs) ((((regs)->cond_reg) & (DMA_HNDL_INTR | DMA_HNDL_ERROR))) 171 - #define DMA_WRITE_P(regs) ((((regs)->cond_reg) & DMA_ST_WRITE)) 172 - #define DMA_OFF(regs) ((((regs)->cond_reg) &= (~DMA_ENABLE))) 173 - #define DMA_INTSOFF(regs) ((((regs)->cond_reg) &= (~DMA_INT_ENAB))) 174 - #define DMA_INTSON(regs) ((((regs)->cond_reg) |= (DMA_INT_ENAB))) 175 - #define DMA_PUNTFIFO(regs) ((((regs)->cond_reg) |= DMA_FIFO_INV)) 176 - #define DMA_SETSTART(regs, addr) ((((regs)->st_addr) = (char *) addr)) 177 - #define DMA_BEGINDMA_W(regs) \ 178 - ((((regs)->cond_reg |= (DMA_ST_WRITE|DMA_ENABLE|DMA_INT_ENAB)))) 179 - #define DMA_BEGINDMA_R(regs) \ 180 - ((((regs)->cond_reg |= ((DMA_ENABLE|DMA_INT_ENAB)&(~DMA_ST_WRITE))))) 181 - 182 - /* For certain DMA chips, we need to disable ints upon irq entry 183 - * and turn them back on when we are done. So in any ESP interrupt 184 - * handler you *must* call DMA_IRQ_ENTRY upon entry and DMA_IRQ_EXIT 185 - * when leaving the handler. You have been warned... 186 - */ 187 - #define DMA_IRQ_ENTRY(dma, dregs) do { \ 188 - if(DMA_ISBROKEN(dma)) DMA_INTSOFF(dregs); \ 189 - } while (0) 190 - 191 - #define DMA_IRQ_EXIT(dma, dregs) do { \ 192 - if(DMA_ISBROKEN(dma)) DMA_INTSON(dregs); \ 193 - } while(0) 194 - 195 - #if 0 /* P3 this stuff is inline in ledma.c:init_restart_ledma() */ 196 - /* Pause until counter runs out or BIT isn't set in the DMA condition 197 - * register. 198 - */ 199 - static inline void sparc_dma_pause(struct sparc_dma_registers *regs, 200 - unsigned long bit) 201 - { 202 - int ctr = 50000; /* Let's find some bugs ;) */ 203 - 204 - /* Busy wait until the bit is not set any more */ 205 - while((regs->cond_reg&bit) && (ctr>0)) { 206 - ctr--; 207 - __delay(5); 208 - } 209 - 210 - /* Check for bogus outcome. */ 211 - if(!ctr) 212 - panic("DMA timeout"); 213 - } 214 - 215 - /* Reset the friggin' thing... */ 216 - #define DMA_RESET(dma) do { \ 217 - struct sparc_dma_registers *regs = dma->regs; \ 218 - /* Let the current FIFO drain itself */ \ 219 - sparc_dma_pause(regs, (DMA_FIFO_ISDRAIN)); \ 220 - /* Reset the logic */ \ 221 - regs->cond_reg |= (DMA_RST_SCSI); /* assert */ \ 222 - __delay(400); /* let the bits set ;) */ \ 223 - regs->cond_reg &= ~(DMA_RST_SCSI); /* de-assert */ \ 224 - sparc_dma_enable_interrupts(regs); /* Re-enable interrupts */ \ 225 - /* Enable FAST transfers if available */ \ 226 - if(dma->revision>dvmarev1) regs->cond_reg |= DMA_3CLKS; \ 227 - dma->running = 0; \ 228 - } while(0) 229 - #endif 230 - 231 - #define for_each_dvma(dma) \ 232 - for((dma) = dma_chain; (dma); (dma) = (dma)->next) 233 - 234 - extern int get_dma_list(char *); 235 - extern int request_dma(unsigned int, __const__ char *); 236 - extern void free_dma(unsigned int); 237 - 238 - /* From PCI */ 239 - 240 - #ifdef CONFIG_PCI 241 - extern int isa_dma_bridge_buggy; 242 - #else 243 - #define isa_dma_bridge_buggy (0) 244 - #endif 245 - 246 - /* Routines for data transfer buffers. */ 247 - BTFIXUPDEF_CALL(char *, mmu_lockarea, char *, unsigned long) 248 - BTFIXUPDEF_CALL(void, mmu_unlockarea, char *, unsigned long) 249 - 250 - #define mmu_lockarea(vaddr,len) BTFIXUP_CALL(mmu_lockarea)(vaddr,len) 251 - #define mmu_unlockarea(vaddr,len) BTFIXUP_CALL(mmu_unlockarea)(vaddr,len) 252 - 253 - /* These are implementations for sbus_map_sg/sbus_unmap_sg... collapse later */ 254 - BTFIXUPDEF_CALL(__u32, mmu_get_scsi_one, char *, unsigned long, struct sbus_bus *sbus) 255 - BTFIXUPDEF_CALL(void, mmu_get_scsi_sgl, struct scatterlist *, int, struct sbus_bus *sbus) 256 - BTFIXUPDEF_CALL(void, mmu_release_scsi_one, __u32, unsigned long, struct sbus_bus *sbus) 257 - BTFIXUPDEF_CALL(void, mmu_release_scsi_sgl, struct scatterlist *, int, struct sbus_bus *sbus) 258 - 259 - #define mmu_get_scsi_one(vaddr,len,sbus) BTFIXUP_CALL(mmu_get_scsi_one)(vaddr,len,sbus) 260 - #define mmu_get_scsi_sgl(sg,sz,sbus) BTFIXUP_CALL(mmu_get_scsi_sgl)(sg,sz,sbus) 261 - #define mmu_release_scsi_one(vaddr,len,sbus) BTFIXUP_CALL(mmu_release_scsi_one)(vaddr,len,sbus) 262 - #define mmu_release_scsi_sgl(sg,sz,sbus) BTFIXUP_CALL(mmu_release_scsi_sgl)(sg,sz,sbus) 263 - 264 - /* 265 - * mmu_map/unmap are provided by iommu/iounit; Invalid to call on IIep. 266 - * 267 - * The mmu_map_dma_area establishes two mappings in one go. 268 - * These mappings point to pages normally mapped at 'va' (linear address). 269 - * First mapping is for CPU visible address at 'a', uncached. 270 - * This is an alias, but it works because it is an uncached mapping. 271 - * Second mapping is for device visible address, or "bus" address. 272 - * The bus address is returned at '*pba'. 273 - * 274 - * These functions seem distinct, but are hard to split. On sun4c, 275 - * at least for now, 'a' is equal to bus address, and retured in *pba. 276 - * On sun4m, page attributes depend on the CPU type, so we have to 277 - * know if we are mapping RAM or I/O, so it has to be an additional argument 278 - * to a separate mapping function for CPU visible mappings. 279 - */ 280 - BTFIXUPDEF_CALL(int, mmu_map_dma_area, dma_addr_t *, unsigned long, unsigned long, int len) 281 - BTFIXUPDEF_CALL(struct page *, mmu_translate_dvma, unsigned long busa) 282 - BTFIXUPDEF_CALL(void, mmu_unmap_dma_area, unsigned long busa, int len) 283 - 284 - #define mmu_map_dma_area(pba,va,a,len) BTFIXUP_CALL(mmu_map_dma_area)(pba,va,a,len) 285 - #define mmu_unmap_dma_area(ba,len) BTFIXUP_CALL(mmu_unmap_dma_area)(ba,len) 286 - #define mmu_translate_dvma(ba) BTFIXUP_CALL(mmu_translate_dvma)(ba) 287 - 288 - #endif /* !(_ASM_SPARC_DMA_H) */
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include/asm-sparc/dma_64.h
··· 1 - /* 2 - * include/asm-sparc64/dma.h 3 - * 4 - * Copyright 1996 (C) David S. Miller (davem@caip.rutgers.edu) 5 - */ 6 - 7 - #ifndef _ASM_SPARC64_DMA_H 8 - #define _ASM_SPARC64_DMA_H 9 - 10 - #include <linux/kernel.h> 11 - #include <linux/types.h> 12 - #include <linux/spinlock.h> 13 - 14 - #include <asm/sbus.h> 15 - #include <asm/delay.h> 16 - #include <asm/oplib.h> 17 - 18 - /* These are irrelevant for Sparc DMA, but we leave it in so that 19 - * things can compile. 20 - */ 21 - #define MAX_DMA_CHANNELS 8 22 - #define DMA_MODE_READ 1 23 - #define DMA_MODE_WRITE 2 24 - #define MAX_DMA_ADDRESS (~0UL) 25 - 26 - /* Useful constants */ 27 - #define SIZE_16MB (16*1024*1024) 28 - #define SIZE_64K (64*1024) 29 - 30 - /* SBUS DMA controller reg offsets */ 31 - #define DMA_CSR 0x00UL /* rw DMA control/status register 0x00 */ 32 - #define DMA_ADDR 0x04UL /* rw DMA transfer address register 0x04 */ 33 - #define DMA_COUNT 0x08UL /* rw DMA transfer count register 0x08 */ 34 - #define DMA_TEST 0x0cUL /* rw DMA test/debug register 0x0c */ 35 - 36 - /* DVMA chip revisions */ 37 - enum dvma_rev { 38 - dvmarev0, 39 - dvmaesc1, 40 - dvmarev1, 41 - dvmarev2, 42 - dvmarev3, 43 - dvmarevplus, 44 - dvmahme 45 - }; 46 - 47 - #define DMA_HASCOUNT(rev) ((rev)==dvmaesc1) 48 - 49 - /* Linux DMA information structure, filled during probe. */ 50 - struct sbus_dma { 51 - struct sbus_dma *next; 52 - struct sbus_dev *sdev; 53 - void __iomem *regs; 54 - 55 - /* Status, misc info */ 56 - int node; /* Prom node for this DMA device */ 57 - int running; /* Are we doing DMA now? */ 58 - int allocated; /* Are we "owned" by anyone yet? */ 59 - 60 - /* Transfer information. */ 61 - u32 addr; /* Start address of current transfer */ 62 - int nbytes; /* Size of current transfer */ 63 - int realbytes; /* For splitting up large transfers, etc. */ 64 - 65 - /* DMA revision */ 66 - enum dvma_rev revision; 67 - }; 68 - 69 - extern struct sbus_dma *dma_chain; 70 - 71 - /* Broken hardware... */ 72 - #define DMA_ISBROKEN(dma) ((dma)->revision == dvmarev1) 73 - #define DMA_ISESC1(dma) ((dma)->revision == dvmaesc1) 74 - 75 - /* Main routines in dma.c */ 76 - extern void dvma_init(struct sbus_bus *); 77 - 78 - /* Fields in the cond_reg register */ 79 - /* First, the version identification bits */ 80 - #define DMA_DEVICE_ID 0xf0000000 /* Device identification bits */ 81 - #define DMA_VERS0 0x00000000 /* Sunray DMA version */ 82 - #define DMA_ESCV1 0x40000000 /* DMA ESC Version 1 */ 83 - #define DMA_VERS1 0x80000000 /* DMA rev 1 */ 84 - #define DMA_VERS2 0xa0000000 /* DMA rev 2 */ 85 - #define DMA_VERHME 0xb0000000 /* DMA hme gate array */ 86 - #define DMA_VERSPLUS 0x90000000 /* DMA rev 1 PLUS */ 87 - 88 - #define DMA_HNDL_INTR 0x00000001 /* An IRQ needs to be handled */ 89 - #define DMA_HNDL_ERROR 0x00000002 /* We need to take an error */ 90 - #define DMA_FIFO_ISDRAIN 0x0000000c /* The DMA FIFO is draining */ 91 - #define DMA_INT_ENAB 0x00000010 /* Turn on interrupts */ 92 - #define DMA_FIFO_INV 0x00000020 /* Invalidate the FIFO */ 93 - #define DMA_ACC_SZ_ERR 0x00000040 /* The access size was bad */ 94 - #define DMA_FIFO_STDRAIN 0x00000040 /* DMA_VERS1 Drain the FIFO */ 95 - #define DMA_RST_SCSI 0x00000080 /* Reset the SCSI controller */ 96 - #define DMA_RST_ENET DMA_RST_SCSI /* Reset the ENET controller */ 97 - #define DMA_ST_WRITE 0x00000100 /* write from device to memory */ 98 - #define DMA_ENABLE 0x00000200 /* Fire up DMA, handle requests */ 99 - #define DMA_PEND_READ 0x00000400 /* DMA_VERS1/0/PLUS Pending Read */ 100 - #define DMA_ESC_BURST 0x00000800 /* 1=16byte 0=32byte */ 101 - #define DMA_READ_AHEAD 0x00001800 /* DMA read ahead partial longword */ 102 - #define DMA_DSBL_RD_DRN 0x00001000 /* No EC drain on slave reads */ 103 - #define DMA_BCNT_ENAB 0x00002000 /* If on, use the byte counter */ 104 - #define DMA_TERM_CNTR 0x00004000 /* Terminal counter */ 105 - #define DMA_SCSI_SBUS64 0x00008000 /* HME: Enable 64-bit SBUS mode. */ 106 - #define DMA_CSR_DISAB 0x00010000 /* No FIFO drains during csr */ 107 - #define DMA_SCSI_DISAB 0x00020000 /* No FIFO drains during reg */ 108 - #define DMA_DSBL_WR_INV 0x00020000 /* No EC inval. on slave writes */ 109 - #define DMA_ADD_ENABLE 0x00040000 /* Special ESC DVMA optimization */ 110 - #define DMA_E_BURSTS 0x000c0000 /* ENET: SBUS r/w burst mask */ 111 - #define DMA_E_BURST32 0x00040000 /* ENET: SBUS 32 byte r/w burst */ 112 - #define DMA_E_BURST16 0x00000000 /* ENET: SBUS 16 byte r/w burst */ 113 - #define DMA_BRST_SZ 0x000c0000 /* SCSI: SBUS r/w burst size */ 114 - #define DMA_BRST64 0x000c0000 /* SCSI: 64byte bursts (HME on UltraSparc only) */ 115 - #define DMA_BRST32 0x00040000 /* SCSI: 32byte bursts */ 116 - #define DMA_BRST16 0x00000000 /* SCSI: 16byte bursts */ 117 - #define DMA_BRST0 0x00080000 /* SCSI: no bursts (non-HME gate arrays) */ 118 - #define DMA_ADDR_DISAB 0x00100000 /* No FIFO drains during addr */ 119 - #define DMA_2CLKS 0x00200000 /* Each transfer = 2 clock ticks */ 120 - #define DMA_3CLKS 0x00400000 /* Each transfer = 3 clock ticks */ 121 - #define DMA_EN_ENETAUI DMA_3CLKS /* Put lance into AUI-cable mode */ 122 - #define DMA_CNTR_DISAB 0x00800000 /* No IRQ when DMA_TERM_CNTR set */ 123 - #define DMA_AUTO_NADDR 0x01000000 /* Use "auto nxt addr" feature */ 124 - #define DMA_SCSI_ON 0x02000000 /* Enable SCSI dma */ 125 - #define DMA_PARITY_OFF 0x02000000 /* HME: disable parity checking */ 126 - #define DMA_LOADED_ADDR 0x04000000 /* Address has been loaded */ 127 - #define DMA_LOADED_NADDR 0x08000000 /* Next address has been loaded */ 128 - #define DMA_RESET_FAS366 0x08000000 /* HME: Assert RESET to FAS366 */ 129 - 130 - /* Values describing the burst-size property from the PROM */ 131 - #define DMA_BURST1 0x01 132 - #define DMA_BURST2 0x02 133 - #define DMA_BURST4 0x04 134 - #define DMA_BURST8 0x08 135 - #define DMA_BURST16 0x10 136 - #define DMA_BURST32 0x20 137 - #define DMA_BURST64 0x40 138 - #define DMA_BURSTBITS 0x7f 139 - 140 - /* Determine highest possible final transfer address given a base */ 141 - #define DMA_MAXEND(addr) (0x01000000UL-(((unsigned long)(addr))&0x00ffffffUL)) 142 - 143 - /* Yes, I hack a lot of elisp in my spare time... */ 144 - #define DMA_ERROR_P(regs) ((sbus_readl((regs) + DMA_CSR) & DMA_HNDL_ERROR)) 145 - #define DMA_IRQ_P(regs) ((sbus_readl((regs) + DMA_CSR)) & (DMA_HNDL_INTR | DMA_HNDL_ERROR)) 146 - #define DMA_WRITE_P(regs) ((sbus_readl((regs) + DMA_CSR) & DMA_ST_WRITE)) 147 - #define DMA_OFF(__regs) \ 148 - do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ 149 - tmp &= ~DMA_ENABLE; \ 150 - sbus_writel(tmp, (__regs) + DMA_CSR); \ 151 - } while(0) 152 - #define DMA_INTSOFF(__regs) \ 153 - do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ 154 - tmp &= ~DMA_INT_ENAB; \ 155 - sbus_writel(tmp, (__regs) + DMA_CSR); \ 156 - } while(0) 157 - #define DMA_INTSON(__regs) \ 158 - do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ 159 - tmp |= DMA_INT_ENAB; \ 160 - sbus_writel(tmp, (__regs) + DMA_CSR); \ 161 - } while(0) 162 - #define DMA_PUNTFIFO(__regs) \ 163 - do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ 164 - tmp |= DMA_FIFO_INV; \ 165 - sbus_writel(tmp, (__regs) + DMA_CSR); \ 166 - } while(0) 167 - #define DMA_SETSTART(__regs, __addr) \ 168 - sbus_writel((u32)(__addr), (__regs) + DMA_ADDR); 169 - #define DMA_BEGINDMA_W(__regs) \ 170 - do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ 171 - tmp |= (DMA_ST_WRITE|DMA_ENABLE|DMA_INT_ENAB); \ 172 - sbus_writel(tmp, (__regs) + DMA_CSR); \ 173 - } while(0) 174 - #define DMA_BEGINDMA_R(__regs) \ 175 - do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ 176 - tmp |= (DMA_ENABLE|DMA_INT_ENAB); \ 177 - tmp &= ~DMA_ST_WRITE; \ 178 - sbus_writel(tmp, (__regs) + DMA_CSR); \ 179 - } while(0) 180 - 181 - /* For certain DMA chips, we need to disable ints upon irq entry 182 - * and turn them back on when we are done. So in any ESP interrupt 183 - * handler you *must* call DMA_IRQ_ENTRY upon entry and DMA_IRQ_EXIT 184 - * when leaving the handler. You have been warned... 185 - */ 186 - #define DMA_IRQ_ENTRY(dma, dregs) do { \ 187 - if(DMA_ISBROKEN(dma)) DMA_INTSOFF(dregs); \ 188 - } while (0) 189 - 190 - #define DMA_IRQ_EXIT(dma, dregs) do { \ 191 - if(DMA_ISBROKEN(dma)) DMA_INTSON(dregs); \ 192 - } while(0) 193 - 194 - #define for_each_dvma(dma) \ 195 - for((dma) = dma_chain; (dma); (dma) = (dma)->next) 196 - 197 - /* From PCI */ 198 - 199 - #ifdef CONFIG_PCI 200 - extern int isa_dma_bridge_buggy; 201 - #else 202 - #define isa_dma_bridge_buggy (0) 203 - #endif 204 - 205 - #endif /* !(_ASM_SPARC64_DMA_H) */
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include/asm-sparc/ebus.h
··· 1 - #ifndef ___ASM_SPARC_EBUS_H 2 - #define ___ASM_SPARC_EBUS_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/ebus_64.h> 5 - #else 6 - #include <asm-sparc/ebus_32.h> 7 - #endif 8 - #endif
include/asm-sparc/ebus_32.h arch/sparc/include/asm/ebus_32.h
include/asm-sparc/ebus_64.h arch/sparc/include/asm/ebus_64.h
include/asm-sparc/ecc.h arch/sparc/include/asm/ecc.h
include/asm-sparc/eeprom.h arch/sparc/include/asm/eeprom.h
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include/asm-sparc/elf.h
··· 1 - #ifndef ___ASM_SPARC_ELF_H 2 - #define ___ASM_SPARC_ELF_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/elf_64.h> 5 - #else 6 - #include <asm-sparc/elf_32.h> 7 - #endif 8 - #endif
include/asm-sparc/elf_32.h arch/sparc/include/asm/elf_32.h
include/asm-sparc/elf_64.h arch/sparc/include/asm/elf_64.h
include/asm-sparc/emergency-restart.h arch/sparc/include/asm/emergency-restart.h
include/asm-sparc/envctrl.h arch/sparc/include/asm/envctrl.h
include/asm-sparc/errno.h arch/sparc/include/asm/errno.h
include/asm-sparc/estate.h arch/sparc/include/asm/estate.h
include/asm-sparc/fb.h arch/sparc/include/asm/fb.h
include/asm-sparc/fbio.h arch/sparc/include/asm/fbio.h
include/asm-sparc/fcntl.h arch/sparc/include/asm/fcntl.h
include/asm-sparc/fhc.h arch/sparc/include/asm/fhc.h
include/asm-sparc/fixmap.h arch/sparc/include/asm/fixmap.h
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include/asm-sparc/floppy.h
··· 1 - #ifndef ___ASM_SPARC_FLOPPY_H 2 - #define ___ASM_SPARC_FLOPPY_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/floppy_64.h> 5 - #else 6 - #include <asm-sparc/floppy_32.h> 7 - #endif 8 - #endif
-388
include/asm-sparc/floppy_32.h
··· 1 - /* asm-sparc/floppy.h: Sparc specific parts of the Floppy driver. 2 - * 3 - * Copyright (C) 1995 David S. Miller (davem@davemloft.net) 4 - */ 5 - 6 - #ifndef __ASM_SPARC_FLOPPY_H 7 - #define __ASM_SPARC_FLOPPY_H 8 - 9 - #include <asm/page.h> 10 - #include <asm/pgtable.h> 11 - #include <asm/system.h> 12 - #include <asm/idprom.h> 13 - #include <asm/machines.h> 14 - #include <asm/oplib.h> 15 - #include <asm/auxio.h> 16 - #include <asm/irq.h> 17 - 18 - /* We don't need no stinkin' I/O port allocation crap. */ 19 - #undef release_region 20 - #undef request_region 21 - #define release_region(X, Y) do { } while(0) 22 - #define request_region(X, Y, Z) (1) 23 - 24 - /* References: 25 - * 1) Netbsd Sun floppy driver. 26 - * 2) NCR 82077 controller manual 27 - * 3) Intel 82077 controller manual 28 - */ 29 - struct sun_flpy_controller { 30 - volatile unsigned char status_82072; /* Main Status reg. */ 31 - #define dcr_82072 status_82072 /* Digital Control reg. */ 32 - #define status1_82077 status_82072 /* Auxiliary Status reg. 1 */ 33 - 34 - volatile unsigned char data_82072; /* Data fifo. */ 35 - #define status2_82077 data_82072 /* Auxiliary Status reg. 2 */ 36 - 37 - volatile unsigned char dor_82077; /* Digital Output reg. */ 38 - volatile unsigned char tapectl_82077; /* What the? Tape control reg? */ 39 - 40 - volatile unsigned char status_82077; /* Main Status Register. */ 41 - #define drs_82077 status_82077 /* Digital Rate Select reg. */ 42 - 43 - volatile unsigned char data_82077; /* Data fifo. */ 44 - volatile unsigned char ___unused; 45 - volatile unsigned char dir_82077; /* Digital Input reg. */ 46 - #define dcr_82077 dir_82077 /* Config Control reg. */ 47 - }; 48 - 49 - /* You'll only ever find one controller on a SparcStation anyways. */ 50 - static struct sun_flpy_controller *sun_fdc = NULL; 51 - extern volatile unsigned char *fdc_status; 52 - 53 - struct sun_floppy_ops { 54 - unsigned char (*fd_inb)(int port); 55 - void (*fd_outb)(unsigned char value, int port); 56 - }; 57 - 58 - static struct sun_floppy_ops sun_fdops; 59 - 60 - #define fd_inb(port) sun_fdops.fd_inb(port) 61 - #define fd_outb(value,port) sun_fdops.fd_outb(value,port) 62 - #define fd_enable_dma() sun_fd_enable_dma() 63 - #define fd_disable_dma() sun_fd_disable_dma() 64 - #define fd_request_dma() (0) /* nothing... */ 65 - #define fd_free_dma() /* nothing... */ 66 - #define fd_clear_dma_ff() /* nothing... */ 67 - #define fd_set_dma_mode(mode) sun_fd_set_dma_mode(mode) 68 - #define fd_set_dma_addr(addr) sun_fd_set_dma_addr(addr) 69 - #define fd_set_dma_count(count) sun_fd_set_dma_count(count) 70 - #define fd_enable_irq() /* nothing... */ 71 - #define fd_disable_irq() /* nothing... */ 72 - #define fd_cacheflush(addr, size) /* nothing... */ 73 - #define fd_request_irq() sun_fd_request_irq() 74 - #define fd_free_irq() /* nothing... */ 75 - #if 0 /* P3: added by Alain, these cause a MMU corruption. 19960524 XXX */ 76 - #define fd_dma_mem_alloc(size) ((unsigned long) vmalloc(size)) 77 - #define fd_dma_mem_free(addr,size) (vfree((void *)(addr))) 78 - #endif 79 - 80 - /* XXX This isn't really correct. XXX */ 81 - #define get_dma_residue(x) (0) 82 - 83 - #define FLOPPY0_TYPE 4 84 - #define FLOPPY1_TYPE 0 85 - 86 - /* Super paranoid... */ 87 - #undef HAVE_DISABLE_HLT 88 - 89 - /* Here is where we catch the floppy driver trying to initialize, 90 - * therefore this is where we call the PROM device tree probing 91 - * routine etc. on the Sparc. 92 - */ 93 - #define FDC1 sun_floppy_init() 94 - 95 - #define N_FDC 1 96 - #define N_DRIVE 8 97 - 98 - /* No 64k boundary crossing problems on the Sparc. */ 99 - #define CROSS_64KB(a,s) (0) 100 - 101 - /* Routines unique to each controller type on a Sun. */ 102 - static void sun_set_dor(unsigned char value, int fdc_82077) 103 - { 104 - if (sparc_cpu_model == sun4c) { 105 - unsigned int bits = 0; 106 - if (value & 0x10) 107 - bits |= AUXIO_FLPY_DSEL; 108 - if ((value & 0x80) == 0) 109 - bits |= AUXIO_FLPY_EJCT; 110 - set_auxio(bits, (~bits) & (AUXIO_FLPY_DSEL|AUXIO_FLPY_EJCT)); 111 - } 112 - if (fdc_82077) { 113 - sun_fdc->dor_82077 = value; 114 - } 115 - } 116 - 117 - static unsigned char sun_read_dir(void) 118 - { 119 - if (sparc_cpu_model == sun4c) 120 - return (get_auxio() & AUXIO_FLPY_DCHG) ? 0x80 : 0; 121 - else 122 - return sun_fdc->dir_82077; 123 - } 124 - 125 - static unsigned char sun_82072_fd_inb(int port) 126 - { 127 - udelay(5); 128 - switch(port & 7) { 129 - default: 130 - printk("floppy: Asked to read unknown port %d\n", port); 131 - panic("floppy: Port bolixed."); 132 - case 4: /* FD_STATUS */ 133 - return sun_fdc->status_82072 & ~STATUS_DMA; 134 - case 5: /* FD_DATA */ 135 - return sun_fdc->data_82072; 136 - case 7: /* FD_DIR */ 137 - return sun_read_dir(); 138 - }; 139 - panic("sun_82072_fd_inb: How did I get here?"); 140 - } 141 - 142 - static void sun_82072_fd_outb(unsigned char value, int port) 143 - { 144 - udelay(5); 145 - switch(port & 7) { 146 - default: 147 - printk("floppy: Asked to write to unknown port %d\n", port); 148 - panic("floppy: Port bolixed."); 149 - case 2: /* FD_DOR */ 150 - sun_set_dor(value, 0); 151 - break; 152 - case 5: /* FD_DATA */ 153 - sun_fdc->data_82072 = value; 154 - break; 155 - case 7: /* FD_DCR */ 156 - sun_fdc->dcr_82072 = value; 157 - break; 158 - case 4: /* FD_STATUS */ 159 - sun_fdc->status_82072 = value; 160 - break; 161 - }; 162 - return; 163 - } 164 - 165 - static unsigned char sun_82077_fd_inb(int port) 166 - { 167 - udelay(5); 168 - switch(port & 7) { 169 - default: 170 - printk("floppy: Asked to read unknown port %d\n", port); 171 - panic("floppy: Port bolixed."); 172 - case 0: /* FD_STATUS_0 */ 173 - return sun_fdc->status1_82077; 174 - case 1: /* FD_STATUS_1 */ 175 - return sun_fdc->status2_82077; 176 - case 2: /* FD_DOR */ 177 - return sun_fdc->dor_82077; 178 - case 3: /* FD_TDR */ 179 - return sun_fdc->tapectl_82077; 180 - case 4: /* FD_STATUS */ 181 - return sun_fdc->status_82077 & ~STATUS_DMA; 182 - case 5: /* FD_DATA */ 183 - return sun_fdc->data_82077; 184 - case 7: /* FD_DIR */ 185 - return sun_read_dir(); 186 - }; 187 - panic("sun_82077_fd_inb: How did I get here?"); 188 - } 189 - 190 - static void sun_82077_fd_outb(unsigned char value, int port) 191 - { 192 - udelay(5); 193 - switch(port & 7) { 194 - default: 195 - printk("floppy: Asked to write to unknown port %d\n", port); 196 - panic("floppy: Port bolixed."); 197 - case 2: /* FD_DOR */ 198 - sun_set_dor(value, 1); 199 - break; 200 - case 5: /* FD_DATA */ 201 - sun_fdc->data_82077 = value; 202 - break; 203 - case 7: /* FD_DCR */ 204 - sun_fdc->dcr_82077 = value; 205 - break; 206 - case 4: /* FD_STATUS */ 207 - sun_fdc->status_82077 = value; 208 - break; 209 - case 3: /* FD_TDR */ 210 - sun_fdc->tapectl_82077 = value; 211 - break; 212 - }; 213 - return; 214 - } 215 - 216 - /* For pseudo-dma (Sun floppy drives have no real DMA available to 217 - * them so we must eat the data fifo bytes directly ourselves) we have 218 - * three state variables. doing_pdma tells our inline low-level 219 - * assembly floppy interrupt entry point whether it should sit and eat 220 - * bytes from the fifo or just transfer control up to the higher level 221 - * floppy interrupt c-code. I tried very hard but I could not get the 222 - * pseudo-dma to work in c-code without getting many overruns and 223 - * underruns. If non-zero, doing_pdma encodes the direction of 224 - * the transfer for debugging. 1=read 2=write 225 - */ 226 - extern char *pdma_vaddr; 227 - extern unsigned long pdma_size; 228 - extern volatile int doing_pdma; 229 - 230 - /* This is software state */ 231 - extern char *pdma_base; 232 - extern unsigned long pdma_areasize; 233 - 234 - /* Common routines to all controller types on the Sparc. */ 235 - static inline void virtual_dma_init(void) 236 - { 237 - /* nothing... */ 238 - } 239 - 240 - static inline void sun_fd_disable_dma(void) 241 - { 242 - doing_pdma = 0; 243 - if (pdma_base) { 244 - mmu_unlockarea(pdma_base, pdma_areasize); 245 - pdma_base = NULL; 246 - } 247 - } 248 - 249 - static inline void sun_fd_set_dma_mode(int mode) 250 - { 251 - switch(mode) { 252 - case DMA_MODE_READ: 253 - doing_pdma = 1; 254 - break; 255 - case DMA_MODE_WRITE: 256 - doing_pdma = 2; 257 - break; 258 - default: 259 - printk("Unknown dma mode %d\n", mode); 260 - panic("floppy: Giving up..."); 261 - } 262 - } 263 - 264 - static inline void sun_fd_set_dma_addr(char *buffer) 265 - { 266 - pdma_vaddr = buffer; 267 - } 268 - 269 - static inline void sun_fd_set_dma_count(int length) 270 - { 271 - pdma_size = length; 272 - } 273 - 274 - static inline void sun_fd_enable_dma(void) 275 - { 276 - pdma_vaddr = mmu_lockarea(pdma_vaddr, pdma_size); 277 - pdma_base = pdma_vaddr; 278 - pdma_areasize = pdma_size; 279 - } 280 - 281 - /* Our low-level entry point in arch/sparc/kernel/entry.S */ 282 - extern int sparc_floppy_request_irq(int irq, unsigned long flags, 283 - irq_handler_t irq_handler); 284 - 285 - static int sun_fd_request_irq(void) 286 - { 287 - static int once = 0; 288 - int error; 289 - 290 - if(!once) { 291 - once = 1; 292 - error = sparc_floppy_request_irq(FLOPPY_IRQ, 293 - IRQF_DISABLED, 294 - floppy_interrupt); 295 - return ((error == 0) ? 0 : -1); 296 - } else return 0; 297 - } 298 - 299 - static struct linux_prom_registers fd_regs[2]; 300 - 301 - static int sun_floppy_init(void) 302 - { 303 - char state[128]; 304 - int tnode, fd_node, num_regs; 305 - struct resource r; 306 - 307 - use_virtual_dma = 1; 308 - 309 - FLOPPY_IRQ = 11; 310 - /* Forget it if we aren't on a machine that could possibly 311 - * ever have a floppy drive. 312 - */ 313 - if((sparc_cpu_model != sun4c && sparc_cpu_model != sun4m) || 314 - ((idprom->id_machtype == (SM_SUN4C | SM_4C_SLC)) || 315 - (idprom->id_machtype == (SM_SUN4C | SM_4C_ELC)))) { 316 - /* We certainly don't have a floppy controller. */ 317 - goto no_sun_fdc; 318 - } 319 - /* Well, try to find one. */ 320 - tnode = prom_getchild(prom_root_node); 321 - fd_node = prom_searchsiblings(tnode, "obio"); 322 - if(fd_node != 0) { 323 - tnode = prom_getchild(fd_node); 324 - fd_node = prom_searchsiblings(tnode, "SUNW,fdtwo"); 325 - } else { 326 - fd_node = prom_searchsiblings(tnode, "fd"); 327 - } 328 - if(fd_node == 0) { 329 - goto no_sun_fdc; 330 - } 331 - 332 - /* The sun4m lets us know if the controller is actually usable. */ 333 - if(sparc_cpu_model == sun4m && 334 - prom_getproperty(fd_node, "status", state, sizeof(state)) != -1) { 335 - if(!strcmp(state, "disabled")) { 336 - goto no_sun_fdc; 337 - } 338 - } 339 - num_regs = prom_getproperty(fd_node, "reg", (char *) fd_regs, sizeof(fd_regs)); 340 - num_regs = (num_regs / sizeof(fd_regs[0])); 341 - prom_apply_obio_ranges(fd_regs, num_regs); 342 - memset(&r, 0, sizeof(r)); 343 - r.flags = fd_regs[0].which_io; 344 - r.start = fd_regs[0].phys_addr; 345 - sun_fdc = (struct sun_flpy_controller *) 346 - sbus_ioremap(&r, 0, fd_regs[0].reg_size, "floppy"); 347 - 348 - /* Last minute sanity check... */ 349 - if(sun_fdc->status_82072 == 0xff) { 350 - sun_fdc = NULL; 351 - goto no_sun_fdc; 352 - } 353 - 354 - sun_fdops.fd_inb = sun_82077_fd_inb; 355 - sun_fdops.fd_outb = sun_82077_fd_outb; 356 - fdc_status = &sun_fdc->status_82077; 357 - 358 - if (sun_fdc->dor_82077 == 0x80) { 359 - sun_fdc->dor_82077 = 0x02; 360 - if (sun_fdc->dor_82077 == 0x80) { 361 - sun_fdops.fd_inb = sun_82072_fd_inb; 362 - sun_fdops.fd_outb = sun_82072_fd_outb; 363 - fdc_status = &sun_fdc->status_82072; 364 - } 365 - } 366 - 367 - /* Success... */ 368 - allowed_drive_mask = 0x01; 369 - return (int) sun_fdc; 370 - 371 - no_sun_fdc: 372 - return -1; 373 - } 374 - 375 - static int sparc_eject(void) 376 - { 377 - set_dor(0x00, 0xff, 0x90); 378 - udelay(500); 379 - set_dor(0x00, 0x6f, 0x00); 380 - udelay(500); 381 - return 0; 382 - } 383 - 384 - #define fd_eject(drive) sparc_eject() 385 - 386 - #define EXTRA_FLOPPY_PARAMS 387 - 388 - #endif /* !(__ASM_SPARC_FLOPPY_H) */
include/asm-sparc/floppy_64.h arch/sparc/include/asm/floppy_64.h
include/asm-sparc/fpumacro.h arch/sparc/include/asm/fpumacro.h
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include/asm-sparc/futex.h
··· 1 - #ifndef ___ASM_SPARC_FUTEX_H 2 - #define ___ASM_SPARC_FUTEX_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/futex_64.h> 5 - #else 6 - #include <asm-sparc/futex_32.h> 7 - #endif 8 - #endif
include/asm-sparc/futex_32.h arch/sparc/include/asm/futex_32.h
include/asm-sparc/futex_64.h arch/sparc/include/asm/futex_64.h
-8
include/asm-sparc/hardirq.h
··· 1 - #ifndef ___ASM_SPARC_HARDIRQ_H 2 - #define ___ASM_SPARC_HARDIRQ_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/hardirq_64.h> 5 - #else 6 - #include <asm-sparc/hardirq_32.h> 7 - #endif 8 - #endif
include/asm-sparc/hardirq_32.h arch/sparc/include/asm/hardirq_32.h
include/asm-sparc/hardirq_64.h arch/sparc/include/asm/hardirq_64.h
-8
include/asm-sparc/head.h
··· 1 - #ifndef ___ASM_SPARC_HEAD_H 2 - #define ___ASM_SPARC_HEAD_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/head_64.h> 5 - #else 6 - #include <asm-sparc/head_32.h> 7 - #endif 8 - #endif
include/asm-sparc/head_32.h arch/sparc/include/asm/head_32.h
include/asm-sparc/head_64.h arch/sparc/include/asm/head_64.h
include/asm-sparc/highmem.h arch/sparc/include/asm/highmem.h
include/asm-sparc/hugetlb.h arch/sparc/include/asm/hugetlb.h
include/asm-sparc/hvtramp.h arch/sparc/include/asm/hvtramp.h
include/asm-sparc/hw_irq.h arch/sparc/include/asm/hw_irq.h
include/asm-sparc/hypervisor.h arch/sparc/include/asm/hypervisor.h
include/asm-sparc/ide.h arch/sparc/include/asm/ide.h
include/asm-sparc/idprom.h arch/sparc/include/asm/idprom.h
include/asm-sparc/intr_queue.h arch/sparc/include/asm/intr_queue.h
include/asm-sparc/io-unit.h arch/sparc/include/asm/io-unit.h
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include/asm-sparc/io.h
··· 1 - #ifndef ___ASM_SPARC_IO_H 2 - #define ___ASM_SPARC_IO_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/io_64.h> 5 - #else 6 - #include <asm-sparc/io_32.h> 7 - #endif 8 - #endif
include/asm-sparc/io_32.h arch/sparc/include/asm/io_32.h
include/asm-sparc/io_64.h arch/sparc/include/asm/io_64.h
include/asm-sparc/ioctl.h arch/sparc/include/asm/ioctl.h
include/asm-sparc/ioctls.h arch/sparc/include/asm/ioctls.h
-8
include/asm-sparc/iommu.h
··· 1 - #ifndef ___ASM_SPARC_IOMMU_H 2 - #define ___ASM_SPARC_IOMMU_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/iommu_64.h> 5 - #else 6 - #include <asm-sparc/iommu_32.h> 7 - #endif 8 - #endif
include/asm-sparc/iommu_32.h arch/sparc/include/asm/iommu_32.h
include/asm-sparc/iommu_64.h arch/sparc/include/asm/iommu_64.h
-8
include/asm-sparc/ipcbuf.h
··· 1 - #ifndef ___ASM_SPARC_IPCBUF_H 2 - #define ___ASM_SPARC_IPCBUF_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/ipcbuf_64.h> 5 - #else 6 - #include <asm-sparc/ipcbuf_32.h> 7 - #endif 8 - #endif
include/asm-sparc/ipcbuf_32.h arch/sparc/include/asm/ipcbuf_32.h
include/asm-sparc/ipcbuf_64.h arch/sparc/include/asm/ipcbuf_64.h
-8
include/asm-sparc/irq.h
··· 1 - #ifndef ___ASM_SPARC_IRQ_H 2 - #define ___ASM_SPARC_IRQ_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/irq_64.h> 5 - #else 6 - #include <asm-sparc/irq_32.h> 7 - #endif 8 - #endif
include/asm-sparc/irq_32.h arch/sparc/include/asm/irq_32.h
include/asm-sparc/irq_64.h arch/sparc/include/asm/irq_64.h
include/asm-sparc/irq_regs.h arch/sparc/include/asm/irq_regs.h
-8
include/asm-sparc/irqflags.h
··· 1 - #ifndef ___ASM_SPARC_IRQFLAGS_H 2 - #define ___ASM_SPARC_IRQFLAGS_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/irqflags_64.h> 5 - #else 6 - #include <asm-sparc/irqflags_32.h> 7 - #endif 8 - #endif
-39
include/asm-sparc/irqflags_32.h
··· 1 - /* 2 - * include/asm-sparc/irqflags.h 3 - * 4 - * IRQ flags handling 5 - * 6 - * This file gets included from lowlevel asm headers too, to provide 7 - * wrapped versions of the local_irq_*() APIs, based on the 8 - * raw_local_irq_*() functions from the lowlevel headers. 9 - */ 10 - #ifndef _ASM_IRQFLAGS_H 11 - #define _ASM_IRQFLAGS_H 12 - 13 - #ifndef __ASSEMBLY__ 14 - 15 - extern void raw_local_irq_restore(unsigned long); 16 - extern unsigned long __raw_local_irq_save(void); 17 - extern void raw_local_irq_enable(void); 18 - 19 - static inline unsigned long getipl(void) 20 - { 21 - unsigned long retval; 22 - 23 - __asm__ __volatile__("rd %%psr, %0" : "=r" (retval)); 24 - return retval; 25 - } 26 - 27 - #define raw_local_save_flags(flags) ((flags) = getipl()) 28 - #define raw_local_irq_save(flags) ((flags) = __raw_local_irq_save()) 29 - #define raw_local_irq_disable() ((void) __raw_local_irq_save()) 30 - #define raw_irqs_disabled() ((getipl() & PSR_PIL) != 0) 31 - 32 - static inline int raw_irqs_disabled_flags(unsigned long flags) 33 - { 34 - return ((flags & PSR_PIL) != 0); 35 - } 36 - 37 - #endif /* (__ASSEMBLY__) */ 38 - 39 - #endif /* !(_ASM_IRQFLAGS_H) */
-89
include/asm-sparc/irqflags_64.h
··· 1 - /* 2 - * include/asm-sparc64/irqflags.h 3 - * 4 - * IRQ flags handling 5 - * 6 - * This file gets included from lowlevel asm headers too, to provide 7 - * wrapped versions of the local_irq_*() APIs, based on the 8 - * raw_local_irq_*() functions from the lowlevel headers. 9 - */ 10 - #ifndef _ASM_IRQFLAGS_H 11 - #define _ASM_IRQFLAGS_H 12 - 13 - #ifndef __ASSEMBLY__ 14 - 15 - static inline unsigned long __raw_local_save_flags(void) 16 - { 17 - unsigned long flags; 18 - 19 - __asm__ __volatile__( 20 - "rdpr %%pil, %0" 21 - : "=r" (flags) 22 - ); 23 - 24 - return flags; 25 - } 26 - 27 - #define raw_local_save_flags(flags) \ 28 - do { (flags) = __raw_local_save_flags(); } while (0) 29 - 30 - static inline void raw_local_irq_restore(unsigned long flags) 31 - { 32 - __asm__ __volatile__( 33 - "wrpr %0, %%pil" 34 - : /* no output */ 35 - : "r" (flags) 36 - : "memory" 37 - ); 38 - } 39 - 40 - static inline void raw_local_irq_disable(void) 41 - { 42 - __asm__ __volatile__( 43 - "wrpr 15, %%pil" 44 - : /* no outputs */ 45 - : /* no inputs */ 46 - : "memory" 47 - ); 48 - } 49 - 50 - static inline void raw_local_irq_enable(void) 51 - { 52 - __asm__ __volatile__( 53 - "wrpr 0, %%pil" 54 - : /* no outputs */ 55 - : /* no inputs */ 56 - : "memory" 57 - ); 58 - } 59 - 60 - static inline int raw_irqs_disabled_flags(unsigned long flags) 61 - { 62 - return (flags > 0); 63 - } 64 - 65 - static inline int raw_irqs_disabled(void) 66 - { 67 - unsigned long flags = __raw_local_save_flags(); 68 - 69 - return raw_irqs_disabled_flags(flags); 70 - } 71 - 72 - /* 73 - * For spinlocks, etc: 74 - */ 75 - static inline unsigned long __raw_local_irq_save(void) 76 - { 77 - unsigned long flags = __raw_local_save_flags(); 78 - 79 - raw_local_irq_disable(); 80 - 81 - return flags; 82 - } 83 - 84 - #define raw_local_irq_save(flags) \ 85 - do { (flags) = __raw_local_irq_save(); } while (0) 86 - 87 - #endif /* (__ASSEMBLY__) */ 88 - 89 - #endif /* !(_ASM_IRQFLAGS_H) */
include/asm-sparc/jsflash.h arch/sparc/include/asm/jsflash.h
-8
include/asm-sparc/kdebug.h
··· 1 - #ifndef ___ASM_SPARC_KDEBUG_H 2 - #define ___ASM_SPARC_KDEBUG_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/kdebug_64.h> 5 - #else 6 - #include <asm-sparc/kdebug_32.h> 7 - #endif 8 - #endif
include/asm-sparc/kdebug_32.h arch/sparc/include/asm/kdebug_32.h
include/asm-sparc/kdebug_64.h arch/sparc/include/asm/kdebug_64.h
include/asm-sparc/kgdb.h arch/sparc/include/asm/kgdb.h
include/asm-sparc/kmap_types.h arch/sparc/include/asm/kmap_types.h
include/asm-sparc/kprobes.h arch/sparc/include/asm/kprobes.h
include/asm-sparc/ldc.h arch/sparc/include/asm/ldc.h
include/asm-sparc/linkage.h arch/sparc/include/asm/linkage.h
include/asm-sparc/lmb.h arch/sparc/include/asm/lmb.h
include/asm-sparc/local.h arch/sparc/include/asm/local.h
include/asm-sparc/lsu.h arch/sparc/include/asm/lsu.h
include/asm-sparc/machines.h arch/sparc/include/asm/machines.h
include/asm-sparc/mbus.h arch/sparc/include/asm/mbus.h
-8
include/asm-sparc/mc146818rtc.h
··· 1 - #ifndef ___ASM_SPARC_MC146818RTC_H 2 - #define ___ASM_SPARC_MC146818RTC_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/mc146818rtc_64.h> 5 - #else 6 - #include <asm-sparc/mc146818rtc_32.h> 7 - #endif 8 - #endif
include/asm-sparc/mc146818rtc_32.h arch/sparc/include/asm/mc146818rtc_32.h
include/asm-sparc/mc146818rtc_64.h arch/sparc/include/asm/mc146818rtc_64.h
include/asm-sparc/mdesc.h arch/sparc/include/asm/mdesc.h
include/asm-sparc/memreg.h arch/sparc/include/asm/memreg.h
include/asm-sparc/mman.h arch/sparc/include/asm/mman.h
-8
include/asm-sparc/mmu.h
··· 1 - #ifndef ___ASM_SPARC_MMU_H 2 - #define ___ASM_SPARC_MMU_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/mmu_64.h> 5 - #else 6 - #include <asm-sparc/mmu_32.h> 7 - #endif 8 - #endif
include/asm-sparc/mmu_32.h arch/sparc/include/asm/mmu_32.h
include/asm-sparc/mmu_64.h arch/sparc/include/asm/mmu_64.h
-8
include/asm-sparc/mmu_context.h
··· 1 - #ifndef ___ASM_SPARC_MMU_CONTEXT_H 2 - #define ___ASM_SPARC_MMU_CONTEXT_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/mmu_context_64.h> 5 - #else 6 - #include <asm-sparc/mmu_context_32.h> 7 - #endif 8 - #endif
include/asm-sparc/mmu_context_32.h arch/sparc/include/asm/mmu_context_32.h
include/asm-sparc/mmu_context_64.h arch/sparc/include/asm/mmu_context_64.h
include/asm-sparc/mmzone.h arch/sparc/include/asm/mmzone.h
-8
include/asm-sparc/module.h
··· 1 - #ifndef ___ASM_SPARC_MODULE_H 2 - #define ___ASM_SPARC_MODULE_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/module_64.h> 5 - #else 6 - #include <asm-sparc/module_32.h> 7 - #endif 8 - #endif
include/asm-sparc/module_32.h arch/sparc/include/asm/module_32.h
include/asm-sparc/module_64.h arch/sparc/include/asm/module_64.h
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include/asm-sparc/mostek.h
··· 1 - #ifndef ___ASM_SPARC_MOSTEK_H 2 - #define ___ASM_SPARC_MOSTEK_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/mostek_64.h> 5 - #else 6 - #include <asm-sparc/mostek_32.h> 7 - #endif 8 - #endif
include/asm-sparc/mostek_32.h arch/sparc/include/asm/mostek_32.h
include/asm-sparc/mostek_64.h arch/sparc/include/asm/mostek_64.h
include/asm-sparc/mpmbox.h arch/sparc/include/asm/mpmbox.h
include/asm-sparc/msgbuf.h arch/sparc/include/asm/msgbuf.h
include/asm-sparc/msi.h arch/sparc/include/asm/msi.h
include/asm-sparc/mutex.h arch/sparc/include/asm/mutex.h
include/asm-sparc/mxcc.h arch/sparc/include/asm/mxcc.h
include/asm-sparc/ns87303.h arch/sparc/include/asm/ns87303.h
include/asm-sparc/obio.h arch/sparc/include/asm/obio.h
include/asm-sparc/of_device.h arch/sparc/include/asm/of_device.h
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include/asm-sparc/of_platform.h
··· 1 - #ifndef ___ASM_SPARC_OF_PLATFORM_H 2 - #define ___ASM_SPARC_OF_PLATFORM_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/of_platform_64.h> 5 - #else 6 - #include <asm-sparc/of_platform_32.h> 7 - #endif 8 - #endif
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include/asm-sparc/of_platform_32.h
··· 1 - #ifndef _ASM_SPARC_OF_PLATFORM_H 2 - #define _ASM_SPARC_OF_PLATFORM_H 3 - /* 4 - * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corp. 5 - * <benh@kernel.crashing.org> 6 - * Modified for Sparc by merging parts of asm-sparc/of_device.h 7 - * by Stephen Rothwell 8 - * 9 - * This program is free software; you can redistribute it and/or 10 - * modify it under the terms of the GNU General Public License 11 - * as published by the Free Software Foundation; either version 12 - * 2 of the License, or (at your option) any later version. 13 - * 14 - */ 15 - 16 - /* This is just here during the transition */ 17 - #include <linux/of_platform.h> 18 - 19 - extern struct bus_type ebus_bus_type; 20 - extern struct bus_type sbus_bus_type; 21 - 22 - #define of_bus_type of_platform_bus_type /* for compatibility */ 23 - 24 - #endif /* _ASM_SPARC_OF_PLATFORM_H */
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include/asm-sparc/of_platform_64.h
··· 1 - #ifndef _ASM_SPARC64_OF_PLATFORM_H 2 - #define _ASM_SPARC64_OF_PLATFORM_H 3 - /* 4 - * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corp. 5 - * <benh@kernel.crashing.org> 6 - * Modified for Sparc by merging parts of asm-sparc/of_device.h 7 - * by Stephen Rothwell 8 - * 9 - * This program is free software; you can redistribute it and/or 10 - * modify it under the terms of the GNU General Public License 11 - * as published by the Free Software Foundation; either version 12 - * 2 of the License, or (at your option) any later version. 13 - * 14 - */ 15 - 16 - /* This is just here during the transition */ 17 - #include <linux/of_platform.h> 18 - 19 - extern struct bus_type isa_bus_type; 20 - extern struct bus_type ebus_bus_type; 21 - extern struct bus_type sbus_bus_type; 22 - 23 - #define of_bus_type of_platform_bus_type /* for compatibility */ 24 - 25 - #endif /* _ASM_SPARC64_OF_PLATFORM_H */
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include/asm-sparc/openprom.h
··· 1 - #ifndef ___ASM_SPARC_OPENPROM_H 2 - #define ___ASM_SPARC_OPENPROM_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/openprom_64.h> 5 - #else 6 - #include <asm-sparc/openprom_32.h> 7 - #endif 8 - #endif
include/asm-sparc/openprom_32.h arch/sparc/include/asm/openprom_32.h
include/asm-sparc/openprom_64.h arch/sparc/include/asm/openprom_64.h
include/asm-sparc/openpromio.h arch/sparc/include/asm/openpromio.h
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include/asm-sparc/oplib.h
··· 1 - #ifndef ___ASM_SPARC_OPLIB_H 2 - #define ___ASM_SPARC_OPLIB_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/oplib_64.h> 5 - #else 6 - #include <asm-sparc/oplib_32.h> 7 - #endif 8 - #endif
include/asm-sparc/oplib_32.h arch/sparc/include/asm/oplib_32.h
include/asm-sparc/oplib_64.h arch/sparc/include/asm/oplib_64.h
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include/asm-sparc/page.h
··· 1 - #ifndef ___ASM_SPARC_PAGE_H 2 - #define ___ASM_SPARC_PAGE_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/page_64.h> 5 - #else 6 - #include <asm-sparc/page_32.h> 7 - #endif 8 - #endif
include/asm-sparc/page_32.h arch/sparc/include/asm/page_32.h
include/asm-sparc/page_64.h arch/sparc/include/asm/page_64.h
include/asm-sparc/param.h arch/sparc/include/asm/param.h
include/asm-sparc/parport.h arch/sparc/include/asm/parport.h
include/asm-sparc/pbm.h arch/sparc/include/asm/pbm.h
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include/asm-sparc/pci.h
··· 1 - #ifndef ___ASM_SPARC_PCI_H 2 - #define ___ASM_SPARC_PCI_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/pci_64.h> 5 - #else 6 - #include <asm-sparc/pci_32.h> 7 - #endif 8 - #endif
include/asm-sparc/pci_32.h arch/sparc/include/asm/pci_32.h
include/asm-sparc/pci_64.h arch/sparc/include/asm/pci_64.h
include/asm-sparc/pcic.h arch/sparc/include/asm/pcic.h
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include/asm-sparc/percpu.h
··· 1 - #ifndef ___ASM_SPARC_PERCPU_H 2 - #define ___ASM_SPARC_PERCPU_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/percpu_64.h> 5 - #else 6 - #include <asm-sparc/percpu_32.h> 7 - #endif 8 - #endif
include/asm-sparc/percpu_32.h arch/sparc/include/asm/percpu_32.h
include/asm-sparc/percpu_64.h arch/sparc/include/asm/percpu_64.h
include/asm-sparc/perfctr.h arch/sparc/include/asm/perfctr.h
-8
include/asm-sparc/pgalloc.h
··· 1 - #ifndef ___ASM_SPARC_PGALLOC_H 2 - #define ___ASM_SPARC_PGALLOC_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/pgalloc_64.h> 5 - #else 6 - #include <asm-sparc/pgalloc_32.h> 7 - #endif 8 - #endif
include/asm-sparc/pgalloc_32.h arch/sparc/include/asm/pgalloc_32.h
include/asm-sparc/pgalloc_64.h arch/sparc/include/asm/pgalloc_64.h
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include/asm-sparc/pgtable.h
··· 1 - #ifndef ___ASM_SPARC_PGTABLE_H 2 - #define ___ASM_SPARC_PGTABLE_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/pgtable_64.h> 5 - #else 6 - #include <asm-sparc/pgtable_32.h> 7 - #endif 8 - #endif
-480
include/asm-sparc/pgtable_32.h
··· 1 - #ifndef _SPARC_PGTABLE_H 2 - #define _SPARC_PGTABLE_H 3 - 4 - /* asm-sparc/pgtable.h: Defines and functions used to work 5 - * with Sparc page tables. 6 - * 7 - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) 8 - * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) 9 - */ 10 - 11 - #ifndef __ASSEMBLY__ 12 - #include <asm-generic/4level-fixup.h> 13 - 14 - #include <linux/spinlock.h> 15 - #include <linux/swap.h> 16 - #include <asm/types.h> 17 - #ifdef CONFIG_SUN4 18 - #include <asm/pgtsun4.h> 19 - #else 20 - #include <asm/pgtsun4c.h> 21 - #endif 22 - #include <asm/pgtsrmmu.h> 23 - #include <asm/vac-ops.h> 24 - #include <asm/oplib.h> 25 - #include <asm/btfixup.h> 26 - #include <asm/system.h> 27 - 28 - 29 - struct vm_area_struct; 30 - struct page; 31 - 32 - extern void load_mmu(void); 33 - extern unsigned long calc_highpages(void); 34 - 35 - BTFIXUPDEF_SIMM13(pgdir_shift) 36 - BTFIXUPDEF_SETHI(pgdir_size) 37 - BTFIXUPDEF_SETHI(pgdir_mask) 38 - 39 - BTFIXUPDEF_SIMM13(ptrs_per_pmd) 40 - BTFIXUPDEF_SIMM13(ptrs_per_pgd) 41 - BTFIXUPDEF_SIMM13(user_ptrs_per_pgd) 42 - 43 - #define pte_ERROR(e) __builtin_trap() 44 - #define pmd_ERROR(e) __builtin_trap() 45 - #define pgd_ERROR(e) __builtin_trap() 46 - 47 - BTFIXUPDEF_INT(page_none) 48 - BTFIXUPDEF_INT(page_copy) 49 - BTFIXUPDEF_INT(page_readonly) 50 - BTFIXUPDEF_INT(page_kernel) 51 - 52 - #define PMD_SHIFT SUN4C_PMD_SHIFT 53 - #define PMD_SIZE (1UL << PMD_SHIFT) 54 - #define PMD_MASK (~(PMD_SIZE-1)) 55 - #define PMD_ALIGN(__addr) (((__addr) + ~PMD_MASK) & PMD_MASK) 56 - #define PGDIR_SHIFT BTFIXUP_SIMM13(pgdir_shift) 57 - #define PGDIR_SIZE BTFIXUP_SETHI(pgdir_size) 58 - #define PGDIR_MASK BTFIXUP_SETHI(pgdir_mask) 59 - #define PTRS_PER_PTE 1024 60 - #define PTRS_PER_PMD BTFIXUP_SIMM13(ptrs_per_pmd) 61 - #define PTRS_PER_PGD BTFIXUP_SIMM13(ptrs_per_pgd) 62 - #define USER_PTRS_PER_PGD BTFIXUP_SIMM13(user_ptrs_per_pgd) 63 - #define FIRST_USER_ADDRESS 0 64 - #define PTE_SIZE (PTRS_PER_PTE*4) 65 - 66 - #define PAGE_NONE __pgprot(BTFIXUP_INT(page_none)) 67 - extern pgprot_t PAGE_SHARED; 68 - #define PAGE_COPY __pgprot(BTFIXUP_INT(page_copy)) 69 - #define PAGE_READONLY __pgprot(BTFIXUP_INT(page_readonly)) 70 - 71 - extern unsigned long page_kernel; 72 - 73 - #ifdef MODULE 74 - #define PAGE_KERNEL page_kernel 75 - #else 76 - #define PAGE_KERNEL __pgprot(BTFIXUP_INT(page_kernel)) 77 - #endif 78 - 79 - /* Top-level page directory */ 80 - extern pgd_t swapper_pg_dir[1024]; 81 - 82 - extern void paging_init(void); 83 - 84 - /* Page table for 0-4MB for everybody, on the Sparc this 85 - * holds the same as on the i386. 86 - */ 87 - extern pte_t pg0[1024]; 88 - extern pte_t pg1[1024]; 89 - extern pte_t pg2[1024]; 90 - extern pte_t pg3[1024]; 91 - 92 - extern unsigned long ptr_in_current_pgd; 93 - 94 - /* Here is a trick, since mmap.c need the initializer elements for 95 - * protection_map[] to be constant at compile time, I set the following 96 - * to all zeros. I set it to the real values after I link in the 97 - * appropriate MMU page table routines at boot time. 98 - */ 99 - #define __P000 __pgprot(0) 100 - #define __P001 __pgprot(0) 101 - #define __P010 __pgprot(0) 102 - #define __P011 __pgprot(0) 103 - #define __P100 __pgprot(0) 104 - #define __P101 __pgprot(0) 105 - #define __P110 __pgprot(0) 106 - #define __P111 __pgprot(0) 107 - 108 - #define __S000 __pgprot(0) 109 - #define __S001 __pgprot(0) 110 - #define __S010 __pgprot(0) 111 - #define __S011 __pgprot(0) 112 - #define __S100 __pgprot(0) 113 - #define __S101 __pgprot(0) 114 - #define __S110 __pgprot(0) 115 - #define __S111 __pgprot(0) 116 - 117 - extern int num_contexts; 118 - 119 - /* First physical page can be anywhere, the following is needed so that 120 - * va-->pa and vice versa conversions work properly without performance 121 - * hit for all __pa()/__va() operations. 122 - */ 123 - extern unsigned long phys_base; 124 - extern unsigned long pfn_base; 125 - 126 - /* 127 - * BAD_PAGETABLE is used when we need a bogus page-table, while 128 - * BAD_PAGE is used for a bogus page. 129 - * 130 - * ZERO_PAGE is a global shared page that is always zero: used 131 - * for zero-mapped memory areas etc.. 132 - */ 133 - extern pte_t * __bad_pagetable(void); 134 - extern pte_t __bad_page(void); 135 - extern unsigned long empty_zero_page; 136 - 137 - #define BAD_PAGETABLE __bad_pagetable() 138 - #define BAD_PAGE __bad_page() 139 - #define ZERO_PAGE(vaddr) (virt_to_page(&empty_zero_page)) 140 - 141 - /* 142 - */ 143 - BTFIXUPDEF_CALL_CONST(struct page *, pmd_page, pmd_t) 144 - BTFIXUPDEF_CALL_CONST(unsigned long, pgd_page_vaddr, pgd_t) 145 - 146 - #define pmd_page(pmd) BTFIXUP_CALL(pmd_page)(pmd) 147 - #define pgd_page_vaddr(pgd) BTFIXUP_CALL(pgd_page_vaddr)(pgd) 148 - 149 - BTFIXUPDEF_SETHI(none_mask) 150 - BTFIXUPDEF_CALL_CONST(int, pte_present, pte_t) 151 - BTFIXUPDEF_CALL(void, pte_clear, pte_t *) 152 - 153 - static inline int pte_none(pte_t pte) 154 - { 155 - return !(pte_val(pte) & ~BTFIXUP_SETHI(none_mask)); 156 - } 157 - 158 - #define pte_present(pte) BTFIXUP_CALL(pte_present)(pte) 159 - #define pte_clear(mm,addr,pte) BTFIXUP_CALL(pte_clear)(pte) 160 - 161 - BTFIXUPDEF_CALL_CONST(int, pmd_bad, pmd_t) 162 - BTFIXUPDEF_CALL_CONST(int, pmd_present, pmd_t) 163 - BTFIXUPDEF_CALL(void, pmd_clear, pmd_t *) 164 - 165 - static inline int pmd_none(pmd_t pmd) 166 - { 167 - return !(pmd_val(pmd) & ~BTFIXUP_SETHI(none_mask)); 168 - } 169 - 170 - #define pmd_bad(pmd) BTFIXUP_CALL(pmd_bad)(pmd) 171 - #define pmd_present(pmd) BTFIXUP_CALL(pmd_present)(pmd) 172 - #define pmd_clear(pmd) BTFIXUP_CALL(pmd_clear)(pmd) 173 - 174 - BTFIXUPDEF_CALL_CONST(int, pgd_none, pgd_t) 175 - BTFIXUPDEF_CALL_CONST(int, pgd_bad, pgd_t) 176 - BTFIXUPDEF_CALL_CONST(int, pgd_present, pgd_t) 177 - BTFIXUPDEF_CALL(void, pgd_clear, pgd_t *) 178 - 179 - #define pgd_none(pgd) BTFIXUP_CALL(pgd_none)(pgd) 180 - #define pgd_bad(pgd) BTFIXUP_CALL(pgd_bad)(pgd) 181 - #define pgd_present(pgd) BTFIXUP_CALL(pgd_present)(pgd) 182 - #define pgd_clear(pgd) BTFIXUP_CALL(pgd_clear)(pgd) 183 - 184 - /* 185 - * The following only work if pte_present() is true. 186 - * Undefined behaviour if not.. 187 - */ 188 - BTFIXUPDEF_HALF(pte_writei) 189 - BTFIXUPDEF_HALF(pte_dirtyi) 190 - BTFIXUPDEF_HALF(pte_youngi) 191 - 192 - static int pte_write(pte_t pte) __attribute_const__; 193 - static inline int pte_write(pte_t pte) 194 - { 195 - return pte_val(pte) & BTFIXUP_HALF(pte_writei); 196 - } 197 - 198 - static int pte_dirty(pte_t pte) __attribute_const__; 199 - static inline int pte_dirty(pte_t pte) 200 - { 201 - return pte_val(pte) & BTFIXUP_HALF(pte_dirtyi); 202 - } 203 - 204 - static int pte_young(pte_t pte) __attribute_const__; 205 - static inline int pte_young(pte_t pte) 206 - { 207 - return pte_val(pte) & BTFIXUP_HALF(pte_youngi); 208 - } 209 - 210 - /* 211 - * The following only work if pte_present() is not true. 212 - */ 213 - BTFIXUPDEF_HALF(pte_filei) 214 - 215 - static int pte_file(pte_t pte) __attribute_const__; 216 - static inline int pte_file(pte_t pte) 217 - { 218 - return pte_val(pte) & BTFIXUP_HALF(pte_filei); 219 - } 220 - 221 - static inline int pte_special(pte_t pte) 222 - { 223 - return 0; 224 - } 225 - 226 - /* 227 - */ 228 - BTFIXUPDEF_HALF(pte_wrprotecti) 229 - BTFIXUPDEF_HALF(pte_mkcleani) 230 - BTFIXUPDEF_HALF(pte_mkoldi) 231 - 232 - static pte_t pte_wrprotect(pte_t pte) __attribute_const__; 233 - static inline pte_t pte_wrprotect(pte_t pte) 234 - { 235 - return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_wrprotecti)); 236 - } 237 - 238 - static pte_t pte_mkclean(pte_t pte) __attribute_const__; 239 - static inline pte_t pte_mkclean(pte_t pte) 240 - { 241 - return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_mkcleani)); 242 - } 243 - 244 - static pte_t pte_mkold(pte_t pte) __attribute_const__; 245 - static inline pte_t pte_mkold(pte_t pte) 246 - { 247 - return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_mkoldi)); 248 - } 249 - 250 - BTFIXUPDEF_CALL_CONST(pte_t, pte_mkwrite, pte_t) 251 - BTFIXUPDEF_CALL_CONST(pte_t, pte_mkdirty, pte_t) 252 - BTFIXUPDEF_CALL_CONST(pte_t, pte_mkyoung, pte_t) 253 - 254 - #define pte_mkwrite(pte) BTFIXUP_CALL(pte_mkwrite)(pte) 255 - #define pte_mkdirty(pte) BTFIXUP_CALL(pte_mkdirty)(pte) 256 - #define pte_mkyoung(pte) BTFIXUP_CALL(pte_mkyoung)(pte) 257 - 258 - #define pte_mkspecial(pte) (pte) 259 - 260 - #define pfn_pte(pfn, prot) mk_pte(pfn_to_page(pfn), prot) 261 - 262 - BTFIXUPDEF_CALL(unsigned long, pte_pfn, pte_t) 263 - #define pte_pfn(pte) BTFIXUP_CALL(pte_pfn)(pte) 264 - #define pte_page(pte) pfn_to_page(pte_pfn(pte)) 265 - 266 - /* 267 - * Conversion functions: convert a page and protection to a page entry, 268 - * and a page entry and page directory to the page they refer to. 269 - */ 270 - BTFIXUPDEF_CALL_CONST(pte_t, mk_pte, struct page *, pgprot_t) 271 - 272 - BTFIXUPDEF_CALL_CONST(pte_t, mk_pte_phys, unsigned long, pgprot_t) 273 - BTFIXUPDEF_CALL_CONST(pte_t, mk_pte_io, unsigned long, pgprot_t, int) 274 - BTFIXUPDEF_CALL_CONST(pgprot_t, pgprot_noncached, pgprot_t) 275 - 276 - #define mk_pte(page,pgprot) BTFIXUP_CALL(mk_pte)(page,pgprot) 277 - #define mk_pte_phys(page,pgprot) BTFIXUP_CALL(mk_pte_phys)(page,pgprot) 278 - #define mk_pte_io(page,pgprot,space) BTFIXUP_CALL(mk_pte_io)(page,pgprot,space) 279 - 280 - #define pgprot_noncached(pgprot) BTFIXUP_CALL(pgprot_noncached)(pgprot) 281 - 282 - BTFIXUPDEF_INT(pte_modify_mask) 283 - 284 - static pte_t pte_modify(pte_t pte, pgprot_t newprot) __attribute_const__; 285 - static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 286 - { 287 - return __pte((pte_val(pte) & BTFIXUP_INT(pte_modify_mask)) | 288 - pgprot_val(newprot)); 289 - } 290 - 291 - #define pgd_index(address) ((address) >> PGDIR_SHIFT) 292 - 293 - /* to find an entry in a page-table-directory */ 294 - #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) 295 - 296 - /* to find an entry in a kernel page-table-directory */ 297 - #define pgd_offset_k(address) pgd_offset(&init_mm, address) 298 - 299 - /* Find an entry in the second-level page table.. */ 300 - BTFIXUPDEF_CALL(pmd_t *, pmd_offset, pgd_t *, unsigned long) 301 - #define pmd_offset(dir,addr) BTFIXUP_CALL(pmd_offset)(dir,addr) 302 - 303 - /* Find an entry in the third-level page table.. */ 304 - BTFIXUPDEF_CALL(pte_t *, pte_offset_kernel, pmd_t *, unsigned long) 305 - #define pte_offset_kernel(dir,addr) BTFIXUP_CALL(pte_offset_kernel)(dir,addr) 306 - 307 - /* 308 - * This shortcut works on sun4m (and sun4d) because the nocache area is static, 309 - * and sun4c is guaranteed to have no highmem anyway. 310 - */ 311 - #define pte_offset_map(d, a) pte_offset_kernel(d,a) 312 - #define pte_offset_map_nested(d, a) pte_offset_kernel(d,a) 313 - 314 - #define pte_unmap(pte) do{}while(0) 315 - #define pte_unmap_nested(pte) do{}while(0) 316 - 317 - /* Certain architectures need to do special things when pte's 318 - * within a page table are directly modified. Thus, the following 319 - * hook is made available. 320 - */ 321 - 322 - BTFIXUPDEF_CALL(void, set_pte, pte_t *, pte_t) 323 - 324 - #define set_pte(ptep,pteval) BTFIXUP_CALL(set_pte)(ptep,pteval) 325 - #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) 326 - 327 - struct seq_file; 328 - BTFIXUPDEF_CALL(void, mmu_info, struct seq_file *) 329 - 330 - #define mmu_info(p) BTFIXUP_CALL(mmu_info)(p) 331 - 332 - /* Fault handler stuff... */ 333 - #define FAULT_CODE_PROT 0x1 334 - #define FAULT_CODE_WRITE 0x2 335 - #define FAULT_CODE_USER 0x4 336 - 337 - BTFIXUPDEF_CALL(void, update_mmu_cache, struct vm_area_struct *, unsigned long, pte_t) 338 - 339 - #define update_mmu_cache(vma,addr,pte) BTFIXUP_CALL(update_mmu_cache)(vma,addr,pte) 340 - 341 - BTFIXUPDEF_CALL(void, sparc_mapiorange, unsigned int, unsigned long, 342 - unsigned long, unsigned int) 343 - BTFIXUPDEF_CALL(void, sparc_unmapiorange, unsigned long, unsigned int) 344 - #define sparc_mapiorange(bus,pa,va,len) BTFIXUP_CALL(sparc_mapiorange)(bus,pa,va,len) 345 - #define sparc_unmapiorange(va,len) BTFIXUP_CALL(sparc_unmapiorange)(va,len) 346 - 347 - extern int invalid_segment; 348 - 349 - /* Encode and de-code a swap entry */ 350 - BTFIXUPDEF_CALL(unsigned long, __swp_type, swp_entry_t) 351 - BTFIXUPDEF_CALL(unsigned long, __swp_offset, swp_entry_t) 352 - BTFIXUPDEF_CALL(swp_entry_t, __swp_entry, unsigned long, unsigned long) 353 - 354 - #define __swp_type(__x) BTFIXUP_CALL(__swp_type)(__x) 355 - #define __swp_offset(__x) BTFIXUP_CALL(__swp_offset)(__x) 356 - #define __swp_entry(__type,__off) BTFIXUP_CALL(__swp_entry)(__type,__off) 357 - 358 - #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) 359 - #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) 360 - 361 - /* file-offset-in-pte helpers */ 362 - BTFIXUPDEF_CALL(unsigned long, pte_to_pgoff, pte_t pte); 363 - BTFIXUPDEF_CALL(pte_t, pgoff_to_pte, unsigned long pgoff); 364 - 365 - #define pte_to_pgoff(pte) BTFIXUP_CALL(pte_to_pgoff)(pte) 366 - #define pgoff_to_pte(off) BTFIXUP_CALL(pgoff_to_pte)(off) 367 - 368 - /* 369 - * This is made a constant because mm/fremap.c required a constant. 370 - * Note that layout of these bits is different between sun4c.c and srmmu.c. 371 - */ 372 - #define PTE_FILE_MAX_BITS 24 373 - 374 - /* 375 - */ 376 - struct ctx_list { 377 - struct ctx_list *next; 378 - struct ctx_list *prev; 379 - unsigned int ctx_number; 380 - struct mm_struct *ctx_mm; 381 - }; 382 - 383 - extern struct ctx_list *ctx_list_pool; /* Dynamically allocated */ 384 - extern struct ctx_list ctx_free; /* Head of free list */ 385 - extern struct ctx_list ctx_used; /* Head of used contexts list */ 386 - 387 - #define NO_CONTEXT -1 388 - 389 - static inline void remove_from_ctx_list(struct ctx_list *entry) 390 - { 391 - entry->next->prev = entry->prev; 392 - entry->prev->next = entry->next; 393 - } 394 - 395 - static inline void add_to_ctx_list(struct ctx_list *head, struct ctx_list *entry) 396 - { 397 - entry->next = head; 398 - (entry->prev = head->prev)->next = entry; 399 - head->prev = entry; 400 - } 401 - #define add_to_free_ctxlist(entry) add_to_ctx_list(&ctx_free, entry) 402 - #define add_to_used_ctxlist(entry) add_to_ctx_list(&ctx_used, entry) 403 - 404 - static inline unsigned long 405 - __get_phys (unsigned long addr) 406 - { 407 - switch (sparc_cpu_model){ 408 - case sun4: 409 - case sun4c: 410 - return sun4c_get_pte (addr) << PAGE_SHIFT; 411 - case sun4m: 412 - case sun4d: 413 - return ((srmmu_get_pte (addr) & 0xffffff00) << 4); 414 - default: 415 - return 0; 416 - } 417 - } 418 - 419 - static inline int 420 - __get_iospace (unsigned long addr) 421 - { 422 - switch (sparc_cpu_model){ 423 - case sun4: 424 - case sun4c: 425 - return -1; /* Don't check iospace on sun4c */ 426 - case sun4m: 427 - case sun4d: 428 - return (srmmu_get_pte (addr) >> 28); 429 - default: 430 - return -1; 431 - } 432 - } 433 - 434 - extern unsigned long *sparc_valid_addr_bitmap; 435 - 436 - /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ 437 - #define kern_addr_valid(addr) \ 438 - (test_bit(__pa((unsigned long)(addr))>>20, sparc_valid_addr_bitmap)) 439 - 440 - extern int io_remap_pfn_range(struct vm_area_struct *vma, 441 - unsigned long from, unsigned long pfn, 442 - unsigned long size, pgprot_t prot); 443 - 444 - /* 445 - * For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in 446 - * its high 4 bits. These macros/functions put it there or get it from there. 447 - */ 448 - #define MK_IOSPACE_PFN(space, pfn) (pfn | (space << (BITS_PER_LONG - 4))) 449 - #define GET_IOSPACE(pfn) (pfn >> (BITS_PER_LONG - 4)) 450 - #define GET_PFN(pfn) (pfn & 0x0fffffffUL) 451 - 452 - #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS 453 - #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ 454 - ({ \ 455 - int __changed = !pte_same(*(__ptep), __entry); \ 456 - if (__changed) { \ 457 - set_pte_at((__vma)->vm_mm, (__address), __ptep, __entry); \ 458 - flush_tlb_page(__vma, __address); \ 459 - } \ 460 - (sparc_cpu_model == sun4c) || __changed; \ 461 - }) 462 - 463 - #include <asm-generic/pgtable.h> 464 - 465 - #endif /* !(__ASSEMBLY__) */ 466 - 467 - #define VMALLOC_START 0xfe600000 468 - /* XXX Alter this when I get around to fixing sun4c - Anton */ 469 - #define VMALLOC_END 0xffc00000 470 - 471 - 472 - /* We provide our own get_unmapped_area to cope with VA holes for userland */ 473 - #define HAVE_ARCH_UNMAPPED_AREA 474 - 475 - /* 476 - * No page table caches to initialise 477 - */ 478 - #define pgtable_cache_init() do { } while (0) 479 - 480 - #endif /* !(_SPARC_PGTABLE_H) */
include/asm-sparc/pgtable_64.h arch/sparc/include/asm/pgtable_64.h
include/asm-sparc/pgtsrmmu.h arch/sparc/include/asm/pgtsrmmu.h
include/asm-sparc/pgtsun4.h arch/sparc/include/asm/pgtsun4.h
include/asm-sparc/pgtsun4c.h arch/sparc/include/asm/pgtsun4c.h
include/asm-sparc/pil.h arch/sparc/include/asm/pil.h
include/asm-sparc/poll.h arch/sparc/include/asm/poll.h
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include/asm-sparc/posix_types.h
··· 1 - #ifndef ___ASM_SPARC_POSIX_TYPES_H 2 - #define ___ASM_SPARC_POSIX_TYPES_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/posix_types_64.h> 5 - #else 6 - #include <asm-sparc/posix_types_32.h> 7 - #endif 8 - #endif
include/asm-sparc/posix_types_32.h arch/sparc/include/asm/posix_types_32.h
include/asm-sparc/posix_types_64.h arch/sparc/include/asm/posix_types_64.h
-8
include/asm-sparc/processor.h
··· 1 - #ifndef ___ASM_SPARC_PROCESSOR_H 2 - #define ___ASM_SPARC_PROCESSOR_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/processor_64.h> 5 - #else 6 - #include <asm-sparc/processor_32.h> 7 - #endif 8 - #endif
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include/asm-sparc/processor_32.h
··· 1 - /* include/asm-sparc/processor.h 2 - * 3 - * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu) 4 - */ 5 - 6 - #ifndef __ASM_SPARC_PROCESSOR_H 7 - #define __ASM_SPARC_PROCESSOR_H 8 - 9 - /* 10 - * Sparc32 implementation of macro that returns current 11 - * instruction pointer ("program counter"). 12 - */ 13 - #define current_text_addr() ({ void *pc; __asm__("sethi %%hi(1f), %0; or %0, %%lo(1f), %0;\n1:" : "=r" (pc)); pc; }) 14 - 15 - #include <asm/psr.h> 16 - #include <asm/ptrace.h> 17 - #include <asm/head.h> 18 - #include <asm/signal.h> 19 - #include <asm/btfixup.h> 20 - #include <asm/page.h> 21 - 22 - /* 23 - * The sparc has no problems with write protection 24 - */ 25 - #define wp_works_ok 1 26 - #define wp_works_ok__is_a_macro /* for versions in ksyms.c */ 27 - 28 - /* Whee, this is STACK_TOP + PAGE_SIZE and the lowest kernel address too... 29 - * That one page is used to protect kernel from intruders, so that 30 - * we can make our access_ok test faster 31 - */ 32 - #define TASK_SIZE PAGE_OFFSET 33 - #ifdef __KERNEL__ 34 - #define STACK_TOP (PAGE_OFFSET - PAGE_SIZE) 35 - #define STACK_TOP_MAX STACK_TOP 36 - #endif /* __KERNEL__ */ 37 - 38 - struct task_struct; 39 - 40 - #ifdef __KERNEL__ 41 - struct fpq { 42 - unsigned long *insn_addr; 43 - unsigned long insn; 44 - }; 45 - #endif 46 - 47 - typedef struct { 48 - int seg; 49 - } mm_segment_t; 50 - 51 - /* The Sparc processor specific thread struct. */ 52 - struct thread_struct { 53 - struct pt_regs *kregs; 54 - unsigned int _pad1; 55 - 56 - /* Special child fork kpsr/kwim values. */ 57 - unsigned long fork_kpsr __attribute__ ((aligned (8))); 58 - unsigned long fork_kwim; 59 - 60 - /* Floating point regs */ 61 - unsigned long float_regs[32] __attribute__ ((aligned (8))); 62 - unsigned long fsr; 63 - unsigned long fpqdepth; 64 - struct fpq fpqueue[16]; 65 - unsigned long flags; 66 - mm_segment_t current_ds; 67 - }; 68 - 69 - #define SPARC_FLAG_KTHREAD 0x1 /* task is a kernel thread */ 70 - #define SPARC_FLAG_UNALIGNED 0x2 /* is allowed to do unaligned accesses */ 71 - 72 - #define INIT_THREAD { \ 73 - .flags = SPARC_FLAG_KTHREAD, \ 74 - .current_ds = KERNEL_DS, \ 75 - } 76 - 77 - /* Return saved PC of a blocked thread. */ 78 - extern unsigned long thread_saved_pc(struct task_struct *t); 79 - 80 - /* Do necessary setup to start up a newly executed thread. */ 81 - static inline void start_thread(struct pt_regs * regs, unsigned long pc, 82 - unsigned long sp) 83 - { 84 - register unsigned long zero asm("g1"); 85 - 86 - regs->psr = (regs->psr & (PSR_CWP)) | PSR_S; 87 - regs->pc = ((pc & (~3)) - 4); 88 - regs->npc = regs->pc + 4; 89 - regs->y = 0; 90 - zero = 0; 91 - __asm__ __volatile__("std\t%%g0, [%0 + %3 + 0x00]\n\t" 92 - "std\t%%g0, [%0 + %3 + 0x08]\n\t" 93 - "std\t%%g0, [%0 + %3 + 0x10]\n\t" 94 - "std\t%%g0, [%0 + %3 + 0x18]\n\t" 95 - "std\t%%g0, [%0 + %3 + 0x20]\n\t" 96 - "std\t%%g0, [%0 + %3 + 0x28]\n\t" 97 - "std\t%%g0, [%0 + %3 + 0x30]\n\t" 98 - "st\t%1, [%0 + %3 + 0x38]\n\t" 99 - "st\t%%g0, [%0 + %3 + 0x3c]" 100 - : /* no outputs */ 101 - : "r" (regs), 102 - "r" (sp - sizeof(struct reg_window)), 103 - "r" (zero), 104 - "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0])) 105 - : "memory"); 106 - } 107 - 108 - /* Free all resources held by a thread. */ 109 - #define release_thread(tsk) do { } while(0) 110 - extern pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); 111 - 112 - /* Prepare to copy thread state - unlazy all lazy status */ 113 - #define prepare_to_copy(tsk) do { } while (0) 114 - 115 - extern unsigned long get_wchan(struct task_struct *); 116 - 117 - #define KSTK_EIP(tsk) ((tsk)->thread.kregs->pc) 118 - #define KSTK_ESP(tsk) ((tsk)->thread.kregs->u_regs[UREG_FP]) 119 - 120 - #ifdef __KERNEL__ 121 - 122 - extern struct task_struct *last_task_used_math; 123 - 124 - #define cpu_relax() barrier() 125 - 126 - #endif 127 - 128 - #endif /* __ASM_SPARC_PROCESSOR_H */
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include/asm-sparc/processor_64.h
··· 1 - /* 2 - * include/asm-sparc64/processor.h 3 - * 4 - * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) 5 - */ 6 - 7 - #ifndef __ASM_SPARC64_PROCESSOR_H 8 - #define __ASM_SPARC64_PROCESSOR_H 9 - 10 - /* 11 - * Sparc64 implementation of macro that returns current 12 - * instruction pointer ("program counter"). 13 - */ 14 - #define current_text_addr() ({ void *pc; __asm__("rd %%pc, %0" : "=r" (pc)); pc; }) 15 - 16 - #include <asm/asi.h> 17 - #include <asm/pstate.h> 18 - #include <asm/ptrace.h> 19 - #include <asm/page.h> 20 - 21 - /* The sparc has no problems with write protection */ 22 - #define wp_works_ok 1 23 - #define wp_works_ok__is_a_macro /* for versions in ksyms.c */ 24 - 25 - /* 26 - * User lives in his very own context, and cannot reference us. Note 27 - * that TASK_SIZE is a misnomer, it really gives maximum user virtual 28 - * address that the kernel will allocate out. 29 - * 30 - * XXX No longer using virtual page tables, kill this upper limit... 31 - */ 32 - #define VA_BITS 44 33 - #ifndef __ASSEMBLY__ 34 - #define VPTE_SIZE (1UL << (VA_BITS - PAGE_SHIFT + 3)) 35 - #else 36 - #define VPTE_SIZE (1 << (VA_BITS - PAGE_SHIFT + 3)) 37 - #endif 38 - 39 - #define TASK_SIZE ((unsigned long)-VPTE_SIZE) 40 - #define TASK_SIZE_OF(tsk) \ 41 - (test_tsk_thread_flag(tsk,TIF_32BIT) ? \ 42 - (1UL << 32UL) : TASK_SIZE) 43 - #ifdef __KERNEL__ 44 - 45 - #define STACK_TOP32 ((1UL << 32UL) - PAGE_SIZE) 46 - #define STACK_TOP64 (0x0000080000000000UL - (1UL << 32UL)) 47 - 48 - #define STACK_TOP (test_thread_flag(TIF_32BIT) ? \ 49 - STACK_TOP32 : STACK_TOP64) 50 - 51 - #define STACK_TOP_MAX STACK_TOP64 52 - 53 - #endif 54 - 55 - #ifndef __ASSEMBLY__ 56 - 57 - typedef struct { 58 - unsigned char seg; 59 - } mm_segment_t; 60 - 61 - /* The Sparc processor specific thread struct. */ 62 - /* XXX This should die, everything can go into thread_info now. */ 63 - struct thread_struct { 64 - #ifdef CONFIG_DEBUG_SPINLOCK 65 - /* How many spinlocks held by this thread. 66 - * Used with spin lock debugging to catch tasks 67 - * sleeping illegally with locks held. 68 - */ 69 - int smp_lock_count; 70 - unsigned int smp_lock_pc; 71 - #else 72 - int dummy; /* f'in gcc bug... */ 73 - #endif 74 - }; 75 - 76 - #endif /* !(__ASSEMBLY__) */ 77 - 78 - #ifndef CONFIG_DEBUG_SPINLOCK 79 - #define INIT_THREAD { \ 80 - 0, \ 81 - } 82 - #else /* CONFIG_DEBUG_SPINLOCK */ 83 - #define INIT_THREAD { \ 84 - /* smp_lock_count, smp_lock_pc, */ \ 85 - 0, 0, \ 86 - } 87 - #endif /* !(CONFIG_DEBUG_SPINLOCK) */ 88 - 89 - #ifndef __ASSEMBLY__ 90 - 91 - #include <linux/types.h> 92 - 93 - /* Return saved PC of a blocked thread. */ 94 - struct task_struct; 95 - extern unsigned long thread_saved_pc(struct task_struct *); 96 - 97 - /* On Uniprocessor, even in RMO processes see TSO semantics */ 98 - #ifdef CONFIG_SMP 99 - #define TSTATE_INITIAL_MM TSTATE_TSO 100 - #else 101 - #define TSTATE_INITIAL_MM TSTATE_RMO 102 - #endif 103 - 104 - /* Do necessary setup to start up a newly executed thread. */ 105 - #define start_thread(regs, pc, sp) \ 106 - do { \ 107 - unsigned long __asi = ASI_PNF; \ 108 - regs->tstate = (regs->tstate & (TSTATE_CWP)) | (TSTATE_INITIAL_MM|TSTATE_IE) | (__asi << 24UL); \ 109 - regs->tpc = ((pc & (~3)) - 4); \ 110 - regs->tnpc = regs->tpc + 4; \ 111 - regs->y = 0; \ 112 - set_thread_wstate(1 << 3); \ 113 - if (current_thread_info()->utraps) { \ 114 - if (*(current_thread_info()->utraps) < 2) \ 115 - kfree(current_thread_info()->utraps); \ 116 - else \ 117 - (*(current_thread_info()->utraps))--; \ 118 - current_thread_info()->utraps = NULL; \ 119 - } \ 120 - __asm__ __volatile__( \ 121 - "stx %%g0, [%0 + %2 + 0x00]\n\t" \ 122 - "stx %%g0, [%0 + %2 + 0x08]\n\t" \ 123 - "stx %%g0, [%0 + %2 + 0x10]\n\t" \ 124 - "stx %%g0, [%0 + %2 + 0x18]\n\t" \ 125 - "stx %%g0, [%0 + %2 + 0x20]\n\t" \ 126 - "stx %%g0, [%0 + %2 + 0x28]\n\t" \ 127 - "stx %%g0, [%0 + %2 + 0x30]\n\t" \ 128 - "stx %%g0, [%0 + %2 + 0x38]\n\t" \ 129 - "stx %%g0, [%0 + %2 + 0x40]\n\t" \ 130 - "stx %%g0, [%0 + %2 + 0x48]\n\t" \ 131 - "stx %%g0, [%0 + %2 + 0x50]\n\t" \ 132 - "stx %%g0, [%0 + %2 + 0x58]\n\t" \ 133 - "stx %%g0, [%0 + %2 + 0x60]\n\t" \ 134 - "stx %%g0, [%0 + %2 + 0x68]\n\t" \ 135 - "stx %1, [%0 + %2 + 0x70]\n\t" \ 136 - "stx %%g0, [%0 + %2 + 0x78]\n\t" \ 137 - "wrpr %%g0, (1 << 3), %%wstate\n\t" \ 138 - : \ 139 - : "r" (regs), "r" (sp - sizeof(struct reg_window) - STACK_BIAS), \ 140 - "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \ 141 - } while (0) 142 - 143 - #define start_thread32(regs, pc, sp) \ 144 - do { \ 145 - unsigned long __asi = ASI_PNF; \ 146 - pc &= 0x00000000ffffffffUL; \ 147 - sp &= 0x00000000ffffffffUL; \ 148 - regs->tstate = (regs->tstate & (TSTATE_CWP))|(TSTATE_INITIAL_MM|TSTATE_IE|TSTATE_AM) | (__asi << 24UL); \ 149 - regs->tpc = ((pc & (~3)) - 4); \ 150 - regs->tnpc = regs->tpc + 4; \ 151 - regs->y = 0; \ 152 - set_thread_wstate(2 << 3); \ 153 - if (current_thread_info()->utraps) { \ 154 - if (*(current_thread_info()->utraps) < 2) \ 155 - kfree(current_thread_info()->utraps); \ 156 - else \ 157 - (*(current_thread_info()->utraps))--; \ 158 - current_thread_info()->utraps = NULL; \ 159 - } \ 160 - __asm__ __volatile__( \ 161 - "stx %%g0, [%0 + %2 + 0x00]\n\t" \ 162 - "stx %%g0, [%0 + %2 + 0x08]\n\t" \ 163 - "stx %%g0, [%0 + %2 + 0x10]\n\t" \ 164 - "stx %%g0, [%0 + %2 + 0x18]\n\t" \ 165 - "stx %%g0, [%0 + %2 + 0x20]\n\t" \ 166 - "stx %%g0, [%0 + %2 + 0x28]\n\t" \ 167 - "stx %%g0, [%0 + %2 + 0x30]\n\t" \ 168 - "stx %%g0, [%0 + %2 + 0x38]\n\t" \ 169 - "stx %%g0, [%0 + %2 + 0x40]\n\t" \ 170 - "stx %%g0, [%0 + %2 + 0x48]\n\t" \ 171 - "stx %%g0, [%0 + %2 + 0x50]\n\t" \ 172 - "stx %%g0, [%0 + %2 + 0x58]\n\t" \ 173 - "stx %%g0, [%0 + %2 + 0x60]\n\t" \ 174 - "stx %%g0, [%0 + %2 + 0x68]\n\t" \ 175 - "stx %1, [%0 + %2 + 0x70]\n\t" \ 176 - "stx %%g0, [%0 + %2 + 0x78]\n\t" \ 177 - "wrpr %%g0, (2 << 3), %%wstate\n\t" \ 178 - : \ 179 - : "r" (regs), "r" (sp - sizeof(struct reg_window32)), \ 180 - "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \ 181 - } while (0) 182 - 183 - /* Free all resources held by a thread. */ 184 - #define release_thread(tsk) do { } while (0) 185 - 186 - /* Prepare to copy thread state - unlazy all lazy status */ 187 - #define prepare_to_copy(tsk) do { } while (0) 188 - 189 - extern pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); 190 - 191 - extern unsigned long get_wchan(struct task_struct *task); 192 - 193 - #define task_pt_regs(tsk) (task_thread_info(tsk)->kregs) 194 - #define KSTK_EIP(tsk) (task_pt_regs(tsk)->tpc) 195 - #define KSTK_ESP(tsk) (task_pt_regs(tsk)->u_regs[UREG_FP]) 196 - 197 - #define cpu_relax() barrier() 198 - 199 - /* Prefetch support. This is tuned for UltraSPARC-III and later. 200 - * UltraSPARC-I will treat these as nops, and UltraSPARC-II has 201 - * a shallower prefetch queue than later chips. 202 - */ 203 - #define ARCH_HAS_PREFETCH 204 - #define ARCH_HAS_PREFETCHW 205 - #define ARCH_HAS_SPINLOCK_PREFETCH 206 - 207 - static inline void prefetch(const void *x) 208 - { 209 - /* We do not use the read prefetch mnemonic because that 210 - * prefetches into the prefetch-cache which only is accessible 211 - * by floating point operations in UltraSPARC-III and later. 212 - * By contrast, "#one_write" prefetches into the L2 cache 213 - * in shared state. 214 - */ 215 - __asm__ __volatile__("prefetch [%0], #one_write" 216 - : /* no outputs */ 217 - : "r" (x)); 218 - } 219 - 220 - static inline void prefetchw(const void *x) 221 - { 222 - /* The most optimal prefetch to use for writes is 223 - * "#n_writes". This brings the cacheline into the 224 - * L2 cache in "owned" state. 225 - */ 226 - __asm__ __volatile__("prefetch [%0], #n_writes" 227 - : /* no outputs */ 228 - : "r" (x)); 229 - } 230 - 231 - #define spin_lock_prefetch(x) prefetchw(x) 232 - 233 - #define HAVE_ARCH_PICK_MMAP_LAYOUT 234 - 235 - #endif /* !(__ASSEMBLY__) */ 236 - 237 - #endif /* !(__ASM_SPARC64_PROCESSOR_H) */
include/asm-sparc/prom.h arch/sparc/include/asm/prom.h
include/asm-sparc/psr.h arch/sparc/include/asm/psr.h
include/asm-sparc/psrcompat.h arch/sparc/include/asm/psrcompat.h
include/asm-sparc/pstate.h arch/sparc/include/asm/pstate.h
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include/asm-sparc/ptrace.h
··· 1 - #ifndef ___ASM_SPARC_PTRACE_H 2 - #define ___ASM_SPARC_PTRACE_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/ptrace_64.h> 5 - #else 6 - #include <asm-sparc/ptrace_32.h> 7 - #endif 8 - #endif
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include/asm-sparc/ptrace_32.h
··· 1 - #ifndef _SPARC_PTRACE_H 2 - #define _SPARC_PTRACE_H 3 - 4 - #include <asm/psr.h> 5 - 6 - /* This struct defines the way the registers are stored on the 7 - * stack during a system call and basically all traps. 8 - */ 9 - 10 - #ifndef __ASSEMBLY__ 11 - 12 - #include <linux/types.h> 13 - 14 - struct pt_regs { 15 - unsigned long psr; 16 - unsigned long pc; 17 - unsigned long npc; 18 - unsigned long y; 19 - unsigned long u_regs[16]; /* globals and ins */ 20 - }; 21 - 22 - #define UREG_G0 0 23 - #define UREG_G1 1 24 - #define UREG_G2 2 25 - #define UREG_G3 3 26 - #define UREG_G4 4 27 - #define UREG_G5 5 28 - #define UREG_G6 6 29 - #define UREG_G7 7 30 - #define UREG_I0 8 31 - #define UREG_I1 9 32 - #define UREG_I2 10 33 - #define UREG_I3 11 34 - #define UREG_I4 12 35 - #define UREG_I5 13 36 - #define UREG_I6 14 37 - #define UREG_I7 15 38 - #define UREG_WIM UREG_G0 39 - #define UREG_FADDR UREG_G0 40 - #define UREG_FP UREG_I6 41 - #define UREG_RETPC UREG_I7 42 - 43 - static inline bool pt_regs_is_syscall(struct pt_regs *regs) 44 - { 45 - return (regs->psr & PSR_SYSCALL); 46 - } 47 - 48 - static inline bool pt_regs_clear_syscall(struct pt_regs *regs) 49 - { 50 - return (regs->psr &= ~PSR_SYSCALL); 51 - } 52 - 53 - /* A register window */ 54 - struct reg_window { 55 - unsigned long locals[8]; 56 - unsigned long ins[8]; 57 - }; 58 - 59 - /* A Sparc stack frame */ 60 - struct sparc_stackf { 61 - unsigned long locals[8]; 62 - unsigned long ins[6]; 63 - struct sparc_stackf *fp; 64 - unsigned long callers_pc; 65 - char *structptr; 66 - unsigned long xargs[6]; 67 - unsigned long xxargs[1]; 68 - }; 69 - 70 - #define TRACEREG_SZ sizeof(struct pt_regs) 71 - #define STACKFRAME_SZ sizeof(struct sparc_stackf) 72 - 73 - #ifdef __KERNEL__ 74 - 75 - #define user_mode(regs) (!((regs)->psr & PSR_PS)) 76 - #define instruction_pointer(regs) ((regs)->pc) 77 - unsigned long profile_pc(struct pt_regs *); 78 - extern void show_regs(struct pt_regs *); 79 - #endif 80 - 81 - #else /* __ASSEMBLY__ */ 82 - /* For assembly code. */ 83 - #define TRACEREG_SZ 0x50 84 - #define STACKFRAME_SZ 0x60 85 - #endif 86 - 87 - /* 88 - * The asm-offsets.h is a generated file, so we cannot include it. 89 - * It may be OK for glibc headers, but it's utterly pointless for C code. 90 - * The assembly code using those offsets has to include it explicitly. 91 - */ 92 - /* #include <asm/asm-offsets.h> */ 93 - 94 - /* These are for pt_regs. */ 95 - #define PT_PSR 0x0 96 - #define PT_PC 0x4 97 - #define PT_NPC 0x8 98 - #define PT_Y 0xc 99 - #define PT_G0 0x10 100 - #define PT_WIM PT_G0 101 - #define PT_G1 0x14 102 - #define PT_G2 0x18 103 - #define PT_G3 0x1c 104 - #define PT_G4 0x20 105 - #define PT_G5 0x24 106 - #define PT_G6 0x28 107 - #define PT_G7 0x2c 108 - #define PT_I0 0x30 109 - #define PT_I1 0x34 110 - #define PT_I2 0x38 111 - #define PT_I3 0x3c 112 - #define PT_I4 0x40 113 - #define PT_I5 0x44 114 - #define PT_I6 0x48 115 - #define PT_FP PT_I6 116 - #define PT_I7 0x4c 117 - 118 - /* Reg_window offsets */ 119 - #define RW_L0 0x00 120 - #define RW_L1 0x04 121 - #define RW_L2 0x08 122 - #define RW_L3 0x0c 123 - #define RW_L4 0x10 124 - #define RW_L5 0x14 125 - #define RW_L6 0x18 126 - #define RW_L7 0x1c 127 - #define RW_I0 0x20 128 - #define RW_I1 0x24 129 - #define RW_I2 0x28 130 - #define RW_I3 0x2c 131 - #define RW_I4 0x30 132 - #define RW_I5 0x34 133 - #define RW_I6 0x38 134 - #define RW_I7 0x3c 135 - 136 - /* Stack_frame offsets */ 137 - #define SF_L0 0x00 138 - #define SF_L1 0x04 139 - #define SF_L2 0x08 140 - #define SF_L3 0x0c 141 - #define SF_L4 0x10 142 - #define SF_L5 0x14 143 - #define SF_L6 0x18 144 - #define SF_L7 0x1c 145 - #define SF_I0 0x20 146 - #define SF_I1 0x24 147 - #define SF_I2 0x28 148 - #define SF_I3 0x2c 149 - #define SF_I4 0x30 150 - #define SF_I5 0x34 151 - #define SF_FP 0x38 152 - #define SF_PC 0x3c 153 - #define SF_RETP 0x40 154 - #define SF_XARG0 0x44 155 - #define SF_XARG1 0x48 156 - #define SF_XARG2 0x4c 157 - #define SF_XARG3 0x50 158 - #define SF_XARG4 0x54 159 - #define SF_XARG5 0x58 160 - #define SF_XXARG 0x5c 161 - 162 - /* Stuff for the ptrace system call */ 163 - #define PTRACE_SPARC_DETACH 11 164 - #define PTRACE_GETREGS 12 165 - #define PTRACE_SETREGS 13 166 - #define PTRACE_GETFPREGS 14 167 - #define PTRACE_SETFPREGS 15 168 - #define PTRACE_READDATA 16 169 - #define PTRACE_WRITEDATA 17 170 - #define PTRACE_READTEXT 18 171 - #define PTRACE_WRITETEXT 19 172 - #define PTRACE_GETFPAREGS 20 173 - #define PTRACE_SETFPAREGS 21 174 - 175 - #endif /* !(_SPARC_PTRACE_H) */
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include/asm-sparc/ptrace_64.h
··· 1 - #ifndef _SPARC64_PTRACE_H 2 - #define _SPARC64_PTRACE_H 3 - 4 - #include <asm/pstate.h> 5 - 6 - /* This struct defines the way the registers are stored on the 7 - * stack during a system call and basically all traps. 8 - */ 9 - 10 - /* This magic value must have the low 9 bits clear, 11 - * as that is where we encode the %tt value, see below. 12 - */ 13 - #define PT_REGS_MAGIC 0x57ac6c00 14 - 15 - #ifndef __ASSEMBLY__ 16 - 17 - #include <linux/types.h> 18 - 19 - struct pt_regs { 20 - unsigned long u_regs[16]; /* globals and ins */ 21 - unsigned long tstate; 22 - unsigned long tpc; 23 - unsigned long tnpc; 24 - unsigned int y; 25 - 26 - /* We encode a magic number, PT_REGS_MAGIC, along 27 - * with the %tt (trap type) register value at trap 28 - * entry time. The magic number allows us to identify 29 - * accurately a trap stack frame in the stack 30 - * unwinder, and the %tt value allows us to test 31 - * things like "in a system call" etc. for an arbitray 32 - * process. 33 - * 34 - * The PT_REGS_MAGIC is choosen such that it can be 35 - * loaded completely using just a sethi instruction. 36 - */ 37 - unsigned int magic; 38 - }; 39 - 40 - static inline int pt_regs_trap_type(struct pt_regs *regs) 41 - { 42 - return regs->magic & 0x1ff; 43 - } 44 - 45 - static inline bool pt_regs_is_syscall(struct pt_regs *regs) 46 - { 47 - return (regs->tstate & TSTATE_SYSCALL); 48 - } 49 - 50 - static inline bool pt_regs_clear_syscall(struct pt_regs *regs) 51 - { 52 - return (regs->tstate &= ~TSTATE_SYSCALL); 53 - } 54 - 55 - struct pt_regs32 { 56 - unsigned int psr; 57 - unsigned int pc; 58 - unsigned int npc; 59 - unsigned int y; 60 - unsigned int u_regs[16]; /* globals and ins */ 61 - }; 62 - 63 - #define UREG_G0 0 64 - #define UREG_G1 1 65 - #define UREG_G2 2 66 - #define UREG_G3 3 67 - #define UREG_G4 4 68 - #define UREG_G5 5 69 - #define UREG_G6 6 70 - #define UREG_G7 7 71 - #define UREG_I0 8 72 - #define UREG_I1 9 73 - #define UREG_I2 10 74 - #define UREG_I3 11 75 - #define UREG_I4 12 76 - #define UREG_I5 13 77 - #define UREG_I6 14 78 - #define UREG_I7 15 79 - #define UREG_FP UREG_I6 80 - #define UREG_RETPC UREG_I7 81 - 82 - /* A V9 register window */ 83 - struct reg_window { 84 - unsigned long locals[8]; 85 - unsigned long ins[8]; 86 - }; 87 - 88 - /* A 32-bit register window. */ 89 - struct reg_window32 { 90 - unsigned int locals[8]; 91 - unsigned int ins[8]; 92 - }; 93 - 94 - /* A V9 Sparc stack frame */ 95 - struct sparc_stackf { 96 - unsigned long locals[8]; 97 - unsigned long ins[6]; 98 - struct sparc_stackf *fp; 99 - unsigned long callers_pc; 100 - char *structptr; 101 - unsigned long xargs[6]; 102 - unsigned long xxargs[1]; 103 - }; 104 - 105 - /* A 32-bit Sparc stack frame */ 106 - struct sparc_stackf32 { 107 - unsigned int locals[8]; 108 - unsigned int ins[6]; 109 - unsigned int fp; 110 - unsigned int callers_pc; 111 - unsigned int structptr; 112 - unsigned int xargs[6]; 113 - unsigned int xxargs[1]; 114 - }; 115 - 116 - struct sparc_trapf { 117 - unsigned long locals[8]; 118 - unsigned long ins[8]; 119 - unsigned long _unused; 120 - struct pt_regs *regs; 121 - }; 122 - 123 - #define TRACEREG_SZ sizeof(struct pt_regs) 124 - #define STACKFRAME_SZ sizeof(struct sparc_stackf) 125 - 126 - #define TRACEREG32_SZ sizeof(struct pt_regs32) 127 - #define STACKFRAME32_SZ sizeof(struct sparc_stackf32) 128 - 129 - #ifdef __KERNEL__ 130 - 131 - struct global_reg_snapshot { 132 - unsigned long tstate; 133 - unsigned long tpc; 134 - unsigned long tnpc; 135 - unsigned long o7; 136 - unsigned long i7; 137 - struct thread_info *thread; 138 - unsigned long pad1; 139 - unsigned long pad2; 140 - }; 141 - 142 - #define __ARCH_WANT_COMPAT_SYS_PTRACE 143 - 144 - #define force_successful_syscall_return() \ 145 - do { current_thread_info()->syscall_noerror = 1; \ 146 - } while (0) 147 - #define user_mode(regs) (!((regs)->tstate & TSTATE_PRIV)) 148 - #define instruction_pointer(regs) ((regs)->tpc) 149 - #define regs_return_value(regs) ((regs)->u_regs[UREG_I0]) 150 - #ifdef CONFIG_SMP 151 - extern unsigned long profile_pc(struct pt_regs *); 152 - #else 153 - #define profile_pc(regs) instruction_pointer(regs) 154 - #endif 155 - extern void show_regs(struct pt_regs *); 156 - extern void __show_regs(struct pt_regs *); 157 - #endif 158 - 159 - #else /* __ASSEMBLY__ */ 160 - /* For assembly code. */ 161 - #define TRACEREG_SZ 0xa0 162 - #define STACKFRAME_SZ 0xc0 163 - 164 - #define TRACEREG32_SZ 0x50 165 - #define STACKFRAME32_SZ 0x60 166 - #endif 167 - 168 - #ifdef __KERNEL__ 169 - #define STACK_BIAS 2047 170 - #endif 171 - 172 - /* These are for pt_regs. */ 173 - #define PT_V9_G0 0x00 174 - #define PT_V9_G1 0x08 175 - #define PT_V9_G2 0x10 176 - #define PT_V9_G3 0x18 177 - #define PT_V9_G4 0x20 178 - #define PT_V9_G5 0x28 179 - #define PT_V9_G6 0x30 180 - #define PT_V9_G7 0x38 181 - #define PT_V9_I0 0x40 182 - #define PT_V9_I1 0x48 183 - #define PT_V9_I2 0x50 184 - #define PT_V9_I3 0x58 185 - #define PT_V9_I4 0x60 186 - #define PT_V9_I5 0x68 187 - #define PT_V9_I6 0x70 188 - #define PT_V9_FP PT_V9_I6 189 - #define PT_V9_I7 0x78 190 - #define PT_V9_TSTATE 0x80 191 - #define PT_V9_TPC 0x88 192 - #define PT_V9_TNPC 0x90 193 - #define PT_V9_Y 0x98 194 - #define PT_V9_MAGIC 0x9c 195 - #define PT_TSTATE PT_V9_TSTATE 196 - #define PT_TPC PT_V9_TPC 197 - #define PT_TNPC PT_V9_TNPC 198 - 199 - /* These for pt_regs32. */ 200 - #define PT_PSR 0x0 201 - #define PT_PC 0x4 202 - #define PT_NPC 0x8 203 - #define PT_Y 0xc 204 - #define PT_G0 0x10 205 - #define PT_WIM PT_G0 206 - #define PT_G1 0x14 207 - #define PT_G2 0x18 208 - #define PT_G3 0x1c 209 - #define PT_G4 0x20 210 - #define PT_G5 0x24 211 - #define PT_G6 0x28 212 - #define PT_G7 0x2c 213 - #define PT_I0 0x30 214 - #define PT_I1 0x34 215 - #define PT_I2 0x38 216 - #define PT_I3 0x3c 217 - #define PT_I4 0x40 218 - #define PT_I5 0x44 219 - #define PT_I6 0x48 220 - #define PT_FP PT_I6 221 - #define PT_I7 0x4c 222 - 223 - /* Reg_window offsets */ 224 - #define RW_V9_L0 0x00 225 - #define RW_V9_L1 0x08 226 - #define RW_V9_L2 0x10 227 - #define RW_V9_L3 0x18 228 - #define RW_V9_L4 0x20 229 - #define RW_V9_L5 0x28 230 - #define RW_V9_L6 0x30 231 - #define RW_V9_L7 0x38 232 - #define RW_V9_I0 0x40 233 - #define RW_V9_I1 0x48 234 - #define RW_V9_I2 0x50 235 - #define RW_V9_I3 0x58 236 - #define RW_V9_I4 0x60 237 - #define RW_V9_I5 0x68 238 - #define RW_V9_I6 0x70 239 - #define RW_V9_I7 0x78 240 - 241 - #define RW_L0 0x00 242 - #define RW_L1 0x04 243 - #define RW_L2 0x08 244 - #define RW_L3 0x0c 245 - #define RW_L4 0x10 246 - #define RW_L5 0x14 247 - #define RW_L6 0x18 248 - #define RW_L7 0x1c 249 - #define RW_I0 0x20 250 - #define RW_I1 0x24 251 - #define RW_I2 0x28 252 - #define RW_I3 0x2c 253 - #define RW_I4 0x30 254 - #define RW_I5 0x34 255 - #define RW_I6 0x38 256 - #define RW_I7 0x3c 257 - 258 - /* Stack_frame offsets */ 259 - #define SF_V9_L0 0x00 260 - #define SF_V9_L1 0x08 261 - #define SF_V9_L2 0x10 262 - #define SF_V9_L3 0x18 263 - #define SF_V9_L4 0x20 264 - #define SF_V9_L5 0x28 265 - #define SF_V9_L6 0x30 266 - #define SF_V9_L7 0x38 267 - #define SF_V9_I0 0x40 268 - #define SF_V9_I1 0x48 269 - #define SF_V9_I2 0x50 270 - #define SF_V9_I3 0x58 271 - #define SF_V9_I4 0x60 272 - #define SF_V9_I5 0x68 273 - #define SF_V9_FP 0x70 274 - #define SF_V9_PC 0x78 275 - #define SF_V9_RETP 0x80 276 - #define SF_V9_XARG0 0x88 277 - #define SF_V9_XARG1 0x90 278 - #define SF_V9_XARG2 0x98 279 - #define SF_V9_XARG3 0xa0 280 - #define SF_V9_XARG4 0xa8 281 - #define SF_V9_XARG5 0xb0 282 - #define SF_V9_XXARG 0xb8 283 - 284 - #define SF_L0 0x00 285 - #define SF_L1 0x04 286 - #define SF_L2 0x08 287 - #define SF_L3 0x0c 288 - #define SF_L4 0x10 289 - #define SF_L5 0x14 290 - #define SF_L6 0x18 291 - #define SF_L7 0x1c 292 - #define SF_I0 0x20 293 - #define SF_I1 0x24 294 - #define SF_I2 0x28 295 - #define SF_I3 0x2c 296 - #define SF_I4 0x30 297 - #define SF_I5 0x34 298 - #define SF_FP 0x38 299 - #define SF_PC 0x3c 300 - #define SF_RETP 0x40 301 - #define SF_XARG0 0x44 302 - #define SF_XARG1 0x48 303 - #define SF_XARG2 0x4c 304 - #define SF_XARG3 0x50 305 - #define SF_XARG4 0x54 306 - #define SF_XARG5 0x58 307 - #define SF_XXARG 0x5c 308 - 309 - #ifdef __KERNEL__ 310 - 311 - /* global_reg_snapshot offsets */ 312 - #define GR_SNAP_TSTATE 0x00 313 - #define GR_SNAP_TPC 0x08 314 - #define GR_SNAP_TNPC 0x10 315 - #define GR_SNAP_O7 0x18 316 - #define GR_SNAP_I7 0x20 317 - #define GR_SNAP_THREAD 0x28 318 - #define GR_SNAP_PAD1 0x30 319 - #define GR_SNAP_PAD2 0x38 320 - 321 - #endif /* __KERNEL__ */ 322 - 323 - /* Stuff for the ptrace system call */ 324 - #define PTRACE_SPARC_DETACH 11 325 - #define PTRACE_GETREGS 12 326 - #define PTRACE_SETREGS 13 327 - #define PTRACE_GETFPREGS 14 328 - #define PTRACE_SETFPREGS 15 329 - #define PTRACE_READDATA 16 330 - #define PTRACE_WRITEDATA 17 331 - #define PTRACE_READTEXT 18 332 - #define PTRACE_WRITETEXT 19 333 - #define PTRACE_GETFPAREGS 20 334 - #define PTRACE_SETFPAREGS 21 335 - 336 - /* There are for debugging 64-bit processes, either from a 32 or 64 bit 337 - * parent. Thus their complements are for debugging 32-bit processes only. 338 - */ 339 - 340 - #define PTRACE_GETREGS64 22 341 - #define PTRACE_SETREGS64 23 342 - /* PTRACE_SYSCALL is 24 */ 343 - #define PTRACE_GETFPREGS64 25 344 - #define PTRACE_SETFPREGS64 26 345 - 346 - #endif /* !(_SPARC64_PTRACE_H) */
include/asm-sparc/reboot.h arch/sparc/include/asm/reboot.h
-8
include/asm-sparc/reg.h
··· 1 - #ifndef ___ASM_SPARC_REG_H 2 - #define ___ASM_SPARC_REG_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/reg_64.h> 5 - #else 6 - #include <asm-sparc/reg_32.h> 7 - #endif 8 - #endif
-79
include/asm-sparc/reg_32.h
··· 1 - /* 2 - * linux/include/asm-sparc/reg.h 3 - * Layout of the registers as expected by gdb on the Sparc 4 - * we should replace the user.h definitions with those in 5 - * this file, we don't even use the other 6 - * -miguel 7 - * 8 - * The names of the structures, constants and aliases in this file 9 - * have the same names as the sunos ones, some programs rely on these 10 - * names (gdb for example). 11 - * 12 - */ 13 - 14 - #ifndef __SPARC_REG_H 15 - #define __SPARC_REG_H 16 - 17 - struct regs { 18 - int r_psr; 19 - #define r_ps r_psr 20 - int r_pc; 21 - int r_npc; 22 - int r_y; 23 - int r_g1; 24 - int r_g2; 25 - int r_g3; 26 - int r_g4; 27 - int r_g5; 28 - int r_g6; 29 - int r_g7; 30 - int r_o0; 31 - int r_o1; 32 - int r_o2; 33 - int r_o3; 34 - int r_o4; 35 - int r_o5; 36 - int r_o6; 37 - int r_o7; 38 - }; 39 - 40 - struct fpq { 41 - unsigned long *addr; 42 - unsigned long instr; 43 - }; 44 - 45 - struct fq { 46 - union { 47 - double whole; 48 - struct fpq fpq; 49 - } FQu; 50 - }; 51 - 52 - #define FPU_REGS_TYPE unsigned int 53 - #define FPU_FSR_TYPE unsigned 54 - 55 - struct fp_status { 56 - union { 57 - FPU_REGS_TYPE Fpu_regs[32]; 58 - double Fpu_dregs[16]; 59 - } fpu_fr; 60 - FPU_FSR_TYPE Fpu_fsr; 61 - unsigned Fpu_flags; 62 - unsigned Fpu_extra; 63 - unsigned Fpu_qcnt; 64 - struct fq Fpu_q[16]; 65 - }; 66 - 67 - #define fpu_regs f_fpstatus.fpu_fr.Fpu_regs 68 - #define fpu_dregs f_fpstatus.fpu_fr.Fpu_dregs 69 - #define fpu_fsr f_fpstatus.Fpu_fsr 70 - #define fpu_flags f_fpstatus.Fpu_flags 71 - #define fpu_extra f_fpstatus.Fpu_extra 72 - #define fpu_q f_fpstatus.Fpu_q 73 - #define fpu_qcnt f_fpstatus.Fpu_qcnt 74 - 75 - struct fpu { 76 - struct fp_status f_fpstatus; 77 - }; 78 - 79 - #endif /* __SPARC_REG_H */
-56
include/asm-sparc/reg_64.h
··· 1 - /* 2 - * linux/asm-sparc64/reg.h 3 - * Layout of the registers as expected by gdb on the Sparc 4 - * we should replace the user.h definitions with those in 5 - * this file, we don't even use the other 6 - * -miguel 7 - * 8 - * The names of the structures, constants and aliases in this file 9 - * have the same names as the sunos ones, some programs rely on these 10 - * names (gdb for example). 11 - * 12 - */ 13 - 14 - #ifndef __SPARC64_REG_H 15 - #define __SPARC64_REG_H 16 - 17 - struct regs { 18 - unsigned long r_g1; 19 - unsigned long r_g2; 20 - unsigned long r_g3; 21 - unsigned long r_g4; 22 - unsigned long r_g5; 23 - unsigned long r_g6; 24 - unsigned long r_g7; 25 - unsigned long r_o0; 26 - unsigned long r_o1; 27 - unsigned long r_o2; 28 - unsigned long r_o3; 29 - unsigned long r_o4; 30 - unsigned long r_o5; 31 - unsigned long r_o6; 32 - unsigned long r_o7; 33 - unsigned long __pad; 34 - unsigned long r_tstate; 35 - unsigned long r_tpc; 36 - unsigned long r_tnpc; 37 - unsigned int r_y; 38 - unsigned int r_fprs; 39 - }; 40 - 41 - #define FPU_REGS_TYPE unsigned int 42 - #define FPU_FSR_TYPE unsigned long 43 - 44 - struct fp_status { 45 - unsigned long fpu_fr[32]; 46 - unsigned long Fpu_fsr; 47 - }; 48 - 49 - struct fpu { 50 - struct fp_status f_fpstatus; 51 - }; 52 - 53 - #define fpu_regs f_fpstatus.fpu_fr 54 - #define fpu_fsr f_fpstatus.Fpu_fsr 55 - 56 - #endif /* __SPARC64_REG_H */
include/asm-sparc/resource.h arch/sparc/include/asm/resource.h
include/asm-sparc/ross.h arch/sparc/include/asm/ross.h
include/asm-sparc/rtc.h arch/sparc/include/asm/rtc.h
include/asm-sparc/rwsem-const.h arch/sparc/include/asm/rwsem-const.h
include/asm-sparc/rwsem.h arch/sparc/include/asm/rwsem.h
include/asm-sparc/sbi.h arch/sparc/include/asm/sbi.h
-8
include/asm-sparc/sbus.h
··· 1 - #ifndef ___ASM_SPARC_SBUS_H 2 - #define ___ASM_SPARC_SBUS_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/sbus_64.h> 5 - #else 6 - #include <asm-sparc/sbus_32.h> 7 - #endif 8 - #endif
include/asm-sparc/sbus_32.h arch/sparc/include/asm/sbus_32.h
include/asm-sparc/sbus_64.h arch/sparc/include/asm/sbus_64.h
-8
include/asm-sparc/scatterlist.h
··· 1 - #ifndef ___ASM_SPARC_SCATTERLIST_H 2 - #define ___ASM_SPARC_SCATTERLIST_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/scatterlist_64.h> 5 - #else 6 - #include <asm-sparc/scatterlist_32.h> 7 - #endif 8 - #endif
include/asm-sparc/scatterlist_32.h arch/sparc/include/asm/scatterlist_32.h
include/asm-sparc/scatterlist_64.h arch/sparc/include/asm/scatterlist_64.h
include/asm-sparc/scratchpad.h arch/sparc/include/asm/scratchpad.h
include/asm-sparc/seccomp.h arch/sparc/include/asm/seccomp.h
-8
include/asm-sparc/sections.h
··· 1 - #ifndef ___ASM_SPARC_SECTIONS_H 2 - #define ___ASM_SPARC_SECTIONS_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/sections_64.h> 5 - #else 6 - #include <asm-sparc/sections_32.h> 7 - #endif 8 - #endif
include/asm-sparc/sections_32.h arch/sparc/include/asm/sections_32.h
include/asm-sparc/sections_64.h arch/sparc/include/asm/sections_64.h
include/asm-sparc/sembuf.h arch/sparc/include/asm/sembuf.h
include/asm-sparc/setup.h arch/sparc/include/asm/setup.h
include/asm-sparc/sfafsr.h arch/sparc/include/asm/sfafsr.h
-8
include/asm-sparc/sfp-machine.h
··· 1 - #ifndef ___ASM_SPARC_SFP_MACHINE_H 2 - #define ___ASM_SPARC_SFP_MACHINE_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/sfp-machine_64.h> 5 - #else 6 - #include <asm-sparc/sfp-machine_32.h> 7 - #endif 8 - #endif
include/asm-sparc/sfp-machine_32.h arch/sparc/include/asm/sfp-machine_32.h
include/asm-sparc/sfp-machine_64.h arch/sparc/include/asm/sfp-machine_64.h
include/asm-sparc/shmbuf.h arch/sparc/include/asm/shmbuf.h
-8
include/asm-sparc/shmparam.h
··· 1 - #ifndef ___ASM_SPARC_SHMPARAM_H 2 - #define ___ASM_SPARC_SHMPARAM_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/shmparam_64.h> 5 - #else 6 - #include <asm-sparc/shmparam_32.h> 7 - #endif 8 - #endif
include/asm-sparc/shmparam_32.h arch/sparc/include/asm/shmparam_32.h
include/asm-sparc/shmparam_64.h arch/sparc/include/asm/shmparam_64.h
-8
include/asm-sparc/sigcontext.h
··· 1 - #ifndef ___ASM_SPARC_SIGCONTEXT_H 2 - #define ___ASM_SPARC_SIGCONTEXT_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/sigcontext_64.h> 5 - #else 6 - #include <asm-sparc/sigcontext_32.h> 7 - #endif 8 - #endif
include/asm-sparc/sigcontext_32.h arch/sparc/include/asm/sigcontext_32.h
include/asm-sparc/sigcontext_64.h arch/sparc/include/asm/sigcontext_64.h
-8
include/asm-sparc/siginfo.h
··· 1 - #ifndef ___ASM_SPARC_SIGINFO_H 2 - #define ___ASM_SPARC_SIGINFO_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/siginfo_64.h> 5 - #else 6 - #include <asm-sparc/siginfo_32.h> 7 - #endif 8 - #endif
include/asm-sparc/siginfo_32.h arch/sparc/include/asm/siginfo_32.h
include/asm-sparc/siginfo_64.h arch/sparc/include/asm/siginfo_64.h
-8
include/asm-sparc/signal.h
··· 1 - #ifndef ___ASM_SPARC_SIGNAL_H 2 - #define ___ASM_SPARC_SIGNAL_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/signal_64.h> 5 - #else 6 - #include <asm-sparc/signal_32.h> 7 - #endif 8 - #endif
include/asm-sparc/signal_32.h arch/sparc/include/asm/signal_32.h
include/asm-sparc/signal_64.h arch/sparc/include/asm/signal_64.h
-8
include/asm-sparc/smp.h
··· 1 - #ifndef ___ASM_SPARC_SMP_H 2 - #define ___ASM_SPARC_SMP_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/smp_64.h> 5 - #else 6 - #include <asm-sparc/smp_32.h> 7 - #endif 8 - #endif
include/asm-sparc/smp_32.h arch/sparc/include/asm/smp_32.h
include/asm-sparc/smp_64.h arch/sparc/include/asm/smp_64.h
include/asm-sparc/smpprim.h arch/sparc/include/asm/smpprim.h
include/asm-sparc/socket.h arch/sparc/include/asm/socket.h
include/asm-sparc/sockios.h arch/sparc/include/asm/sockios.h
include/asm-sparc/sparsemem.h arch/sparc/include/asm/sparsemem.h
-8
include/asm-sparc/spinlock.h
··· 1 - #ifndef ___ASM_SPARC_SPINLOCK_H 2 - #define ___ASM_SPARC_SPINLOCK_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/spinlock_64.h> 5 - #else 6 - #include <asm-sparc/spinlock_32.h> 7 - #endif 8 - #endif
include/asm-sparc/spinlock_32.h arch/sparc/include/asm/spinlock_32.h
include/asm-sparc/spinlock_64.h arch/sparc/include/asm/spinlock_64.h
include/asm-sparc/spinlock_types.h arch/sparc/include/asm/spinlock_types.h
include/asm-sparc/spitfire.h arch/sparc/include/asm/spitfire.h
include/asm-sparc/sstate.h arch/sparc/include/asm/sstate.h
include/asm-sparc/stacktrace.h arch/sparc/include/asm/stacktrace.h
include/asm-sparc/starfire.h arch/sparc/include/asm/starfire.h
-8
include/asm-sparc/stat.h
··· 1 - #ifndef ___ASM_SPARC_STAT_H 2 - #define ___ASM_SPARC_STAT_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/stat_64.h> 5 - #else 6 - #include <asm-sparc/stat_32.h> 7 - #endif 8 - #endif
include/asm-sparc/stat_32.h arch/sparc/include/asm/stat_32.h
include/asm-sparc/stat_64.h arch/sparc/include/asm/stat_64.h
-8
include/asm-sparc/statfs.h
··· 1 - #ifndef ___ASM_SPARC_STATFS_H 2 - #define ___ASM_SPARC_STATFS_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/statfs_64.h> 5 - #else 6 - #include <asm-sparc/statfs_32.h> 7 - #endif 8 - #endif
include/asm-sparc/statfs_32.h arch/sparc/include/asm/statfs_32.h
include/asm-sparc/statfs_64.h arch/sparc/include/asm/statfs_64.h
-8
include/asm-sparc/string.h
··· 1 - #ifndef ___ASM_SPARC_STRING_H 2 - #define ___ASM_SPARC_STRING_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/string_64.h> 5 - #else 6 - #include <asm-sparc/string_32.h> 7 - #endif 8 - #endif
include/asm-sparc/string_32.h arch/sparc/include/asm/string_32.h
include/asm-sparc/string_64.h arch/sparc/include/asm/string_64.h
include/asm-sparc/sun4paddr.h arch/sparc/include/asm/sun4paddr.h
include/asm-sparc/sun4prom.h arch/sparc/include/asm/sun4prom.h
-80
include/asm-sparc/sunbpp.h
··· 1 - /* 2 - * include/asm-sparc/sunbpp.h 3 - */ 4 - 5 - #ifndef _ASM_SPARC_SUNBPP_H 6 - #define _ASM_SPARC_SUNBPP_H 7 - 8 - struct bpp_regs { 9 - /* DMA registers */ 10 - __volatile__ __u32 p_csr; /* DMA Control/Status Register */ 11 - __volatile__ __u32 p_addr; /* Address Register */ 12 - __volatile__ __u32 p_bcnt; /* Byte Count Register */ 13 - __volatile__ __u32 p_tst_csr; /* Test Control/Status (DMA2 only) */ 14 - /* Parallel Port registers */ 15 - __volatile__ __u16 p_hcr; /* Hardware Configuration Register */ 16 - __volatile__ __u16 p_ocr; /* Operation Configuration Register */ 17 - __volatile__ __u8 p_dr; /* Parallel Data Register */ 18 - __volatile__ __u8 p_tcr; /* Transfer Control Register */ 19 - __volatile__ __u8 p_or; /* Output Register */ 20 - __volatile__ __u8 p_ir; /* Input Register */ 21 - __volatile__ __u16 p_icr; /* Interrupt Control Register */ 22 - }; 23 - 24 - /* P_HCR. Time is in increments of SBus clock. */ 25 - #define P_HCR_TEST 0x8000 /* Allows buried counters to be read */ 26 - #define P_HCR_DSW 0x7f00 /* Data strobe width (in ticks) */ 27 - #define P_HCR_DDS 0x007f /* Data setup before strobe (in ticks) */ 28 - 29 - /* P_OCR. */ 30 - #define P_OCR_MEM_CLR 0x8000 31 - #define P_OCR_DATA_SRC 0x4000 /* ) */ 32 - #define P_OCR_DS_DSEL 0x2000 /* ) Bidirectional */ 33 - #define P_OCR_BUSY_DSEL 0x1000 /* ) selects */ 34 - #define P_OCR_ACK_DSEL 0x0800 /* ) */ 35 - #define P_OCR_EN_DIAG 0x0400 36 - #define P_OCR_BUSY_OP 0x0200 /* Busy operation */ 37 - #define P_OCR_ACK_OP 0x0100 /* Ack operation */ 38 - #define P_OCR_SRST 0x0080 /* Reset state machines. Not selfcleaning. */ 39 - #define P_OCR_IDLE 0x0008 /* PP data transfer state machine is idle */ 40 - #define P_OCR_V_ILCK 0x0002 /* Versatec faded. Zebra only. */ 41 - #define P_OCR_EN_VER 0x0001 /* Enable Versatec (0 - enable). Zebra only. */ 42 - 43 - /* P_TCR */ 44 - #define P_TCR_DIR 0x08 45 - #define P_TCR_BUSY 0x04 46 - #define P_TCR_ACK 0x02 47 - #define P_TCR_DS 0x01 /* Strobe */ 48 - 49 - /* P_OR */ 50 - #define P_OR_V3 0x20 /* ) */ 51 - #define P_OR_V2 0x10 /* ) on Zebra only */ 52 - #define P_OR_V1 0x08 /* ) */ 53 - #define P_OR_INIT 0x04 54 - #define P_OR_AFXN 0x02 /* Auto Feed */ 55 - #define P_OR_SLCT_IN 0x01 56 - 57 - /* P_IR */ 58 - #define P_IR_PE 0x04 59 - #define P_IR_SLCT 0x02 60 - #define P_IR_ERR 0x01 61 - 62 - /* P_ICR */ 63 - #define P_DS_IRQ 0x8000 /* RW1 */ 64 - #define P_ACK_IRQ 0x4000 /* RW1 */ 65 - #define P_BUSY_IRQ 0x2000 /* RW1 */ 66 - #define P_PE_IRQ 0x1000 /* RW1 */ 67 - #define P_SLCT_IRQ 0x0800 /* RW1 */ 68 - #define P_ERR_IRQ 0x0400 /* RW1 */ 69 - #define P_DS_IRQ_EN 0x0200 /* RW Always on rising edge */ 70 - #define P_ACK_IRQ_EN 0x0100 /* RW Always on rising edge */ 71 - #define P_BUSY_IRP 0x0080 /* RW 1= rising edge */ 72 - #define P_BUSY_IRQ_EN 0x0040 /* RW */ 73 - #define P_PE_IRP 0x0020 /* RW 1= rising edge */ 74 - #define P_PE_IRQ_EN 0x0010 /* RW */ 75 - #define P_SLCT_IRP 0x0008 /* RW 1= rising edge */ 76 - #define P_SLCT_IRQ_EN 0x0004 /* RW */ 77 - #define P_ERR_IRP 0x0002 /* RW1 1= rising edge */ 78 - #define P_ERR_IRQ_EN 0x0001 /* RW */ 79 - 80 - #endif /* !(_ASM_SPARC_SUNBPP_H) */
include/asm-sparc/swift.h arch/sparc/include/asm/swift.h
include/asm-sparc/syscalls.h arch/sparc/include/asm/syscalls.h
include/asm-sparc/sysen.h arch/sparc/include/asm/sysen.h
-8
include/asm-sparc/system.h
··· 1 - #ifndef ___ASM_SPARC_SYSTEM_H 2 - #define ___ASM_SPARC_SYSTEM_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/system_64.h> 5 - #else 6 - #include <asm-sparc/system_32.h> 7 - #endif 8 - #endif
include/asm-sparc/system_32.h arch/sparc/include/asm/system_32.h
include/asm-sparc/system_64.h arch/sparc/include/asm/system_64.h
include/asm-sparc/termbits.h arch/sparc/include/asm/termbits.h
include/asm-sparc/termios.h arch/sparc/include/asm/termios.h
-8
include/asm-sparc/thread_info.h
··· 1 - #ifndef ___ASM_SPARC_THREAD_INFO_H 2 - #define ___ASM_SPARC_THREAD_INFO_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/thread_info_64.h> 5 - #else 6 - #include <asm-sparc/thread_info_32.h> 7 - #endif 8 - #endif
-153
include/asm-sparc/thread_info_32.h
··· 1 - /* 2 - * thread_info.h: sparc low-level thread information 3 - * adapted from the ppc version by Pete Zaitcev, which was 4 - * adapted from the i386 version by Paul Mackerras 5 - * 6 - * Copyright (C) 2002 David Howells (dhowells@redhat.com) 7 - * Copyright (c) 2002 Pete Zaitcev (zaitcev@yahoo.com) 8 - * - Incorporating suggestions made by Linus Torvalds and Dave Miller 9 - */ 10 - 11 - #ifndef _ASM_THREAD_INFO_H 12 - #define _ASM_THREAD_INFO_H 13 - 14 - #ifdef __KERNEL__ 15 - 16 - #ifndef __ASSEMBLY__ 17 - 18 - #include <asm/btfixup.h> 19 - #include <asm/ptrace.h> 20 - #include <asm/page.h> 21 - 22 - /* 23 - * Low level task data. 24 - * 25 - * If you change this, change the TI_* offsets below to match. 26 - */ 27 - #define NSWINS 8 28 - struct thread_info { 29 - unsigned long uwinmask; 30 - struct task_struct *task; /* main task structure */ 31 - struct exec_domain *exec_domain; /* execution domain */ 32 - unsigned long flags; /* low level flags */ 33 - int cpu; /* cpu we're on */ 34 - int preempt_count; /* 0 => preemptable, 35 - <0 => BUG */ 36 - int softirq_count; 37 - int hardirq_count; 38 - 39 - /* Context switch saved kernel state. */ 40 - unsigned long ksp; /* ... ksp __attribute__ ((aligned (8))); */ 41 - unsigned long kpc; 42 - unsigned long kpsr; 43 - unsigned long kwim; 44 - 45 - /* A place to store user windows and stack pointers 46 - * when the stack needs inspection. 47 - */ 48 - struct reg_window reg_window[NSWINS]; /* align for ldd! */ 49 - unsigned long rwbuf_stkptrs[NSWINS]; 50 - unsigned long w_saved; 51 - 52 - struct restart_block restart_block; 53 - }; 54 - 55 - /* 56 - * macros/functions for gaining access to the thread information structure 57 - * 58 - * preempt_count needs to be 1 initially, until the scheduler is functional. 59 - */ 60 - #define INIT_THREAD_INFO(tsk) \ 61 - { \ 62 - .uwinmask = 0, \ 63 - .task = &tsk, \ 64 - .exec_domain = &default_exec_domain, \ 65 - .flags = 0, \ 66 - .cpu = 0, \ 67 - .preempt_count = 1, \ 68 - .restart_block = { \ 69 - .fn = do_no_restart_syscall, \ 70 - }, \ 71 - } 72 - 73 - #define init_thread_info (init_thread_union.thread_info) 74 - #define init_stack (init_thread_union.stack) 75 - 76 - /* how to get the thread information struct from C */ 77 - register struct thread_info *current_thread_info_reg asm("g6"); 78 - #define current_thread_info() (current_thread_info_reg) 79 - 80 - /* 81 - * thread information allocation 82 - */ 83 - #if PAGE_SHIFT == 13 84 - #define THREAD_INFO_ORDER 0 85 - #else /* PAGE_SHIFT */ 86 - #define THREAD_INFO_ORDER 1 87 - #endif 88 - 89 - #define __HAVE_ARCH_THREAD_INFO_ALLOCATOR 90 - 91 - BTFIXUPDEF_CALL(struct thread_info *, alloc_thread_info, void) 92 - #define alloc_thread_info(tsk) BTFIXUP_CALL(alloc_thread_info)() 93 - 94 - BTFIXUPDEF_CALL(void, free_thread_info, struct thread_info *) 95 - #define free_thread_info(ti) BTFIXUP_CALL(free_thread_info)(ti) 96 - 97 - #endif /* __ASSEMBLY__ */ 98 - 99 - /* 100 - * Size of kernel stack for each process. 101 - * Observe the order of get_free_pages() in alloc_thread_info(). 102 - * The sun4 has 8K stack too, because it's short on memory, and 16K is a waste. 103 - */ 104 - #define THREAD_SIZE 8192 105 - 106 - /* 107 - * Offsets in thread_info structure, used in assembly code 108 - * The "#define REGWIN_SZ 0x40" was abolished, so no multiplications. 109 - */ 110 - #define TI_UWINMASK 0x00 /* uwinmask */ 111 - #define TI_TASK 0x04 112 - #define TI_EXECDOMAIN 0x08 /* exec_domain */ 113 - #define TI_FLAGS 0x0c 114 - #define TI_CPU 0x10 115 - #define TI_PREEMPT 0x14 /* preempt_count */ 116 - #define TI_SOFTIRQ 0x18 /* softirq_count */ 117 - #define TI_HARDIRQ 0x1c /* hardirq_count */ 118 - #define TI_KSP 0x20 /* ksp */ 119 - #define TI_KPC 0x24 /* kpc (ldd'ed with kpc) */ 120 - #define TI_KPSR 0x28 /* kpsr */ 121 - #define TI_KWIM 0x2c /* kwim (ldd'ed with kpsr) */ 122 - #define TI_REG_WINDOW 0x30 123 - #define TI_RWIN_SPTRS 0x230 124 - #define TI_W_SAVED 0x250 125 - /* #define TI_RESTART_BLOCK 0x25n */ /* Nobody cares */ 126 - 127 - #define PREEMPT_ACTIVE 0x4000000 128 - 129 - /* 130 - * thread information flag bit numbers 131 - */ 132 - #define TIF_SYSCALL_TRACE 0 /* syscall trace active */ 133 - /* flag bit 1 is available */ 134 - #define TIF_SIGPENDING 2 /* signal pending */ 135 - #define TIF_NEED_RESCHED 3 /* rescheduling necessary */ 136 - #define TIF_RESTORE_SIGMASK 4 /* restore signal mask in do_signal() */ 137 - #define TIF_USEDFPU 8 /* FPU was used by this task 138 - * this quantum (SMP) */ 139 - #define TIF_POLLING_NRFLAG 9 /* true if poll_idle() is polling 140 - * TIF_NEED_RESCHED */ 141 - #define TIF_MEMDIE 10 142 - 143 - /* as above, but as bit values */ 144 - #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) 145 - #define _TIF_SIGPENDING (1<<TIF_SIGPENDING) 146 - #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) 147 - #define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) 148 - #define _TIF_USEDFPU (1<<TIF_USEDFPU) 149 - #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) 150 - 151 - #endif /* __KERNEL__ */ 152 - 153 - #endif /* _ASM_THREAD_INFO_H */
-279
include/asm-sparc/thread_info_64.h
··· 1 - /* thread_info.h: sparc64 low-level thread information 2 - * 3 - * Copyright (C) 2002 David S. Miller (davem@redhat.com) 4 - */ 5 - 6 - #ifndef _ASM_THREAD_INFO_H 7 - #define _ASM_THREAD_INFO_H 8 - 9 - #ifdef __KERNEL__ 10 - 11 - #define NSWINS 7 12 - 13 - #define TI_FLAG_BYTE_FAULT_CODE 0 14 - #define TI_FLAG_FAULT_CODE_SHIFT 56 15 - #define TI_FLAG_BYTE_WSTATE 1 16 - #define TI_FLAG_WSTATE_SHIFT 48 17 - #define TI_FLAG_BYTE_CWP 2 18 - #define TI_FLAG_CWP_SHIFT 40 19 - #define TI_FLAG_BYTE_CURRENT_DS 3 20 - #define TI_FLAG_CURRENT_DS_SHIFT 32 21 - #define TI_FLAG_BYTE_FPDEPTH 4 22 - #define TI_FLAG_FPDEPTH_SHIFT 24 23 - #define TI_FLAG_BYTE_WSAVED 5 24 - #define TI_FLAG_WSAVED_SHIFT 16 25 - 26 - #include <asm/page.h> 27 - 28 - #ifndef __ASSEMBLY__ 29 - 30 - #include <asm/ptrace.h> 31 - #include <asm/types.h> 32 - 33 - struct task_struct; 34 - struct exec_domain; 35 - 36 - struct thread_info { 37 - /* D$ line 1 */ 38 - struct task_struct *task; 39 - unsigned long flags; 40 - __u8 fpsaved[7]; 41 - __u8 status; 42 - unsigned long ksp; 43 - 44 - /* D$ line 2 */ 45 - unsigned long fault_address; 46 - struct pt_regs *kregs; 47 - struct exec_domain *exec_domain; 48 - int preempt_count; /* 0 => preemptable, <0 => BUG */ 49 - __u8 new_child; 50 - __u8 syscall_noerror; 51 - __u16 cpu; 52 - 53 - unsigned long *utraps; 54 - 55 - struct reg_window reg_window[NSWINS]; 56 - unsigned long rwbuf_stkptrs[NSWINS]; 57 - 58 - unsigned long gsr[7]; 59 - unsigned long xfsr[7]; 60 - 61 - __u64 __user *user_cntd0; 62 - __u64 __user *user_cntd1; 63 - __u64 kernel_cntd0, kernel_cntd1; 64 - __u64 pcr_reg; 65 - 66 - struct restart_block restart_block; 67 - 68 - struct pt_regs *kern_una_regs; 69 - unsigned int kern_una_insn; 70 - 71 - unsigned long fpregs[0] __attribute__ ((aligned(64))); 72 - }; 73 - 74 - #endif /* !(__ASSEMBLY__) */ 75 - 76 - /* offsets into the thread_info struct for assembly code access */ 77 - #define TI_TASK 0x00000000 78 - #define TI_FLAGS 0x00000008 79 - #define TI_FAULT_CODE (TI_FLAGS + TI_FLAG_BYTE_FAULT_CODE) 80 - #define TI_WSTATE (TI_FLAGS + TI_FLAG_BYTE_WSTATE) 81 - #define TI_CWP (TI_FLAGS + TI_FLAG_BYTE_CWP) 82 - #define TI_CURRENT_DS (TI_FLAGS + TI_FLAG_BYTE_CURRENT_DS) 83 - #define TI_FPDEPTH (TI_FLAGS + TI_FLAG_BYTE_FPDEPTH) 84 - #define TI_WSAVED (TI_FLAGS + TI_FLAG_BYTE_WSAVED) 85 - #define TI_FPSAVED 0x00000010 86 - #define TI_KSP 0x00000018 87 - #define TI_FAULT_ADDR 0x00000020 88 - #define TI_KREGS 0x00000028 89 - #define TI_EXEC_DOMAIN 0x00000030 90 - #define TI_PRE_COUNT 0x00000038 91 - #define TI_NEW_CHILD 0x0000003c 92 - #define TI_SYS_NOERROR 0x0000003d 93 - #define TI_CPU 0x0000003e 94 - #define TI_UTRAPS 0x00000040 95 - #define TI_REG_WINDOW 0x00000048 96 - #define TI_RWIN_SPTRS 0x000003c8 97 - #define TI_GSR 0x00000400 98 - #define TI_XFSR 0x00000438 99 - #define TI_USER_CNTD0 0x00000470 100 - #define TI_USER_CNTD1 0x00000478 101 - #define TI_KERN_CNTD0 0x00000480 102 - #define TI_KERN_CNTD1 0x00000488 103 - #define TI_PCR 0x00000490 104 - #define TI_RESTART_BLOCK 0x00000498 105 - #define TI_KUNA_REGS 0x000004c0 106 - #define TI_KUNA_INSN 0x000004c8 107 - #define TI_FPREGS 0x00000500 108 - 109 - /* We embed this in the uppermost byte of thread_info->flags */ 110 - #define FAULT_CODE_WRITE 0x01 /* Write access, implies D-TLB */ 111 - #define FAULT_CODE_DTLB 0x02 /* Miss happened in D-TLB */ 112 - #define FAULT_CODE_ITLB 0x04 /* Miss happened in I-TLB */ 113 - #define FAULT_CODE_WINFIXUP 0x08 /* Miss happened during spill/fill */ 114 - #define FAULT_CODE_BLKCOMMIT 0x10 /* Use blk-commit ASI in copy_page */ 115 - 116 - #if PAGE_SHIFT == 13 117 - #define THREAD_SIZE (2*PAGE_SIZE) 118 - #define THREAD_SHIFT (PAGE_SHIFT + 1) 119 - #else /* PAGE_SHIFT == 13 */ 120 - #define THREAD_SIZE PAGE_SIZE 121 - #define THREAD_SHIFT PAGE_SHIFT 122 - #endif /* PAGE_SHIFT == 13 */ 123 - 124 - #define PREEMPT_ACTIVE 0x4000000 125 - 126 - /* 127 - * macros/functions for gaining access to the thread information structure 128 - * 129 - * preempt_count needs to be 1 initially, until the scheduler is functional. 130 - */ 131 - #ifndef __ASSEMBLY__ 132 - 133 - #define INIT_THREAD_INFO(tsk) \ 134 - { \ 135 - .task = &tsk, \ 136 - .flags = ((unsigned long)ASI_P) << TI_FLAG_CURRENT_DS_SHIFT, \ 137 - .exec_domain = &default_exec_domain, \ 138 - .preempt_count = 1, \ 139 - .restart_block = { \ 140 - .fn = do_no_restart_syscall, \ 141 - }, \ 142 - } 143 - 144 - #define init_thread_info (init_thread_union.thread_info) 145 - #define init_stack (init_thread_union.stack) 146 - 147 - /* how to get the thread information struct from C */ 148 - register struct thread_info *current_thread_info_reg asm("g6"); 149 - #define current_thread_info() (current_thread_info_reg) 150 - 151 - /* thread information allocation */ 152 - #if PAGE_SHIFT == 13 153 - #define __THREAD_INFO_ORDER 1 154 - #else /* PAGE_SHIFT == 13 */ 155 - #define __THREAD_INFO_ORDER 0 156 - #endif /* PAGE_SHIFT == 13 */ 157 - 158 - #define __HAVE_ARCH_THREAD_INFO_ALLOCATOR 159 - 160 - #ifdef CONFIG_DEBUG_STACK_USAGE 161 - #define alloc_thread_info(tsk) \ 162 - ({ \ 163 - struct thread_info *ret; \ 164 - \ 165 - ret = (struct thread_info *) \ 166 - __get_free_pages(GFP_KERNEL, __THREAD_INFO_ORDER); \ 167 - if (ret) \ 168 - memset(ret, 0, PAGE_SIZE<<__THREAD_INFO_ORDER); \ 169 - ret; \ 170 - }) 171 - #else 172 - #define alloc_thread_info(tsk) \ 173 - ((struct thread_info *)__get_free_pages(GFP_KERNEL, __THREAD_INFO_ORDER)) 174 - #endif 175 - 176 - #define free_thread_info(ti) \ 177 - free_pages((unsigned long)(ti),__THREAD_INFO_ORDER) 178 - 179 - #define __thread_flag_byte_ptr(ti) \ 180 - ((unsigned char *)(&((ti)->flags))) 181 - #define __cur_thread_flag_byte_ptr __thread_flag_byte_ptr(current_thread_info()) 182 - 183 - #define get_thread_fault_code() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FAULT_CODE]) 184 - #define set_thread_fault_code(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FAULT_CODE] = (val)) 185 - #define get_thread_wstate() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSTATE]) 186 - #define set_thread_wstate(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSTATE] = (val)) 187 - #define get_thread_cwp() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CWP]) 188 - #define set_thread_cwp(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CWP] = (val)) 189 - #define get_thread_current_ds() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CURRENT_DS]) 190 - #define set_thread_current_ds(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CURRENT_DS] = (val)) 191 - #define get_thread_fpdepth() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FPDEPTH]) 192 - #define set_thread_fpdepth(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FPDEPTH] = (val)) 193 - #define get_thread_wsaved() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSAVED]) 194 - #define set_thread_wsaved(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSAVED] = (val)) 195 - 196 - #endif /* !(__ASSEMBLY__) */ 197 - 198 - /* 199 - * Thread information flags, only 16 bits are available as we encode 200 - * other values into the upper 6 bytes. 201 - * 202 - * On trap return we need to test several values: 203 - * 204 - * user: need_resched, notify_resume, sigpending, wsaved, perfctr 205 - * kernel: fpdepth 206 - * 207 - * So to check for work in the kernel case we simply load the fpdepth 208 - * byte out of the flags and test it. For the user case we encode the 209 - * lower 3 bytes of flags as follows: 210 - * ---------------------------------------- 211 - * | wsaved | flags byte 1 | flags byte 2 | 212 - * ---------------------------------------- 213 - * This optimizes the user test into: 214 - * ldx [%g6 + TI_FLAGS], REG1 215 - * sethi %hi(_TIF_USER_WORK_MASK), REG2 216 - * or REG2, %lo(_TIF_USER_WORK_MASK), REG2 217 - * andcc REG1, REG2, %g0 218 - * be,pt no_work_to_do 219 - * nop 220 - */ 221 - #define TIF_SYSCALL_TRACE 0 /* syscall trace active */ 222 - /* flags bit 1 is available */ 223 - #define TIF_SIGPENDING 2 /* signal pending */ 224 - #define TIF_NEED_RESCHED 3 /* rescheduling necessary */ 225 - #define TIF_PERFCTR 4 /* performance counters active */ 226 - #define TIF_UNALIGNED 5 /* allowed to do unaligned accesses */ 227 - /* flag bit 6 is available */ 228 - #define TIF_32BIT 7 /* 32-bit binary */ 229 - /* flag bit 8 is available */ 230 - #define TIF_SECCOMP 9 /* secure computing */ 231 - #define TIF_SYSCALL_AUDIT 10 /* syscall auditing active */ 232 - /* flag bit 11 is available */ 233 - /* NOTE: Thread flags >= 12 should be ones we have no interest 234 - * in using in assembly, else we can't use the mask as 235 - * an immediate value in instructions such as andcc. 236 - */ 237 - #define TIF_ABI_PENDING 12 238 - #define TIF_MEMDIE 13 239 - #define TIF_POLLING_NRFLAG 14 240 - 241 - #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) 242 - #define _TIF_SIGPENDING (1<<TIF_SIGPENDING) 243 - #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) 244 - #define _TIF_PERFCTR (1<<TIF_PERFCTR) 245 - #define _TIF_UNALIGNED (1<<TIF_UNALIGNED) 246 - #define _TIF_32BIT (1<<TIF_32BIT) 247 - #define _TIF_SECCOMP (1<<TIF_SECCOMP) 248 - #define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT) 249 - #define _TIF_ABI_PENDING (1<<TIF_ABI_PENDING) 250 - #define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) 251 - 252 - #define _TIF_USER_WORK_MASK ((0xff << TI_FLAG_WSAVED_SHIFT) | \ 253 - (_TIF_SIGPENDING | \ 254 - _TIF_NEED_RESCHED | _TIF_PERFCTR)) 255 - 256 - /* 257 - * Thread-synchronous status. 258 - * 259 - * This is different from the flags in that nobody else 260 - * ever touches our thread-synchronous status, so we don't 261 - * have to worry about atomic accesses. 262 - * 263 - * Note that there are only 8 bits available. 264 - */ 265 - #define TS_RESTORE_SIGMASK 0x0001 /* restore signal mask in do_signal() */ 266 - 267 - #ifndef __ASSEMBLY__ 268 - #define HAVE_SET_RESTORE_SIGMASK 1 269 - static inline void set_restore_sigmask(void) 270 - { 271 - struct thread_info *ti = current_thread_info(); 272 - ti->status |= TS_RESTORE_SIGMASK; 273 - set_bit(TIF_SIGPENDING, &ti->flags); 274 - } 275 - #endif /* !__ASSEMBLY__ */ 276 - 277 - #endif /* __KERNEL__ */ 278 - 279 - #endif /* _ASM_THREAD_INFO_H */
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include/asm-sparc/timer.h
··· 1 - #ifndef ___ASM_SPARC_TIMER_H 2 - #define ___ASM_SPARC_TIMER_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/timer_64.h> 5 - #else 6 - #include <asm-sparc/timer_32.h> 7 - #endif 8 - #endif
include/asm-sparc/timer_32.h arch/sparc/include/asm/timer_32.h
include/asm-sparc/timer_64.h arch/sparc/include/asm/timer_64.h
-8
include/asm-sparc/timex.h
··· 1 - #ifndef ___ASM_SPARC_TIMEX_H 2 - #define ___ASM_SPARC_TIMEX_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/timex_64.h> 5 - #else 6 - #include <asm-sparc/timex_32.h> 7 - #endif 8 - #endif
-15
include/asm-sparc/timex_32.h
··· 1 - /* 2 - * linux/include/asm-sparc/timex.h 3 - * 4 - * sparc architecture timex specifications 5 - */ 6 - #ifndef _ASMsparc_TIMEX_H 7 - #define _ASMsparc_TIMEX_H 8 - 9 - #define CLOCK_TICK_RATE 1193180 /* Underlying HZ */ 10 - 11 - /* XXX Maybe do something better at some point... -DaveM */ 12 - typedef unsigned long cycles_t; 13 - #define get_cycles() (0) 14 - 15 - #endif
-19
include/asm-sparc/timex_64.h
··· 1 - /* 2 - * linux/include/asm-sparc64/timex.h 3 - * 4 - * sparc64 architecture timex specifications 5 - */ 6 - #ifndef _ASMsparc64_TIMEX_H 7 - #define _ASMsparc64_TIMEX_H 8 - 9 - #include <asm/timer.h> 10 - 11 - #define CLOCK_TICK_RATE 1193180 /* Underlying HZ */ 12 - 13 - /* Getting on the cycle counter on sparc64. */ 14 - typedef unsigned long cycles_t; 15 - #define get_cycles() tick_ops->get_tick() 16 - 17 - #define ARCH_HAS_READ_CURRENT_TIMER 18 - 19 - #endif
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include/asm-sparc/tlb.h
··· 1 - #ifndef ___ASM_SPARC_TLB_H 2 - #define ___ASM_SPARC_TLB_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/tlb_64.h> 5 - #else 6 - #include <asm-sparc/tlb_32.h> 7 - #endif 8 - #endif
include/asm-sparc/tlb_32.h arch/sparc/include/asm/tlb_32.h
include/asm-sparc/tlb_64.h arch/sparc/include/asm/tlb_64.h
-8
include/asm-sparc/tlbflush.h
··· 1 - #ifndef ___ASM_SPARC_TLBFLUSH_H 2 - #define ___ASM_SPARC_TLBFLUSH_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/tlbflush_64.h> 5 - #else 6 - #include <asm-sparc/tlbflush_32.h> 7 - #endif 8 - #endif
include/asm-sparc/tlbflush_32.h arch/sparc/include/asm/tlbflush_32.h
include/asm-sparc/tlbflush_64.h arch/sparc/include/asm/tlbflush_64.h
-8
include/asm-sparc/topology.h
··· 1 - #ifndef ___ASM_SPARC_TOPOLOGY_H 2 - #define ___ASM_SPARC_TOPOLOGY_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/topology_64.h> 5 - #else 6 - #include <asm-sparc/topology_32.h> 7 - #endif 8 - #endif
include/asm-sparc/topology_32.h arch/sparc/include/asm/topology_32.h
include/asm-sparc/topology_64.h arch/sparc/include/asm/topology_64.h
include/asm-sparc/traps.h arch/sparc/include/asm/traps.h
include/asm-sparc/tsb.h arch/sparc/include/asm/tsb.h
include/asm-sparc/tsunami.h arch/sparc/include/asm/tsunami.h
include/asm-sparc/ttable.h arch/sparc/include/asm/ttable.h
include/asm-sparc/turbosparc.h arch/sparc/include/asm/turbosparc.h
include/asm-sparc/types.h arch/sparc/include/asm/types.h
-8
include/asm-sparc/uaccess.h
··· 1 - #ifndef ___ASM_SPARC_UACCESS_H 2 - #define ___ASM_SPARC_UACCESS_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/uaccess_64.h> 5 - #else 6 - #include <asm-sparc/uaccess_32.h> 7 - #endif 8 - #endif
include/asm-sparc/uaccess_32.h arch/sparc/include/asm/uaccess_32.h
include/asm-sparc/uaccess_64.h arch/sparc/include/asm/uaccess_64.h
include/asm-sparc/uctx.h arch/sparc/include/asm/uctx.h
include/asm-sparc/unaligned.h arch/sparc/include/asm/unaligned.h
-8
include/asm-sparc/unistd.h
··· 1 - #ifndef ___ASM_SPARC_UNISTD_H 2 - #define ___ASM_SPARC_UNISTD_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/unistd_64.h> 5 - #else 6 - #include <asm-sparc/unistd_32.h> 7 - #endif 8 - #endif
include/asm-sparc/unistd_32.h arch/sparc/include/asm/unistd_32.h
include/asm-sparc/unistd_64.h arch/sparc/include/asm/unistd_64.h
include/asm-sparc/upa.h arch/sparc/include/asm/upa.h
include/asm-sparc/user.h arch/sparc/include/asm/user.h
-51
include/asm-sparc/utrap.h
··· 1 - /* 2 - * include/asm-sparc64/utrap.h 3 - * 4 - * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) 5 - */ 6 - 7 - #ifndef __ASM_SPARC64_UTRAP_H 8 - #define __ASM_SPARC64_UTRAP_H 9 - 10 - #define UT_INSTRUCTION_EXCEPTION 1 11 - #define UT_INSTRUCTION_ERROR 2 12 - #define UT_INSTRUCTION_PROTECTION 3 13 - #define UT_ILLTRAP_INSTRUCTION 4 14 - #define UT_ILLEGAL_INSTRUCTION 5 15 - #define UT_PRIVILEGED_OPCODE 6 16 - #define UT_FP_DISABLED 7 17 - #define UT_FP_EXCEPTION_IEEE_754 8 18 - #define UT_FP_EXCEPTION_OTHER 9 19 - #define UT_TAG_OVERVIEW 10 20 - #define UT_DIVISION_BY_ZERO 11 21 - #define UT_DATA_EXCEPTION 12 22 - #define UT_DATA_ERROR 13 23 - #define UT_DATA_PROTECTION 14 24 - #define UT_MEM_ADDRESS_NOT_ALIGNED 15 25 - #define UT_PRIVILEGED_ACTION 16 26 - #define UT_ASYNC_DATA_ERROR 17 27 - #define UT_TRAP_INSTRUCTION_16 18 28 - #define UT_TRAP_INSTRUCTION_17 19 29 - #define UT_TRAP_INSTRUCTION_18 20 30 - #define UT_TRAP_INSTRUCTION_19 21 31 - #define UT_TRAP_INSTRUCTION_20 22 32 - #define UT_TRAP_INSTRUCTION_21 23 33 - #define UT_TRAP_INSTRUCTION_22 24 34 - #define UT_TRAP_INSTRUCTION_23 25 35 - #define UT_TRAP_INSTRUCTION_24 26 36 - #define UT_TRAP_INSTRUCTION_25 27 37 - #define UT_TRAP_INSTRUCTION_26 28 38 - #define UT_TRAP_INSTRUCTION_27 29 39 - #define UT_TRAP_INSTRUCTION_28 30 40 - #define UT_TRAP_INSTRUCTION_29 31 41 - #define UT_TRAP_INSTRUCTION_30 32 42 - #define UT_TRAP_INSTRUCTION_31 33 43 - 44 - #define UTH_NOCHANGE (-1) 45 - 46 - #ifndef __ASSEMBLY__ 47 - typedef int utrap_entry_t; 48 - typedef void *utrap_handler_t; 49 - #endif /* __ASSEMBLY__ */ 50 - 51 - #endif /* !(__ASM_SPARC64_PROCESSOR_H) */
include/asm-sparc/vac-ops.h arch/sparc/include/asm/vac-ops.h
-64
include/asm-sparc/vaddrs.h
··· 1 - #ifndef _SPARC_VADDRS_H 2 - #define _SPARC_VADDRS_H 3 - 4 - #include <asm/head.h> 5 - 6 - /* 7 - * asm-sparc/vaddrs.h: Here we define the virtual addresses at 8 - * which important things will be mapped. 9 - * 10 - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) 11 - * Copyright (C) 2000 Anton Blanchard (anton@samba.org) 12 - */ 13 - 14 - #define SRMMU_MAXMEM 0x0c000000 15 - 16 - #define SRMMU_NOCACHE_VADDR (KERNBASE + SRMMU_MAXMEM) 17 - /* = 0x0fc000000 */ 18 - /* XXX Empiricals - this needs to go away - KMW */ 19 - #define SRMMU_MIN_NOCACHE_PAGES (550) 20 - #define SRMMU_MAX_NOCACHE_PAGES (1280) 21 - 22 - /* The following constant is used in mm/srmmu.c::srmmu_nocache_calcsize() 23 - * to determine the amount of memory that will be reserved as nocache: 24 - * 25 - * 256 pages will be taken as nocache per each 26 - * SRMMU_NOCACHE_ALCRATIO MB of system memory. 27 - * 28 - * limits enforced: nocache minimum = 256 pages 29 - * nocache maximum = 1280 pages 30 - */ 31 - #define SRMMU_NOCACHE_ALCRATIO 64 /* 256 pages per 64MB of system RAM */ 32 - 33 - #define SUN4M_IOBASE_VADDR 0xfd000000 /* Base for mapping pages */ 34 - #define IOBASE_VADDR 0xfe000000 35 - #define IOBASE_END 0xfe600000 36 - 37 - /* 38 - * On the sun4/4c we need a place 39 - * to reliably map locked down kernel data. This includes the 40 - * task_struct and kernel stack pages of each process plus the 41 - * scsi buffers during dvma IO transfers, also the floppy buffers 42 - * during pseudo dma which runs with traps off (no faults allowed). 43 - * Some quick calculations yield: 44 - * NR_TASKS <512> * (3 * PAGE_SIZE) == 0x600000 45 - * Subtract this from 0xc00000 and you get 0x927C0 of vm left 46 - * over to map SCSI dvma + floppy pseudo-dma buffers. So be 47 - * careful if you change NR_TASKS or else there won't be enough 48 - * room for it all. 49 - */ 50 - #define SUN4C_LOCK_VADDR 0xff000000 51 - #define SUN4C_LOCK_END 0xffc00000 52 - 53 - #define KADB_DEBUGGER_BEGVM 0xffc00000 /* Where kern debugger is in virt-mem */ 54 - #define KADB_DEBUGGER_ENDVM 0xffd00000 55 - #define DEBUG_FIRSTVADDR KADB_DEBUGGER_BEGVM 56 - #define DEBUG_LASTVADDR KADB_DEBUGGER_ENDVM 57 - 58 - #define LINUX_OPPROM_BEGVM 0xffd00000 59 - #define LINUX_OPPROM_ENDVM 0xfff00000 60 - 61 - #define DVMA_VADDR 0xfff00000 /* Base area of the DVMA on suns */ 62 - #define DVMA_END 0xfffc0000 63 - 64 - #endif /* !(_SPARC_VADDRS_H) */
include/asm-sparc/vfc_ioctls.h arch/sparc/include/asm/vfc_ioctls.h
include/asm-sparc/vga.h arch/sparc/include/asm/vga.h
include/asm-sparc/viking.h arch/sparc/include/asm/viking.h
include/asm-sparc/vio.h arch/sparc/include/asm/vio.h
include/asm-sparc/visasm.h arch/sparc/include/asm/visasm.h
include/asm-sparc/watchdog.h arch/sparc/include/asm/watchdog.h
include/asm-sparc/winmacro.h arch/sparc/include/asm/winmacro.h
-8
include/asm-sparc/xor.h
··· 1 - #ifndef ___ASM_SPARC_XOR_H 2 - #define ___ASM_SPARC_XOR_H 3 - #if defined(__sparc__) && defined(__arch64__) 4 - #include <asm-sparc/xor_64.h> 5 - #else 6 - #include <asm-sparc/xor_32.h> 7 - #endif 8 - #endif
-269
include/asm-sparc/xor_32.h
··· 1 - /* 2 - * include/asm-sparc/xor.h 3 - * 4 - * Optimized RAID-5 checksumming functions for 32-bit Sparc. 5 - * 6 - * This program is free software; you can redistribute it and/or modify 7 - * it under the terms of the GNU General Public License as published by 8 - * the Free Software Foundation; either version 2, or (at your option) 9 - * any later version. 10 - * 11 - * You should have received a copy of the GNU General Public License 12 - * (for example /usr/src/linux/COPYING); if not, write to the Free 13 - * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 14 - */ 15 - 16 - /* 17 - * High speed xor_block operation for RAID4/5 utilizing the 18 - * ldd/std SPARC instructions. 19 - * 20 - * Copyright (C) 1999 Jakub Jelinek (jj@ultra.linux.cz) 21 - */ 22 - 23 - static void 24 - sparc_2(unsigned long bytes, unsigned long *p1, unsigned long *p2) 25 - { 26 - int lines = bytes / (sizeof (long)) / 8; 27 - 28 - do { 29 - __asm__ __volatile__( 30 - "ldd [%0 + 0x00], %%g2\n\t" 31 - "ldd [%0 + 0x08], %%g4\n\t" 32 - "ldd [%0 + 0x10], %%o0\n\t" 33 - "ldd [%0 + 0x18], %%o2\n\t" 34 - "ldd [%1 + 0x00], %%o4\n\t" 35 - "ldd [%1 + 0x08], %%l0\n\t" 36 - "ldd [%1 + 0x10], %%l2\n\t" 37 - "ldd [%1 + 0x18], %%l4\n\t" 38 - "xor %%g2, %%o4, %%g2\n\t" 39 - "xor %%g3, %%o5, %%g3\n\t" 40 - "xor %%g4, %%l0, %%g4\n\t" 41 - "xor %%g5, %%l1, %%g5\n\t" 42 - "xor %%o0, %%l2, %%o0\n\t" 43 - "xor %%o1, %%l3, %%o1\n\t" 44 - "xor %%o2, %%l4, %%o2\n\t" 45 - "xor %%o3, %%l5, %%o3\n\t" 46 - "std %%g2, [%0 + 0x00]\n\t" 47 - "std %%g4, [%0 + 0x08]\n\t" 48 - "std %%o0, [%0 + 0x10]\n\t" 49 - "std %%o2, [%0 + 0x18]\n" 50 - : 51 - : "r" (p1), "r" (p2) 52 - : "g2", "g3", "g4", "g5", 53 - "o0", "o1", "o2", "o3", "o4", "o5", 54 - "l0", "l1", "l2", "l3", "l4", "l5"); 55 - p1 += 8; 56 - p2 += 8; 57 - } while (--lines > 0); 58 - } 59 - 60 - static void 61 - sparc_3(unsigned long bytes, unsigned long *p1, unsigned long *p2, 62 - unsigned long *p3) 63 - { 64 - int lines = bytes / (sizeof (long)) / 8; 65 - 66 - do { 67 - __asm__ __volatile__( 68 - "ldd [%0 + 0x00], %%g2\n\t" 69 - "ldd [%0 + 0x08], %%g4\n\t" 70 - "ldd [%0 + 0x10], %%o0\n\t" 71 - "ldd [%0 + 0x18], %%o2\n\t" 72 - "ldd [%1 + 0x00], %%o4\n\t" 73 - "ldd [%1 + 0x08], %%l0\n\t" 74 - "ldd [%1 + 0x10], %%l2\n\t" 75 - "ldd [%1 + 0x18], %%l4\n\t" 76 - "xor %%g2, %%o4, %%g2\n\t" 77 - "xor %%g3, %%o5, %%g3\n\t" 78 - "ldd [%2 + 0x00], %%o4\n\t" 79 - "xor %%g4, %%l0, %%g4\n\t" 80 - "xor %%g5, %%l1, %%g5\n\t" 81 - "ldd [%2 + 0x08], %%l0\n\t" 82 - "xor %%o0, %%l2, %%o0\n\t" 83 - "xor %%o1, %%l3, %%o1\n\t" 84 - "ldd [%2 + 0x10], %%l2\n\t" 85 - "xor %%o2, %%l4, %%o2\n\t" 86 - "xor %%o3, %%l5, %%o3\n\t" 87 - "ldd [%2 + 0x18], %%l4\n\t" 88 - "xor %%g2, %%o4, %%g2\n\t" 89 - "xor %%g3, %%o5, %%g3\n\t" 90 - "xor %%g4, %%l0, %%g4\n\t" 91 - "xor %%g5, %%l1, %%g5\n\t" 92 - "xor %%o0, %%l2, %%o0\n\t" 93 - "xor %%o1, %%l3, %%o1\n\t" 94 - "xor %%o2, %%l4, %%o2\n\t" 95 - "xor %%o3, %%l5, %%o3\n\t" 96 - "std %%g2, [%0 + 0x00]\n\t" 97 - "std %%g4, [%0 + 0x08]\n\t" 98 - "std %%o0, [%0 + 0x10]\n\t" 99 - "std %%o2, [%0 + 0x18]\n" 100 - : 101 - : "r" (p1), "r" (p2), "r" (p3) 102 - : "g2", "g3", "g4", "g5", 103 - "o0", "o1", "o2", "o3", "o4", "o5", 104 - "l0", "l1", "l2", "l3", "l4", "l5"); 105 - p1 += 8; 106 - p2 += 8; 107 - p3 += 8; 108 - } while (--lines > 0); 109 - } 110 - 111 - static void 112 - sparc_4(unsigned long bytes, unsigned long *p1, unsigned long *p2, 113 - unsigned long *p3, unsigned long *p4) 114 - { 115 - int lines = bytes / (sizeof (long)) / 8; 116 - 117 - do { 118 - __asm__ __volatile__( 119 - "ldd [%0 + 0x00], %%g2\n\t" 120 - "ldd [%0 + 0x08], %%g4\n\t" 121 - "ldd [%0 + 0x10], %%o0\n\t" 122 - "ldd [%0 + 0x18], %%o2\n\t" 123 - "ldd [%1 + 0x00], %%o4\n\t" 124 - "ldd [%1 + 0x08], %%l0\n\t" 125 - "ldd [%1 + 0x10], %%l2\n\t" 126 - "ldd [%1 + 0x18], %%l4\n\t" 127 - "xor %%g2, %%o4, %%g2\n\t" 128 - "xor %%g3, %%o5, %%g3\n\t" 129 - "ldd [%2 + 0x00], %%o4\n\t" 130 - "xor %%g4, %%l0, %%g4\n\t" 131 - "xor %%g5, %%l1, %%g5\n\t" 132 - "ldd [%2 + 0x08], %%l0\n\t" 133 - "xor %%o0, %%l2, %%o0\n\t" 134 - "xor %%o1, %%l3, %%o1\n\t" 135 - "ldd [%2 + 0x10], %%l2\n\t" 136 - "xor %%o2, %%l4, %%o2\n\t" 137 - "xor %%o3, %%l5, %%o3\n\t" 138 - "ldd [%2 + 0x18], %%l4\n\t" 139 - "xor %%g2, %%o4, %%g2\n\t" 140 - "xor %%g3, %%o5, %%g3\n\t" 141 - "ldd [%3 + 0x00], %%o4\n\t" 142 - "xor %%g4, %%l0, %%g4\n\t" 143 - "xor %%g5, %%l1, %%g5\n\t" 144 - "ldd [%3 + 0x08], %%l0\n\t" 145 - "xor %%o0, %%l2, %%o0\n\t" 146 - "xor %%o1, %%l3, %%o1\n\t" 147 - "ldd [%3 + 0x10], %%l2\n\t" 148 - "xor %%o2, %%l4, %%o2\n\t" 149 - "xor %%o3, %%l5, %%o3\n\t" 150 - "ldd [%3 + 0x18], %%l4\n\t" 151 - "xor %%g2, %%o4, %%g2\n\t" 152 - "xor %%g3, %%o5, %%g3\n\t" 153 - "xor %%g4, %%l0, %%g4\n\t" 154 - "xor %%g5, %%l1, %%g5\n\t" 155 - "xor %%o0, %%l2, %%o0\n\t" 156 - "xor %%o1, %%l3, %%o1\n\t" 157 - "xor %%o2, %%l4, %%o2\n\t" 158 - "xor %%o3, %%l5, %%o3\n\t" 159 - "std %%g2, [%0 + 0x00]\n\t" 160 - "std %%g4, [%0 + 0x08]\n\t" 161 - "std %%o0, [%0 + 0x10]\n\t" 162 - "std %%o2, [%0 + 0x18]\n" 163 - : 164 - : "r" (p1), "r" (p2), "r" (p3), "r" (p4) 165 - : "g2", "g3", "g4", "g5", 166 - "o0", "o1", "o2", "o3", "o4", "o5", 167 - "l0", "l1", "l2", "l3", "l4", "l5"); 168 - p1 += 8; 169 - p2 += 8; 170 - p3 += 8; 171 - p4 += 8; 172 - } while (--lines > 0); 173 - } 174 - 175 - static void 176 - sparc_5(unsigned long bytes, unsigned long *p1, unsigned long *p2, 177 - unsigned long *p3, unsigned long *p4, unsigned long *p5) 178 - { 179 - int lines = bytes / (sizeof (long)) / 8; 180 - 181 - do { 182 - __asm__ __volatile__( 183 - "ldd [%0 + 0x00], %%g2\n\t" 184 - "ldd [%0 + 0x08], %%g4\n\t" 185 - "ldd [%0 + 0x10], %%o0\n\t" 186 - "ldd [%0 + 0x18], %%o2\n\t" 187 - "ldd [%1 + 0x00], %%o4\n\t" 188 - "ldd [%1 + 0x08], %%l0\n\t" 189 - "ldd [%1 + 0x10], %%l2\n\t" 190 - "ldd [%1 + 0x18], %%l4\n\t" 191 - "xor %%g2, %%o4, %%g2\n\t" 192 - "xor %%g3, %%o5, %%g3\n\t" 193 - "ldd [%2 + 0x00], %%o4\n\t" 194 - "xor %%g4, %%l0, %%g4\n\t" 195 - "xor %%g5, %%l1, %%g5\n\t" 196 - "ldd [%2 + 0x08], %%l0\n\t" 197 - "xor %%o0, %%l2, %%o0\n\t" 198 - "xor %%o1, %%l3, %%o1\n\t" 199 - "ldd [%2 + 0x10], %%l2\n\t" 200 - "xor %%o2, %%l4, %%o2\n\t" 201 - "xor %%o3, %%l5, %%o3\n\t" 202 - "ldd [%2 + 0x18], %%l4\n\t" 203 - "xor %%g2, %%o4, %%g2\n\t" 204 - "xor %%g3, %%o5, %%g3\n\t" 205 - "ldd [%3 + 0x00], %%o4\n\t" 206 - "xor %%g4, %%l0, %%g4\n\t" 207 - "xor %%g5, %%l1, %%g5\n\t" 208 - "ldd [%3 + 0x08], %%l0\n\t" 209 - "xor %%o0, %%l2, %%o0\n\t" 210 - "xor %%o1, %%l3, %%o1\n\t" 211 - "ldd [%3 + 0x10], %%l2\n\t" 212 - "xor %%o2, %%l4, %%o2\n\t" 213 - "xor %%o3, %%l5, %%o3\n\t" 214 - "ldd [%3 + 0x18], %%l4\n\t" 215 - "xor %%g2, %%o4, %%g2\n\t" 216 - "xor %%g3, %%o5, %%g3\n\t" 217 - "ldd [%4 + 0x00], %%o4\n\t" 218 - "xor %%g4, %%l0, %%g4\n\t" 219 - "xor %%g5, %%l1, %%g5\n\t" 220 - "ldd [%4 + 0x08], %%l0\n\t" 221 - "xor %%o0, %%l2, %%o0\n\t" 222 - "xor %%o1, %%l3, %%o1\n\t" 223 - "ldd [%4 + 0x10], %%l2\n\t" 224 - "xor %%o2, %%l4, %%o2\n\t" 225 - "xor %%o3, %%l5, %%o3\n\t" 226 - "ldd [%4 + 0x18], %%l4\n\t" 227 - "xor %%g2, %%o4, %%g2\n\t" 228 - "xor %%g3, %%o5, %%g3\n\t" 229 - "xor %%g4, %%l0, %%g4\n\t" 230 - "xor %%g5, %%l1, %%g5\n\t" 231 - "xor %%o0, %%l2, %%o0\n\t" 232 - "xor %%o1, %%l3, %%o1\n\t" 233 - "xor %%o2, %%l4, %%o2\n\t" 234 - "xor %%o3, %%l5, %%o3\n\t" 235 - "std %%g2, [%0 + 0x00]\n\t" 236 - "std %%g4, [%0 + 0x08]\n\t" 237 - "std %%o0, [%0 + 0x10]\n\t" 238 - "std %%o2, [%0 + 0x18]\n" 239 - : 240 - : "r" (p1), "r" (p2), "r" (p3), "r" (p4), "r" (p5) 241 - : "g2", "g3", "g4", "g5", 242 - "o0", "o1", "o2", "o3", "o4", "o5", 243 - "l0", "l1", "l2", "l3", "l4", "l5"); 244 - p1 += 8; 245 - p2 += 8; 246 - p3 += 8; 247 - p4 += 8; 248 - p5 += 8; 249 - } while (--lines > 0); 250 - } 251 - 252 - static struct xor_block_template xor_block_SPARC = { 253 - .name = "SPARC", 254 - .do_2 = sparc_2, 255 - .do_3 = sparc_3, 256 - .do_4 = sparc_4, 257 - .do_5 = sparc_5, 258 - }; 259 - 260 - /* For grins, also test the generic routines. */ 261 - #include <asm-generic/xor.h> 262 - 263 - #undef XOR_TRY_TEMPLATES 264 - #define XOR_TRY_TEMPLATES \ 265 - do { \ 266 - xor_speed(&xor_block_8regs); \ 267 - xor_speed(&xor_block_32regs); \ 268 - xor_speed(&xor_block_SPARC); \ 269 - } while (0)
-70
include/asm-sparc/xor_64.h
··· 1 - /* 2 - * include/asm-sparc64/xor.h 3 - * 4 - * High speed xor_block operation for RAID4/5 utilizing the 5 - * UltraSparc Visual Instruction Set and Niagara block-init 6 - * twin-load instructions. 7 - * 8 - * Copyright (C) 1997, 1999 Jakub Jelinek (jj@ultra.linux.cz) 9 - * Copyright (C) 2006 David S. Miller <davem@davemloft.net> 10 - * 11 - * This program is free software; you can redistribute it and/or modify 12 - * it under the terms of the GNU General Public License as published by 13 - * the Free Software Foundation; either version 2, or (at your option) 14 - * any later version. 15 - * 16 - * You should have received a copy of the GNU General Public License 17 - * (for example /usr/src/linux/COPYING); if not, write to the Free 18 - * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 19 - */ 20 - 21 - #include <asm/spitfire.h> 22 - 23 - extern void xor_vis_2(unsigned long, unsigned long *, unsigned long *); 24 - extern void xor_vis_3(unsigned long, unsigned long *, unsigned long *, 25 - unsigned long *); 26 - extern void xor_vis_4(unsigned long, unsigned long *, unsigned long *, 27 - unsigned long *, unsigned long *); 28 - extern void xor_vis_5(unsigned long, unsigned long *, unsigned long *, 29 - unsigned long *, unsigned long *, unsigned long *); 30 - 31 - /* XXX Ugh, write cheetah versions... -DaveM */ 32 - 33 - static struct xor_block_template xor_block_VIS = { 34 - .name = "VIS", 35 - .do_2 = xor_vis_2, 36 - .do_3 = xor_vis_3, 37 - .do_4 = xor_vis_4, 38 - .do_5 = xor_vis_5, 39 - }; 40 - 41 - extern void xor_niagara_2(unsigned long, unsigned long *, unsigned long *); 42 - extern void xor_niagara_3(unsigned long, unsigned long *, unsigned long *, 43 - unsigned long *); 44 - extern void xor_niagara_4(unsigned long, unsigned long *, unsigned long *, 45 - unsigned long *, unsigned long *); 46 - extern void xor_niagara_5(unsigned long, unsigned long *, unsigned long *, 47 - unsigned long *, unsigned long *, unsigned long *); 48 - 49 - static struct xor_block_template xor_block_niagara = { 50 - .name = "Niagara", 51 - .do_2 = xor_niagara_2, 52 - .do_3 = xor_niagara_3, 53 - .do_4 = xor_niagara_4, 54 - .do_5 = xor_niagara_5, 55 - }; 56 - 57 - #undef XOR_TRY_TEMPLATES 58 - #define XOR_TRY_TEMPLATES \ 59 - do { \ 60 - xor_speed(&xor_block_VIS); \ 61 - xor_speed(&xor_block_niagara); \ 62 - } while (0) 63 - 64 - /* For VIS for everything except Niagara. */ 65 - #define XOR_SELECT_TEMPLATE(FASTEST) \ 66 - ((tlb_type == hypervisor && \ 67 - (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 || \ 68 - sun4v_chip_type == SUN4V_CHIP_NIAGARA2)) ? \ 69 - &xor_block_niagara : \ 70 - &xor_block_VIS)
-1
include/asm-sparc64/Kbuild
··· 1 - # dummy file to avoid breaking make headers_install
-1
include/asm-sparc64/agp.h
··· 1 - #include <asm-sparc/agp.h>
-1
include/asm-sparc64/apb.h
··· 1 - #include <asm-sparc/apb.h>
-1
include/asm-sparc64/asi.h
··· 1 - #include <asm-sparc/asi.h>
-1
include/asm-sparc64/atomic.h
··· 1 - #include <asm-sparc/atomic.h>
-1
include/asm-sparc64/auxio.h
··· 1 - #include <asm-sparc/auxio.h>
-1
include/asm-sparc64/auxvec.h
··· 1 - #include <asm-sparc/auxvec.h>
-1
include/asm-sparc64/backoff.h
··· 1 - #include <asm-sparc/backoff.h>
-1
include/asm-sparc64/bbc.h
··· 1 - #include <asm-sparc/bbc.h>
-1
include/asm-sparc64/bitops.h
··· 1 - #include <asm-sparc/bitops.h>
-1
include/asm-sparc64/bpp.h
··· 1 - #include <asm-sparc/bpp.h>
-1
include/asm-sparc64/bug.h
··· 1 - #include <asm-sparc/bug.h>
-1
include/asm-sparc64/bugs.h
··· 1 - #include <asm-sparc/bugs.h>
-1
include/asm-sparc64/byteorder.h
··· 1 - #include <asm-sparc/byteorder.h>
-1
include/asm-sparc64/cache.h
··· 1 - #include <asm-sparc/cache.h>
-1
include/asm-sparc64/cacheflush.h
··· 1 - #include <asm-sparc/cacheflush.h>
-1
include/asm-sparc64/chafsr.h
··· 1 - #include <asm-sparc/chafsr.h>
-1
include/asm-sparc64/checksum.h
··· 1 - #include <asm-sparc/checksum.h>
-1
include/asm-sparc64/chmctrl.h
··· 1 - #include <asm-sparc/chmctrl.h>
-1
include/asm-sparc64/cmt.h
··· 1 - #include <asm-sparc/cmt.h>
-1
include/asm-sparc64/compat.h
··· 1 - #include <asm-sparc/compat.h>
-1
include/asm-sparc64/compat_signal.h
··· 1 - #include <asm-sparc/compat_signal.h>
-1
include/asm-sparc64/cpudata.h
··· 1 - #include <asm-sparc/cpudata.h>
-1
include/asm-sparc64/cputime.h
··· 1 - #include <asm-sparc/cputime.h>
-1
include/asm-sparc64/current.h
··· 1 - #include <asm-sparc/current.h>
-1
include/asm-sparc64/dcr.h
··· 1 - #include <asm-sparc/dcr.h>
-1
include/asm-sparc64/dcu.h
··· 1 - #include <asm-sparc/dcu.h>
-1
include/asm-sparc64/delay.h
··· 1 - #include <asm-sparc/delay.h>
-1
include/asm-sparc64/device.h
··· 1 - #include <asm-sparc/device.h>
-1
include/asm-sparc64/display7seg.h
··· 1 - #include <asm-sparc/display7seg.h>
-1
include/asm-sparc64/div64.h
··· 1 - #include <asm-sparc/div64.h>
-1
include/asm-sparc64/dma-mapping.h
··· 1 - #include <asm-sparc/dma-mapping.h>
-1
include/asm-sparc64/dma.h
··· 1 - #include <asm-sparc/dma.h>
-1
include/asm-sparc64/ebus.h
··· 1 - #include <asm-sparc/ebus.h>
-1
include/asm-sparc64/elf.h
··· 1 - #include <asm-sparc/elf.h>
-1
include/asm-sparc64/emergency-restart.h
··· 1 - #include <asm-sparc/emergency-restart.h>
-1
include/asm-sparc64/envctrl.h
··· 1 - #include <asm-sparc/envctrl.h>
-1
include/asm-sparc64/errno.h
··· 1 - #include <asm-sparc/errno.h>
-1
include/asm-sparc64/estate.h
··· 1 - #include <asm-sparc/estate.h>
-1
include/asm-sparc64/fb.h
··· 1 - #include <asm-sparc/fb.h>
-1
include/asm-sparc64/fbio.h
··· 1 - #include <asm-sparc/fbio.h>
-1
include/asm-sparc64/fcntl.h
··· 1 - #include <asm-sparc/fcntl.h>
-1
include/asm-sparc64/fhc.h
··· 1 - #include <asm-sparc/fhc.h>
-1
include/asm-sparc64/floppy.h
··· 1 - #include <asm-sparc/floppy.h>
-1
include/asm-sparc64/fpumacro.h
··· 1 - #include <asm-sparc/fpumacro.h>
include/asm-sparc64/ftrace.h arch/sparc/include/asm/ftrace.h
-1
include/asm-sparc64/futex.h
··· 1 - #include <asm-sparc/futex.h>
-1
include/asm-sparc64/hardirq.h
··· 1 - #include <asm-sparc/hardirq.h>
-1
include/asm-sparc64/head.h
··· 1 - #include <asm-sparc/head.h>
-1
include/asm-sparc64/hugetlb.h
··· 1 - #include <asm-sparc/hugetlb.h>
-1
include/asm-sparc64/hvtramp.h
··· 1 - #include <asm-sparc/hvtramp.h>
-1
include/asm-sparc64/hw_irq.h
··· 1 - #include <asm-sparc/hw_irq.h>
-1
include/asm-sparc64/hypervisor.h
··· 1 - #include <asm-sparc/hypervisor.h>
-1
include/asm-sparc64/ide.h
··· 1 - #include <asm-sparc/ide.h>
-1
include/asm-sparc64/idprom.h
··· 1 - #include <asm-sparc/idprom.h>
-1
include/asm-sparc64/intr_queue.h
··· 1 - #include <asm-sparc/intr_queue.h>
-1
include/asm-sparc64/io.h
··· 1 - #include <asm-sparc/io.h>
-1
include/asm-sparc64/ioctl.h
··· 1 - #include <asm-sparc/ioctl.h>
-1
include/asm-sparc64/ioctls.h
··· 1 - #include <asm-sparc/ioctls.h>
-1
include/asm-sparc64/iommu.h
··· 1 - #include <asm-sparc/iommu.h>
-1
include/asm-sparc64/ipcbuf.h
··· 1 - #include <asm-sparc/ipcbuf.h>
-1
include/asm-sparc64/irq.h
··· 1 - #include <asm-sparc/irq.h>
-1
include/asm-sparc64/irq_regs.h
··· 1 - #include <asm-sparc/irq_regs.h>
-1
include/asm-sparc64/irqflags.h
··· 1 - #include <asm-sparc/irqflags.h>
-1
include/asm-sparc64/kdebug.h
··· 1 - #include <asm-sparc/kdebug.h>
-1
include/asm-sparc64/kgdb.h
··· 1 - #include <asm-sparc/kgdb.h>
-1
include/asm-sparc64/kmap_types.h
··· 1 - #include <asm-sparc/kmap_types.h>
-1
include/asm-sparc64/kprobes.h
··· 1 - #include <asm-sparc/kprobes.h>
-1
include/asm-sparc64/ldc.h
··· 1 - #include <asm-sparc/ldc.h>
-1
include/asm-sparc64/linkage.h
··· 1 - #include <asm-sparc/linkage.h>
-1
include/asm-sparc64/lmb.h
··· 1 - #include <asm-sparc/lmb.h>
-1
include/asm-sparc64/local.h
··· 1 - #include <asm-generic/local.h>
-1
include/asm-sparc64/lsu.h
··· 1 - #include <asm-sparc/lsu.h>
-1
include/asm-sparc64/mc146818rtc.h
··· 1 - #include <asm-sparc/mc146818rtc.h>
-1
include/asm-sparc64/mdesc.h
··· 1 - #include <asm-sparc/mdesc.h>
-1
include/asm-sparc64/mman.h
··· 1 - #include <asm-sparc/mman.h>
-1
include/asm-sparc64/mmu.h
··· 1 - #include <asm-sparc/mmu.h>
-1
include/asm-sparc64/mmu_context.h
··· 1 - #include <asm-sparc/mmu_context.h>
-1
include/asm-sparc64/mmzone.h
··· 1 - #include <asm-sparc/mmzone.h>
-1
include/asm-sparc64/module.h
··· 1 - #include <asm-sparc/module.h>
-1
include/asm-sparc64/mostek.h
··· 1 - #include <asm-sparc/mostek.h>
-1
include/asm-sparc64/msgbuf.h
··· 1 - #include <asm-sparc/msgbuf.h>
-1
include/asm-sparc64/mutex.h
··· 1 - #include <asm-sparc/mutex.h>
-1
include/asm-sparc64/ns87303.h
··· 1 - #include <asm-sparc/ns87303.h>
-1
include/asm-sparc64/of_device.h
··· 1 - #include <asm-sparc/of_device.h>
-1
include/asm-sparc64/of_platform.h
··· 1 - #include <asm-sparc/of_platform.h>
-1
include/asm-sparc64/openprom.h
··· 1 - #include <asm-sparc/openprom.h>
-1
include/asm-sparc64/openpromio.h
··· 1 - #include <asm-sparc/openpromio.h>
-1
include/asm-sparc64/oplib.h
··· 1 - #include <asm-sparc/oplib.h>
-1
include/asm-sparc64/page.h
··· 1 - #include <asm-sparc/page.h>
-1
include/asm-sparc64/param.h
··· 1 - #include <asm-sparc/param.h>
-1
include/asm-sparc64/parport.h
··· 1 - #include <asm-sparc/parport.h>
-1
include/asm-sparc64/pci.h
··· 1 - #include <asm-sparc/pci.h>
-1
include/asm-sparc64/percpu.h
··· 1 - #include <asm-sparc/percpu.h>
-1
include/asm-sparc64/perfctr.h
··· 1 - #include <asm-sparc/perfctr.h>
-1
include/asm-sparc64/pgalloc.h
··· 1 - #include <asm-sparc/pgalloc.h>
-1
include/asm-sparc64/pgtable.h
··· 1 - #include <asm-sparc/pgtable.h>
-1
include/asm-sparc64/pil.h
··· 1 - #include <asm-sparc/pil.h>
-1
include/asm-sparc64/poll.h
··· 1 - #include <asm-sparc/poll.h>
-1
include/asm-sparc64/posix_types.h
··· 1 - #include <asm-sparc/posix_types.h>
-1
include/asm-sparc64/processor.h
··· 1 - #include <asm-sparc/processor.h>
-1
include/asm-sparc64/prom.h
··· 1 - #include <asm-sparc/prom.h>
-1
include/asm-sparc64/psrcompat.h
··· 1 - #include <asm-sparc/psrcompat.h>
-1
include/asm-sparc64/pstate.h
··· 1 - #include <asm-sparc/pstate.h>
-1
include/asm-sparc64/ptrace.h
··· 1 - #include <asm-sparc/ptrace.h>
-1
include/asm-sparc64/reboot.h
··· 1 - #include <asm-sparc/reboot.h>
-1
include/asm-sparc64/reg.h
··· 1 - #include <asm-sparc/reg.h>
-1
include/asm-sparc64/resource.h
··· 1 - #include <asm-sparc/resource.h>
-1
include/asm-sparc64/rtc.h
··· 1 - #include <asm-sparc/rtc.h>
-1
include/asm-sparc64/rwsem-const.h
··· 1 - #include <asm-sparc/rwsem-const.h>
-1
include/asm-sparc64/rwsem.h
··· 1 - #include <asm-sparc/rwsem.h>
-1
include/asm-sparc64/sbus.h
··· 1 - #include <asm-sparc/sbus.h>
-1
include/asm-sparc64/scatterlist.h
··· 1 - #include <asm-sparc/scatterlist.h>
-1
include/asm-sparc64/scratchpad.h
··· 1 - #include <asm-sparc/scratchpad.h>
-1
include/asm-sparc64/seccomp.h
··· 1 - #include <asm-sparc/seccomp.h>
-1
include/asm-sparc64/sections.h
··· 1 - #include <asm-sparc/sections.h>
-1
include/asm-sparc64/sembuf.h
··· 1 - #include <asm-sparc/sembuf.h>
-1
include/asm-sparc64/setup.h
··· 1 - #include <asm-sparc/setup.h>
-1
include/asm-sparc64/sfafsr.h
··· 1 - #include <asm-sparc/sfafsr.h>
-1
include/asm-sparc64/sfp-machine.h
··· 1 - #include <asm-sparc/sfp-machine.h>
-1
include/asm-sparc64/shmbuf.h
··· 1 - #include <asm-sparc/shmbuf.h>
-1
include/asm-sparc64/shmparam.h
··· 1 - #include <asm-sparc/shmparam.h>
-1
include/asm-sparc64/sigcontext.h
··· 1 - #include <asm-sparc/sigcontext.h>
-1
include/asm-sparc64/siginfo.h
··· 1 - #include <asm-sparc/siginfo.h>
-1
include/asm-sparc64/signal.h
··· 1 - #include <asm-sparc/signal.h>
-1
include/asm-sparc64/smp.h
··· 1 - #include <asm-sparc/smp.h>
-1
include/asm-sparc64/socket.h
··· 1 - #include <asm-sparc/socket.h>
-1
include/asm-sparc64/sockios.h
··· 1 - #include <asm-sparc/sockios.h>
-1
include/asm-sparc64/sparsemem.h
··· 1 - #include <asm-sparc/sparsemem.h>
-1
include/asm-sparc64/spinlock.h
··· 1 - #include <asm-sparc/spinlock.h>
-1
include/asm-sparc64/spinlock_types.h
··· 1 - #include <asm-sparc/spinlock_types.h>
-1
include/asm-sparc64/spitfire.h
··· 1 - #include <asm-sparc/spitfire.h>
-1
include/asm-sparc64/sstate.h
··· 1 - #include <asm-sparc/sstate.h>
-1
include/asm-sparc64/stacktrace.h
··· 1 - #include <asm-sparc/stacktrace.h>
-1
include/asm-sparc64/starfire.h
··· 1 - #include <asm-sparc/starfire.h>
-1
include/asm-sparc64/stat.h
··· 1 - #include <asm-sparc/stat.h>
-1
include/asm-sparc64/statfs.h
··· 1 - #include <asm-sparc/statfs.h>
-1
include/asm-sparc64/string.h
··· 1 - #include <asm-sparc/string.h>
-1
include/asm-sparc64/sunbpp.h
··· 1 - #include <asm-sparc/sunbpp.h>
-1
include/asm-sparc64/syscalls.h
··· 1 - #include <asm-sparc/syscalls.h>
-1
include/asm-sparc64/system.h
··· 1 - #include <asm-sparc/system.h>
-1
include/asm-sparc64/termbits.h
··· 1 - #include <asm-sparc/termbits.h>
-1
include/asm-sparc64/termios.h
··· 1 - #include <asm-sparc/termios.h>
-1
include/asm-sparc64/thread_info.h
··· 1 - #include <asm-sparc/thread_info.h>
-1
include/asm-sparc64/timer.h
··· 1 - #include <asm-sparc/timer.h>
-1
include/asm-sparc64/timex.h
··· 1 - #include <asm-sparc/timex.h>
-1
include/asm-sparc64/tlb.h
··· 1 - #include <asm-sparc/tlb.h>
-1
include/asm-sparc64/tlbflush.h
··· 1 - #include <asm-sparc/tlbflush.h>
-1
include/asm-sparc64/topology.h
··· 1 - #include <asm-sparc/topology.h>
-1
include/asm-sparc64/tsb.h
··· 1 - #include <asm-sparc/tsb.h>
-1
include/asm-sparc64/ttable.h
··· 1 - #include <asm-sparc/ttable.h>
-1
include/asm-sparc64/types.h
··· 1 - #include <asm-sparc/types.h>
-1
include/asm-sparc64/uaccess.h
··· 1 - #include <asm-sparc/uaccess.h>
-1
include/asm-sparc64/uctx.h
··· 1 - #include <asm-sparc/uctx.h>
-1
include/asm-sparc64/unaligned.h
··· 1 - #include <asm-sparc/unaligned.h>
-1
include/asm-sparc64/unistd.h
··· 1 - #include <asm-sparc/unistd.h>
-1
include/asm-sparc64/upa.h
··· 1 - #include <asm-sparc/upa.h>
-1
include/asm-sparc64/user.h
··· 1 - #include <asm-sparc/user.h>
-1
include/asm-sparc64/utrap.h
··· 1 - #include <asm-sparc/utrap.h>
-1
include/asm-sparc64/vga.h
··· 1 - #include <asm-sparc/vga.h>
-1
include/asm-sparc64/vio.h
··· 1 - #include <asm-sparc/vio.h>
-1
include/asm-sparc64/visasm.h
··· 1 - #include <asm-sparc/visasm.h>
-1
include/asm-sparc64/watchdog.h
··· 1 - #include <asm-sparc/watchdog.h>
-1
include/asm-sparc64/xor.h
··· 1 - #include <asm-sparc/xor.h>