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soundwire: intel_auxdevice: start the bus at default frequency

When platform firmware exposes multiple supported bus frequencies, the
existing SoundWire support selects the maximum frequency. This is not
aligned with the SoundWire 1.2 directions: the MIPI recommendation is
to start at a 'safe' speed, compatible with the default frame rate and
shape, and only increase the clock when vendor and codec PHY
parameters are updated.

However, clock changes are not supported for now by the SoundWire
core, so in practice this patch has the effect of discarding
frequencies different to the implicit default. Dynamic clock changes
will be required at some point, and this limitation will be removed
after the core is updated, specifically to perform synchronous clock
scale changes on manager and peripheral sides with a bank switch.

On Intel LunarLake platforms with a 'standard' DSDT, this forces the
use of 4.8MHz. On older platforms this patch has no effect.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Link: https://lore.kernel.org/r/20240704003411.10347-1-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Pierre-Louis Bossart and committed by
Vinod Koul
c3263561 fe600c8e

+21
+21
drivers/soundwire/intel_auxdevice.c
··· 210 210 211 211 static int intel_prop_read(struct sdw_bus *bus) 212 212 { 213 + struct sdw_master_prop *prop; 214 + 213 215 /* Initialize with default handler to read all DisCo properties */ 214 216 sdw_master_read_prop(bus); 217 + 218 + /* 219 + * Only one bus frequency is supported so far, filter 220 + * frequencies reported in the DSDT 221 + */ 222 + prop = &bus->prop; 223 + if (prop->clk_freq && prop->num_clk_freq > 1) { 224 + unsigned int default_bus_frequency; 225 + 226 + default_bus_frequency = 227 + prop->default_frame_rate * 228 + prop->default_row * 229 + prop->default_col / 230 + SDW_DOUBLE_RATE_FACTOR; 231 + 232 + prop->num_clk_freq = 1; 233 + prop->clk_freq[0] = default_bus_frequency; 234 + prop->max_clk_freq = default_bus_frequency; 235 + } 215 236 216 237 /* read Intel-specific properties */ 217 238 sdw_master_read_intel_prop(bus);