remove the outdated arch/i386/kernel/cpu/{,mtrr/}changelog

This patch removes two outdated changelog files.

Signed-off-by: Adrian Bunk <[e-mail]>
Signed-off-by: Dave Jones <[e-mail]>

arch/i386/kernel/cpu/changelog

···
-/*
- *  Enhanced CPU type detection by Mike Jagdis, Patrick St. Jean
- *  and Martin Mares, November 1997.
- *
- *  Force Cyrix 6x86(MX) and M II processors to report MTRR capability
- *  and Cyrix "coma bug" recognition by
- *  Zolt�n B�sz�rm�nyi <[e-mail]> February 1999.
- * 
- *  Force Centaur C6 processors to report MTRR capability.
- *  Bart Hartgers <[e-mail]>, May 1999.
- *
- *  Intel Mobile Pentium II detection fix. Sean Gilley, June 1999.
- *
- *  IDT Winchip tweaks, misc clean ups.
- *  Dave Jones <[e-mail]>, August 1999
- *
- *  Better detection of Centaur/IDT WinChip models.
- *  Bart Hartgers <[e-mail]>, August 1999.
- *
- *  Cleaned up cache-detection code
- *  Dave Jones <[e-mail]>, October 1999
- *
- *  Added proper L2 cache detection for Coppermine
- *  Dragan Stancevic <[e-mail]>, October 1999
- *
- *  Added the original array for capability flags but forgot to credit 
- *  myself :) (~1998) Fixed/cleaned up some cpu_model_info and other stuff
- *  Jauder Ho <[e-mail]>, January 2000
- *
- *  Detection for Celeron coppermine, identify_cpu() overhauled,
- *  and a few other clean ups.
- *  Dave Jones <[e-mail]>, April 2000
- *
- *  Pentium III FXSR, SSE support
- *  General FPU state handling cleanups
- *  Gareth Hughes <[e-mail]>, May 2000
- *
- *  Added proper Cascades CPU and L2 cache detection for Cascades
- *  and 8-way type cache happy bunch from Intel:^)
- *  Dragan Stancevic <[e-mail]>, May 2000 
- *
- *  Forward port AMD Duron errata T13 from 2.2.17pre
- *  Dave Jones <[e-mail]>, August 2000
- *
- *  Forward port lots of fixes/improvements from 2.2.18pre
- *  Cyrix III, Pentium IV support.
- *  Dave Jones <[e-mail]>, October 2000
- *
- *  Massive cleanup of CPU detection and bug handling;
- *  Transmeta CPU detection,
- *  H. Peter Anvin <[e-mail]>, November 2000
- *
- *  VIA C3 Support.
- *  Dave Jones <[e-mail]>, March 2001
- *
- *  AMD Athlon/Duron/Thunderbird bluesmoke support.
- *  Dave Jones <[e-mail]>, April 2001.
- *
- *  CacheSize bug workaround updates for AMD, Intel & VIA Cyrix.
- *  Dave Jones <[e-mail]>, September, October 2001.
- *
- */
-

arch/i386/kernel/cpu/mtrr/changelog

···
-    ChangeLog
-
-    Prehistory Martin Tischh�user <[e-mail]>
-	       Initial register-setting code (from proform-1.0).
-    19971216   Richard Gooch <[e-mail]>
-               Original version for /proc/mtrr interface, SMP-safe.
-  v1.0
-    19971217   Richard Gooch <[e-mail]>
-               Bug fix for ioctls()'s.
-	       Added sample code in Documentation/mtrr.txt
-  v1.1
-    19971218   Richard Gooch <[e-mail]>
-               Disallow overlapping regions.
-    19971219   Jens Maurer <[e-mail]>
-               Register-setting fixups.
-  v1.2
-    19971222   Richard Gooch <[e-mail]>
-               Fixups for kernel 2.1.75.
-  v1.3
-    19971229   David Wragg <[e-mail]>
-               Register-setting fixups and conformity with Intel conventions.
-    19971229   Richard Gooch <[e-mail]>
-               Cosmetic changes and wrote this ChangeLog ;-)
-    19980106   Richard Gooch <[e-mail]>
-               Fixups for kernel 2.1.78.
-  v1.4
-    19980119   David Wragg <[e-mail]>
-               Included passive-release enable code (elsewhere in PCI setup).
-  v1.5
-    19980131   Richard Gooch <[e-mail]>
-               Replaced global kernel lock with private spinlock.
-  v1.6
-    19980201   Richard Gooch <[e-mail]>
-               Added wait for other CPUs to complete changes.
-  v1.7
-    19980202   Richard Gooch <[e-mail]>
-               Bug fix in definition of <set_mtrr> for UP.
-  v1.8
-    19980319   Richard Gooch <[e-mail]>
-               Fixups for kernel 2.1.90.
-    19980323   Richard Gooch <[e-mail]>
-               Move SMP BIOS fixup before secondary CPUs call <calibrate_delay>
-  v1.9
-    19980325   Richard Gooch <[e-mail]>
-               Fixed test for overlapping regions: confused by adjacent regions
-    19980326   Richard Gooch <[e-mail]>
-               Added wbinvd in <set_mtrr_prepare>.
-    19980401   Richard Gooch <[e-mail]>
-               Bug fix for non-SMP compilation.
-    19980418   David Wragg <[e-mail]>
-               Fixed-MTRR synchronisation for SMP and use atomic operations
-	       instead of spinlocks.
-    19980418   Richard Gooch <[e-mail]>
-	       Differentiate different MTRR register classes for BIOS fixup.
-  v1.10
-    19980419   David Wragg <[e-mail]>
-	       Bug fix in variable MTRR synchronisation.
-  v1.11
-    19980419   Richard Gooch <[e-mail]>
-	       Fixups for kernel 2.1.97.
-  v1.12
-    19980421   Richard Gooch <[e-mail]>
-	       Safer synchronisation across CPUs when changing MTRRs.
-  v1.13
-    19980423   Richard Gooch <[e-mail]>
-	       Bugfix for SMP systems without MTRR support.
-  v1.14
-    19980427   Richard Gooch <[e-mail]>
-	       Trap calls to <mtrr_add> and <mtrr_del> on non-MTRR machines.
-  v1.15
-    19980427   Richard Gooch <[e-mail]>
-	       Use atomic bitops for setting SMP change mask.
-  v1.16
-    19980428   Richard Gooch <[e-mail]>
-	       Removed spurious diagnostic message.
-  v1.17
-    19980429   Richard Gooch <[e-mail]>
-	       Moved register-setting macros into this file.
-	       Moved setup code from init/main.c to i386-specific areas.
-  v1.18
-    19980502   Richard Gooch <[e-mail]>
-	       Moved MTRR detection outside conditionals in <mtrr_init>.
-  v1.19
-    19980502   Richard Gooch <[e-mail]>
-	       Documentation improvement: mention Pentium II and AGP.
-  v1.20
-    19980521   Richard Gooch <[e-mail]>
-	       Only manipulate interrupt enable flag on local CPU.
-	       Allow enclosed uncachable regions.
-  v1.21
-    19980611   Richard Gooch <[e-mail]>
-	       Always define <main_lock>.
-  v1.22
-    19980901   Richard Gooch <[e-mail]>
-	       Removed module support in order to tidy up code.
-	       Added sanity check for <mtrr_add>/<mtrr_del> before <mtrr_init>.
-	       Created addition queue for prior to SMP commence.
-  v1.23
-    19980902   Richard Gooch <[e-mail]>
-	       Ported patch to kernel 2.1.120-pre3.
-  v1.24
-    19980910   Richard Gooch <[e-mail]>
-	       Removed sanity checks and addition queue: Linus prefers an OOPS.
-  v1.25
-    19981001   Richard Gooch <[e-mail]>
-	       Fixed harmless compiler warning in include/asm-i386/mtrr.h
-	       Fixed version numbering and history for v1.23 -> v1.24.
-  v1.26
-    19990118   Richard Gooch <[e-mail]>
-	       Added devfs support.
-  v1.27
-    19990123   Richard Gooch <[e-mail]>
-	       Changed locking to spin with reschedule.
-	       Made use of new <smp_call_function>.
-  v1.28
-    19990201   Zolt�n B�sz�rm�nyi <[e-mail]>
-	       Extended the driver to be able to use Cyrix style ARRs.
-    19990204   Richard Gooch <[e-mail]>
-	       Restructured Cyrix support.
-  v1.29
-    19990204   Zolt�n B�sz�rm�nyi <[e-mail]>
-	       Refined ARR support: enable MAPEN in set_mtrr_prepare()
-	       and disable MAPEN in set_mtrr_done().
-    19990205   Richard Gooch <[e-mail]>
-	       Minor cleanups.
-  v1.30
-    19990208   Zolt�n B�sz�rm�nyi <[e-mail]>
-               Protect plain 6x86s (and other processors without the
-               Page Global Enable feature) against accessing CR4 in
-               set_mtrr_prepare() and set_mtrr_done().
-    19990210   Richard Gooch <[e-mail]>
-	       Turned <set_mtrr_up> and <get_mtrr> into function pointers.
-  v1.31
-    19990212   Zolt�n B�sz�rm�nyi <[e-mail]>
-               Major rewrite of cyrix_arr_init(): do not touch ARRs,
-               leave them as the BIOS have set them up.
-               Enable usage of all 8 ARRs.
-               Avoid multiplications by 3 everywhere and other
-               code clean ups/speed ups.
-    19990213   Zolt�n B�sz�rm�nyi <[e-mail]>
-               Set up other Cyrix processors identical to the boot cpu.
-               Since Cyrix don't support Intel APIC, this is l'art pour l'art.
-               Weigh ARRs by size:
-               If size <= 32M is given, set up ARR# we were given.
-               If size >  32M is given, set up ARR7 only if it is free,
-               fail otherwise.
-    19990214   Zolt�n B�sz�rm�nyi <[e-mail]>
-               Also check for size >= 256K if we are to set up ARR7,
-               mtrr_add() returns the value it gets from set_mtrr()
-    19990218   Zolt�n B�sz�rm�nyi <[e-mail]>
-               Remove Cyrix "coma bug" workaround from here.
-               Moved to linux/arch/i386/kernel/setup.c and
-               linux/include/asm-i386/bugs.h
-    19990228   Richard Gooch <[e-mail]>
-	       Added MTRRIOC_KILL_ENTRY ioctl(2)
-	       Trap for counter underflow in <mtrr_file_del>.
-	       Trap for 4 MiB aligned regions for PPro, stepping <= 7.
-    19990301   Richard Gooch <[e-mail]>
-	       Created <get_free_region> hook.
-    19990305   Richard Gooch <[e-mail]>
-	       Temporarily disable AMD support now MTRR capability flag is set.
-  v1.32
-    19990308   Zolt�n B�sz�rm�nyi <[e-mail]>
-	       Adjust my changes (19990212-19990218) to Richard Gooch's
-	       latest changes. (19990228-19990305)
-  v1.33
-    19990309   Richard Gooch <[e-mail]>
-	       Fixed typo in <printk> message.
-    19990310   Richard Gooch <[e-mail]>
-	       Support K6-II/III based on Alan Cox's <[e-mail]> patches.
-  v1.34
-    19990511   Bart Hartgers <[e-mail]>
-	       Support Centaur C6 MCR's.
-    19990512   Richard Gooch <[e-mail]>
-	       Minor cleanups.
-  v1.35
-    19990707   Zolt�n B�sz�rm�nyi <[e-mail]>
-               Check whether ARR3 is protected in cyrix_get_free_region()
-               and mtrr_del(). The code won't attempt to delete or change it
-               from now on if the BIOS protected ARR3. It silently skips ARR3
-               in cyrix_get_free_region() or returns with an error code from
-               mtrr_del().
-    19990711   Zolt�n B�sz�rm�nyi <[e-mail]>
-               Reset some bits in the CCRs in cyrix_arr_init() to disable SMM
-               if ARR3 isn't protected. This is needed because if SMM is active
-               and ARR3 isn't protected then deleting and setting ARR3 again
-               may lock up the processor. With SMM entirely disabled, it does
-               not happen.
-    19990812   Zolt�n B�sz�rm�nyi <[e-mail]>
-               Rearrange switch() statements so the driver accomodates to
-               the fact that the AMD Athlon handles its MTRRs the same way
-               as Intel does.
-    19990814   Zolt�n B�sz�rm�nyi <[e-mail]>
-	       Double check for Intel in mtrr_add()'s big switch() because
-	       that revision check is only valid for Intel CPUs.
-    19990819   Alan Cox <[e-mail]>
-               Tested Zoltan's changes on a pre production Athlon - 100%
-               success.
-    19991008   Manfred Spraul <[e-mail]>
-    	       replaced spin_lock_reschedule() with a normal semaphore.
-  v1.36
-    20000221   Richard Gooch <[e-mail]>
-               Compile fix if procfs and devfs not enabled.
-	       Formatting changes.
-  v1.37
-    20001109   H. Peter Anvin <[e-mail]>
-	       Use the new centralized CPU feature detects.
-
-  v1.38
-    20010309   Dave Jones <[e-mail]>
-	       Add support for Cyrix III.
-
-  v1.39
-    20010312   Dave Jones <[e-mail]>
-               Ugh, I broke AMD support.
-	       Reworked fix by Troels Walsted Hansen <[e-mail]>
-
-  v1.40
-    20010327   Dave Jones <[e-mail]>
-	       Adapted Cyrix III support to include VIA C3.
-
-  v2.0
-    20020306   Patrick Mochel <[e-mail]>
-               Split mtrr.c -> mtrr/*.c
-               Converted to Linux Kernel Coding Style
-               Fixed several minor nits in form
-               Moved some SMP-only functions out, so they can be used
-                for power management in the future.
-               TODO: Fix user interface cruft.