Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

MIPS: ath79: add AR933X specific USB platform device registration

Also select the USB_ARCH_HAS_EHCI symbol in order to make the
EHCI driver available.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R. Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2527/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

authored by

Gabor Juhos and committed by
Ralf Baechle
c279b775 9d6b204f

+27
+1
arch/mips/ath79/Kconfig
··· 42 42 def_bool n 43 43 44 44 config SOC_AR933X 45 + select USB_ARCH_HAS_EHCI 45 46 def_bool n 46 47 47 48 config ATH79_DEV_AR913X_WMAC
+19
arch/mips/ath79/dev-usb.c
··· 163 163 platform_device_register(&ath79_ehci_device); 164 164 } 165 165 166 + static void __init ar933x_usb_setup(void) 167 + { 168 + ath79_device_reset_set(AR933X_RESET_USBSUS_OVERRIDE); 169 + mdelay(10); 170 + 171 + ath79_device_reset_clear(AR933X_RESET_USB_HOST); 172 + mdelay(10); 173 + 174 + ath79_device_reset_clear(AR933X_RESET_USB_PHY); 175 + mdelay(10); 176 + 177 + ath79_ehci_resources[0].start = AR933X_EHCI_BASE; 178 + ath79_ehci_resources[0].end = AR933X_EHCI_BASE + AR933X_EHCI_SIZE - 1; 179 + ath79_ehci_device.name = "ar933x-ehci"; 180 + platform_device_register(&ath79_ehci_device); 181 + } 182 + 166 183 void __init ath79_register_usb(void) 167 184 { 168 185 if (soc_is_ar71xx()) ··· 190 173 ar724x_usb_setup(); 191 174 else if (soc_is_ar913x()) 192 175 ar913x_usb_setup(); 176 + else if (soc_is_ar933x()) 177 + ar933x_usb_setup(); 193 178 else 194 179 BUG(); 195 180 }
+7
arch/mips/include/asm/mach-ath79/ar71xx_regs.h
··· 56 56 #define AR933X_UART_BASE (AR71XX_APB_BASE + 0x00020000) 57 57 #define AR933X_UART_SIZE 0x14 58 58 59 + #define AR933X_EHCI_BASE 0x1b000000 60 + #define AR933X_EHCI_SIZE 0x1000 61 + 59 62 /* 60 63 * DDR_CTRL block 61 64 */ ··· 232 229 #define AR913X_RESET_USBSUS_OVERRIDE BIT(10) 233 230 #define AR913X_RESET_USB_HOST BIT(5) 234 231 #define AR913X_RESET_USB_PHY BIT(4) 232 + 233 + #define AR933X_RESET_USB_HOST BIT(5) 234 + #define AR933X_RESET_USB_PHY BIT(4) 235 + #define AR933X_RESET_USBSUS_OVERRIDE BIT(3) 235 236 236 237 #define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0) 237 238