tjh.dev / kernel
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hwmon: (w83627ehf) Add W83627DHG-P support

Add support for the new incarnation of the Winbond/Nuvoton W83627DHG
chip known as W83627DHG-P. It is basically the same as the original
W83627DHG with an additional automatic can speed control mode (not
supported by the driver yet.)

Signed-off-by: Jean Delvare <khali@linux-fr.org>
Tested-by: Madhu <madhu.chinakonda@gmail.com>

Jean Delvare c1e48dce cd4e96c5

+18 -3
+9 -2
Documentation/hwmon/w83627ehf
··· 12 12 Addresses scanned: ISA address retrieved from Super I/O registers 13 13 Datasheet: 14 14 http://www.nuvoton.com.tw/NR/rdonlyres/7885623D-A487-4CF9-A47F-30C5F73D6FE6/0/W83627DHG.pdf 15 + * Winbond W83627DHG-P 16 + Prefix: 'w83627dhg' 17 + Addresses scanned: ISA address retrieved from Super I/O registers 18 + Datasheet: not available 15 19 * Winbond W83667HG 16 20 Prefix: 'w83667hg' 17 21 Addresses scanned: ISA address retrieved from Super I/O registers ··· 32 28 ----------- 33 29 34 30 This driver implements support for the Winbond W83627EHF, W83627EHG, 35 - W83627DHG and W83667HG super I/O chips. We will refer to them collectively 36 - as Winbond chips. 31 + W83627DHG, W83627DHG-P and W83667HG super I/O chips. We will refer to them 32 + collectively as Winbond chips. 37 33 38 34 The chips implement three temperature sensors, five fan rotation 39 35 speed sensors, ten analog voltage sensors (only nine for the 627DHG), one ··· 139 135 The DHG also supports PECI, where the DHG queries Intel CPU temperatures, and 140 136 the ICH8 southbridge gets that data via PECI from the DHG, so that the 141 137 southbridge drives the fans. And the DHG supports SST, a one-wire serial bus. 138 + 139 + The DHG-P has an additional automatic fan speed control mode named Smart Fan 140 + (TM) III+. This mode is not yet supported by the driver.
+9 -1
drivers/hwmon/w83627ehf.c
··· 36 36 w83627ehf 10 5 4 3 0x8850 0x88 0x5ca3 37 37 0x8860 0xa1 38 38 w83627dhg 9 5 4 3 0xa020 0xc1 0x5ca3 39 + w83627dhg-p 9 5 4 3 0xb070 0xc1 0x5ca3 39 40 w83667hg 9 5 3 3 0xa510 0xc1 0x5ca3 40 41 */ 41 42 ··· 54 53 #include <asm/io.h> 55 54 #include "lm75.h" 56 55 57 - enum kinds { w83627ehf, w83627dhg, w83667hg }; 56 + enum kinds { w83627ehf, w83627dhg, w83627dhg_p, w83667hg }; 58 57 59 58 /* used to set data->name = w83627ehf_device_names[data->sio_kind] */ 60 59 static const char * w83627ehf_device_names[] = { 61 60 "w83627ehf", 61 + "w83627dhg", 62 62 "w83627dhg", 63 63 "w83667hg", 64 64 }; ··· 88 86 #define SIO_W83627EHF_ID 0x8850 89 87 #define SIO_W83627EHG_ID 0x8860 90 88 #define SIO_W83627DHG_ID 0xa020 89 + #define SIO_W83627DHG_P_ID 0xb070 91 90 #define SIO_W83667HG_ID 0xa510 92 91 #define SIO_ID_MASK 0xFFF0 93 92 ··· 1520 1517 static const char __initdata sio_name_W83627EHF[] = "W83627EHF"; 1521 1518 static const char __initdata sio_name_W83627EHG[] = "W83627EHG"; 1522 1519 static const char __initdata sio_name_W83627DHG[] = "W83627DHG"; 1520 + static const char __initdata sio_name_W83627DHG_P[] = "W83627DHG-P"; 1523 1521 static const char __initdata sio_name_W83667HG[] = "W83667HG"; 1524 1522 1525 1523 u16 val; ··· 1545 1541 case SIO_W83627DHG_ID: 1546 1542 sio_data->kind = w83627dhg; 1547 1543 sio_name = sio_name_W83627DHG; 1544 + break; 1545 + case SIO_W83627DHG_P_ID: 1546 + sio_data->kind = w83627dhg_p; 1547 + sio_name = sio_name_W83627DHG_P; 1548 1548 break; 1549 1549 case SIO_W83667HG_ID: 1550 1550 sio_data->kind = w83667hg;