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ARM: dts: r8a73a4: Add INTC-SYS clock to device tree
Link the ARM GIC to the INTC-SYS module clock and the C4 power domain,
so it can be power managed using that clock in the future.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
authored by
Geert Uytterhoeven
and committed by
Simon Horman
c11333cc
69ed50de
+10
-4
+9
-4
arch/arm/boot/dts/r8a73a4.dtsi
+9
-4
arch/arm/boot/dts/r8a73a4.dtsi
···
467
467
<0 0xf1004000 0 0x2000>,
468
468
<0 0xf1006000 0 0x2000>;
469
469
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
470
+
clocks = <&mstp4_clks R8A73A4_CLK_INTC_SYS>;
471
+
clock-names = "clk";
472
+
power-domains = <&pd_c4>;
470
473
};
471
474
472
475
bsc: bus@fec10000 {
···
728
725
mstp4_clks: mstp4_clks@e6150140 {
729
726
compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";
730
727
reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
731
-
clocks = <&main_div2_clk>, <&main_div2_clk>,
728
+
clocks = <&main_div2_clk>, <&cpg_clocks R8A73A4_CLK_ZS>,
729
+
<&main_div2_clk>,
732
730
<&cpg_clocks R8A73A4_CLK_HP>,
733
731
<&cpg_clocks R8A73A4_CLK_HP>;
734
732
#clock-cells = <1>;
735
733
clock-indices = <
736
-
R8A73A4_CLK_IRQC R8A73A4_CLK_IIC5
737
-
R8A73A4_CLK_IIC4 R8A73A4_CLK_IIC3
734
+
R8A73A4_CLK_IRQC R8A73A4_CLK_INTC_SYS
735
+
R8A73A4_CLK_IIC5 R8A73A4_CLK_IIC4
736
+
R8A73A4_CLK_IIC3
738
737
>;
739
738
clock-output-names =
740
-
"irqc", "iic5", "iic4", "iic3";
739
+
"irqc", "intc-sys", "iic5", "iic4", "iic3";
741
740
};
742
741
mstp5_clks: mstp5_clks@e6150144 {
743
742
compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks";