Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/omap: generalize dss_pll_calc_b()

dss_pll_calc_b() takes HDMI TMDS clock rate as a parameter. To make
dss_pll_calc_b() usable for non-HDMI users, change the function to take
clkout rate as parameter, and also change the current users of
dss_pll_calc_b() to accommodate that.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>

+17 -8
+1 -1
drivers/gpu/drm/omapdrm/dss/dss.h
··· 443 443 dss_pll_calc_func func, void *data); 444 444 445 445 bool dss_pll_calc_b(const struct dss_pll *pll, unsigned long clkin, 446 - unsigned long target_tmds, struct dss_pll_clock_info *cinfo); 446 + unsigned long target_clkout, struct dss_pll_clock_info *cinfo); 447 447 448 448 int dss_pll_write_config_type_a(struct dss_pll *pll, 449 449 const struct dss_pll_clock_info *cinfo);
+3
drivers/gpu/drm/omapdrm/dss/hdmi4.c
··· 186 186 if (p->double_pixel) 187 187 pc *= 2; 188 188 189 + /* DSS_HDMI_TCLK is bitclk / 10 */ 190 + pc *= 10; 191 + 189 192 dss_pll_calc_b(&hdmi.pll.pll, clk_get_rate(hdmi.pll.pll.clkin), 190 193 pc, &hdmi_cinfo); 191 194
+3
drivers/gpu/drm/omapdrm/dss/hdmi5.c
··· 198 198 if (p->double_pixel) 199 199 pc *= 2; 200 200 201 + /* DSS_HDMI_TCLK is bitclk / 10 */ 202 + pc *= 10; 203 + 201 204 dss_pll_calc_b(&hdmi.pll.pll, clk_get_rate(hdmi.pll.pll.clkin), 202 205 pc, &hdmi_cinfo); 203 206
+10 -7
drivers/gpu/drm/omapdrm/dss/pll.c
··· 248 248 return false; 249 249 } 250 250 251 + /* 252 + * This calculates a PLL config that will provide the target_clkout rate 253 + * for clkout. Additionally clkdco rate will be the same as clkout rate 254 + * when clkout rate is >= min_clkdco. 255 + */ 251 256 bool dss_pll_calc_b(const struct dss_pll *pll, unsigned long clkin, 252 - unsigned long target_tmds, struct dss_pll_clock_info *cinfo) 257 + unsigned long target_clkout, struct dss_pll_clock_info *cinfo) 253 258 { 254 259 unsigned long fint, clkdco, clkout; 255 - unsigned long target_bitclk, target_clkdco; 260 + unsigned long target_clkdco; 256 261 unsigned long min_dco; 257 262 unsigned n, m, mf, m2, sd; 258 263 const struct dss_pll_hw *hw = pll->hw; 259 264 260 - DSSDBG("clkin %lu, target tmds %lu\n", clkin, target_tmds); 261 - 262 - target_bitclk = target_tmds * 10; 265 + DSSDBG("clkin %lu, target clkout %lu\n", clkin, target_clkout); 263 266 264 267 /* Fint */ 265 268 n = DIV_ROUND_UP(clkin, hw->fint_max); ··· 270 267 271 268 /* adjust m2 so that the clkdco will be high enough */ 272 269 min_dco = roundup(hw->clkdco_min, fint); 273 - m2 = DIV_ROUND_UP(min_dco, target_bitclk); 270 + m2 = DIV_ROUND_UP(min_dco, target_clkout); 274 271 if (m2 == 0) 275 272 m2 = 1; 276 273 277 - target_clkdco = target_bitclk * m2; 274 + target_clkdco = target_clkout * m2; 278 275 m = target_clkdco / fint; 279 276 280 277 clkdco = fint * m;