Merge tag 'tty-6.9-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty

Pull tty/serial driver fixes from Greg KH:
"Here are some small tty and serial driver fixes for 6.9-rc5 that
resolve a bunch of reported problems. Included in here are:

- MAINTAINERS and .mailmap update for Richard Genoud

- serial core regression fixes from 6.9-rc1 changes

- pci id cleanups

- serial core crash fix

- stm32 driver fixes

- 8250 driver fixes

All of these have been in linux-next for a while with no reported
problems"

* tag 'tty-6.9-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty:
serial: stm32: Reset .throttled state in .startup()
serial: stm32: Return IRQ_NONE in the ISR if no handling happend
serial: core: Fix missing shutdown and startup for serial base port
serial: core: Clearing the circular buffer before NULLifying it
MAINTAINERS: mailmap: update Richard Genoud's email address
serial/pmac_zilog: Remove flawed mitigation for rx irq flood
serial: 8250_pci: Remove redundant PCI IDs
serial: core: Fix regression when runtime PM is not enabled
serial: mxs-auart: add spinlock around changing cts state
serial: 8250_dw: Revert: Do not reclock if already at correct rate
serial: 8250_lpc18xx: disable clks on error in probe()

+1
.mailmap
··· 525 525 Ricardo Ribalda <ribalda@kernel.org> <ricardo@ribalda.com> 526 526 Ricardo Ribalda <ribalda@kernel.org> Ricardo Ribalda Delgado <ribalda@kernel.org> 527 527 Ricardo Ribalda <ribalda@kernel.org> <ricardo.ribalda@gmail.com> 528 + Richard Genoud <richard.genoud@bootlin.com> <richard.genoud@gmail.com> 528 529 Richard Leitner <richard.leitner@linux.dev> <dev@g0hl1n.net> 529 530 Richard Leitner <richard.leitner@linux.dev> <me@g0hl1n.net> 530 531 Richard Leitner <richard.leitner@linux.dev> <richard.leitner@skidata.com>
+1 -1
Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml
··· 8 8 title: Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART) 9 9 10 10 maintainers: 11 - - Richard Genoud <richard.genoud@gmail.com> 11 + - Richard Genoud <richard.genoud@bootlin.com> 12 12 13 13 properties: 14 14 compatible:
+1 -1
MAINTAINERS
··· 14356 14356 F: include/dt-bindings/dma/at91.h 14357 14357 14358 14358 MICROCHIP AT91 SERIAL DRIVER 14359 - M: Richard Genoud <richard.genoud@gmail.com> 14359 + M: Richard Genoud <richard.genoud@bootlin.com> 14360 14360 S: Maintained 14361 14361 F: Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml 14362 14362 F: drivers/tty/serial/atmel_serial.c
+3 -3
drivers/tty/serial/8250/8250_dw.c
··· 356 356 long rate; 357 357 int ret; 358 358 359 + clk_disable_unprepare(d->clk); 359 360 rate = clk_round_rate(d->clk, newrate); 360 - if (rate > 0 && p->uartclk != rate) { 361 - clk_disable_unprepare(d->clk); 361 + if (rate > 0) { 362 362 /* 363 363 * Note that any clock-notifer worker will block in 364 364 * serial8250_update_uartclk() until we are done. ··· 366 366 ret = clk_set_rate(d->clk, newrate); 367 367 if (!ret) 368 368 p->uartclk = rate; 369 - clk_prepare_enable(d->clk); 370 369 } 370 + clk_prepare_enable(d->clk); 371 371 372 372 dw8250_do_set_termios(p, termios, old); 373 373 }
+1 -1
drivers/tty/serial/8250/8250_lpc18xx.c
··· 151 151 152 152 ret = uart_read_port_properties(&uart.port); 153 153 if (ret) 154 - return ret; 154 + goto dis_uart_clk; 155 155 156 156 uart.port.iotype = UPIO_MEM32; 157 157 uart.port.regshift = 2;
-6
drivers/tty/serial/8250/8250_pci.c
··· 5010 5010 { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_QUATRO_B, 5011 5011 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5012 5012 pbn_b0_bt_2_115200 }, 5013 - { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_QUATTRO_A, 5014 - PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5015 - pbn_b0_bt_2_115200 }, 5016 - { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_QUATTRO_B, 5017 - PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5018 - pbn_b0_bt_2_115200 }, 5019 5013 { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_OCTO_A, 5020 5014 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5021 5015 pbn_b0_bt_4_460800 },
+6 -2
drivers/tty/serial/mxs-auart.c
··· 1086 1086 1087 1087 static irqreturn_t mxs_auart_irq_handle(int irq, void *context) 1088 1088 { 1089 - u32 istat; 1089 + u32 istat, stat; 1090 1090 struct mxs_auart_port *s = context; 1091 1091 u32 mctrl_temp = s->mctrl_prev; 1092 - u32 stat = mxs_read(s, REG_STAT); 1093 1092 1093 + uart_port_lock(&s->port); 1094 + 1095 + stat = mxs_read(s, REG_STAT); 1094 1096 istat = mxs_read(s, REG_INTR); 1095 1097 1096 1098 /* ack irq */ ··· 1127 1125 mxs_auart_tx_chars(s); 1128 1126 istat &= ~AUART_INTR_TXIS; 1129 1127 } 1128 + 1129 + uart_port_unlock(&s->port); 1130 1130 1131 1131 return IRQ_HANDLED; 1132 1132 }
-14
drivers/tty/serial/pmac_zilog.c
··· 210 210 { 211 211 struct tty_port *port; 212 212 unsigned char ch, r1, drop, flag; 213 - int loops = 0; 214 213 215 214 /* Sanity check, make sure the old bug is no longer happening */ 216 215 if (uap->port.state == NULL) { ··· 290 291 if (r1 & Rx_OVR) 291 292 tty_insert_flip_char(port, 0, TTY_OVERRUN); 292 293 next_char: 293 - /* We can get stuck in an infinite loop getting char 0 when the 294 - * line is in a wrong HW state, we break that here. 295 - * When that happens, I disable the receive side of the driver. 296 - * Note that what I've been experiencing is a real irq loop where 297 - * I'm getting flooded regardless of the actual port speed. 298 - * Something strange is going on with the HW 299 - */ 300 - if ((++loops) > 1000) 301 - goto flood; 302 294 ch = read_zsreg(uap, R0); 303 295 if (!(ch & Rx_CH_AV)) 304 296 break; 305 297 } 306 298 307 - return true; 308 - flood: 309 - pmz_interrupt_control(uap, 0); 310 - pmz_error("pmz: rx irq flood !\n"); 311 299 return true; 312 300 } 313 301
+4
drivers/tty/serial/serial_base.h
··· 22 22 struct serial_port_device { 23 23 struct device dev; 24 24 struct uart_port *port; 25 + unsigned int tx_enabled:1; 25 26 }; 26 27 27 28 int serial_base_ctrl_init(void); ··· 30 29 31 30 int serial_base_port_init(void); 32 31 void serial_base_port_exit(void); 32 + 33 + void serial_base_port_startup(struct uart_port *port); 34 + void serial_base_port_shutdown(struct uart_port *port); 33 35 34 36 int serial_base_driver_register(struct device_driver *driver); 35 37 void serial_base_driver_unregister(struct device_driver *driver);
+19 -4
drivers/tty/serial/serial_core.c
··· 156 156 * enabled, serial_port_runtime_resume() calls start_tx() again 157 157 * after enabling the device. 158 158 */ 159 - if (pm_runtime_active(&port_dev->dev)) 159 + if (!pm_runtime_enabled(port->dev) || pm_runtime_active(&port_dev->dev)) 160 160 port->ops->start_tx(port); 161 161 pm_runtime_mark_last_busy(&port_dev->dev); 162 162 pm_runtime_put_autosuspend(&port_dev->dev); ··· 323 323 bool init_hw) 324 324 { 325 325 struct tty_port *port = &state->port; 326 + struct uart_port *uport; 326 327 int retval; 327 328 328 329 if (tty_port_initialized(port)) 329 - return 0; 330 + goto out_base_port_startup; 330 331 331 332 retval = uart_port_startup(tty, state, init_hw); 332 - if (retval) 333 + if (retval) { 333 334 set_bit(TTY_IO_ERROR, &tty->flags); 335 + return retval; 336 + } 334 337 335 - return retval; 338 + out_base_port_startup: 339 + uport = uart_port_check(state); 340 + if (!uport) 341 + return -EIO; 342 + 343 + serial_base_port_startup(uport); 344 + 345 + return 0; 336 346 } 337 347 338 348 /* ··· 364 354 */ 365 355 if (tty) 366 356 set_bit(TTY_IO_ERROR, &tty->flags); 357 + 358 + if (uport) 359 + serial_base_port_shutdown(uport); 367 360 368 361 if (tty_port_initialized(port)) { 369 362 tty_port_set_initialized(port, false); ··· 1788 1775 uport->ops->stop_rx(uport); 1789 1776 uart_port_unlock_irq(uport); 1790 1777 1778 + serial_base_port_shutdown(uport); 1791 1779 uart_port_shutdown(port); 1792 1780 1793 1781 /* ··· 1802 1788 * Free the transmit buffer. 1803 1789 */ 1804 1790 uart_port_lock_irq(uport); 1791 + uart_circ_clear(&state->xmit); 1805 1792 buf = state->xmit.buf; 1806 1793 state->xmit.buf = NULL; 1807 1794 uart_port_unlock_irq(uport);
+34
drivers/tty/serial/serial_port.c
··· 39 39 40 40 /* Flush any pending TX for the port */ 41 41 uart_port_lock_irqsave(port, &flags); 42 + if (!port_dev->tx_enabled) 43 + goto unlock; 42 44 if (__serial_port_busy(port)) 43 45 port->ops->start_tx(port); 46 + 47 + unlock: 44 48 uart_port_unlock_irqrestore(port, flags); 45 49 46 50 out: ··· 64 60 return 0; 65 61 66 62 uart_port_lock_irqsave(port, &flags); 63 + if (!port_dev->tx_enabled) { 64 + uart_port_unlock_irqrestore(port, flags); 65 + return 0; 66 + } 67 + 67 68 busy = __serial_port_busy(port); 68 69 if (busy) 69 70 port->ops->start_tx(port); ··· 78 69 pm_runtime_mark_last_busy(dev); 79 70 80 71 return busy ? -EBUSY : 0; 72 + } 73 + 74 + static void serial_base_port_set_tx(struct uart_port *port, 75 + struct serial_port_device *port_dev, 76 + bool enabled) 77 + { 78 + unsigned long flags; 79 + 80 + uart_port_lock_irqsave(port, &flags); 81 + port_dev->tx_enabled = enabled; 82 + uart_port_unlock_irqrestore(port, flags); 83 + } 84 + 85 + void serial_base_port_startup(struct uart_port *port) 86 + { 87 + struct serial_port_device *port_dev = port->port_dev; 88 + 89 + serial_base_port_set_tx(port, port_dev, true); 90 + } 91 + 92 + void serial_base_port_shutdown(struct uart_port *port) 93 + { 94 + struct serial_port_device *port_dev = port->port_dev; 95 + 96 + serial_base_port_set_tx(port, port_dev, false); 81 97 } 82 98 83 99 static DEFINE_RUNTIME_DEV_PM_OPS(serial_port_pm,
+11 -2
drivers/tty/serial/stm32-usart.c
··· 861 861 const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 862 862 u32 sr; 863 863 unsigned int size; 864 + irqreturn_t ret = IRQ_NONE; 864 865 865 866 sr = readl_relaxed(port->membase + ofs->isr); 866 867 ··· 870 869 (sr & USART_SR_TC)) { 871 870 stm32_usart_tc_interrupt_disable(port); 872 871 stm32_usart_rs485_rts_disable(port); 872 + ret = IRQ_HANDLED; 873 873 } 874 874 875 - if ((sr & USART_SR_RTOF) && ofs->icr != UNDEF_REG) 875 + if ((sr & USART_SR_RTOF) && ofs->icr != UNDEF_REG) { 876 876 writel_relaxed(USART_ICR_RTOCF, 877 877 port->membase + ofs->icr); 878 + ret = IRQ_HANDLED; 879 + } 878 880 879 881 if ((sr & USART_SR_WUF) && ofs->icr != UNDEF_REG) { 880 882 /* Clear wake up flag and disable wake up interrupt */ ··· 886 882 stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_WUFIE); 887 883 if (irqd_is_wakeup_set(irq_get_irq_data(port->irq))) 888 884 pm_wakeup_event(tport->tty->dev, 0); 885 + ret = IRQ_HANDLED; 889 886 } 890 887 891 888 /* ··· 901 896 uart_unlock_and_check_sysrq(port); 902 897 if (size) 903 898 tty_flip_buffer_push(tport); 899 + ret = IRQ_HANDLED; 904 900 } 905 901 } 906 902 ··· 909 903 uart_port_lock(port); 910 904 stm32_usart_transmit_chars(port); 911 905 uart_port_unlock(port); 906 + ret = IRQ_HANDLED; 912 907 } 913 908 914 909 /* Receiver timeout irq for DMA RX */ ··· 919 912 uart_unlock_and_check_sysrq(port); 920 913 if (size) 921 914 tty_flip_buffer_push(tport); 915 + ret = IRQ_HANDLED; 922 916 } 923 917 924 - return IRQ_HANDLED; 918 + return ret; 925 919 } 926 920 927 921 static void stm32_usart_set_mctrl(struct uart_port *port, unsigned int mctrl) ··· 1092 1084 val |= USART_CR2_SWAP; 1093 1085 writel_relaxed(val, port->membase + ofs->cr2); 1094 1086 } 1087 + stm32_port->throttled = false; 1095 1088 1096 1089 /* RX FIFO Flush */ 1097 1090 if (ofs->rqr != UNDEF_REG)