Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

arm64: dts: ti: Add DT overlay for PCIe + USB3.0 SERDES personality card

Add overlay for PCIe (uses the second instance of PCIe in AM654x) and
USB3.0 SERDES personality card

The PCIe3/USB3 card is provided with the AM65x GP EVM configuration [1]
so apply the overlay to k3-am654-gp-evm.dtb

[1] https://www.ti.com/lit/ug/spruim7/spruim7.pdf

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20240208-for-v6-9-am65-overlays-2-0-v2-3-70bae3e91597@kernel.org
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

authored by

Kishon Vijay Abraham I and committed by
Vignesh Raghavendra
c094c536 32b366a5

+65 -1
+4 -1
arch/arm64/boot/dts/ti/Makefile
··· 45 45 dtb-$(CONFIG_ARCH_K3) += k3-am64-tqma64xxl-mbax4xxl-wlan.dtbo 46 46 47 47 # Boards with AM65x SoC 48 - k3-am654-gp-evm-dtbs := k3-am654-base-board.dtb k3-am654-base-board-rocktech-rk101-panel.dtbo 48 + k3-am654-gp-evm-dtbs := k3-am654-base-board.dtb \ 49 + k3-am654-base-board-rocktech-rk101-panel.dtbo \ 50 + k3-am654-pcie-usb3.dtbo 49 51 k3-am654-evm-dtbs := k3-am654-base-board.dtb k3-am654-icssg2.dtbo 50 52 k3-am654-idk-dtbs := k3-am654-evm.dtb k3-am654-idk.dtbo k3-am654-pcie-usb2.dtbo 51 53 dtb-$(CONFIG_ARCH_K3) += k3-am6528-iot2050-basic.dtb ··· 61 59 dtb-$(CONFIG_ARCH_K3) += k3-am654-idk.dtb 62 60 dtb-$(CONFIG_ARCH_K3) += k3-am654-base-board-rocktech-rk101-panel.dtbo 63 61 dtb-$(CONFIG_ARCH_K3) += k3-am654-pcie-usb2.dtbo 62 + dtb-$(CONFIG_ARCH_K3) += k3-am654-pcie-usb3.dtbo 64 63 65 64 # Boards with J7200 SoC 66 65 k3-j7200-evm-dtbs := k3-j7200-common-proc-board.dtb k3-j7200-evm-quad-port-eth-exp.dtbo
+61
arch/arm64/boot/dts/ti/k3-am654-pcie-usb3.dtso
··· 1 + // SPDX-License-Identifier: GPL-2.0-only OR MIT 2 + /** 3 + * DT overlay for SERDES personality card: 1lane PCIe + USB3.0 DRD on AM654 EVM 4 + * 5 + * Copyright (C) 2018-2024 Texas Instruments Incorporated - http://www.ti.com/ 6 + */ 7 + 8 + /dts-v1/; 9 + /plugin/; 10 + #include <dt-bindings/gpio/gpio.h> 11 + #include <dt-bindings/phy/phy.h> 12 + #include <dt-bindings/phy/phy-am654-serdes.h> 13 + 14 + #include "k3-pinctrl.h" 15 + 16 + &serdes1 { 17 + status = "okay"; 18 + }; 19 + 20 + &pcie1_rc { 21 + num-lanes = <1>; 22 + phys = <&serdes1 PHY_TYPE_PCIE 0>; 23 + phy-names = "pcie-phy0"; 24 + reset-gpios = <&pca9555 5 GPIO_ACTIVE_HIGH>; 25 + status = "okay"; 26 + }; 27 + 28 + &main_pmx0 { 29 + usb0_pins_default: usb0-default-pins { 30 + pinctrl-single,pins = < 31 + AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */ 32 + >; 33 + }; 34 + }; 35 + 36 + &serdes0 { 37 + status = "okay"; 38 + assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>; 39 + assigned-clock-parents = <&k3_clks 153 7>, <&k3_clks 153 4>; 40 + }; 41 + 42 + &dwc3_0 { 43 + status = "okay"; 44 + assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */ 45 + <&k3_clks 151 8>; /* set PIPE3_TXB_CLK to WIZ8B2M4VSB */ 46 + phys = <&serdes0 PHY_TYPE_USB3 0>; 47 + phy-names = "usb3-phy"; 48 + }; 49 + 50 + &usb0 { 51 + pinctrl-names = "default"; 52 + pinctrl-0 = <&usb0_pins_default>; 53 + dr_mode = "host"; 54 + maximum-speed = "super-speed"; 55 + snps,dis-u1-entry-quirk; 56 + snps,dis-u2-entry-quirk; 57 + }; 58 + 59 + &usb0_phy { 60 + status = "okay"; 61 + };