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Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
powerpc: Make single-stepping emulation (mostly) usable on 32-bit
The sc instruction emulation can't be done the same way on 32-bit
as 64-bit yet, but this should work OK.
Signed-off-by: Paul Mackerras <paulus@samba.org>
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arch/powerpc/lib/sstep.c
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arch/powerpc/lib/sstep.c
···
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*/
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#include <linux/kernel.h>
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#include <linux/ptrace.h>
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#include <linux/config.h>
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#include <asm/sstep.h>
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#include <asm/processor.h>
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extern char system_call_common[];
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#ifdef CONFIG_PPC64
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/* Bits in SRR1 that are copied from MSR */
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#define MSR_MASK 0xffffffff87c0ffff
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#else
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#define MSR_MASK 0x87c0ffff
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#endif
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/*
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* Determine whether a conditional branch instruction would branch.
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if (branch_taken(instr, regs))
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regs->nip = imm;
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return 1;
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#ifdef CONFIG_PPC64
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case 17: /* sc */
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/*
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* N.B. this uses knowledge about how the syscall
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regs->nip = (unsigned long) &system_call_common;
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regs->msr = MSR_KERNEL;
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return 1;
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#endif
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case 18: /* b */
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imm = instr & 0x03fffffc;
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if (imm & 0x02000000)
···
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if ((regs->msr & MSR_SF) == 0)
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regs->nip &= 0xffffffffUL;
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return 1;
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case 0x124: /* mtmsr */
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imm = regs->gpr[rd];
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if ((imm & MSR_RI) == 0)
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/* can't step mtmsr that would clear MSR_RI */
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return -1;
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regs->msr = imm;
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regs->nip += 4;
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return 1;
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#ifdef CONFIG_PPC64
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case 0x164: /* mtmsrd */
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/* only MSR_EE and MSR_RI get changed if bit 15 set */
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/* mtmsrd doesn't change MSR_HV and MSR_ME */
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if ((imm & MSR_SF) == 0)
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regs->nip &= 0xffffffffUL;
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return 1;
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#endif
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}
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}
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return 0;
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include/asm-powerpc/reg.h
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include/asm-powerpc/reg.h
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#define __MASK(X) (1UL<<(X))
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#endif
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#ifdef CONFIG_PPC64
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#define MSR_SF __MASK(MSR_SF_LG) /* Enable 64 bit mode */
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#define MSR_ISF __MASK(MSR_ISF_LG) /* Interrupt 64b mode valid on 630 */
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#define MSR_HV __MASK(MSR_HV_LG) /* Hypervisor state */
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#else
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/* so tests for these bits fail on 32-bit */
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#define MSR_SF 0
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#define MSR_ISF 0
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#define MSR_HV 0
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#endif
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#define MSR_VEC __MASK(MSR_VEC_LG) /* Enable AltiVec */
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#define MSR_POW __MASK(MSR_POW_LG) /* Enable Power Management */
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#define MSR_WE __MASK(MSR_WE_LG) /* Wait State Enable */
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include/asm-ppc64/sstep.h
include/asm-powerpc/sstep.h
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include/asm-ppc64/sstep.h
include/asm-powerpc/sstep.h
···
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* we don't allow putting a breakpoint on an mtmsrd instruction.
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* Similarly we don't allow breakpoints on rfid instructions.
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* These macros tell us if an instruction is a mtmsrd or rfid.
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* Note that IS_MTMSRD returns true for both an mtmsr (32-bit)
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* and an mtmsrd (64-bit).
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*/
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#define IS_MTMSRD(instr) (((instr) & 0xfc0007fe) == 0x7c000164)
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#define IS_MTMSRD(instr) (((instr) & 0xfc0007be) == 0x7c000124)
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#define IS_RFID(instr) (((instr) & 0xfc0007fe) == 0x4c000024)
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/* Emulate instructions that cause a transfer of control. */