Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

clocksource: convert ARM 32-bit down counting clocksources

Convert SP804, MXC, Nomadik and Orion 32-bit down-counting clocksources
to generic mmio clocksource infrastructure.

Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Alessandro Rubini <rubini@unipv.it>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Lennert Buytenhek <kernel@wantstofly.org>
Acked-by: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

+16 -87
+2
arch/arm/Kconfig
··· 1042 1042 1043 1043 config PLAT_ORION 1044 1044 bool 1045 + select CLKSRC_MMIO 1045 1046 select HAVE_SCHED_CLOCK 1046 1047 1047 1048 config PLAT_PXA ··· 1053 1052 1054 1053 config ARM_TIMER_SP804 1055 1054 bool 1055 + select CLKSRC_MMIO 1056 1056 1057 1057 source arch/arm/mm/Kconfig 1058 1058
+6 -24
arch/arm/common/timer-sp.c
··· 32 32 #define TIMER_FREQ_KHZ (1000) 33 33 #define TIMER_RELOAD (TIMER_FREQ_KHZ * 1000 / HZ) 34 34 35 - static void __iomem *clksrc_base; 36 - 37 - static cycle_t sp804_read(struct clocksource *cs) 38 - { 39 - return ~readl(clksrc_base + TIMER_VALUE); 40 - } 41 - 42 - static struct clocksource clocksource_sp804 = { 43 - .name = "timer3", 44 - .rating = 200, 45 - .read = sp804_read, 46 - .mask = CLOCKSOURCE_MASK(32), 47 - .flags = CLOCK_SOURCE_IS_CONTINUOUS, 48 - }; 49 - 50 35 void __init sp804_clocksource_init(void __iomem *base) 51 36 { 52 - struct clocksource *cs = &clocksource_sp804; 53 - 54 - clksrc_base = base; 55 - 56 37 /* setup timer 0 as free-running clocksource */ 57 - writel(0, clksrc_base + TIMER_CTRL); 58 - writel(0xffffffff, clksrc_base + TIMER_LOAD); 59 - writel(0xffffffff, clksrc_base + TIMER_VALUE); 38 + writel(0, base + TIMER_CTRL); 39 + writel(0xffffffff, base + TIMER_LOAD); 40 + writel(0xffffffff, base + TIMER_VALUE); 60 41 writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC, 61 - clksrc_base + TIMER_CTRL); 42 + base + TIMER_CTRL); 62 43 63 - clocksource_register_khz(cs, TIMER_FREQ_KHZ); 44 + clocksource_mmio_init(base + TIMER_VALUE, "timer3", 45 + TIMER_FREQ_KHZ * 1000, 200, 32, clocksource_mmio_readl_down); 64 46 } 65 47 66 48
+2 -16
arch/arm/plat-mxc/epit.c
··· 83 83 __raw_writel(EPITSR_OCIF, timer_base + EPITSR); 84 84 } 85 85 86 - static cycle_t epit_read(struct clocksource *cs) 87 - { 88 - return 0 - __raw_readl(timer_base + EPITCNR); 89 - } 90 - 91 - static struct clocksource clocksource_epit = { 92 - .name = "epit", 93 - .rating = 200, 94 - .read = epit_read, 95 - .mask = CLOCKSOURCE_MASK(32), 96 - .flags = CLOCK_SOURCE_IS_CONTINUOUS, 97 - }; 98 - 99 86 static int __init epit_clocksource_init(struct clk *timer_clk) 100 87 { 101 88 unsigned int c = clk_get_rate(timer_clk); 102 89 103 - clocksource_register_hz(&clocksource_epit, c); 104 - 105 - return 0; 90 + return clocksource_mmio_init(timer_base + EPITCNR, "epit", c, 200, 32, 91 + clocksource_mmio_readl_down); 106 92 } 107 93 108 94 /* clock event */
+1
arch/arm/plat-nomadik/Kconfig
··· 5 5 config PLAT_NOMADIK 6 6 bool 7 7 depends on ARCH_NOMADIK || ARCH_U8500 8 + select CLKSRC_MMIO 8 9 default y 9 10 help 10 11 Common platform code for Nomadik and other ST-Ericsson
+3 -28
arch/arm/plat-nomadik/timer.c
··· 26 26 void __iomem *mtu_base; /* Assigned by machine code */ 27 27 28 28 /* 29 - * Kernel assumes that sched_clock can be called early 30 - * but the MTU may not yet be initialized. 31 - */ 32 - static cycle_t nmdk_read_timer_dummy(struct clocksource *cs) 33 - { 34 - return 0; 35 - } 36 - 37 - /* clocksource: MTU decrements, so we negate the value being read. */ 38 - static cycle_t nmdk_read_timer(struct clocksource *cs) 39 - { 40 - return -readl(mtu_base + MTU_VAL(0)); 41 - } 42 - 43 - static struct clocksource nmdk_clksrc = { 44 - .name = "mtu_0", 45 - .rating = 200, 46 - .read = nmdk_read_timer_dummy, 47 - .mask = CLOCKSOURCE_MASK(32), 48 - .flags = CLOCK_SOURCE_IS_CONTINUOUS, 49 - }; 50 - 51 - /* 52 29 * Override the global weak sched_clock symbol with this 53 30 * local implementation which uses the clocksource to get some 54 31 * better resolution when scheduling the kernel. ··· 149 172 writel(0, mtu_base + MTU_BGLR(0)); 150 173 writel(cr | MTU_CRn_ENA, mtu_base + MTU_CR(0)); 151 174 152 - /* Now the clock source is ready */ 153 - nmdk_clksrc.read = nmdk_read_timer; 154 - 155 - if (clocksource_register_hz(&nmdk_clksrc, rate)) 175 + if (clocksource_mmio_init(mtu_base + MTU_VAL(0), "mtu_0", 176 + rate, 200, 32, clocksource_mmio_readl_down)) 156 177 pr_err("timer: failed to initialize clock source %s\n", 157 - nmdk_clksrc.name); 178 + "mtu_0"); 158 179 159 180 init_sched_clock(&cd, nomadik_update_sched_clock, 32, rate); 160 181
+2 -19
arch/arm/plat-orion/time.c
··· 81 81 } 82 82 83 83 /* 84 - * Clocksource handling. 85 - */ 86 - static cycle_t orion_clksrc_read(struct clocksource *cs) 87 - { 88 - return 0xffffffff - readl(timer_base + TIMER0_VAL_OFF); 89 - } 90 - 91 - static struct clocksource orion_clksrc = { 92 - .name = "orion_clocksource", 93 - .rating = 300, 94 - .read = orion_clksrc_read, 95 - .mask = CLOCKSOURCE_MASK(32), 96 - .flags = CLOCK_SOURCE_IS_CONTINUOUS, 97 - }; 98 - 99 - 100 - 101 - /* 102 84 * Clockevent handling. 103 85 */ 104 86 static int ··· 229 247 writel(u & ~BRIDGE_INT_TIMER0, bridge_base + BRIDGE_MASK_OFF); 230 248 u = readl(timer_base + TIMER_CTRL_OFF); 231 249 writel(u | TIMER0_EN | TIMER0_RELOAD_EN, timer_base + TIMER_CTRL_OFF); 232 - clocksource_register_hz(&orion_clksrc, tclk); 250 + clocksource_mmio_init(timer_base + TIMER0_VAL_OFF, "orion_clocksource", 251 + tclk, 300, 32, clocksource_mmio_readl_down); 233 252 234 253 /* 235 254 * Setup clockevent timer (interrupt-driven).