Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm: Kill DRM_HZ

We don't have any userspace interfaces that use HZ as a time unit, so
having our own DRM define is useless.

Remove this remnant from the shared drm core days.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>

authored by

Daniel Vetter and committed by
Dave Airlie
bfd8303a d2e546b8

+20 -22
+2 -2
drivers/gpu/drm/drm_irq.c
··· 960 960 if (atomic_dec_and_test(&dev->vblank[crtc].refcount) && 961 961 (drm_vblank_offdelay > 0)) 962 962 mod_timer(&dev->vblank_disable_timer, 963 - jiffies + ((drm_vblank_offdelay * DRM_HZ)/1000)); 963 + jiffies + ((drm_vblank_offdelay * HZ)/1000)); 964 964 } 965 965 EXPORT_SYMBOL(drm_vblank_put); 966 966 ··· 1244 1244 DRM_DEBUG("waiting on vblank count %d, crtc %d\n", 1245 1245 vblwait->request.sequence, crtc); 1246 1246 dev->vblank[crtc].last_wait = vblwait->request.sequence; 1247 - DRM_WAIT_ON(ret, dev->vblank[crtc].queue, 3 * DRM_HZ, 1247 + DRM_WAIT_ON(ret, dev->vblank[crtc].queue, 3 * HZ, 1248 1248 (((drm_vblank_count(dev, crtc) - 1249 1249 vblwait->request.sequence) <= (1 << 23)) || 1250 1250 !dev->irq_enabled));
+1 -1
drivers/gpu/drm/exynos/exynos_mixer.c
··· 868 868 */ 869 869 if (!wait_event_timeout(mixer_ctx->wait_vsync_queue, 870 870 !atomic_read(&mixer_ctx->wait_vsync_event), 871 - DRM_HZ/20)) 871 + HZ/20)) 872 872 DRM_DEBUG_KMS("vblank wait timed out.\n"); 873 873 } 874 874
+1 -1
drivers/gpu/drm/gma500/accel_2d.c
··· 326 326 struct psb_framebuffer *psbfb = &fbdev->pfb; 327 327 struct drm_device *dev = psbfb->base.dev; 328 328 struct drm_psb_private *dev_priv = dev->dev_private; 329 - unsigned long _end = jiffies + DRM_HZ; 329 + unsigned long _end = jiffies + HZ; 330 330 int busy = 0; 331 331 unsigned long flags; 332 332
+3 -3
drivers/gpu/drm/gma500/psb_drv.h
··· 212 212 #define PSB_HIGH_REG_OFFS 0x0600 213 213 214 214 #define PSB_NUM_VBLANKS 2 215 - #define PSB_WATCHDOG_DELAY (DRM_HZ * 2) 216 - #define PSB_LID_DELAY (DRM_HZ / 10) 215 + #define PSB_WATCHDOG_DELAY (HZ * 2) 216 + #define PSB_LID_DELAY (HZ / 10) 217 217 218 218 #define MDFLD_PNW_B0 0x04 219 219 #define MDFLD_PNW_C0 0x08 ··· 232 232 #define MDFLD_DSR_RR 45 233 233 #define MDFLD_DPU_ENABLE (1 << 31) 234 234 #define MDFLD_DSR_FULLSCREEN (1 << 30) 235 - #define MDFLD_DSR_DELAY (DRM_HZ / MDFLD_DSR_RR) 235 + #define MDFLD_DSR_DELAY (HZ / MDFLD_DSR_RR) 236 236 237 237 #define PSB_PWR_STATE_ON 1 238 238 #define PSB_PWR_STATE_OFF 2
+1 -1
drivers/gpu/drm/gma500/psb_irq.c
··· 456 456 { 457 457 unsigned int cur_vblank; 458 458 int ret = 0; 459 - DRM_WAIT_ON(ret, dev->vblank.queue, 3 * DRM_HZ, 459 + DRM_WAIT_ON(ret, dev->vblank.queue, 3 * HZ, 460 460 (((cur_vblank = atomic_read(counter)) 461 461 - *sequence) <= (1 << 23))); 462 462 *sequence = cur_vblank;
+1 -1
drivers/gpu/drm/i915/i915_dma.c
··· 783 783 master_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT; 784 784 785 785 if (ring->irq_get(ring)) { 786 - DRM_WAIT_ON(ret, ring->irq_queue, 3 * DRM_HZ, 786 + DRM_WAIT_ON(ret, ring->irq_queue, 3 * HZ, 787 787 READ_BREADCRUMB(dev_priv) >= irq_nr); 788 788 ring->irq_put(ring); 789 789 } else if (wait_for(READ_BREADCRUMB(dev_priv) >= irq_nr, 3000))
+1 -1
drivers/gpu/drm/mga/mga_irq.c
··· 128 128 * by about a day rather than she wants to wait for years 129 129 * using fences. 130 130 */ 131 - DRM_WAIT_ON(ret, dev_priv->fence_queue, 3 * DRM_HZ, 131 + DRM_WAIT_ON(ret, dev_priv->fence_queue, 3 * HZ, 132 132 (((cur_fence = atomic_read(&dev_priv->last_fence_retired)) 133 133 - *sequence) <= (1 << 23))); 134 134
+1 -1
drivers/gpu/drm/nouveau/nouveau_fence.c
··· 143 143 int ret; 144 144 145 145 fence->channel = chan; 146 - fence->timeout = jiffies + (15 * DRM_HZ); 146 + fence->timeout = jiffies + (15 * HZ); 147 147 fence->sequence = ++fctx->sequence; 148 148 149 149 ret = fctx->emit(fence);
+1 -1
drivers/gpu/drm/radeon/radeon_irq.c
··· 249 249 250 250 dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE; 251 251 252 - DRM_WAIT_ON(ret, dev_priv->swi_queue, 3 * DRM_HZ, 252 + DRM_WAIT_ON(ret, dev_priv->swi_queue, 3 * HZ, 253 253 RADEON_READ(RADEON_LAST_SWI_REG) >= swi_nr); 254 254 255 255 return ret;
+1 -1
drivers/gpu/drm/sis/sis_mm.c
··· 266 266 * because its polling frequency is too low. 267 267 */ 268 268 269 - end = jiffies + (DRM_HZ * 3); 269 + end = jiffies + (HZ * 3); 270 270 271 271 for (i = 0; i < 4; ++i) { 272 272 do {
+4 -4
drivers/gpu/drm/via/via_dmablit.c
··· 363 363 364 364 via_abort_dmablit(dev, engine); 365 365 blitq->aborting = 1; 366 - blitq->end = jiffies + DRM_HZ; 366 + blitq->end = jiffies + HZ; 367 367 } 368 368 369 369 if (!blitq->is_active) { ··· 372 372 blitq->is_active = 1; 373 373 blitq->cur = cur; 374 374 blitq->num_outstanding--; 375 - blitq->end = jiffies + DRM_HZ; 375 + blitq->end = jiffies + HZ; 376 376 if (!timer_pending(&blitq->poll_timer)) 377 377 mod_timer(&blitq->poll_timer, jiffies + 1); 378 378 } else { ··· 436 436 int ret = 0; 437 437 438 438 if (via_dmablit_active(blitq, engine, handle, &queue)) { 439 - DRM_WAIT_ON(ret, *queue, 3 * DRM_HZ, 439 + DRM_WAIT_ON(ret, *queue, 3 * HZ, 440 440 !via_dmablit_active(blitq, engine, handle, NULL)); 441 441 } 442 442 DRM_DEBUG("DMA blit sync handle 0x%x engine %d returned %d\n", ··· 688 688 while (blitq->num_free == 0) { 689 689 spin_unlock_irqrestore(&blitq->blit_lock, irqsave); 690 690 691 - DRM_WAIT_ON(ret, blitq->busy_queue, DRM_HZ, blitq->num_free > 0); 691 + DRM_WAIT_ON(ret, blitq->busy_queue, HZ, blitq->num_free > 0); 692 692 if (ret) 693 693 return (-EINTR == ret) ? -EAGAIN : ret; 694 694
+2 -2
drivers/gpu/drm/via/via_irq.c
··· 239 239 cur_irq = dev_priv->via_irqs + real_irq; 240 240 241 241 if (masks[real_irq][2] && !force_sequence) { 242 - DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ, 242 + DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * HZ, 243 243 ((VIA_READ(masks[irq][2]) & masks[irq][3]) == 244 244 masks[irq][4])); 245 245 cur_irq_sequence = atomic_read(&cur_irq->irq_received); 246 246 } else { 247 - DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * DRM_HZ, 247 + DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * HZ, 248 248 (((cur_irq_sequence = 249 249 atomic_read(&cur_irq->irq_received)) - 250 250 *sequence) <= (1 << 23)));
+1 -1
drivers/gpu/drm/via/via_video.c
··· 83 83 switch (fx->func) { 84 84 case VIA_FUTEX_WAIT: 85 85 DRM_WAIT_ON(ret, dev_priv->decoder_queue[fx->lock], 86 - (fx->ms / 10) * (DRM_HZ / 100), *lock != fx->val); 86 + (fx->ms / 10) * (HZ / 100), *lock != fx->val); 87 87 return ret; 88 88 case VIA_FUTEX_WAKE: 89 89 DRM_WAKEUP(&(dev_priv->decoder_queue[fx->lock]));
-2
include/drm/drm_os_linux.h
··· 58 58 #define DRM_COPY_TO_USER(arg1, arg2, arg3) \ 59 59 copy_to_user(arg1, arg2, arg3) 60 60 61 - #define DRM_HZ HZ 62 - 63 61 #define DRM_WAIT_ON( ret, queue, timeout, condition ) \ 64 62 do { \ 65 63 DECLARE_WAITQUEUE(entry, current); \