Merge branch 'for-linus' of git://github.com/at91linux/linux-2.6-at91

* 'for-linus' of git://github.com/at91linux/linux-2.6-at91:
at91: Add ARCH_ID and basic cpu macros definition for 5series chips family.
arm: at91: fix compiler warning for eb01 board build
arm: at91: minimal defconfig for at91x40 SoC
ARM: at91: AT91CAP9 has a macb device

+83 -1
+48
arch/arm/configs/at91x40_defconfig
···
··· 1 + CONFIG_EXPERIMENTAL=y 2 + CONFIG_LOG_BUF_SHIFT=14 3 + CONFIG_EMBEDDED=y 4 + # CONFIG_HOTPLUG is not set 5 + # CONFIG_ELF_CORE is not set 6 + # CONFIG_FUTEX is not set 7 + # CONFIG_TIMERFD is not set 8 + # CONFIG_VM_EVENT_COUNTERS is not set 9 + # CONFIG_COMPAT_BRK is not set 10 + CONFIG_SLAB=y 11 + # CONFIG_LBDAF is not set 12 + # CONFIG_BLK_DEV_BSG is not set 13 + # CONFIG_IOSCHED_DEADLINE is not set 14 + # CONFIG_IOSCHED_CFQ is not set 15 + # CONFIG_MMU is not set 16 + CONFIG_ARCH_AT91=y 17 + CONFIG_ARCH_AT91X40=y 18 + CONFIG_MACH_AT91EB01=y 19 + CONFIG_AT91_EARLY_USART0=y 20 + CONFIG_CPU_ARM7TDMI=y 21 + CONFIG_SET_MEM_PARAM=y 22 + CONFIG_DRAM_BASE=0x01000000 23 + CONFIG_DRAM_SIZE=0x00400000 24 + CONFIG_FLASH_MEM_BASE=0x01400000 25 + CONFIG_PROCESSOR_ID=0x14000040 26 + CONFIG_ZBOOT_ROM_TEXT=0x0 27 + CONFIG_ZBOOT_ROM_BSS=0x0 28 + CONFIG_BINFMT_FLAT=y 29 + # CONFIG_SUSPEND is not set 30 + # CONFIG_FW_LOADER is not set 31 + CONFIG_MTD=y 32 + CONFIG_MTD_PARTITIONS=y 33 + CONFIG_MTD_CHAR=y 34 + CONFIG_MTD_BLOCK=y 35 + CONFIG_MTD_RAM=y 36 + CONFIG_MTD_ROM=y 37 + CONFIG_BLK_DEV_RAM=y 38 + # CONFIG_INPUT is not set 39 + # CONFIG_SERIO is not set 40 + # CONFIG_VT is not set 41 + # CONFIG_DEVKMEM is not set 42 + # CONFIG_HW_RANDOM is not set 43 + # CONFIG_HWMON is not set 44 + # CONFIG_USB_SUPPORT is not set 45 + CONFIG_EXT2_FS=y 46 + # CONFIG_DNOTIFY is not set 47 + CONFIG_ROMFS_FS=y 48 + # CONFIG_ENABLE_MUST_CHECK is not set
+1
arch/arm/mach-at91/Kconfig
··· 83 select CPU_ARM926T 84 select GENERIC_CLOCKEVENTS 85 select HAVE_FB_ATMEL 86 87 config ARCH_AT572D940HF 88 bool "AT572D940HF"
··· 83 select CPU_ARM926T 84 select GENERIC_CLOCKEVENTS 85 select HAVE_FB_ATMEL 86 + select HAVE_NET_MACB 87 88 config ARCH_AT572D940HF 89 bool "AT572D940HF"
+6 -1
arch/arm/mach-at91/board-eb01.c
··· 30 #include <mach/board.h> 31 #include "generic.h" 32 33 static void __init at91eb01_map_io(void) 34 { 35 at91x40_initialize(40000000); ··· 43 MACHINE_START(AT91EB01, "Atmel AT91 EB01") 44 /* Maintainer: Greg Ungerer <gerg@snapgear.com> */ 45 .timer = &at91x40_timer, 46 - .init_irq = at91x40_init_interrupts, 47 .map_io = at91eb01_map_io, 48 MACHINE_END 49
··· 30 #include <mach/board.h> 31 #include "generic.h" 32 33 + static void __init at91eb01_init_irq(void) 34 + { 35 + at91x40_init_interrupts(NULL); 36 + } 37 + 38 static void __init at91eb01_map_io(void) 39 { 40 at91x40_initialize(40000000); ··· 38 MACHINE_START(AT91EB01, "Atmel AT91 EB01") 39 /* Maintainer: Greg Ungerer <gerg@snapgear.com> */ 40 .timer = &at91x40_timer, 41 + .init_irq = at91eb01_init_irq, 42 .map_io = at91eb01_map_io, 43 MACHINE_END 44
+28
arch/arm/mach-at91/include/mach/cpu.h
··· 27 #define ARCH_ID_AT91SAM9G45 0x819b05a0 28 #define ARCH_ID_AT91SAM9G45MRL 0x819b05a2 /* aka 9G45-ES2 & non ES lots */ 29 #define ARCH_ID_AT91SAM9G45ES 0x819b05a1 /* 9G45-ES (Engineering Sample) */ 30 #define ARCH_ID_AT91CAP9 0x039A03A0 31 32 #define ARCH_ID_AT91SAM9XE128 0x329973a0 ··· 55 #define ARCH_EXID_AT91SAM9M10 0x00000002 56 #define ARCH_EXID_AT91SAM9G46 0x00000003 57 #define ARCH_EXID_AT91SAM9G45 0x00000004 58 59 static inline unsigned long at91_exid_identify(void) 60 { ··· 148 #define cpu_is_at91sam9m10() (0) 149 #define cpu_is_at91sam9g46() (0) 150 #define cpu_is_at91sam9m11() (0) 151 #endif 152 153 #ifdef CONFIG_ARCH_AT91CAP9
··· 27 #define ARCH_ID_AT91SAM9G45 0x819b05a0 28 #define ARCH_ID_AT91SAM9G45MRL 0x819b05a2 /* aka 9G45-ES2 & non ES lots */ 29 #define ARCH_ID_AT91SAM9G45ES 0x819b05a1 /* 9G45-ES (Engineering Sample) */ 30 + #define ARCH_ID_AT91SAM9X5 0x819a05a0 31 #define ARCH_ID_AT91CAP9 0x039A03A0 32 33 #define ARCH_ID_AT91SAM9XE128 0x329973a0 ··· 54 #define ARCH_EXID_AT91SAM9M10 0x00000002 55 #define ARCH_EXID_AT91SAM9G46 0x00000003 56 #define ARCH_EXID_AT91SAM9G45 0x00000004 57 + 58 + #define ARCH_EXID_AT91SAM9G15 0x00000000 59 + #define ARCH_EXID_AT91SAM9G35 0x00000001 60 + #define ARCH_EXID_AT91SAM9X35 0x00000002 61 + #define ARCH_EXID_AT91SAM9G25 0x00000003 62 + #define ARCH_EXID_AT91SAM9X25 0x00000004 63 64 static inline unsigned long at91_exid_identify(void) 65 { ··· 141 #define cpu_is_at91sam9m10() (0) 142 #define cpu_is_at91sam9g46() (0) 143 #define cpu_is_at91sam9m11() (0) 144 + #endif 145 + 146 + #ifdef CONFIG_ARCH_AT91SAM9X5 147 + #define cpu_is_at91sam9x5() (at91_cpu_identify() == ARCH_ID_AT91SAM9X5) 148 + #define cpu_is_at91sam9g15() (cpu_is_at91sam9x5() && \ 149 + (at91_exid_identify() == ARCH_EXID_AT91SAM9G15)) 150 + #define cpu_is_at91sam9g35() (cpu_is_at91sam9x5() && \ 151 + (at91_exid_identify() == ARCH_EXID_AT91SAM9G35)) 152 + #define cpu_is_at91sam9x35() (cpu_is_at91sam9x5() && \ 153 + (at91_exid_identify() == ARCH_EXID_AT91SAM9X35)) 154 + #define cpu_is_at91sam9g25() (cpu_is_at91sam9x5() && \ 155 + (at91_exid_identify() == ARCH_EXID_AT91SAM9G25)) 156 + #define cpu_is_at91sam9x25() (cpu_is_at91sam9x5() && \ 157 + (at91_exid_identify() == ARCH_EXID_AT91SAM9X25)) 158 + #else 159 + #define cpu_is_at91sam9x5() (0) 160 + #define cpu_is_at91sam9g15() (0) 161 + #define cpu_is_at91sam9g35() (0) 162 + #define cpu_is_at91sam9x35() (0) 163 + #define cpu_is_at91sam9g25() (0) 164 + #define cpu_is_at91sam9x25() (0) 165 #endif 166 167 #ifdef CONFIG_ARCH_AT91CAP9