[POWERPC] 85xx: SBC8548 - Add flash support and HW Rev reporting

The following adds local bus, flash and MTD partition nodes for
sbc8548. As well, a compatible field for the soc node, so that
of_platform_bus_probe() will pick it up.

Something that is provided through this newly added epld node
is the Hardware Revision which is now being utilized.

Signed-off-by: Jeremy McNicoll <jeremy.mcnicoll@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

authored by Jeremy McNicoll and committed by Kumar Gala bfd123bf 73f5b8f9

+123 -1
+94
arch/powerpc/boot/dts/sbc8548.dts
··· 52 52 reg = <0x00000000 0x10000000>; 53 53 }; 54 54 55 + localbus@e0000000 { 56 + #address-cells = <2>; 57 + #size-cells = <1>; 58 + compatible = "simple-bus"; 59 + reg = <0xe0000000 0x5000>; 60 + interrupt-parent = <&mpic>; 61 + 62 + ranges = <0x0 0x0 0xff800000 0x00800000 /*8MB Flash*/ 63 + 0x3 0x0 0xf0000000 0x04000000 /*64MB SDRAM*/ 64 + 0x4 0x0 0xf4000000 0x04000000 /*64MB SDRAM*/ 65 + 0x5 0x0 0xf8000000 0x00b10000 /* EPLD */ 66 + 0x6 0x0 0xfb800000 0x04000000>; /*64MB Flash*/ 67 + 68 + 69 + flash@0,0 { 70 + #address-cells = <1>; 71 + #size-cells = <1>; 72 + compatible = "cfi-flash"; 73 + reg = <0x0 0x0 0x800000>; 74 + bank-width = <1>; 75 + device-width = <1>; 76 + partition@0x0 { 77 + label = "space"; 78 + reg = <0x00000000 0x00100000>; 79 + }; 80 + partition@0x100000 { 81 + label = "bootloader"; 82 + reg = <0x00100000 0x00700000>; 83 + read-only; 84 + }; 85 + }; 86 + 87 + epld@5,0 { 88 + compatible = "wrs,epld-localbus"; 89 + #address-cells = <2>; 90 + #size-cells = <1>; 91 + reg = <0x5 0x0 0x00b10000>; 92 + ranges = < 93 + 0x0 0x0 0x5 0x000000 0x1fff /* LED */ 94 + 0x1 0x0 0x5 0x100000 0x1fff /* Switches */ 95 + 0x3 0x0 0x5 0x300000 0x1fff /* HW Rev. */ 96 + 0xb 0x0 0x5 0xb00000 0x1fff /* EEPROM */ 97 + >; 98 + 99 + led@0,0 { 100 + compatible = "led"; 101 + reg = <0x0 0x0 0x1fff>; 102 + }; 103 + 104 + switches@1,0 { 105 + compatible = "switches"; 106 + reg = <0x1 0x0 0x1fff>; 107 + }; 108 + 109 + hw-rev@3,0 { 110 + compatible = "hw-rev"; 111 + reg = <0x3 0x0 0x1fff>; 112 + }; 113 + 114 + eeprom@b,0 { 115 + compatible = "eeprom"; 116 + reg = <0xb 0 0x1fff>; 117 + }; 118 + 119 + }; 120 + 121 + alt-flash@6,0 { 122 + #address-cells = <1>; 123 + #size-cells = <1>; 124 + reg = <0x6 0x0 0x04000000>; 125 + compatible = "cfi-flash"; 126 + bank-width = <4>; 127 + device-width = <1>; 128 + partition@0x0 { 129 + label = "bootloader"; 130 + reg = <0x00000000 0x00100000>; 131 + read-only; 132 + }; 133 + partition@0x00100000 { 134 + label = "file-system"; 135 + reg = <0x00100000 0x01f00000>; 136 + }; 137 + partition@0x02000000 { 138 + label = "boot-config"; 139 + reg = <0x02000000 0x00100000>; 140 + }; 141 + partition@0x02100000 { 142 + label = "space"; 143 + reg = <0x02100000 0x01f00000>; 144 + }; 145 + }; 146 + }; 147 + 55 148 soc8548@e0000000 { 56 149 #address-cells = <1>; 57 150 #size-cells = <1>; ··· 152 59 ranges = <0x00000000 0xe0000000 0x00100000>; 153 60 reg = <0xe0000000 0x00001000>; // CCSRBAR 154 61 bus-frequency = <0>; 62 + compatible = "simple-bus"; 155 63 156 64 memory-controller@2000 { 157 65 compatible = "fsl,8548-memory-controller";
+29 -1
arch/powerpc/platforms/85xx/sbc8548.c
··· 49 49 #include <sysdev/fsl_soc.h> 50 50 #include <sysdev/fsl_pci.h> 51 51 52 + static int sbc_rev; 53 + 52 54 static void __init sbc8548_pic_init(void) 53 55 { 54 56 struct mpic *mpic; ··· 81 79 mpic_init(mpic); 82 80 } 83 81 82 + /* Extract the HW Rev from the EPLD on the board */ 83 + static int __init sbc8548_hw_rev(void) 84 + { 85 + struct device_node *np; 86 + struct resource res; 87 + unsigned int *rev; 88 + int board_rev = 0; 89 + 90 + np = of_find_compatible_node(NULL, NULL, "hw-rev"); 91 + if (np == NULL) { 92 + printk("No HW-REV found in DTB.\n"); 93 + return -ENODEV; 94 + } 95 + 96 + of_address_to_resource(np, 0, &res); 97 + of_node_put(np); 98 + 99 + rev = ioremap(res.start,sizeof(unsigned int)); 100 + board_rev = (*rev) >> 28; 101 + iounmap(rev); 102 + 103 + return board_rev; 104 + } 105 + 84 106 /* 85 107 * Setup the architecture 86 108 */ ··· 130 104 } 131 105 } 132 106 #endif 107 + sbc_rev = sbc8548_hw_rev(); 133 108 } 134 109 135 110 static void sbc8548_show_cpuinfo(struct seq_file *m) ··· 142 115 svid = mfspr(SPRN_SVR); 143 116 144 117 seq_printf(m, "Vendor\t\t: Wind River\n"); 145 - seq_printf(m, "Machine\t\t: SBC8548\n"); 118 + seq_printf(m, "Machine\t\t: SBC8548 v%d\n", sbc_rev); 146 119 seq_printf(m, "PVR\t\t: 0x%x\n", pvid); 147 120 seq_printf(m, "SVR\t\t: 0x%x\n", svid); 148 121 ··· 157 130 static struct of_device_id __initdata of_bus_ids[] = { 158 131 { .name = "soc", }, 159 132 { .type = "soc", }, 133 + { .compatible = "simple-bus", }, 160 134 {}, 161 135 }; 162 136