Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/vmwgfx: add support for updating only offsets of constant buffers

This adds support for the
SVGA_3D_CMD_DX_SET_VS/PS/GS/HS/DS/CS_CONSTANT_BUFFER_OFFSET commands (which only update
the offset, but don't rebind the buffer), which saves some overhead.

Signed-off-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Martin Krastev <krastevm@vmware.com>
Signed-off-by: Zack Rusin <zackr@vmware.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211206172620.3139754-11-zack@kde.org

authored by

Roland Scheidegger and committed by
Zack Rusin
bf625870 abaad3d9

+79
+21
drivers/gpu/drm/vmwgfx/vmwgfx_binding.c
··· 354 354 } 355 355 356 356 /** 357 + * vmw_binding_cb_offset_update: Update the offset of a cb binding 358 + * 359 + * @cbs: Pointer to the context binding state tracker. 360 + * @shader_slot: The shader slot of the binding. 361 + * @slot: The slot of the binding. 362 + * @offsetInBytes: The new offset of the binding. 363 + * 364 + * Updates the offset of an existing cb binding in the context binding 365 + * state structure @cbs. 366 + */ 367 + void vmw_binding_cb_offset_update(struct vmw_ctx_binding_state *cbs, 368 + u32 shader_slot, u32 slot, u32 offsetInBytes) 369 + { 370 + struct vmw_ctx_bindinfo *loc = 371 + vmw_binding_loc(cbs, vmw_ctx_binding_cb, shader_slot, slot); 372 + struct vmw_ctx_bindinfo_cb *loc_cb = 373 + (struct vmw_ctx_bindinfo_cb *)((u8 *) loc); 374 + loc_cb->offset = offsetInBytes; 375 + } 376 + 377 + /** 357 378 * vmw_binding_add_uav_index - Add UAV index for tracking. 358 379 * @cbs: Pointer to the context binding state tracker. 359 380 * @slot: UAV type to which bind this index.
+2
drivers/gpu/drm/vmwgfx/vmwgfx_binding.h
··· 217 217 extern void vmw_binding_add(struct vmw_ctx_binding_state *cbs, 218 218 const struct vmw_ctx_bindinfo *ci, 219 219 u32 shader_slot, u32 slot); 220 + extern void vmw_binding_cb_offset_update(struct vmw_ctx_binding_state *cbs, 221 + u32 shader_slot, u32 slot, u32 offsetInBytes); 220 222 extern void vmw_binding_add_uav_index(struct vmw_ctx_binding_state *cbs, 221 223 uint32 slot, uint32 splice_index); 222 224 extern void
+56
drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
··· 2164 2164 } 2165 2165 2166 2166 /** 2167 + * vmw_cmd_dx_set_constant_buffer_offset - Validate 2168 + * SVGA_3D_CMD_DX_SET_VS/PS/GS/HS/DS/CS_CONSTANT_BUFFER_OFFSET command. 2169 + * 2170 + * @dev_priv: Pointer to a device private struct. 2171 + * @sw_context: The software context being used for this batch. 2172 + * @header: Pointer to the command header in the command stream. 2173 + */ 2174 + static int 2175 + vmw_cmd_dx_set_constant_buffer_offset(struct vmw_private *dev_priv, 2176 + struct vmw_sw_context *sw_context, 2177 + SVGA3dCmdHeader *header) 2178 + { 2179 + VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXSetConstantBufferOffset); 2180 + 2181 + struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context); 2182 + u32 shader_slot; 2183 + 2184 + if (!has_sm5_context(dev_priv)) 2185 + return -EINVAL; 2186 + 2187 + if (!ctx_node) 2188 + return -EINVAL; 2189 + 2190 + cmd = container_of(header, typeof(*cmd), header); 2191 + if (cmd->body.slot >= SVGA3D_DX_MAX_CONSTBUFFERS) { 2192 + VMW_DEBUG_USER("Illegal const buffer slot %u.\n", 2193 + (unsigned int) cmd->body.slot); 2194 + return -EINVAL; 2195 + } 2196 + 2197 + shader_slot = cmd->header.id - SVGA_3D_CMD_DX_SET_VS_CONSTANT_BUFFER_OFFSET; 2198 + vmw_binding_cb_offset_update(ctx_node->staged, shader_slot, 2199 + cmd->body.slot, cmd->body.offsetInBytes); 2200 + 2201 + return 0; 2202 + } 2203 + 2204 + /** 2167 2205 * vmw_cmd_dx_set_shader_res - Validate SVGA_3D_CMD_DX_SET_SHADER_RESOURCES 2168 2206 * command 2169 2207 * ··· 3563 3525 &vmw_cmd_pred_copy_check, true, false, true), 3564 3526 VMW_CMD_DEF(SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER, 3565 3527 &vmw_cmd_dx_transfer_from_buffer, 3528 + true, false, true), 3529 + VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_VS_CONSTANT_BUFFER_OFFSET, 3530 + &vmw_cmd_dx_set_constant_buffer_offset, 3531 + true, false, true), 3532 + VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_PS_CONSTANT_BUFFER_OFFSET, 3533 + &vmw_cmd_dx_set_constant_buffer_offset, 3534 + true, false, true), 3535 + VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_GS_CONSTANT_BUFFER_OFFSET, 3536 + &vmw_cmd_dx_set_constant_buffer_offset, 3537 + true, false, true), 3538 + VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_HS_CONSTANT_BUFFER_OFFSET, 3539 + &vmw_cmd_dx_set_constant_buffer_offset, 3540 + true, false, true), 3541 + VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_DS_CONSTANT_BUFFER_OFFSET, 3542 + &vmw_cmd_dx_set_constant_buffer_offset, 3543 + true, false, true), 3544 + VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_CS_CONSTANT_BUFFER_OFFSET, 3545 + &vmw_cmd_dx_set_constant_buffer_offset, 3566 3546 true, false, true), 3567 3547 VMW_CMD_DEF(SVGA_3D_CMD_INTRA_SURFACE_COPY, &vmw_cmd_intra_surface_copy, 3568 3548 true, false, true),