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dt-bindings: thermal: Convert stm32 thermal bindings to json-schema

Convert the STM32 thermal binding to DT schema format using json-schema

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Rob Herring <robh@kernel.org>

authored by

Benjamin Gaignard and committed by
Rob Herring
bf5c3ae1 97721c5e

+79 -61
+79
Documentation/devicetree/bindings/thermal/st,stm32-thermal.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/thermal/st,stm32-thermal.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: STMicroelectronics STM32 digital thermal sensor (DTS) binding 8 + 9 + maintainers: 10 + - David Hernandez Sanchez <david.hernandezsanchez@st.com> 11 + 12 + properties: 13 + compatible: 14 + const: st,stm32-thermal 15 + 16 + reg: 17 + maxItems: 1 18 + 19 + interrupts: 20 + maxItems: 1 21 + 22 + clocks: 23 + maxItems: 1 24 + 25 + clock-names: 26 + items: 27 + - const: pclk 28 + 29 + "#thermal-sensor-cells": 30 + const: 0 31 + 32 + required: 33 + - "#thermal-sensor-cells" 34 + - compatible 35 + - reg 36 + - interrupts 37 + - clocks 38 + - clock-names 39 + 40 + additionalProperties: false 41 + 42 + examples: 43 + - | 44 + #include <dt-bindings/interrupt-controller/arm-gic.h> 45 + #include <dt-bindings/clock/stm32mp1-clks.h> 46 + dts: thermal@50028000 { 47 + compatible = "st,stm32-thermal"; 48 + reg = <0x50028000 0x100>; 49 + clocks = <&rcc TMPSENS>; 50 + clock-names = "pclk"; 51 + #thermal-sensor-cells = <0>; 52 + interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 53 + }; 54 + 55 + thermal-zones { 56 + cpu_thermal: cpu-thermal { 57 + polling-delay-passive = <0>; 58 + polling-delay = <0>; 59 + 60 + thermal-sensors = <&dts>; 61 + trips { 62 + cpu_alert1: cpu-alert1 { 63 + temperature = <85000>; 64 + hysteresis = <0>; 65 + type = "passive"; 66 + }; 67 + 68 + cpu_crit: cpu-crit { 69 + temperature = <120000>; 70 + hysteresis = <0>; 71 + type = "critical"; 72 + }; 73 + }; 74 + 75 + cooling-maps { 76 + }; 77 + }; 78 + }; 79 + ...
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Documentation/devicetree/bindings/thermal/stm32-thermal.txt
··· 1 - Binding for Thermal Sensor for STMicroelectronics STM32 series of SoCs. 2 - 3 - On STM32 SoCs, the Digital Temperature Sensor (DTS) is in charge of managing an 4 - analog block which delivers a frequency depending on the internal SoC's 5 - temperature. By using a reference frequency, DTS is able to provide a sample 6 - number which can be translated into a temperature by the user. 7 - 8 - DTS provides interrupt notification mechanism by threshold. This mechanism 9 - offers two temperature trip points: passive and critical. The first is intended 10 - for passive cooling notification while the second is used for over-temperature 11 - reset. 12 - 13 - Required parameters: 14 - ------------------- 15 - 16 - compatible: Should be "st,stm32-thermal" 17 - reg: This should be the physical base address and length of the 18 - sensor's registers. 19 - clocks: Phandle of the clock used by the thermal sensor. 20 - See: Documentation/devicetree/bindings/clock/clock-bindings.txt 21 - clock-names: Should be "pclk" for register access clock and reference clock. 22 - See: Documentation/devicetree/bindings/resource-names.txt 23 - #thermal-sensor-cells: Should be 0. See ./thermal.txt for a description. 24 - interrupts: Standard way to define interrupt number. 25 - 26 - Example: 27 - 28 - thermal-zones { 29 - cpu_thermal: cpu-thermal { 30 - polling-delay-passive = <0>; 31 - polling-delay = <0>; 32 - 33 - thermal-sensors = <&thermal>; 34 - 35 - trips { 36 - cpu_alert1: cpu-alert1 { 37 - temperature = <85000>; 38 - hysteresis = <0>; 39 - type = "passive"; 40 - }; 41 - 42 - cpu-crit: cpu-crit { 43 - temperature = <120000>; 44 - hysteresis = <0>; 45 - type = "critical"; 46 - }; 47 - }; 48 - 49 - cooling-maps { 50 - }; 51 - }; 52 - }; 53 - 54 - thermal: thermal@50028000 { 55 - compatible = "st,stm32-thermal"; 56 - reg = <0x50028000 0x100>; 57 - clocks = <&rcc TMPSENS>; 58 - clock-names = "pclk"; 59 - #thermal-sensor-cells = <0>; 60 - interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 61 - };