tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/i915/backlight: drop DISPLAY_MMIO_BASE() use from backlight registers
None of the remaining backlight registers that use DISPLAY_MMIO_BASE()
are used on VLV/CHV, which are the only platforms that have non-zero
base. Just drop the DISPLAY_MMIO_BASE() use, reducing the implicit
dev_priv references.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/75ae3f2945912f908df2444d4f0ab97a23b89897.1670405587.git.jani.nikula@intel.com
+3
-3
+3
-3
drivers/gpu/drm/i915/display/intel_backlight_regs.h
+3
-3
drivers/gpu/drm/i915/display/intel_backlight_regs.h
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#define VLV_BLC_HIST_CTL(pipe) _MMIO_PIPE(pipe, _VLV_BLC_HIST_CTL_A, _VLV_BLC_HIST_CTL_B)
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/* Backlight control */
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-
#define BLC_PWM_CTL2 _MMIO(DISPLAY_MMIO_BASE(dev_priv) + 0x61250) /* 965+ only */
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+
#define BLC_PWM_CTL2 _MMIO(0x61250) /* 965+ only */
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#define BLM_PWM_ENABLE (1 << 31)
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#define BLM_COMBINATION_MODE (1 << 30) /* gen4 only */
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#define BLM_PIPE_SELECT (1 << 29)
···
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#define BLM_PHASE_IN_COUNT_MASK (0xff << 8)
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#define BLM_PHASE_IN_INCR_SHIFT (0)
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#define BLM_PHASE_IN_INCR_MASK (0xff << 0)
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-
#define BLC_PWM_CTL _MMIO(DISPLAY_MMIO_BASE(dev_priv) + 0x61254)
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+
#define BLC_PWM_CTL _MMIO(0x61254)
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/*
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* This is the most significant 15 bits of the number of backlight cycles in a
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* complete cycle of the modulated backlight control.
···
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#define BACKLIGHT_DUTY_CYCLE_MASK_PNV (0xfffe)
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#define BLM_POLARITY_PNV (1 << 0) /* pnv only */
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-
#define BLC_HIST_CTL _MMIO(DISPLAY_MMIO_BASE(dev_priv) + 0x61260)
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+
#define BLC_HIST_CTL _MMIO(0x61260)
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#define BLM_HISTOGRAM_ENABLE (1 << 31)
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/* New registers for PCH-split platforms. Safe where new bits show up, the