tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

ARM: 8314/1: replace PROCINFO embedded branch with relative offset

This patch replaces the 'branch to setup()' instructions embedded
in the PROCINFO structs with the offset to that setup function
relative to the base of the struct. This preserves the position
independent nature of that field, but uses a data item rather
than an instruction.

This is mainly done to prevent linker failures on large kernels,
where the setup function is out of reach for the branch.

Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

authored by

Ard Biesheuvel and committed by
Russell King bf35706f 0a6a78b8

+72 -67
+7 -7
arch/arm/kernel/head.S
··· 138 138 @ mmu has been enabled 139 139 adr lr, BSYM(1f) @ return (PIC) address 140 140 mov r8, r4 @ set TTBR1 to swapper_pg_dir 141 - ARM( add pc, r10, #PROCINFO_INITFUNC ) 142 - THUMB( add r12, r10, #PROCINFO_INITFUNC ) 143 - THUMB( ret r12 ) 141 + ldr r12, [r10, #PROCINFO_INITFUNC] 142 + add r12, r12, r10 143 + ret r12 144 144 1: b __enable_mmu 145 145 ENDPROC(stext) 146 146 .ltorg ··· 386 386 ldr r8, [r7, lr] @ get secondary_data.swapper_pg_dir 387 387 adr lr, BSYM(__enable_mmu) @ return address 388 388 mov r13, r12 @ __secondary_switched address 389 - ARM( add pc, r10, #PROCINFO_INITFUNC ) @ initialise processor 390 - @ (return control reg) 391 - THUMB( add r12, r10, #PROCINFO_INITFUNC ) 392 - THUMB( ret r12 ) 389 + ldr r12, [r10, #PROCINFO_INITFUNC] 390 + add r12, r12, r10 @ initialise processor 391 + @ (return control reg) 392 + ret r12 393 393 ENDPROC(secondary_startup) 394 394 ENDPROC(secondary_startup_arm) 395 395
+2 -2
arch/arm/mm/proc-arm1020.S
··· 507 507 508 508 .align 509 509 510 - .section ".proc.info.init", #alloc, #execinstr 510 + .section ".proc.info.init", #alloc 511 511 512 512 .type __arm1020_proc_info,#object 513 513 __arm1020_proc_info: ··· 519 519 .long PMD_TYPE_SECT | \ 520 520 PMD_SECT_AP_WRITE | \ 521 521 PMD_SECT_AP_READ 522 - b __arm1020_setup 522 + initfn __arm1020_setup, __arm1020_proc_info 523 523 .long cpu_arch_name 524 524 .long cpu_elf_name 525 525 .long HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB
+2 -2
arch/arm/mm/proc-arm1020e.S
··· 465 465 466 466 .align 467 467 468 - .section ".proc.info.init", #alloc, #execinstr 468 + .section ".proc.info.init", #alloc 469 469 470 470 .type __arm1020e_proc_info,#object 471 471 __arm1020e_proc_info: ··· 479 479 PMD_BIT4 | \ 480 480 PMD_SECT_AP_WRITE | \ 481 481 PMD_SECT_AP_READ 482 - b __arm1020e_setup 482 + initfn __arm1020e_setup, __arm1020e_proc_info 483 483 .long cpu_arch_name 484 484 .long cpu_elf_name 485 485 .long HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB | HWCAP_EDSP
+2 -2
arch/arm/mm/proc-arm1022.S
··· 448 448 449 449 .align 450 450 451 - .section ".proc.info.init", #alloc, #execinstr 451 + .section ".proc.info.init", #alloc 452 452 453 453 .type __arm1022_proc_info,#object 454 454 __arm1022_proc_info: ··· 462 462 PMD_BIT4 | \ 463 463 PMD_SECT_AP_WRITE | \ 464 464 PMD_SECT_AP_READ 465 - b __arm1022_setup 465 + initfn __arm1022_setup, __arm1022_proc_info 466 466 .long cpu_arch_name 467 467 .long cpu_elf_name 468 468 .long HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB | HWCAP_EDSP
+2 -2
arch/arm/mm/proc-arm1026.S
··· 442 442 string cpu_arm1026_name, "ARM1026EJ-S" 443 443 .align 444 444 445 - .section ".proc.info.init", #alloc, #execinstr 445 + .section ".proc.info.init", #alloc 446 446 447 447 .type __arm1026_proc_info,#object 448 448 __arm1026_proc_info: ··· 456 456 PMD_BIT4 | \ 457 457 PMD_SECT_AP_WRITE | \ 458 458 PMD_SECT_AP_READ 459 - b __arm1026_setup 459 + initfn __arm1026_setup, __arm1026_proc_info 460 460 .long cpu_arch_name 461 461 .long cpu_elf_name 462 462 .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_JAVA
+2 -2
arch/arm/mm/proc-arm720.S
··· 186 186 * See <asm/procinfo.h> for a definition of this structure. 187 187 */ 188 188 189 - .section ".proc.info.init", #alloc, #execinstr 189 + .section ".proc.info.init", #alloc 190 190 191 191 .macro arm720_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req, cpu_flush:req 192 192 .type __\name\()_proc_info,#object ··· 203 203 PMD_BIT4 | \ 204 204 PMD_SECT_AP_WRITE | \ 205 205 PMD_SECT_AP_READ 206 - b \cpu_flush @ cpu_flush 206 + initfn \cpu_flush, __\name\()_proc_info @ cpu_flush 207 207 .long cpu_arch_name @ arch_name 208 208 .long cpu_elf_name @ elf_name 209 209 .long HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB @ elf_hwcap
+2 -2
arch/arm/mm/proc-arm740.S
··· 132 132 133 133 .align 134 134 135 - .section ".proc.info.init", #alloc, #execinstr 135 + .section ".proc.info.init", #alloc 136 136 .type __arm740_proc_info,#object 137 137 __arm740_proc_info: 138 138 .long 0x41807400 139 139 .long 0xfffffff0 140 140 .long 0 141 141 .long 0 142 - b __arm740_setup 142 + initfn __arm740_setup, __arm740_proc_info 143 143 .long cpu_arch_name 144 144 .long cpu_elf_name 145 145 .long HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB | HWCAP_26BIT
+2 -2
arch/arm/mm/proc-arm7tdmi.S
··· 76 76 77 77 .align 78 78 79 - .section ".proc.info.init", #alloc, #execinstr 79 + .section ".proc.info.init", #alloc 80 80 81 81 .macro arm7tdmi_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req, \ 82 82 extra_hwcaps=0 ··· 86 86 .long \cpu_mask 87 87 .long 0 88 88 .long 0 89 - b __arm7tdmi_setup 89 + initfn __arm7tdmi_setup, __\name\()_proc_info 90 90 .long cpu_arch_name 91 91 .long cpu_elf_name 92 92 .long HWCAP_SWP | HWCAP_26BIT | ( \extra_hwcaps )
+2 -2
arch/arm/mm/proc-arm920.S
··· 448 448 449 449 .align 450 450 451 - .section ".proc.info.init", #alloc, #execinstr 451 + .section ".proc.info.init", #alloc 452 452 453 453 .type __arm920_proc_info,#object 454 454 __arm920_proc_info: ··· 464 464 PMD_BIT4 | \ 465 465 PMD_SECT_AP_WRITE | \ 466 466 PMD_SECT_AP_READ 467 - b __arm920_setup 467 + initfn __arm920_setup, __arm920_proc_info 468 468 .long cpu_arch_name 469 469 .long cpu_elf_name 470 470 .long HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB
+2 -2
arch/arm/mm/proc-arm922.S
··· 426 426 427 427 .align 428 428 429 - .section ".proc.info.init", #alloc, #execinstr 429 + .section ".proc.info.init", #alloc 430 430 431 431 .type __arm922_proc_info,#object 432 432 __arm922_proc_info: ··· 442 442 PMD_BIT4 | \ 443 443 PMD_SECT_AP_WRITE | \ 444 444 PMD_SECT_AP_READ 445 - b __arm922_setup 445 + initfn __arm922_setup, __arm922_proc_info 446 446 .long cpu_arch_name 447 447 .long cpu_elf_name 448 448 .long HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB
+2 -2
arch/arm/mm/proc-arm925.S
··· 494 494 495 495 .align 496 496 497 - .section ".proc.info.init", #alloc, #execinstr 497 + .section ".proc.info.init", #alloc 498 498 499 499 .macro arm925_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req, cache 500 500 .type __\name\()_proc_info,#object ··· 510 510 PMD_BIT4 | \ 511 511 PMD_SECT_AP_WRITE | \ 512 512 PMD_SECT_AP_READ 513 - b __arm925_setup 513 + initfn __arm925_setup, __\name\()_proc_info 514 514 .long cpu_arch_name 515 515 .long cpu_elf_name 516 516 .long HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB
+2 -2
arch/arm/mm/proc-arm926.S
··· 474 474 475 475 .align 476 476 477 - .section ".proc.info.init", #alloc, #execinstr 477 + .section ".proc.info.init", #alloc 478 478 479 479 .type __arm926_proc_info,#object 480 480 __arm926_proc_info: ··· 490 490 PMD_BIT4 | \ 491 491 PMD_SECT_AP_WRITE | \ 492 492 PMD_SECT_AP_READ 493 - b __arm926_setup 493 + initfn __arm926_setup, __arm926_proc_info 494 494 .long cpu_arch_name 495 495 .long cpu_elf_name 496 496 .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_JAVA
+2 -2
arch/arm/mm/proc-arm940.S
··· 354 354 355 355 .align 356 356 357 - .section ".proc.info.init", #alloc, #execinstr 357 + .section ".proc.info.init", #alloc 358 358 359 359 .type __arm940_proc_info,#object 360 360 __arm940_proc_info: 361 361 .long 0x41009400 362 362 .long 0xff00fff0 363 363 .long 0 364 - b __arm940_setup 364 + initfn __arm940_setup, __arm940_proc_info 365 365 .long cpu_arch_name 366 366 .long cpu_elf_name 367 367 .long HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB
+2 -2
arch/arm/mm/proc-arm946.S
··· 409 409 410 410 .align 411 411 412 - .section ".proc.info.init", #alloc, #execinstr 412 + .section ".proc.info.init", #alloc 413 413 .type __arm946_proc_info,#object 414 414 __arm946_proc_info: 415 415 .long 0x41009460 416 416 .long 0xff00fff0 417 417 .long 0 418 418 .long 0 419 - b __arm946_setup 419 + initfn __arm946_setup, __arm946_proc_info 420 420 .long cpu_arch_name 421 421 .long cpu_elf_name 422 422 .long HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB
+2 -2
arch/arm/mm/proc-arm9tdmi.S
··· 70 70 71 71 .align 72 72 73 - .section ".proc.info.init", #alloc, #execinstr 73 + .section ".proc.info.init", #alloc 74 74 75 75 .macro arm9tdmi_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req 76 76 .type __\name\()_proc_info, #object ··· 79 79 .long \cpu_mask 80 80 .long 0 81 81 .long 0 82 - b __arm9tdmi_setup 82 + initfn __arm9tdmi_setup, __\name\()_proc_info 83 83 .long cpu_arch_name 84 84 .long cpu_elf_name 85 85 .long HWCAP_SWP | HWCAP_THUMB | HWCAP_26BIT
+2 -2
arch/arm/mm/proc-fa526.S
··· 190 190 191 191 .align 192 192 193 - .section ".proc.info.init", #alloc, #execinstr 193 + .section ".proc.info.init", #alloc 194 194 195 195 .type __fa526_proc_info,#object 196 196 __fa526_proc_info: ··· 206 206 PMD_BIT4 | \ 207 207 PMD_SECT_AP_WRITE | \ 208 208 PMD_SECT_AP_READ 209 - b __fa526_setup 209 + initfn __fa526_setup, __fa526_proc_info 210 210 .long cpu_arch_name 211 211 .long cpu_elf_name 212 212 .long HWCAP_SWP | HWCAP_HALF
+3 -2
arch/arm/mm/proc-feroceon.S
··· 584 584 585 585 .align 586 586 587 - .section ".proc.info.init", #alloc, #execinstr 587 + .section ".proc.info.init", #alloc 588 588 589 589 .macro feroceon_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req, cache:req 590 590 .type __\name\()_proc_info,#object ··· 601 601 PMD_BIT4 | \ 602 602 PMD_SECT_AP_WRITE | \ 603 603 PMD_SECT_AP_READ 604 - b __feroceon_setup 604 + initfn __feroceon_setup, __\name\()_proc_info 605 + .long __feroceon_setup 605 606 .long cpu_arch_name 606 607 .long cpu_elf_name 607 608 .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP
+4
arch/arm/mm/proc-macros.S
··· 331 331 .globl \x 332 332 .equ \x, \y 333 333 .endm 334 + 335 + .macro initfn, func, base 336 + .long \func - \base 337 + .endm
+2 -2
arch/arm/mm/proc-mohawk.S
··· 427 427 428 428 .align 429 429 430 - .section ".proc.info.init", #alloc, #execinstr 430 + .section ".proc.info.init", #alloc 431 431 432 432 .type __88sv331x_proc_info,#object 433 433 __88sv331x_proc_info: ··· 443 443 PMD_BIT4 | \ 444 444 PMD_SECT_AP_WRITE | \ 445 445 PMD_SECT_AP_READ 446 - b __mohawk_setup 446 + initfn __mohawk_setup, __88sv331x_proc_info 447 447 .long cpu_arch_name 448 448 .long cpu_elf_name 449 449 .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP
+2 -2
arch/arm/mm/proc-sa110.S
··· 199 199 200 200 .align 201 201 202 - .section ".proc.info.init", #alloc, #execinstr 202 + .section ".proc.info.init", #alloc 203 203 204 204 .type __sa110_proc_info,#object 205 205 __sa110_proc_info: ··· 213 213 .long PMD_TYPE_SECT | \ 214 214 PMD_SECT_AP_WRITE | \ 215 215 PMD_SECT_AP_READ 216 - b __sa110_setup 216 + initfn __sa110_setup, __sa110_proc_info 217 217 .long cpu_arch_name 218 218 .long cpu_elf_name 219 219 .long HWCAP_SWP | HWCAP_HALF | HWCAP_26BIT | HWCAP_FAST_MULT
+2 -2
arch/arm/mm/proc-sa1100.S
··· 242 242 243 243 .align 244 244 245 - .section ".proc.info.init", #alloc, #execinstr 245 + .section ".proc.info.init", #alloc 246 246 247 247 .macro sa1100_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req 248 248 .type __\name\()_proc_info,#object ··· 257 257 .long PMD_TYPE_SECT | \ 258 258 PMD_SECT_AP_WRITE | \ 259 259 PMD_SECT_AP_READ 260 - b __sa1100_setup 260 + initfn __sa1100_setup, __\name\()_proc_info 261 261 .long cpu_arch_name 262 262 .long cpu_elf_name 263 263 .long HWCAP_SWP | HWCAP_HALF | HWCAP_26BIT | HWCAP_FAST_MULT
+2 -2
arch/arm/mm/proc-v6.S
··· 264 264 string cpu_elf_name, "v6" 265 265 .align 266 266 267 - .section ".proc.info.init", #alloc, #execinstr 267 + .section ".proc.info.init", #alloc 268 268 269 269 /* 270 270 * Match any ARMv6 processor core. ··· 287 287 PMD_SECT_XN | \ 288 288 PMD_SECT_AP_WRITE | \ 289 289 PMD_SECT_AP_READ 290 - b __v6_setup 290 + initfn __v6_setup, __v6_proc_info 291 291 .long cpu_arch_name 292 292 .long cpu_elf_name 293 293 /* See also feat_v6_fixup() for HWCAP_TLS */
+14 -14
arch/arm/mm/proc-v7.S
··· 462 462 string cpu_elf_name, "v7" 463 463 .align 464 464 465 - .section ".proc.info.init", #alloc, #execinstr 465 + .section ".proc.info.init", #alloc 466 466 467 467 /* 468 468 * Standard v7 proc info content 469 469 */ 470 - .macro __v7_proc initfunc, mm_mmuflags = 0, io_mmuflags = 0, hwcaps = 0, proc_fns = v7_processor_functions 470 + .macro __v7_proc name, initfunc, mm_mmuflags = 0, io_mmuflags = 0, hwcaps = 0, proc_fns = v7_processor_functions 471 471 ALT_SMP(.long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | \ 472 472 PMD_SECT_AF | PMD_FLAGS_SMP | \mm_mmuflags) 473 473 ALT_UP(.long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | \ 474 474 PMD_SECT_AF | PMD_FLAGS_UP | \mm_mmuflags) 475 475 .long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | \ 476 476 PMD_SECT_AP_READ | PMD_SECT_AF | \io_mmuflags 477 - W(b) \initfunc 477 + initfn \initfunc, \name 478 478 .long cpu_arch_name 479 479 .long cpu_elf_name 480 480 .long HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB | HWCAP_FAST_MULT | \ ··· 494 494 __v7_ca5mp_proc_info: 495 495 .long 0x410fc050 496 496 .long 0xff0ffff0 497 - __v7_proc __v7_ca5mp_setup 497 + __v7_proc __v7_ca5mp_proc_info, __v7_ca5mp_setup 498 498 .size __v7_ca5mp_proc_info, . - __v7_ca5mp_proc_info 499 499 500 500 /* ··· 504 504 __v7_ca9mp_proc_info: 505 505 .long 0x410fc090 506 506 .long 0xff0ffff0 507 - __v7_proc __v7_ca9mp_setup, proc_fns = ca9mp_processor_functions 507 + __v7_proc __v7_ca9mp_proc_info, __v7_ca9mp_setup, proc_fns = ca9mp_processor_functions 508 508 .size __v7_ca9mp_proc_info, . - __v7_ca9mp_proc_info 509 509 510 510 #endif /* CONFIG_ARM_LPAE */ ··· 517 517 __v7_pj4b_proc_info: 518 518 .long 0x560f5800 519 519 .long 0xff0fff00 520 - __v7_proc __v7_pj4b_setup, proc_fns = pj4b_processor_functions 520 + __v7_proc __v7_pj4b_proc_info, __v7_pj4b_setup, proc_fns = pj4b_processor_functions 521 521 .size __v7_pj4b_proc_info, . - __v7_pj4b_proc_info 522 522 #endif 523 523 ··· 528 528 __v7_cr7mp_proc_info: 529 529 .long 0x410fc170 530 530 .long 0xff0ffff0 531 - __v7_proc __v7_cr7mp_setup 531 + __v7_proc __v7_cr7mp_proc_info, __v7_cr7mp_setup 532 532 .size __v7_cr7mp_proc_info, . - __v7_cr7mp_proc_info 533 533 534 534 /* ··· 538 538 __v7_ca7mp_proc_info: 539 539 .long 0x410fc070 540 540 .long 0xff0ffff0 541 - __v7_proc __v7_ca7mp_setup 541 + __v7_proc __v7_ca7mp_proc_info, __v7_ca7mp_setup 542 542 .size __v7_ca7mp_proc_info, . - __v7_ca7mp_proc_info 543 543 544 544 /* ··· 548 548 __v7_ca12mp_proc_info: 549 549 .long 0x410fc0d0 550 550 .long 0xff0ffff0 551 - __v7_proc __v7_ca12mp_setup 551 + __v7_proc __v7_ca12mp_proc_info, __v7_ca12mp_setup 552 552 .size __v7_ca12mp_proc_info, . - __v7_ca12mp_proc_info 553 553 554 554 /* ··· 558 558 __v7_ca15mp_proc_info: 559 559 .long 0x410fc0f0 560 560 .long 0xff0ffff0 561 - __v7_proc __v7_ca15mp_setup 561 + __v7_proc __v7_ca15mp_proc_info, __v7_ca15mp_setup 562 562 .size __v7_ca15mp_proc_info, . - __v7_ca15mp_proc_info 563 563 564 564 /* ··· 568 568 __v7_b15mp_proc_info: 569 569 .long 0x420f00f0 570 570 .long 0xff0ffff0 571 - __v7_proc __v7_b15mp_setup 571 + __v7_proc __v7_b15mp_proc_info, __v7_b15mp_setup 572 572 .size __v7_b15mp_proc_info, . - __v7_b15mp_proc_info 573 573 574 574 /* ··· 578 578 __v7_ca17mp_proc_info: 579 579 .long 0x410fc0e0 580 580 .long 0xff0ffff0 581 - __v7_proc __v7_ca17mp_setup 581 + __v7_proc __v7_ca17mp_proc_info, __v7_ca17mp_setup 582 582 .size __v7_ca17mp_proc_info, . - __v7_ca17mp_proc_info 583 583 584 584 /* ··· 594 594 * do support them. They also don't indicate support for fused multiply 595 595 * instructions even though they actually do support them. 596 596 */ 597 - __v7_proc __v7_setup, hwcaps = HWCAP_IDIV | HWCAP_VFPv4 597 + __v7_proc __krait_proc_info, __v7_setup, hwcaps = HWCAP_IDIV | HWCAP_VFPv4 598 598 .size __krait_proc_info, . - __krait_proc_info 599 599 600 600 /* ··· 604 604 __v7_proc_info: 605 605 .long 0x000f0000 @ Required ID value 606 606 .long 0x000f0000 @ Mask for ID 607 - __v7_proc __v7_setup 607 + __v7_proc __v7_proc_info, __v7_setup 608 608 .size __v7_proc_info, . - __v7_proc_info
+2 -2
arch/arm/mm/proc-v7m.S
··· 135 135 string cpu_elf_name "v7m" 136 136 string cpu_v7m_name "ARMv7-M" 137 137 138 - .section ".proc.info.init", #alloc, #execinstr 138 + .section ".proc.info.init", #alloc 139 139 140 140 /* 141 141 * Match any ARMv7-M processor core. ··· 146 146 .long 0x000f0000 @ Mask for ID 147 147 .long 0 @ proc_info_list.__cpu_mm_mmu_flags 148 148 .long 0 @ proc_info_list.__cpu_io_mmu_flags 149 - b __v7m_setup @ proc_info_list.__cpu_flush 149 + initfn __v7m_setup, __v7m_proc_info @ proc_info_list.__cpu_flush 150 150 .long cpu_arch_name 151 151 .long cpu_elf_name 152 152 .long HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT
+2 -2
arch/arm/mm/proc-xsc3.S
··· 499 499 500 500 .align 501 501 502 - .section ".proc.info.init", #alloc, #execinstr 502 + .section ".proc.info.init", #alloc 503 503 504 504 .macro xsc3_proc_info name:req, cpu_val:req, cpu_mask:req 505 505 .type __\name\()_proc_info,#object ··· 514 514 .long PMD_TYPE_SECT | \ 515 515 PMD_SECT_AP_WRITE | \ 516 516 PMD_SECT_AP_READ 517 - b __xsc3_setup 517 + initfn __xsc3_setup, __\name\()_proc_info 518 518 .long cpu_arch_name 519 519 .long cpu_elf_name 520 520 .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP
+2 -2
arch/arm/mm/proc-xscale.S
··· 612 612 613 613 .align 614 614 615 - .section ".proc.info.init", #alloc, #execinstr 615 + .section ".proc.info.init", #alloc 616 616 617 617 .macro xscale_proc_info name:req, cpu_val:req, cpu_mask:req, cpu_name:req, cache 618 618 .type __\name\()_proc_info,#object ··· 627 627 .long PMD_TYPE_SECT | \ 628 628 PMD_SECT_AP_WRITE | \ 629 629 PMD_SECT_AP_READ 630 - b __xscale_setup 630 + initfn __xscale_setup, __\name\()_proc_info 631 631 .long cpu_arch_name 632 632 .long cpu_elf_name 633 633 .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP