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doc: Documentation/DMA-attributes.txt fix typo

Fix some typos in Documentation/DMA-attributes.txt.

Signed-off-by: Xishi Qiu <qiuxishi@huawei.com>
Acked-by: Rob Landley <rob@landley.net>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>

authored by

Xishi Qiu and committed by
Jiri Kosina
bf038227 0d7a0a8a

+3 -3
+3 -3
Documentation/DMA-attributes.txt
··· 13 13 strictly order DMA from a device across all intervening busses and 14 14 bridges. This barrier is not specific to a particular type of 15 15 interconnect, it applies to the system as a whole, and so its 16 - implementation must account for the idiosyncracies of the system all 16 + implementation must account for the idiosyncrasies of the system all 17 17 the way from the DMA device to memory. 18 18 19 19 As an example of a situation where DMA_ATTR_WRITE_BARRIER would be ··· 60 60 Buffers allocated with this attribute can be only passed to user space 61 61 by calling dma_mmap_attrs(). By using this API, you are guaranteeing 62 62 that you won't dereference the pointer returned by dma_alloc_attr(). You 63 - can threat it as a cookie that must be passed to dma_mmap_attrs() and 63 + can treat it as a cookie that must be passed to dma_mmap_attrs() and 64 64 dma_free_attrs(). Make sure that both of these also get this attribute 65 65 set on each call. 66 66 ··· 82 82 (usually it means that the cache has been flushed or invalidated 83 83 depending on the dma direction). However, next calls to 84 84 dma_map_{single,page,sg}() for other devices will perform exactly the 85 - same sychronization operation on the CPU cache. CPU cache sychronization 85 + same synchronization operation on the CPU cache. CPU cache synchronization 86 86 might be a time consuming operation, especially if the buffers are 87 87 large, so it is highly recommended to avoid it if possible. 88 88 DMA_ATTR_SKIP_CPU_SYNC allows platform code to skip synchronization of