Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

dt-bindings: dmaengine: Add X1000 bindings.

Add the dmaengine bindings for the X1000 Soc from Ingenic.

Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1571937670-30828-2-git-send-email-zhouyanjie@zoho.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Zhou Yanjie and committed by
Vinod Koul
be80507d 6ccd692b

+42 -1
+2 -1
Documentation/devicetree/bindings/dma/jz4780-dma.txt
··· 7 7 * ingenic,jz4725b-dma 8 8 * ingenic,jz4770-dma 9 9 * ingenic,jz4780-dma 10 + * ingenic,x1000-dma 10 11 - reg: Should contain the DMA channel registers location and length, followed 11 12 by the DMA controller registers location and length. 12 13 - interrupts: Should contain the interrupt specifier of the DMA controller. 13 - - clocks: Should contain a clock specifier for the JZ4780 PDMA clock. 14 + - clocks: Should contain a clock specifier for the JZ4780/X1000 PDMA clock. 14 15 - #dma-cells: Must be <2>. Number of integer cells in the dmas property of 15 16 DMA clients (see below). 16 17
+40
include/dt-bindings/dma/x1000-dma.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0-only */ 2 + /* 3 + * This header provides macros for X1000 DMA bindings. 4 + * 5 + * Copyright (c) 2019 Zhou Yanjie <zhouyanjie@zoho.com> 6 + */ 7 + 8 + #ifndef __DT_BINDINGS_DMA_X1000_DMA_H__ 9 + #define __DT_BINDINGS_DMA_X1000_DMA_H__ 10 + 11 + /* 12 + * Request type numbers for the X1000 DMA controller (written to the DRTn 13 + * register for the channel). 14 + */ 15 + #define X1000_DMA_DMIC_RX 0x5 16 + #define X1000_DMA_I2S0_TX 0x6 17 + #define X1000_DMA_I2S0_RX 0x7 18 + #define X1000_DMA_AUTO 0x8 19 + #define X1000_DMA_UART2_TX 0x10 20 + #define X1000_DMA_UART2_RX 0x11 21 + #define X1000_DMA_UART1_TX 0x12 22 + #define X1000_DMA_UART1_RX 0x13 23 + #define X1000_DMA_UART0_TX 0x14 24 + #define X1000_DMA_UART0_RX 0x15 25 + #define X1000_DMA_SSI0_TX 0x16 26 + #define X1000_DMA_SSI0_RX 0x17 27 + #define X1000_DMA_MSC0_TX 0x1a 28 + #define X1000_DMA_MSC0_RX 0x1b 29 + #define X1000_DMA_MSC1_TX 0x1c 30 + #define X1000_DMA_MSC1_RX 0x1d 31 + #define X1000_DMA_PCM0_TX 0x20 32 + #define X1000_DMA_PCM0_RX 0x21 33 + #define X1000_DMA_SMB0_TX 0x24 34 + #define X1000_DMA_SMB0_RX 0x25 35 + #define X1000_DMA_SMB1_TX 0x26 36 + #define X1000_DMA_SMB1_RX 0x27 37 + #define X1000_DMA_SMB2_TX 0x28 38 + #define X1000_DMA_SMB2_RX 0x29 39 + 40 + #endif /* __DT_BINDINGS_DMA_X1000_DMA_H__ */