tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

Merge master.kernel.org:/home/rmk/linux-2.6-arm

Linus Torvalds be15cd72 e9d52234

+295 -172
+3 -11
arch/arm/Makefile
··· 8 8 # Copyright (C) 1995-2001 by Russell King 9 9 10 10 LDFLAGS_vmlinux :=-p --no-undefined -X 11 - CPPFLAGS_vmlinux.lds = -DTEXTADDR=$(TEXTADDR) -DDATAADDR=$(DATAADDR) 11 + CPPFLAGS_vmlinux.lds = -DKERNEL_RAM_ADDR=$(TEXTADDR) 12 12 OBJCOPYFLAGS :=-O binary -R .note -R .comment -S 13 13 GZFLAGS :=-9 14 14 #CFLAGS +=-pipe ··· 108 108 endif 109 109 110 110 TEXTADDR := $(textaddr-y) 111 - ifeq ($(CONFIG_XIP_KERNEL),y) 112 - DATAADDR := $(TEXTADDR) 113 - xipaddr-$(CONFIG_ARCH_CO285) := 0x5f000000 114 - xipaddr-y ?= 0xbf000000 115 - # Replace phys addr with virt addr while keeping offset from base. 116 - TEXTADDR := $(shell echo $(CONFIG_XIP_PHYS_ADDR) $(xipaddr-y) | \ 117 - awk --non-decimal-data '/[:xdigit:]/ \ 118 - { printf("0x%x\n", and($$1, 0x000fffff) + $$2) }' ) 119 - endif 120 111 121 112 ifeq ($(incdir-y),) 122 113 incdir-y := $(machine-y) 123 114 endif 124 115 INCDIR := arch-$(incdir-y) 116 + 125 117 ifneq ($(machine-y),) 126 118 MACHINE := arch/arm/mach-$(machine-y)/ 127 119 else 128 120 MACHINE := 129 121 endif 130 122 131 - export TEXTADDR DATAADDR GZFLAGS 123 + export TEXTADDR GZFLAGS 132 124 133 125 # Do we have FASTFPE? 134 126 FASTFPE :=arch/arm/fastfpe
+1 -1
arch/arm/kernel/Makefile
··· 2 2 # Makefile for the linux kernel. 3 3 # 4 4 5 - AFLAGS_head.o := -DTEXTADDR=$(TEXTADDR) -DDATAADDR=$(DATAADDR) 5 + AFLAGS_head.o := -DKERNEL_RAM_ADDR=$(TEXTADDR) 6 6 7 7 # Object file lists. 8 8
-1
arch/arm/kernel/asm-offsets.c
··· 94 94 DEFINE(VM_EXEC, VM_EXEC); 95 95 BLANK(); 96 96 DEFINE(PAGE_SZ, PAGE_SIZE); 97 - DEFINE(VIRT_OFFSET, PAGE_OFFSET); 98 97 BLANK(); 99 98 DEFINE(SYS_ERROR0, 0x9f0000); 100 99 BLANK();
+2 -1
arch/arm/kernel/entry-armv.S
··· 15 15 */ 16 16 #include <linux/config.h> 17 17 18 + #include <asm/memory.h> 18 19 #include <asm/glue.h> 19 20 #include <asm/vfpmacros.h> 20 21 #include <asm/hardware.h> /* should be moved into entry-macro.S */ ··· 311 310 312 311 #if __LINUX_ARM_ARCH__ < 6 && !defined(CONFIG_NEEDS_SYSCALL_FOR_CMPXCHG) 313 312 @ make sure our user space atomic helper is aborted 314 - cmp r2, #VIRT_OFFSET 313 + cmp r2, #TASK_SIZE 315 314 bichs r3, r3, #PSR_Z_BIT 316 315 #endif 317 316
+17 -40
arch/arm/kernel/head.S
··· 21 21 #include <asm/procinfo.h> 22 22 #include <asm/ptrace.h> 23 23 #include <asm/asm-offsets.h> 24 + #include <asm/memory.h> 24 25 #include <asm/thread_info.h> 25 26 #include <asm/system.h> 26 27 ··· 34 33 #define MACHINFO_PGOFFIO 12 35 34 #define MACHINFO_NAME 16 36 35 37 - #ifndef CONFIG_XIP_KERNEL 38 36 /* 39 - * We place the page tables 16K below TEXTADDR. Therefore, we must make sure 40 - * that TEXTADDR is correctly set. Currently, we expect the least significant 41 - * 16 bits to be 0x8000, but we could probably relax this restriction to 42 - * TEXTADDR >= PAGE_OFFSET + 0x4000 43 - * 44 - * Note that swapper_pg_dir is the virtual address of the page tables, and 45 - * pgtbl gives us a position-independent reference to these tables. We can 46 - * do this because stext == TEXTADDR 37 + * swapper_pg_dir is the virtual address of the initial page table. 38 + * We place the page tables 16K below KERNEL_RAM_ADDR. Therefore, we must 39 + * make sure that KERNEL_RAM_ADDR is correctly set. Currently, we expect 40 + * the least significant 16 bits to be 0x8000, but we could probably 41 + * relax this restriction to KERNEL_RAM_ADDR >= PAGE_OFFSET + 0x4000. 47 42 */ 48 - #if (TEXTADDR & 0xffff) != 0x8000 49 - #error TEXTADDR must start at 0xXXXX8000 43 + #if (KERNEL_RAM_ADDR & 0xffff) != 0x8000 44 + #error KERNEL_RAM_ADDR must start at 0xXXXX8000 50 45 #endif 51 46 52 47 .globl swapper_pg_dir 53 - .equ swapper_pg_dir, TEXTADDR - 0x4000 48 + .equ swapper_pg_dir, KERNEL_RAM_ADDR - 0x4000 54 49 55 - .macro pgtbl, rd, phys 56 - adr \rd, stext 57 - sub \rd, \rd, #0x4000 50 + .macro pgtbl, rd 51 + ldr \rd, =(__virt_to_phys(KERNEL_RAM_ADDR - 0x4000)) 58 52 .endm 53 + 54 + #ifdef CONFIG_XIP_KERNEL 55 + #define TEXTADDR XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR) 59 56 #else 60 - /* 61 - * XIP Kernel: 62 - * 63 - * We place the page tables 16K below DATAADDR. Therefore, we must make sure 64 - * that DATAADDR is correctly set. Currently, we expect the least significant 65 - * 16 bits to be 0x8000, but we could probably relax this restriction to 66 - * DATAADDR >= PAGE_OFFSET + 0x4000 67 - * 68 - * Note that pgtbl is meant to return the physical address of swapper_pg_dir. 69 - * We can't make it relative to the kernel position in this case since 70 - * the kernel can physically be anywhere. 71 - */ 72 - #if (DATAADDR & 0xffff) != 0x8000 73 - #error DATAADDR must start at 0xXXXX8000 74 - #endif 75 - 76 - .globl swapper_pg_dir 77 - .equ swapper_pg_dir, DATAADDR - 0x4000 78 - 79 - .macro pgtbl, rd, phys 80 - ldr \rd, =((DATAADDR - 0x4000) - VIRT_OFFSET) 81 - add \rd, \rd, \phys 82 - .endm 57 + #define TEXTADDR KERNEL_RAM_ADDR 83 58 #endif 84 59 85 60 /* ··· 256 279 .type __create_page_tables, %function 257 280 __create_page_tables: 258 281 ldr r5, [r8, #MACHINFO_PHYSRAM] @ physram 259 - pgtbl r4, r5 @ page table address 282 + pgtbl r4 @ page table address 260 283 261 284 /* 262 285 * Clear the 16K level 1 swapper page table ··· 301 324 /* 302 325 * Then map first 1MB of ram in case it contains our boot params. 303 326 */ 304 - add r0, r4, #VIRT_OFFSET >> 18 327 + add r0, r4, #PAGE_OFFSET >> 18 305 328 orr r6, r5, r7 306 329 str r6, [r0] 307 330
+10 -1
arch/arm/kernel/vmlinux.lds.S
··· 6 6 #include <asm-generic/vmlinux.lds.h> 7 7 #include <linux/config.h> 8 8 #include <asm/thread_info.h> 9 + #include <asm/memory.h> 9 10 10 11 OUTPUT_ARCH(arm) 11 12 ENTRY(stext) 13 + 12 14 #ifndef __ARMEB__ 13 15 jiffies = jiffies_64; 14 16 #else 15 17 jiffies = jiffies_64 + 4; 16 18 #endif 19 + 20 + #ifdef CONFIG_XIP_KERNEL 21 + #define TEXTADDR XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR) 22 + #else 23 + #define TEXTADDR KERNEL_RAM_ADDR 24 + #endif 25 + 17 26 SECTIONS 18 27 { 19 28 . = TEXTADDR; ··· 104 95 105 96 #ifdef CONFIG_XIP_KERNEL 106 97 __data_loc = ALIGN(4); /* location in binary */ 107 - . = DATAADDR; 98 + . = KERNEL_RAM_ADDR; 108 99 #else 109 100 . = ALIGN(THREAD_SIZE); 110 101 __data_loc = .;
+2
arch/arm/mach-sa1100/generic.c
··· 23 23 #include <asm/system.h> 24 24 #include <asm/pgtable.h> 25 25 #include <asm/mach/map.h> 26 + #include <asm/mach/flash.h> 26 27 #include <asm/irq.h> 27 28 28 29 #include "generic.h" ··· 284 283 void sa11x0_set_flash_data(struct flash_platform_data *flash, 285 284 struct resource *res, int nr) 286 285 { 286 + flash->name = "sa1100"; 287 287 sa11x0mtd_device.dev.platform_data = flash; 288 288 sa11x0mtd_device.resource = res; 289 289 sa11x0mtd_device.num_resources = nr;
+64
arch/arm/mach-sa1100/jornada720.c
··· 8 8 #include <linux/delay.h> 9 9 #include <linux/device.h> 10 10 #include <linux/ioport.h> 11 + #include <linux/mtd/mtd.h> 12 + #include <linux/mtd/partitions.h> 11 13 12 14 #include <asm/hardware.h> 13 15 #include <asm/hardware/sa1111.h> ··· 18 16 #include <asm/setup.h> 19 17 20 18 #include <asm/mach/arch.h> 19 + #include <asm/mach/flash.h> 21 20 #include <asm/mach/map.h> 22 21 #include <asm/mach/serial_sa1100.h> 23 22 ··· 111 108 sa1100_register_uart(1, 1); 112 109 } 113 110 111 + static struct mtd_partition jornada720_partitions[] = { 112 + { 113 + .name = "JORNADA720 boot firmware", 114 + .size = 0x00040000, 115 + .offset = 0, 116 + .mask_flags = MTD_WRITEABLE, /* force read-only */ 117 + }, { 118 + .name = "JORNADA720 kernel", 119 + .size = 0x000c0000, 120 + .offset = 0x00040000, 121 + }, { 122 + .name = "JORNADA720 params", 123 + .size = 0x00040000, 124 + .offset = 0x00100000, 125 + }, { 126 + .name = "JORNADA720 initrd", 127 + .size = 0x00100000, 128 + .offset = 0x00140000, 129 + }, { 130 + .name = "JORNADA720 root cramfs", 131 + .size = 0x00300000, 132 + .offset = 0x00240000, 133 + }, { 134 + .name = "JORNADA720 usr cramfs", 135 + .size = 0x00800000, 136 + .offset = 0x00540000, 137 + }, { 138 + .name = "JORNADA720 usr local", 139 + .size = 0, /* will expand to the end of the flash */ 140 + .offset = 0x00d00000, 141 + } 142 + }; 143 + 144 + static void jornada720_set_vpp(int vpp) 145 + { 146 + if (vpp) 147 + PPSR |= 0x80; 148 + else 149 + PPSR &= ~0x80; 150 + PPDR |= 0x80; 151 + } 152 + 153 + static struct flash_platform_data jornada720_flash_data = { 154 + .map_name = "cfi_probe", 155 + .set_vpp = jornada720_set_vpp, 156 + .parts = jornada720_partitions, 157 + .nr_parts = ARRAY_SIZE(jornada720_partitions), 158 + }; 159 + 160 + static struct resource jornada720_flash_resource = { 161 + .start = SA1100_CS0_PHYS, 162 + .end = SA1100_CS0_PHYS + SZ_32M - 1, 163 + .flags = IORESOURCE_MEM, 164 + }; 165 + 166 + static void __init jornada720_mach_init(void) 167 + { 168 + sa11x0_set_flash_data(&jornada720_flash_data, &jornada720_flash_resource, 1); 169 + } 170 + 114 171 MACHINE_START(JORNADA720, "HP Jornada 720") 115 172 /* Maintainer: Michael Gernoth <michael@gernoth.net> */ 116 173 .phys_ram = 0xc0000000, ··· 180 117 .map_io = jornada720_map_io, 181 118 .init_irq = sa1100_init_irq, 182 119 .timer = &sa1100_timer, 120 + .init_machine = jornada720_mach_init, 183 121 MACHINE_END
+19 -11
arch/arm/mm/init.c
··· 363 363 364 364 memcpy(&meminfo, mi, sizeof(meminfo)); 365 365 366 - #ifdef CONFIG_XIP_KERNEL 367 - #error needs fixing 368 - p->pfn = __phys_to_pfn(CONFIG_XIP_PHYS_ADDR & PMD_MASK); 369 - p->virtual = (unsigned long)&_stext & PMD_MASK; 370 - p->length = ((unsigned long)&_etext - p->virtual + ~PMD_MASK) & PMD_MASK; 371 - p->type = MT_ROM; 372 - p ++; 373 - #endif 374 - 375 366 /* 376 367 * Clear out all the mappings below the kernel image. 377 - * FIXME: what about XIP? 378 368 */ 379 - for (addr = 0; addr < PAGE_OFFSET; addr += PGDIR_SIZE) 369 + for (addr = 0; addr < MODULE_START; addr += PGDIR_SIZE) 370 + pmd_clear(pmd_off_k(addr)); 371 + #ifdef CONFIG_XIP_KERNEL 372 + /* The XIP kernel is mapped in the module area -- skip over it */ 373 + addr = ((unsigned long)&_etext + PGDIR_SIZE - 1) & PGDIR_MASK; 374 + #endif 375 + for ( ; addr < PAGE_OFFSET; addr += PGDIR_SIZE) 380 376 pmd_clear(pmd_off_k(addr)); 381 377 382 378 /* ··· 430 434 431 435 for (addr = VMALLOC_END; addr; addr += PGDIR_SIZE) 432 436 pmd_clear(pmd_off_k(addr)); 437 + 438 + /* 439 + * Map the kernel if it is XIP. 440 + * It is always first in the modulearea. 441 + */ 442 + #ifdef CONFIG_XIP_KERNEL 443 + map.pfn = __phys_to_pfn(CONFIG_XIP_PHYS_ADDR & PGDIR_MASK); 444 + map.virtual = MODULE_START; 445 + map.length = ((unsigned long)&_etext - map.virtual + ~PGDIR_MASK) & PGDIR_MASK; 446 + map.type = MT_ROM; 447 + create_mapping(&map); 448 + #endif 433 449 434 450 /* 435 451 * Map the cache flushing regions.
+47 -19
drivers/mtd/maps/sa1100-flash.c
··· 130 130 char name[16]; 131 131 struct map_info map; 132 132 struct mtd_info *mtd; 133 - struct flash_platform_data *data; 133 + struct flash_platform_data *plat; 134 134 }; 135 135 136 136 struct sa_info { 137 137 struct mtd_partition *parts; 138 138 struct mtd_info *mtd; 139 139 int num_subdev; 140 + unsigned int nr_parts; 140 141 struct sa_subdev_info subdev[0]; 141 142 }; 142 143 143 144 static void sa1100_set_vpp(struct map_info *map, int on) 144 145 { 145 146 struct sa_subdev_info *subdev = container_of(map, struct sa_subdev_info, map); 146 - subdev->data->set_vpp(on); 147 + subdev->plat->set_vpp(on); 147 148 } 148 149 149 150 static void sa1100_destroy_subdev(struct sa_subdev_info *subdev) ··· 188 187 goto out; 189 188 } 190 189 191 - if (subdev->data->set_vpp) 190 + if (subdev->plat->set_vpp) 192 191 subdev->map.set_vpp = sa1100_set_vpp; 193 192 194 193 subdev->map.phys = phys; ··· 205 204 * Now let's probe for the actual flash. Do it here since 206 205 * specific machine settings might have been set above. 207 206 */ 208 - subdev->mtd = do_map_probe(subdev->data->map_name, &subdev->map); 207 + subdev->mtd = do_map_probe(subdev->plat->map_name, &subdev->map); 209 208 if (subdev->mtd == NULL) { 210 209 ret = -ENXIO; 211 210 goto err; ··· 224 223 return ret; 225 224 } 226 225 227 - static void sa1100_destroy(struct sa_info *info) 226 + static void sa1100_destroy(struct sa_info *info, struct flash_platform_data *plat) 228 227 { 229 228 int i; 230 229 231 230 if (info->mtd) { 232 - del_mtd_partitions(info->mtd); 233 - 231 + if (info->nr_parts == 0) 232 + del_mtd_device(info->mtd); 233 + #ifdef CONFIG_MTD_PARTITIONS 234 + else 235 + del_mtd_partitions(info->mtd); 236 + #endif 234 237 #ifdef CONFIG_MTD_CONCAT 235 238 if (info->mtd != info->subdev[0].mtd) 236 239 mtd_concat_destroy(info->mtd); ··· 247 242 for (i = info->num_subdev - 1; i >= 0; i--) 248 243 sa1100_destroy_subdev(&info->subdev[i]); 249 244 kfree(info); 245 + 246 + if (plat->exit) 247 + plat->exit(); 250 248 } 251 249 252 250 static struct sa_info *__init 253 - sa1100_setup_mtd(struct platform_device *pdev, struct flash_platform_data *flash) 251 + sa1100_setup_mtd(struct platform_device *pdev, struct flash_platform_data *plat) 254 252 { 255 253 struct sa_info *info; 256 254 int nr, size, i, ret = 0; ··· 283 275 284 276 memset(info, 0, size); 285 277 278 + if (plat->init) { 279 + ret = plat->init(); 280 + if (ret) 281 + goto err; 282 + } 283 + 286 284 /* 287 285 * Claim and then map the memory regions. 288 286 */ ··· 301 287 break; 302 288 303 289 subdev->map.name = subdev->name; 304 - sprintf(subdev->name, "sa1100-%d", i); 305 - subdev->data = flash; 290 + sprintf(subdev->name, "%s-%d", plat->name, i); 291 + subdev->plat = plat; 306 292 307 293 ret = sa1100_probe_subdev(subdev, res); 308 294 if (ret) ··· 323 309 * otherwise fail. Either way, it'll be called "sa1100". 324 310 */ 325 311 if (info->num_subdev == 1) { 326 - strcpy(info->subdev[0].name, "sa1100"); 312 + strcpy(info->subdev[0].name, plat->name); 327 313 info->mtd = info->subdev[0].mtd; 328 314 ret = 0; 329 315 } else if (info->num_subdev > 1) { ··· 336 322 cdev[i] = info->subdev[i].mtd; 337 323 338 324 info->mtd = mtd_concat_create(cdev, info->num_subdev, 339 - "sa1100"); 325 + plat->name); 340 326 if (info->mtd == NULL) 341 327 ret = -ENXIO; 342 328 #else ··· 350 336 return info; 351 337 352 338 err: 353 - sa1100_destroy(info); 339 + sa1100_destroy(info, plat); 354 340 out: 355 341 return ERR_PTR(ret); 356 342 } ··· 360 346 static int __init sa1100_mtd_probe(struct device *dev) 361 347 { 362 348 struct platform_device *pdev = to_platform_device(dev); 363 - struct flash_platform_data *flash = pdev->dev.platform_data; 349 + struct flash_platform_data *plat = pdev->dev.platform_data; 364 350 struct mtd_partition *parts; 365 351 const char *part_type = NULL; 366 352 struct sa_info *info; 367 353 int err, nr_parts = 0; 368 354 369 - if (!flash) 355 + if (!plat) 370 356 return -ENODEV; 371 357 372 - info = sa1100_setup_mtd(pdev, flash); 358 + info = sa1100_setup_mtd(pdev, plat); 373 359 if (IS_ERR(info)) { 374 360 err = PTR_ERR(info); 375 361 goto out; ··· 386 372 } else 387 373 #endif 388 374 { 389 - parts = flash->parts; 390 - nr_parts = flash->nr_parts; 375 + parts = plat->parts; 376 + nr_parts = plat->nr_parts; 391 377 part_type = "static"; 392 378 } 393 379 ··· 401 387 add_mtd_partitions(info->mtd, parts, nr_parts); 402 388 } 403 389 390 + info->nr_parts = nr_parts; 391 + 404 392 dev_set_drvdata(dev, info); 405 393 err = 0; 406 394 ··· 413 397 static int __exit sa1100_mtd_remove(struct device *dev) 414 398 { 415 399 struct sa_info *info = dev_get_drvdata(dev); 400 + struct flash_platform_data *plat = dev->platform_data; 401 + 416 402 dev_set_drvdata(dev, NULL); 417 - sa1100_destroy(info); 403 + sa1100_destroy(info, plat); 404 + 418 405 return 0; 419 406 } 420 407 ··· 440 421 info->mtd->resume(info->mtd); 441 422 return 0; 442 423 } 424 + 425 + static void sa1100_mtd_shutdown(struct device *dev) 426 + { 427 + struct sa_info *info = dev_get_drvdata(dev); 428 + if (info && info->mtd->suspend(info->mtd) == 0) 429 + info->mtd->resume(info->mtd); 430 + } 443 431 #else 444 432 #define sa1100_mtd_suspend NULL 445 433 #define sa1100_mtd_resume NULL 434 + #define sa1100_mtd_shutdown NULL 446 435 #endif 447 436 448 437 static struct device_driver sa1100_mtd_driver = { ··· 460 433 .remove = __exit_p(sa1100_mtd_remove), 461 434 .suspend = sa1100_mtd_suspend, 462 435 .resume = sa1100_mtd_resume, 436 + .shutdown = sa1100_mtd_shutdown, 463 437 }; 464 438 465 439 static int __init sa1100_mtd_init(void)
+1 -1
include/asm-arm/arch-aaec2000/memory.h
··· 13 13 14 14 #include <linux/config.h> 15 15 16 - #define PHYS_OFFSET (0xf0000000UL) 16 + #define PHYS_OFFSET UL(0xf0000000) 17 17 18 18 #define __virt_to_bus(x) __virt_to_phys(x) 19 19 #define __bus_to_virt(x) __phys_to_virt(x)
+1 -1
include/asm-arm/arch-cl7500/memory.h
··· 17 17 /* 18 18 * Physical DRAM offset. 19 19 */ 20 - #define PHYS_OFFSET (0x10000000UL) 20 + #define PHYS_OFFSET UL(0x10000000) 21 21 22 22 /* 23 23 * These are exactly the same on the RiscPC as the
+1 -1
include/asm-arm/arch-clps711x/memory.h
··· 25 25 /* 26 26 * Physical DRAM offset. 27 27 */ 28 - #define PHYS_OFFSET (0xc0000000UL) 28 + #define PHYS_OFFSET UL(0xc0000000) 29 29 30 30 /* 31 31 * Virtual view <-> DMA view memory address translations
+1 -1
include/asm-arm/arch-ebsa110/memory.h
··· 19 19 /* 20 20 * Physical DRAM offset. 21 21 */ 22 - #define PHYS_OFFSET (0x00000000UL) 22 + #define PHYS_OFFSET UL(0x00000000) 23 23 24 24 /* 25 25 * We keep this 1:1 so that we don't interfere
+5 -5
include/asm-arm/arch-ebsa285/memory.h
··· 46 46 #if defined(CONFIG_ARCH_FOOTBRIDGE) 47 47 48 48 /* Task size and page offset at 3GB */ 49 - #define TASK_SIZE (0xbf000000UL) 50 - #define PAGE_OFFSET (0xc0000000UL) 49 + #define TASK_SIZE UL(0xbf000000) 50 + #define PAGE_OFFSET UL(0xc0000000) 51 51 52 52 #elif defined(CONFIG_ARCH_CO285) 53 53 54 54 /* Task size and page offset at 1.5GB */ 55 - #define TASK_SIZE (0x5f000000UL) 56 - #define PAGE_OFFSET (0x60000000UL) 55 + #define TASK_SIZE UL(0x5f000000) 56 + #define PAGE_OFFSET UL(0x60000000) 57 57 58 58 #else 59 59 ··· 64 64 /* 65 65 * Physical DRAM offset. 66 66 */ 67 - #define PHYS_OFFSET (0x00000000UL) 67 + #define PHYS_OFFSET UL(0x00000000) 68 68 69 69 /* 70 70 * This decides where the kernel will search for a free chunk of vm
+1 -1
include/asm-arm/arch-epxa10db/memory.h
··· 23 23 /* 24 24 * Physical DRAM offset. 25 25 */ 26 - #define PHYS_OFFSET (0x00000000UL) 26 + #define PHYS_OFFSET UL(0x00000000) 27 27 28 28 /* 29 29 * Virtual view <-> DMA view memory address translations
+1 -1
include/asm-arm/arch-h720x/memory.h
··· 11 11 * Page offset: 12 12 * ( 0xc0000000UL ) 13 13 */ 14 - #define PHYS_OFFSET (0x40000000UL) 14 + #define PHYS_OFFSET UL(0x40000000) 15 15 16 16 /* 17 17 * Virtual view <-> DMA view memory address translations
+1 -1
include/asm-arm/arch-imx/memory.h
··· 21 21 #ifndef __ASM_ARCH_MMU_H 22 22 #define __ASM_ARCH_MMU_H 23 23 24 - #define PHYS_OFFSET (0x08000000UL) 24 + #define PHYS_OFFSET UL(0x08000000) 25 25 26 26 /* 27 27 * Virtual view <-> DMA view memory address translations
+2 -2
include/asm-arm/arch-integrator/memory.h
··· 23 23 /* 24 24 * Physical DRAM offset. 25 25 */ 26 - #define PHYS_OFFSET (0x00000000UL) 27 - #define BUS_OFFSET (0x80000000UL) 26 + #define PHYS_OFFSET UL(0x00000000) 27 + #define BUS_OFFSET UL(0x80000000) 28 28 29 29 /* 30 30 * Virtual view <-> DMA view memory address translations
+2 -2
include/asm-arm/arch-iop3xx/memory.h
··· 12 12 * Physical DRAM offset. 13 13 */ 14 14 #ifndef CONFIG_ARCH_IOP331 15 - #define PHYS_OFFSET (0xa0000000UL) 15 + #define PHYS_OFFSET UL(0xa0000000) 16 16 #else 17 - #define PHYS_OFFSET (0x00000000UL) 17 + #define PHYS_OFFSET UL(0x00000000) 18 18 #endif 19 19 20 20 /*
+1 -1
include/asm-arm/arch-ixp2000/memory.h
··· 13 13 #ifndef __ASM_ARCH_MEMORY_H 14 14 #define __ASM_ARCH_MEMORY_H 15 15 16 - #define PHYS_OFFSET (0x00000000UL) 16 + #define PHYS_OFFSET UL(0x00000000) 17 17 18 18 /* 19 19 * Virtual view <-> DMA view memory address translations
+26 -26
include/asm-arm/arch-ixp2000/platform.h
··· 15 15 16 16 #ifndef __ASSEMBLY__ 17 17 18 - /* 19 - * The IXP2400 B0 silicon contains an erratum (#66) that causes writes 20 - * to on-chip I/O register to not complete fully. What this means is 21 - * that if you have a write to on-chip I/O followed by a back-to-back 22 - * read or write, the first write will happen twice. OR...if it's 23 - * not a back-to-back transaction, the read or write will generate 24 - * incorrect data. 25 - * 26 - * The official work around for this is to set the on-chip I/O regions 27 - * as XCB=101 and then force a read-back from the register. 28 - * 29 - */ 30 - #if defined(CONFIG_ARCH_ENP2611) || defined(CONFIG_ARCH_IXDP2400) || defined(CONFIG_ARCH_IXDP2401) 31 - 32 - #include <asm/system.h> /* Pickup local_irq_ functions */ 18 + static inline unsigned long ixp2000_reg_read(volatile void *reg) 19 + { 20 + return *((volatile unsigned long *)reg); 21 + } 33 22 34 23 static inline void ixp2000_reg_write(volatile void *reg, unsigned long val) 24 + { 25 + *((volatile unsigned long *)reg) = val; 26 + } 27 + 28 + /* 29 + * On the IXP2400, we can't use XCB=000 due to chip bugs. We use 30 + * XCB=101 instead, but that makes all I/O accesses bufferable. This 31 + * is not a problem in general, but we do have to be slightly more 32 + * careful because I/O writes are no longer automatically flushed out 33 + * of the write buffer. 34 + * 35 + * In cases where we want to make sure that a write has been flushed 36 + * out of the write buffer before we proceed, for example when masking 37 + * a device interrupt before re-enabling IRQs in CPSR, we can use this 38 + * function, ixp2000_reg_wrb, which performs a write, a readback, and 39 + * issues a dummy instruction dependent on the value of the readback 40 + * (mov rX, rX) to make sure that the readback has completed before we 41 + * continue. 42 + */ 43 + static inline void ixp2000_reg_wrb(volatile void *reg, unsigned long val) 35 44 { 36 45 unsigned long dummy; 37 - unsigned long flags; 38 46 39 - local_irq_save(flags); 40 47 *((volatile unsigned long *)reg) = val; 41 - barrier(); 48 + 42 49 dummy = *((volatile unsigned long *)reg); 43 - local_irq_restore(flags); 50 + __asm__ __volatile__("mov %0, %0" : "+r" (dummy)); 44 51 } 45 - #else 46 - static inline void ixp2000_reg_write(volatile void *reg, unsigned long val) 47 - { 48 - *((volatile unsigned long *)reg) = val; 49 - } 50 - #endif /* IXDP2400 || IXDP2401 */ 51 - #define ixp2000_reg_read(reg) (*((volatile unsigned long *)reg)) 52 52 53 53 /* 54 54 * Boards may multiplex different devices on the 2nd channel of
+48 -25
include/asm-arm/arch-ixp4xx/ixp4xx-regs.h
··· 36 36 * 37 37 * 0x6000000 0x00004000 ioremap'd QMgr 38 38 * 39 - * 0xC0000000 0x00001000 0xffbfe000 PCI CFG 39 + * 0xC0000000 0x00001000 0xffbff000 PCI CFG 40 40 * 41 - * 0xC4000000 0x00001000 0xffbfd000 EXP CFG 41 + * 0xC4000000 0x00001000 0xffbfe000 EXP CFG 42 42 * 43 - * 0xC8000000 0x0000C000 0xffbf2000 On-Chip Peripherals 43 + * 0xC8000000 0x00013000 0xffbeb000 On-Chip Peripherals 44 44 */ 45 45 46 46 /* ··· 52 52 * Expansion BUS Configuration registers 53 53 */ 54 54 #define IXP4XX_EXP_CFG_BASE_PHYS (0xC4000000) 55 - #define IXP4XX_EXP_CFG_BASE_VIRT (0xFFBFD000) 55 + #define IXP4XX_EXP_CFG_BASE_VIRT (0xFFBFE000) 56 56 #define IXP4XX_EXP_CFG_REGION_SIZE (0x00001000) 57 57 58 58 /* 59 59 * PCI Config registers 60 60 */ 61 61 #define IXP4XX_PCI_CFG_BASE_PHYS (0xC0000000) 62 - #define IXP4XX_PCI_CFG_BASE_VIRT (0xFFBFE000) 62 + #define IXP4XX_PCI_CFG_BASE_VIRT (0xFFBFF000) 63 63 #define IXP4XX_PCI_CFG_REGION_SIZE (0x00001000) 64 64 65 65 /* 66 66 * Peripheral space 67 67 */ 68 68 #define IXP4XX_PERIPHERAL_BASE_PHYS (0xC8000000) 69 - #define IXP4XX_PERIPHERAL_BASE_VIRT (0xFFBF2000) 70 - #define IXP4XX_PERIPHERAL_REGION_SIZE (0x0000C000) 69 + #define IXP4XX_PERIPHERAL_BASE_VIRT (0xFFBEB000) 70 + #define IXP4XX_PERIPHERAL_REGION_SIZE (0x00013000) 71 71 72 72 /* 73 73 * Debug UART ··· 115 115 /* 116 116 * Peripheral Space Register Region Base Addresses 117 117 */ 118 - #define IXP4XX_UART1_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x0000) 119 - #define IXP4XX_UART2_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x1000) 120 - #define IXP4XX_PMU_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x2000) 121 - #define IXP4XX_INTC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x3000) 122 - #define IXP4XX_GPIO_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x4000) 123 - #define IXP4XX_TIMER_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x5000) 124 - #define IXP4XX_EthA_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x9000) 125 - #define IXP4XX_EthB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xA000) 126 - #define IXP4XX_USB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xB000) 118 + #define IXP4XX_UART1_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x0000) 119 + #define IXP4XX_UART2_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x1000) 120 + #define IXP4XX_PMU_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x2000) 121 + #define IXP4XX_INTC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x3000) 122 + #define IXP4XX_GPIO_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x4000) 123 + #define IXP4XX_TIMER_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x5000) 124 + #define IXP4XX_NPEA_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x6000) 125 + #define IXP4XX_NPEB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x7000) 126 + #define IXP4XX_NPEC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x8000) 127 + #define IXP4XX_EthB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x9000) 128 + #define IXP4XX_EthC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xA000) 129 + #define IXP4XX_USB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xB000) 130 + /* ixp46X only */ 131 + #define IXP4XX_EthA_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xC000) 132 + #define IXP4XX_EthB1_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xD000) 133 + #define IXP4XX_EthB2_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xE000) 134 + #define IXP4XX_EthB3_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xF000) 135 + #define IXP4XX_TIMESYNC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x10000) 136 + #define IXP4XX_I2C_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x11000) 137 + #define IXP4XX_SSP_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x12000) 127 138 128 - #define IXP4XX_UART1_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x0000) 129 - #define IXP4XX_UART2_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x1000) 130 - #define IXP4XX_PMU_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x2000) 131 - #define IXP4XX_INTC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x3000) 132 - #define IXP4XX_GPIO_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x4000) 133 - #define IXP4XX_TIMER_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x5000) 134 - #define IXP4XX_EthA_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x9000) 135 - #define IXP4XX_EthB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xA000) 136 - #define IXP4XX_USB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xB000) 139 + 140 + #define IXP4XX_UART1_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x0000) 141 + #define IXP4XX_UART2_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x1000) 142 + #define IXP4XX_PMU_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x2000) 143 + #define IXP4XX_INTC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x3000) 144 + #define IXP4XX_GPIO_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x4000) 145 + #define IXP4XX_TIMER_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x5000) 146 + #define IXP4XX_NPEA_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_PHYS + 0x6000) 147 + #define IXP4XX_NPEB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_PHYS + 0x7000) 148 + #define IXP4XX_NPEC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_PHYS + 0x8000) 149 + #define IXP4XX_EthB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x9000) 150 + #define IXP4XX_EthC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xA000) 151 + #define IXP4XX_USB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xB000) 152 + /* ixp46X only */ 153 + #define IXP4XX_EthA_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xC000) 154 + #define IXP4XX_EthB1_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xD000) 155 + #define IXP4XX_EthB2_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xE000) 156 + #define IXP4XX_EthB3_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xF000) 157 + #define IXP4XX_TIMESYNC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x10000) 158 + #define IXP4XX_I2C_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x11000) 159 + #define IXP4XX_SSP_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x12000) 137 160 138 161 /* 139 162 * Constants to make it easy to access Interrupt Controller registers
+1 -1
include/asm-arm/arch-ixp4xx/memory.h
··· 12 12 /* 13 13 * Physical DRAM offset. 14 14 */ 15 - #define PHYS_OFFSET (0x00000000UL) 15 + #define PHYS_OFFSET UL(0x00000000) 16 16 17 17 #ifndef __ASSEMBLY__ 18 18
+1 -1
include/asm-arm/arch-l7200/memory.h
··· 15 15 /* 16 16 * Physical DRAM offset on the L7200 SDB. 17 17 */ 18 - #define PHYS_OFFSET (0xf0000000UL) 18 + #define PHYS_OFFSET UL(0xf0000000) 19 19 20 20 #define __virt_to_bus(x) __virt_to_phys(x) 21 21 #define __bus_to_virt(x) __phys_to_virt(x)
+1 -1
include/asm-arm/arch-lh7a40x/memory.h
··· 17 17 /* 18 18 * Physical DRAM offset. 19 19 */ 20 - #define PHYS_OFFSET (0xc0000000UL) 20 + #define PHYS_OFFSET UL(0xc0000000) 21 21 22 22 /* 23 23 * Virtual view <-> DMA view memory address translations
+3 -3
include/asm-arm/arch-omap/memory.h
··· 37 37 * Physical DRAM offset. 38 38 */ 39 39 #if defined(CONFIG_ARCH_OMAP1) 40 - #define PHYS_OFFSET (0x10000000UL) 40 + #define PHYS_OFFSET UL(0x10000000) 41 41 #elif defined(CONFIG_ARCH_OMAP2) 42 - #define PHYS_OFFSET (0x80000000UL) 42 + #define PHYS_OFFSET UL(0x80000000) 43 43 #endif 44 44 45 45 /* ··· 66 66 /* 67 67 * OMAP-1510 Local Bus address offset 68 68 */ 69 - #define OMAP1510_LB_OFFSET (0x30000000UL) 69 + #define OMAP1510_LB_OFFSET UL(0x30000000) 70 70 71 71 #define virt_to_lbus(x) ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET) 72 72 #define lbus_to_virt(x) ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET)
+1 -1
include/asm-arm/arch-pxa/memory.h
··· 15 15 /* 16 16 * Physical DRAM offset. 17 17 */ 18 - #define PHYS_OFFSET (0xa0000000UL) 18 + #define PHYS_OFFSET UL(0xa0000000) 19 19 20 20 /* 21 21 * Virtual view <-> DMA view memory address translations
+1 -1
include/asm-arm/arch-rpc/memory.h
··· 21 21 /* 22 22 * Physical DRAM offset. 23 23 */ 24 - #define PHYS_OFFSET (0x10000000UL) 24 + #define PHYS_OFFSET UL(0x10000000) 25 25 26 26 /* 27 27 * These are exactly the same on the RiscPC as the
+2 -2
include/asm-arm/arch-s3c2410/memory.h
··· 28 28 * and at 0x0C000000 for S3C2400 29 29 */ 30 30 #ifdef CONFIG_CPU_S3C2400 31 - #define PHYS_OFFSET (0x0C000000UL) 31 + #define PHYS_OFFSET UL(0x0C000000) 32 32 #else 33 - #define PHYS_OFFSET (0x30000000UL) 33 + #define PHYS_OFFSET UL(0x30000000) 34 34 #endif 35 35 36 36 /*
+1 -1
include/asm-arm/arch-sa1100/memory.h
··· 13 13 /* 14 14 * Physical DRAM offset is 0xc0000000 on the SA1100 15 15 */ 16 - #define PHYS_OFFSET (0xc0000000UL) 16 + #define PHYS_OFFSET UL(0xc0000000) 17 17 18 18 #ifndef __ASSEMBLY__ 19 19
+1 -1
include/asm-arm/arch-shark/memory.h
··· 15 15 /* 16 16 * Physical DRAM offset. 17 17 */ 18 - #define PHYS_OFFSET (0x08000000UL) 18 + #define PHYS_OFFSET UL(0x08000000) 19 19 20 20 #ifndef __ASSEMBLY__ 21 21
+1 -1
include/asm-arm/arch-versatile/memory.h
··· 23 23 /* 24 24 * Physical DRAM offset. 25 25 */ 26 - #define PHYS_OFFSET (0x00000000UL) 26 + #define PHYS_OFFSET UL(0x00000000) 27 27 28 28 /* 29 29 * Virtual view <-> DMA view memory address translations
+1
include/asm-arm/mach/arch.h
··· 50 50 */ 51 51 #define MACHINE_START(_type,_name) \ 52 52 static const struct machine_desc __mach_desc_##_type \ 53 + __attribute_used__ \ 53 54 __attribute__((__section__(".arch.info.init"))) = { \ 54 55 .nr = MACH_TYPE_##_type, \ 55 56 .name = _name,
+2
include/asm-arm/mach/flash.h
··· 14 14 15 15 /* 16 16 * map_name: the map probe function name 17 + * name: flash device name (eg, as used with mtdparts=) 17 18 * width: width of mapped device 18 19 * init: method called at driver/device initialisation 19 20 * exit: method called at driver/device removal ··· 24 23 */ 25 24 struct flash_platform_data { 26 25 const char *map_name; 26 + const char *name; 27 27 unsigned int width; 28 28 int (*init)(void); 29 29 void (*exit)(void);
+2 -2
include/asm-arm/mach/map.h
··· 27 27 #define MT_ROM 6 28 28 #define MT_IXP2000_DEVICE 7 29 29 30 - #define __phys_to_pfn(paddr) (paddr >> PAGE_SHIFT) 31 - #define __pfn_to_phys(pfn) (pfn << PAGE_SHIFT) 30 + #define __phys_to_pfn(paddr) ((paddr) >> PAGE_SHIFT) 31 + #define __pfn_to_phys(pfn) ((pfn) << PAGE_SHIFT) 32 32 33 33 extern void create_memmap_holes(struct meminfo *); 34 34 extern void memtable_init(struct meminfo *);
+21 -4
include/asm-arm/memory.h
··· 12 12 #ifndef __ASM_ARM_MEMORY_H 13 13 #define __ASM_ARM_MEMORY_H 14 14 15 + /* 16 + * Allow for constants defined here to be used from assembly code 17 + * by prepending the UL suffix only with actual C code compilation. 18 + */ 19 + #ifndef __ASSEMBLY__ 20 + #define UL(x) (x##UL) 21 + #else 22 + #define UL(x) (x) 23 + #endif 24 + 15 25 #include <linux/config.h> 16 26 #include <linux/compiler.h> 17 27 #include <asm/arch/memory.h> ··· 31 21 * TASK_SIZE - the maximum size of a user space task. 32 22 * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area 33 23 */ 34 - #define TASK_SIZE (0xbf000000UL) 35 - #define TASK_UNMAPPED_BASE (0x40000000UL) 24 + #define TASK_SIZE UL(0xbf000000) 25 + #define TASK_UNMAPPED_BASE UL(0x40000000) 36 26 #endif 37 27 38 28 /* 39 29 * The maximum size of a 26-bit user space task. 40 30 */ 41 - #define TASK_SIZE_26 (0x04000000UL) 31 + #define TASK_SIZE_26 UL(0x04000000) 42 32 43 33 /* 44 34 * Page offset: 3GB 45 35 */ 46 36 #ifndef PAGE_OFFSET 47 - #define PAGE_OFFSET (0xc0000000UL) 37 + #define PAGE_OFFSET UL(0xc0000000) 48 38 #endif 49 39 50 40 /* ··· 67 57 #if TASK_SIZE > MODULE_START 68 58 #error Top of user space clashes with start of module space 69 59 #endif 60 + 61 + /* 62 + * The XIP kernel gets mapped at the bottom of the module vm area. 63 + * Since we use sections to map it, this macro replaces the physical address 64 + * with its virtual address while keeping offset from the base section. 65 + */ 66 + #define XIP_VIRT_ADDR(physaddr) (MODULE_START + ((physaddr) & 0x000fffff)) 70 67 71 68 #ifndef __ASSEMBLY__ 72 69