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ARM: dts: rockchip: Add ethernet rgmiim1 pin-control for rv1126
Add ethernet pin-control for rv1126 SoC.
Co-Developed-by: Jagan Teki <jagan@edgeble.ai>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Signed-off-by: Anand Moon <anand@edgeble.ai>
Link: https://lore.kernel.org/r/20230111172437.5295-2-anand@edgeble.ai
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
authored by
Anand Moon
and committed by
Heiko Stuebner
bdcb1f4e
954f5510
+42
+42
arch/arm/boot/dts/rv1126-pinctrl.dtsi
+42
arch/arm/boot/dts/rv1126-pinctrl.dtsi
···
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* by adding changes at end of this file.
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*/
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&pinctrl {
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+
clk_out_ethernet {
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/omit-if-no-ref/
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clk_out_ethernetm1_pins: clk-out-ethernetm1-pins {
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rockchip,pins =
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/* clk_out_ethernet_m1 */
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<2 RK_PC5 2 &pcfg_pull_none>;
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};
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};
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emmc {
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/omit-if-no-ref/
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emmc_rstnout: emmc-rstnout {
···
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<0 RK_PB4 1 &pcfg_pull_none_drv_level_0_smt>,
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/* i2c0_sda */
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<0 RK_PB5 1 &pcfg_pull_none_drv_level_0_smt>;
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};
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};
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rgmii {
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/omit-if-no-ref/
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rgmiim1_pins: rgmiim1-pins {
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rockchip,pins =
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/* rgmii_mdc_m1 */
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<2 RK_PC2 2 &pcfg_pull_none>,
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/* rgmii_mdio_m1 */
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<2 RK_PC1 2 &pcfg_pull_none>,
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/* rgmii_rxclk_m1 */
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<2 RK_PD3 2 &pcfg_pull_none>,
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/* rgmii_rxd0_m1 */
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<2 RK_PB5 2 &pcfg_pull_none>,
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/* rgmii_rxd1_m1 */
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<2 RK_PB6 2 &pcfg_pull_none>,
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/* rgmii_rxd2_m1 */
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<2 RK_PC7 2 &pcfg_pull_none>,
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/* rgmii_rxd3_m1 */
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<2 RK_PD0 2 &pcfg_pull_none>,
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/* rgmii_rxdv_m1 */
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<2 RK_PB4 2 &pcfg_pull_none>,
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/* rgmii_txclk_m1 */
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<2 RK_PD2 2 &pcfg_pull_none_drv_level_3>,
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/* rgmii_txd0_m1 */
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<2 RK_PC3 2 &pcfg_pull_none_drv_level_3>,
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/* rgmii_txd1_m1 */
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<2 RK_PC4 2 &pcfg_pull_none_drv_level_3>,
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/* rgmii_txd2_m1 */
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<2 RK_PD1 2 &pcfg_pull_none_drv_level_3>,
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/* rgmii_txd3_m1 */
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<2 RK_PA4 2 &pcfg_pull_none_drv_level_3>,
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/* rgmii_txen_m1 */
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<2 RK_PC6 2 &pcfg_pull_none_drv_level_3>;
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};
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};
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sdmmc0 {